TW201716774A - Sensor chip for electrostatic capacitance measurement and measuring device having the same - Google Patents

Abstract

Electrostatic capacitance can be measured with high directivity in a specific direction. A sensor chip that measures the electrostatic capacitance includes a first electrode, a second electrode and a third electrode. The first electrode has a first portion. The second electrode has a second portion extended on the first portion of the first electrode, and is insulated from the first electrode within the sensor chip. The third electrode has a front face extended in a direction which intersects with the first portion of the first electrode and the second portion of the second electrode, and is provided on the first portion and the second portion. The third electrode is insulated from the first electrode and the second electrode within the sensor chip.

Description

Inductive chip for measuring capacitance and measuring device having the same

Embodiments of the present invention relate to an inductive chip for measuring capacitance and a measuring instrument including the same.

In the manufacture of an electronic component called a semiconductor element, a processing apparatus for processing a target object is used. The processing device generally has a processing container and a mounting table. The object to be processed is carried into the processing container by the transfer device and placed on the mounting table. The object to be processed is then processed in the processing container.

The position of the object to be processed on the mounting table is a very important factor in order to satisfy various requirements for the uniformity of the processing surface of the object to be processed. Therefore, the transport apparatus needs to transport the object to be processed to a predetermined position on the mounting table.

When the conveyance position of the object to be processed is deviated from the predetermined position by the conveyance device, it is necessary to correct the coordinate information of the conveyance position of the specific conveyance device.

In order to correct the coordinate information of the transport device, it is necessary to detect the position of the object to be processed on the mounting table. In the past, electrostatic capacitance sensors were used for the detection of such positions. The detection system using the position of the electrostatic capacitance is described, for example, in Patent Document 1 below.

[Previous Technical Literature]

[Patent Literature]

Patent Document 1: Japanese Patent No. 4956328

Further, in the processing apparatus of the plasma processing apparatus, an electrostatic chuck that adsorbs the object to be processed is used. Further, a focus ring is provided on the mounting table so as to surround the edge of the object to be processed.

Fig. 1 is a cross-sectional view showing an example of the constitution of an electrostatic chuck and a focus ring. As shown in Fig. 1, the electrostatic chuck ESC has a substantially disk shape. Focus ring FR is used to surround the electrostatic clamp ESC It extends in the peripheral direction with respect to the central axis AXE of the electrostatic chuck ESC. The focus ring FR has a first portion P1 and a second portion P2. The first portion P1 and the second portion P2 have an annular plate shape. The second part P2 is placed on the first part P1. The inner edge P2i of the second portion P2 has a diameter larger than the diameter of the inner edge P1i of the first portion P1. The object to be processed (wafer W in Fig. 1) is placed on the electrostatic chuck ESC such that its edge region is located on the first portion P1 of the focus ring FR.

In the configuration of the electrostatic chuck ESC and the focus ring FR as described above, when the gap between the edge of the object to be processed and the inner edge P2i of the second portion P2 of the focus ring FR is changed from the peripheral direction, the plasma is biased. The shift occurs to cause a characteristic deviation such as a change in the etching size in the surface of the processed body. Further, local adhesion of the particles to the object to be processed occurs. Therefore, it is necessary to correct the coordinate information of the transport device such that the gap between the edge of the object to be processed and the inner edge P2i of the second portion of the focus ring FR is slightly fixed in the peripheral direction, that is, the object to be processed Coordinate information of the transfer location. Therefore, it is necessary to measure the gap distance between the edge of the object to be processed and the inner edge P2i of the second portion P2 of the focus ring FR.

Then, the inventors of the present invention have developed a technique in which an electrostatic sensor for measuring a capacitance as a physical quantity reflecting the distance is mounted on a measuring instrument having the same shape as the object to be processed, and the measuring device is transported by the conveying device. On the electrostatic chuck, the electrostatic capacitance is obtained by the measuring device. FIG. 2 shows a longitudinal cross-sectional configuration of an example of a sensing wafer for measuring electrostatic capacitance. The sensing wafer 1000 shown in FIG. 2 is an example of an inductive wafer that can be disposed along the edge of the measuring device of the same shape as the object to be processed, and has a substrate portion 1002 and an electrode 1004. The substrate portion 1002 has a body portion 1002m. The body portion 1002m is formed, for example, by a crucible. An insulating region 1002f is formed on the surface of the body portion 1002m. The insulating region 1002f is, for example, a thermal oxide film. The substrate portion 1002 has an upper surface 1002a, a lower surface 1002b, and an end surface 1002c. The end surface 1002c is formed in a trapezoidal shape, and the lower side portion 1002d of the end surface 1002c protrudes from the upper side portion 1002u of the end surface 1002c to the focus ring FR side. The electrode 1004 is disposed along the upper side portion 1002u of the end surface 1002c.

3 is a view showing that the electrode of the sensing wafer shown in FIG. 2 is connected to the electrostatic capacitance, and the sensing wafer 1000 is moved in a direction RD (see FIG. 2) toward the inner edge P2i of the second portion P2 of the focus ring FR (see FIG. 2). Measured electrostatic capacitance. Further, the distance LVD (see FIG. 2) between the upper surface P1t of the first portion P1 and the lower surface of the induction wafer 1000 at the time of electrostatic capacitance measurement was 100 μm. In FIG. 3, the horizontal axis indicates the lower portion 1002d of the end surface 1002c of the substrate portion 1002 and the second portion P2 of the focus ring FR. The distance LRD between the inner edges P2i (see Fig. 2), and the vertical axis shows the electrostatic capacitance. Moreover, FIG. 3 shows an electrostatic capacitance calculated value assuming that only the electrostatic capacitance exists in the direction RD and an electrostatic capacitance measured using the induction wafer 1000.

When the measured value is referred to in comparison with the calculated value shown in FIG. 3, when the distance LRD is about 2.5 mm, the electrostatic capacitance (actual measurement value) obtained by the measurement using the induction wafer 100 is rapidly increased. This distance of 2.5 mm is the same distance as the distance L12 (see FIG. 2) between the inner edge P2i of the second portion P2 and the inner edge P1i of the first portion P1. Therefore, this phenomenon represents not only the electrostatic capacitance in the specific direction (direction RD of FIG. 2) existing in the inner edge of the focus ring FR (the inner edge P2i of the second portion P2) with respect to the electrode 1004 of the sensing wafer 1000, The electrostatic capacitance below (VD in the direction of Figure 2) also affects the measurement of the sensing wafer 1000. However, in the measurement of the distance LRD between the inner edge of the focus ring FR and the sensing wafer 1000, the electrostatic capacitance under the sensing wafer 1000 is not required.

Therefore, it is necessary to have a high directivity in a specific direction to perform measurement of electrostatic capacitance.

In one aspect, an inductive wafer for electrostatic capacitance measurement is provided. The sensing wafer has a first electrode, a second electrode, and a third electrode. The first electrode system has a first portion. The second electrode has a second portion extending over the first portion of the first electrode, and is insulated from the first electrode in the induction wafer. The third electrode has a front surface extending in a direction in which the first portion of the first electrode and the second portion of the second electrode intersect, and is provided on the first portion and the second portion, and is in the sensing wafer. The 1 electrode and the second electrode are insulated.

In one aspect, the sensing chip is provided with a third electrode of the sensing electrode on the first portion of the first electrode, and a second electrode is disposed between the first portion and the third electrode of the first electrode. section. When the induction wafer is used, the potential of the first electrode is set to the ground potential, and the high frequency signal is supplied to the second electrode and the third electrode. At this time, the voltage amplitude of the third electrode is not affected by the direction in which the first electrode is provided with respect to the third electrode, that is, the electrostatic capacitance under the sensing wafer, and reflects the specific direction, that is, the first The voltage amplitude of the electrostatic capacitance in the direction in which the front surface of the electrode 3 faces. Thus, by using the sensing wafer, it is possible to measure the electrostatic capacitance with high directivity in a specific direction.

In one embodiment, the first electrode and the second electrode may be in a region before the third electrode is disposed. The side is open and extends around the periphery of the third electrode. According to this embodiment, the third electrode can be shielded in a direction other than the specific direction by the first electrode and the second electrode. Thereby, the directivity with respect to a specific direction in the measurement of the electrostatic capacitance can be further improved.

In one embodiment, the inductive wafer system further includes an end surface having a curved surface having a predetermined curvature, and the front surface of the third electrode may extend along the end surface. According to this embodiment, the radial distance between each position of the front surface of the third electrode and the inner edge of the focus ring can be set to be slightly equidistant. Thereby, the measurement accuracy of the electrostatic capacitance can be further improved.

In one embodiment, the sensing wafer system further includes a substrate portion. The substrate portion has a surface including a front surface and a lower surface, and the surface has an insulating property. The third electrode extends along the front surface of the substrate portion, and the second portion of the second electrode extends along the lower surface of the substrate portion. In one embodiment, the substrate portion is formed of an insulating material. By forming the substrate portion from an insulating material, the internal electrostatic capacitance of the sensing wafer can be reduced. Further, in one embodiment, the insulating material may be borosilicate glass, tantalum nitride, quartz or alumina.

In another aspect, a measurer for measuring electrostatic capacitance is provided. The measuring device is provided with a base substrate, a plurality of sensing wafers, and a circuit substrate. The plurality of sensing wafers are any of the above-described sensing wafers and are arranged along the edge of the base substrate. The circuit board is mounted on the base substrate. The circuit board has a ground potential line, a high frequency oscillator, a C/V conversion circuit, and an A/D converter. The earth potential line is electrically connected to the first electrode. The high frequency oscillator is configured to generate a high frequency signal and is electrically connected to the second electrode and the third electrode. The C/V conversion circuit is configured to convert a voltage amplitude in a third electrode of each of the plurality of sensing chips into a voltage signal indicating an electrostatic capacitance. The A/D converter converts the voltage signal output by the C/V conversion circuit into a digital value. According to the measuring device of this aspect, the digital value indicating the electrostatic capacitance can be obtained from the voltage amplitude in the third electrode of the sensing chip.

In one embodiment, the circuit board further includes a memory device and a communication device. The memory device is configured to memorize the digital value. The communication device is configured to wirelessly transmit the digital value stored in the memory device. According to this embodiment, the digital value stored in the memory device can be wirelessly transmitted.

In one embodiment, the circuit board may further include a switch for selectively connecting the first electrode to the ground potential line. Measurement when the first electrode is selectively connected to the earth potential line The device can measure the electrostatic capacitance in the above specific direction. On the other hand, when the first electrode is cut from the ground potential line, the measuring device can measure the total electrostatic capacitance of the electrostatic capacitance in the specific direction and the electrostatic capacitance below.

In one embodiment, the base substrate has a disk shape, and the plurality of sensing wafers may be disposed along the edge of the base substrate. In this embodiment, each of the plurality of sensing wafers has an end surface having a curved surface having a predetermined curvature, and the front surface of the third electrode extends along the end surface. In this embodiment, the measuring device has a shape slightly the same as the shape of the object to be processed in the shape of a disk. Also, the measurer can measure the electrostatic capacitance in a particular direction reflecting the distance between the focus ring and the edge of the measurer with high precision.

As described above, the measurement of the electrostatic capacitance can be performed with high directivity in a specific direction.

1‧‧‧Processing system

LM‧‧‧Loading Module

AN‧‧‧ aligner

LL1, LL2‧‧‧ loading chamber

TC‧‧‧Transfer chamber

TU1, TU2‧‧‧ transport device

PM1~PM6‧‧‧Program Module

MC‧‧‧Control Department

10‧‧‧ Plasma processing unit

12‧‧‧Processing container

30‧‧‧Upper electrode

40‧‧‧ gas source group

50‧‧‧Exhaust device

62‧‧‧1st high frequency power supply

64‧‧‧2nd high frequency power supply

PD‧‧‧ mounting table

LE‧‧‧ lower electrode

ESC‧‧‧Electrostatic fixture

FR‧‧‧ Focus ring

P1‧‧‧Part 1

P2‧‧‧Part 2

100‧‧‧Measurer

102‧‧‧Base substrate

104‧‧‧Induction chip

104A~104H‧‧‧Induction chip

104f‧‧‧ front side face

141‧‧‧1st electrode

141a‧‧‧Part 1

142‧‧‧2nd electrode

142a‧‧‧Part 2

143‧‧‧3rd electrode

143f‧‧‧ front

106‧‧‧Circuit board

108, 108A~108H‧‧‧Wiring group

161‧‧‧High frequency oscillator

162‧‧‧C/V conversion circuit

162A~162H‧‧‧C/V conversion circuit

163‧‧‧A/D converter

164‧‧‧ processor

165‧‧‧ memory device

167‧‧‧Power supply

GL‧‧‧ geodetic potential line

SWG‧‧ switch

Fig. 1 is a cross-sectional view showing an example of the constitution of an electrostatic chuck and a focus ring.

2 is a diagram showing an example of a sensing wafer for measuring an electrostatic capacitance.

Figure 3 shows the electrostatic capacitance measured using the sensing wafer of Figure 2.

Fig. 4 is a view showing a processing system having a conveying device.

Fig. 5 is a view showing an example of a plasma processing apparatus.

Figure 6 is a perspective view of a measurer of an embodiment.

Fig. 7 is a perspective view of an induction wafer according to an embodiment.

Figure 8 is a cross-sectional view taken along line VIII-VIII of Figure 7.

Figure 9 is a cross-sectional view taken along line IX-IX of Figure 8.

Fig. 10 is a view showing the configuration of a circuit board in an embodiment.

11 is an equivalent circuit diagram of the circuit substrate 106 and the inductive wafer 104.

Fig. 12 is a flow chart showing a method of adjusting the conveying device of the processing system according to the embodiment.

Figure 13 is a longitudinal cross-sectional view showing a sensing wafer according to another embodiment.

Fig. 14 is a graph showing the results of performance evaluation of the sensing wafer.

Figure 15 is a longitudinal cross-sectional view showing a sensing wafer according to still another embodiment.

Hereinafter, various embodiments will be described in detail with reference to the drawings. In the drawings, the same reference numerals are attached to the same or corresponding parts.

First, a processing device for processing a target object (hereinafter referred to as "wafer W") and a processing system having a transfer device for transporting the object to be processed to the processing device will be described. . Fig. 4 is a view showing a processing system having a conveying device. The processing system 1 shown in FIG. 4 includes a table 2a to 2d, containers 4a to 4d, a loading module LM, a counter AN, a loading chamber LL1, LL2, program modules PM1 to PM6, and a transfer chamber TC. .

The stages 2a-2d are arranged along an edge of the loading module LM. The containers 4a to 4d are mounted on the stages 2a to 2d, respectively. The containers 4a to 4d are each configured to house the wafer W.

The loading module LM has a chamber wall in which a transfer space of an atmospheric pressure state is drawn in the inner portion. The loading module LM has a conveying device TU1 in this conveying space. The transport device TU1 is configured to transport the wafer W between the containers 4a to 4d and the counter AN, between the register AN and the loading chambers LL1 to LL2, and between the loading chambers LL1 to LL2 and the containers 4a to 4d. .

The positioner AN is connected to the loading module LM. The positioner AN is configured to perform position adjustment (position correction) of the wafer W. The positional adjustment of the wafer W in the counter AN can be performed using an orientation flat or a notch of the wafer W or the like.

Each of the loading chamber LL1 and the loading chamber LL2 is disposed between the loading module LM and the transfer chamber TC. Each of the loading chamber LL1 and the loading chamber LL2 provides a preliminary decompression chamber.

The transfer chamber TC is connected to the loading chamber LL1 and the loading chamber LL2 through a gate valve. The transfer chamber TC provides a decompression chamber that can be depressurized, and the transfer device TU2 is housed in the decompression chamber. The transport device TU2 is configured to transport the wafer W between the load chambers LL1 to LL2 and the program modules PM1 to PM6 and between any two of the program modules PM1 to PM6.

The program modules PM1~PM6 are connected to the transfer chamber TC through a gate valve. Each of the program modules PM1 to PM6 is configured as a processing device for performing dedicated processing of the wafer W on the so-called plasma processing.

A series of operations in the processing system 1 for performing the processing of the wafer W are exemplified as follows. The transport module TU1 of the loading module LM picks up the wafer W from any of the containers 4a to 4d, and transports the wafer W to the counter AN. Next, the transport device TU1 takes out the position-adjusted wafer W from the register AN, and transports the wafer W to one of the loading chamber LL1 and the loading chamber LL2. Load the chamber. Then, one of the loading chambers decompresses the pressure of the preliminary decompression chamber to a predetermined pressure. Next, the transfer device TU2 of the transfer chamber TC takes out the wafer W from one of the load chambers, and transports the wafer W to any of the program modules PM1 to PM6. Then, one or more of the program modules PM1 to PM6 process the wafer W. Then, the transport device TU2 transfers the processed wafer from the program module to the loading chamber of one of the loading chamber LL1 and the loading chamber LL2. Next, the transport device TU1 transports the wafer W from one of the loading chambers to any of the containers 4a to 4d.

This processing system 1 is further provided with a control unit MC. The control unit MC may be a computer including a processor, a memory device called a memory, a display device, an input/output device, and a communication device. The series of operations of the processing system 1 is realized by controlling the respective units of the processing system 1 in accordance with the control unit MC of the program stored in the memory device.

FIG. 5 is a diagram showing an example of a plasma processing apparatus that can use any of the program modules PM1 to PM6. The plasma processing apparatus 10 shown in Fig. 5 is a capacitive coupling type plasma etching apparatus. The plasma processing apparatus 10 is provided with a processing container 12 having a substantially cylindrical shape. The processing container 12 is formed, for example, of aluminum, and its inner wall surface can be subjected to anodizing treatment. This processing container 12 is secured to ground.

A support portion 14 having a substantially cylindrical shape is provided on the bottom of the processing container 12. The support portion 14 is made of, for example, an insulating material. The support portion 14 will extend in the processing container 12 from the bottom of the processing container 12 in a vertical direction. Further, a mounting table PD is provided in the processing container 12. The mounting table PD is supported by the support portion 14.

The mounting table PD has a lower electrode LE and an electrostatic chuck ESC. The lower electrode LE includes a first plate body 18a and a second plate body 18b. The first plate body 18a and the second plate body 18b are made of, for example, a metal called aluminum, and have a substantially disk shape. The second plate body 18b is provided on the first plate body 18a, and is electrically connected to the first plate body 18a.

An electrostatic chuck ESC is provided on the second plate body 18b. The electrostatic chuck ESC has a structure in which an electrode of a conductive film is disposed between a pair of insulating layers or insulating sheets, and has a substantially disk shape. The electrode of the electrostatic chuck ESC is electrically connected to the DC power source 22 via the switch 23. The electrostatic chuck ESC adsorbs the wafer W by an electrostatic force such as a Coulomb force generated by a DC voltage from the DC power source 22. Thereby, the electrostatic chuck ESC can hold the wafer W.

A focus ring FR is provided on the peripheral portion of the second plate body 18b. This focus ring FR is related to FIG. 1 The focus ring of the description is the same. That is, the focus ring FR is disposed around the edge of the wafer W and the electrostatic chuck ESC. The focus ring FR has a first portion P1 and a second portion P2. The first portion P1 and the second portion P2 have an annular plate shape. The second part P2 is placed on the first part P1. The inner edge P2i of the second portion P2 has a diameter larger than the diameter of the inner edge P1i of the first portion P1. The wafer W is placed on the electrostatic chuck ESC such that its edge region is located on the first portion P1 of the focus ring FR. This focus ring FR can be formed of any of various materials such as bismuth, tantalum carbide, and ruthenium oxide.

The refrigerant flow path 24 is provided inside the second plate body 18b. The refrigerant flow path 24 constitutes a temperature control mechanism. The refrigerant flow path 24 is supplied with a refrigerant from the cooling unit provided outside the processing container 12 through the pipe 26a. The refrigerant supplied to the refrigerant flow path 24 passes through the pipe 26b and returns to the cooling unit. As a result, refrigerant is circulated between the refrigerant flow path 24 and the cooling unit. The temperature of the wafer W supported by the electrostatic chuck ESC is controlled by controlling the temperature of the refrigerant.

Further, the plasma processing apparatus 10 is provided with a gas supply line 28. The gas supply line 28 supplies a heat transfer gas such as He gas from the heat transfer gas supply means to the upper surface of the electrostatic chuck ESC and the inner surface of the wafer W.

Further, the plasma processing apparatus 10 is provided with an upper electrode 30. The upper electrode 30 is disposed opposite to the mounting table PD above the mounting table PD. A processing space S for plasma-treating the wafer W is provided between the upper electrode 30 and the mounting table PD.

The upper electrode 30 is supported by the upper portion of the processing container 12 through the insulating shielding member 32. The upper electrode 30 may include a top plate 34 and a support 36. The top plate 34 faces the processing space S, and the top plate 34 is provided with a plurality of gas ejection holes 34a. This top plate 34 can be formed of tantalum or quartz. Alternatively, the top plate 34 may be formed by forming a film of a so-called cerium oxide resistant to plasma on the surface of the aluminum substrate.

The support body 36 detachably supports the top plate 34, and may be composed of, for example, a so-called aluminum conductive material. This support 36 can have a water cooled configuration. A gas diffusion chamber 36a is provided inside the support body 36. The plurality of gas passage holes 36b that communicate with the gas discharge holes 34a from the gas diffusion chamber 36a extend downward. Further, the support body 36 is formed with a gas introduction port 36c for introducing a processing gas into the gas diffusion chamber 36a, and the gas introduction port 36c is connected to the gas supply pipe 38.

The gas supply pipe 38 is connected to the gas source group 40 through the valve group 42 and the flow controller group 44. The gas source group 40 is a plurality of gas sources for a plurality of gases. Valve group 42 contains a plurality of valves, flow The quantity controller group 44 is a complex flow controller containing a so-called mass flow controller. The plurality of gas sources of the gas source group 40 are connected to the gas supply pipe 38 through the valves corresponding to the valve group 42 and the flow controller corresponding to the flow controller group 44.

Further, the plasma processing apparatus 10 is provided with a deposition protection body 46 detachably provided along the inner wall of the processing container 12. The deposition protector 46 is also disposed on the outer periphery of the support portion 14. The deposition protector 46 prevents etching by-products (deposition) from adhering to the processing container 12, and can be constructed by coating a ceramic such as Y ₂ O _{3 with} aluminum.

An exhaust plate 48 is disposed between the bottom side of the processing vessel 12 and the support portion 14 and the side wall of the processing vessel 12. The exhaust plate 48 can be configured, for example, by coating a ceramic such as Y ₂ O ₃ with aluminum. The exhaust plate 48 is formed with a plurality of holes penetrating the thickness direction thereof. Below the exhaust plate 48 and the processing container 12, an exhaust port 12e is provided. The exhaust port 12e is connected to the exhaust device 50 through the exhaust pipe 52. The exhaust device 50 is a vacuum pump having a pressure regulating valve, a turbo molecular pump, or the like, and can decompress the space in the processing container 12 to a desired degree of vacuum. Further, the side wall of the processing container 12 is provided with a carry-in port 12g for the wafer W, and the carry-in port 12g can be opened and closed by the gate valve 54.

Further, the plasma processing apparatus 10 further includes a first high frequency power source 62 and a second high frequency power source 64. The first high-frequency power source 62 generates a high-frequency power source for generating plasma, and generates a high frequency of, for example, a frequency of 27 to 100 MHz. The first high frequency power source 62 is connected to the upper electrode 30 through the matching unit 66. The matching unit 66 has a circuit for matching the input impedance of the first high-frequency power source 62 with the input impedance of the load side (the upper electrode 30 side). Further, the first high-frequency power source 62 can also be connected to the lower electrode LE through the matching unit 66.

The second high-frequency power source 64 generates a power source that attracts ions to a high-frequency bias for the wafer W, and generates, for example, a high-frequency bias at a frequency in the range of 400 kHz to 13.56 MHz. The second high frequency power source 64 is connected to the lower electrode LE through the matching unit 68. The matcher 68 has a circuit for matching the output impedance of the second high-frequency power source 64 with the input impedance of the load side (the lower electrode LE side).

The plasma processing apparatus 10 supplies a gas from a selected one or more of the plurality of gas sources into the processing vessel 12. Further, the pressure in the space inside the processing container 12 is set to a predetermined pressure by the exhaust device 50. Further, the gas in the processing container 12 is excited by the high frequency from the first high frequency power source 62. Thereby generating plasma. The wafer W is then processed by the active groups produced. In addition, the high frequency bias of the second high frequency power source 64 can be used to absorb the ions as needed. Lead to wafer W.

Hereinafter, an embodiment of a measuring device for measuring the electrostatic capacitance reflected by the distance from the focus ring FR will be described. Figure 6 is a perspective view of a measurer associated with an embodiment. The measuring device 100 shown in FIG. 6 is provided with a base substrate 102. The base substrate 102 is formed of, for example, tantalum and has a substantially disk shape similar to the wafer W. The diameter of the base substrate 102 is the same as the diameter of the wafer W, for example, 300 mm.

The base substrate 102 has a lower portion 102a and an upper portion 102b. The lower side portion 102a is located at a portion where the upper side portion 102b is closer to the electrostatic chuck ESC when the measuring device 100 is disposed above the electrostatic chuck ESC. The sensor wafers 104A to 104H for measuring capacitance are mounted on the lower portion 102a of the base substrate 102. Further, the number of sensing wafers mounted on the measuring device 100 may be any number of three or more. The plurality of sensing wafers 104A-104H are arranged along the edge of the base substrate 102, for example, at equal intervals throughout the circumference of the edge. Specifically, the front end surface 104f of each of the plurality of sensing wafers 104A to 104H is disposed along the edge of the lower side portion 102a of the base substrate 102. In addition, in FIG. 6, the sensing wafers 104A to 104C of the plurality of sensing wafers 104A to 104H can be observed.

A concave portion 102r is defined on the upper surface portion 102b of the base substrate 102. The concave portion 102r includes a central region 102c and a plurality of radiation regions 102h. The central area 102c is an area that intersects the central axis AX100. The central axis AX100 is passed through the axis of the center of the base substrate 102 in the thickness direction. The central region 102c is provided with a circuit substrate 106. The plurality of radiation regions 102h extend from the central region 102c with respect to the central axis AX100 in the radial direction to a region above the region where the plurality of sensing wafers 104A to 104H are disposed. The plurality of radiation regions 102h are provided with wiring groups 108A to 108H for electrically connecting the plurality of sensing wafers 104A to 104H and the circuit substrate 106, respectively. Further, in the measuring device 100 shown in FIG. 6, the plurality of sensing wafers 104A to 104H are mounted on the lower portion 102a of the base substrate 102, but the plurality of sensing wafers 104A to 104H may be mounted on the upper portion 102b of the base substrate 102.

Hereinafter, the induction wafer will be described in detail. Figure 7 is a perspective view of an induction wafer associated with an embodiment. Figure 8 is a cross-sectional view taken along line VIII-VIII of Figure 7, and shows the base substrate of the measuring device together with the sensing wafer. Figure 9 is a cross-sectional view taken along line IX-IX of Figure 8. The sensing wafer 104 shown in FIGS. 7-9 is used as the complex sensing wafers 104A-104H of the measuring device 100. Inductive wafer used. In addition, in the following description, the XYZ orthogonal coordinate system is referred to suitably. The X direction indicates the direction in which the wafer is sensed, the Y direction is a direction orthogonal to the X direction, and indicates the width direction of the sensing wafer 104, and the Z direction is the direction orthogonal to the X direction and the Y direction, and indicates the sensing wafer 104. The direction above.

As shown in FIGS. 7 to 9, in one embodiment, the induction wafer 104 has a front end side surface 104f, an upper surface 104t, a lower surface 104b, a pair of side surfaces 104s, and a rear side end surface 104r. The front side end face 104f constitutes the front side surface of the sensing wafer 104 in the X direction. The sensor wafer 104 is mounted on the base substrate 102 of the measuring device 100 so that the front end surface 104f faces the radial direction with respect to the central axis AX100 (see FIG. 6). Further, in a state where the sensor wafer 104 is mounted on the base substrate 102, the front end surface 104f extends along the edge of the base substrate 102. Therefore, the front end surface 104f is opposed to the inner edge of the focus ring FR when the measuring device 100 is placed on the electrostatic chuck ESC.

The rear side end face 104r constitutes the rear side surface of the sensing wafer 104 in the X direction. The rear end side surface 104r is located closer to the center axis line AX100 than the front side end surface 104f in a state where the sensor wafer 104 is mounted on the base substrate 102. The upper surface 104t constitutes the upper side surface of the sensing wafer 104 in the Z direction, and the lower surface 104b constitutes the lower side surface of the sensing wafer 104 in the Z direction. Further, the pair of side faces 104s constitute the surface of the sensing wafer 104 in the Y direction.

The sensor wafer 104 has a first electrode 141, a second electrode 142, and a third electrode 143. The first electrode 141 is formed of a conductor. The first electrode 141 has a first portion 141a. As shown in FIGS. 7 and 8, the first portion 141a extends in the X direction and the Y direction in one embodiment.

The second electrode 142 is formed of a conductor. The second electrode 142 has a second portion 142a. The second portion 142a will extend over the first portion 141a. The second electrode 142 is insulated from the first electrode 141 in the induction wafer 104. As shown in FIGS. 7 and 8, in one embodiment, the second portion 142a extends in the X direction and the Y direction on the first portion 141a.

The third electrode 143 is an induction electrode formed of a conductor, and is provided on the first portion 141a of the first electrode 141 and the second portion 142a of the second electrode 142. The third electrode 143 is insulated from the first electrode 141 and the second electrode 142 in the induction wafer 104. The third electrode 143 has a front surface 143f. The front face 143f extends in the direction in which the first portion 141a and the second portion 142a intersect. Further, the front surface 143f is extended along the front end surface 104f of the sensing wafer 104. In one embodiment, the front face 143f will form part of the front end side 104f of the sensing wafer 104. Alternatively, the sensing chip 104 can also have The front side of the front surface 143f of the third electrode 143 covers the insulating layer of the front surface 143f.

As shown in FIG. 7 to FIG. 9 , in the first embodiment, the first electrode 141 and the second electrode 142 are opened on the region side (X direction) where the front surface 143 f of the third electrode 143 is disposed, and surround the third electrode 143 . The way to extend it. In other words, the first electrode 141 and the second electrode 142 extend around the third electrode 143 above, behind, and on the side surface of the third electrode 143.

Further, as shown in FIGS. 7 and 9, in one embodiment, the front end side surface 104f of the induction wafer 104 has a curved surface having a predetermined curvature. That is, the front side end surface 104f has a fixed curvature at any position of the front side end surface, and the curvature of the front side end surface 104f is the reciprocal of the distance between the central axis AX100 of the measuring instrument 100 and the front side end surface 104f. The sensor wafer 104 is mounted on the base substrate 102 such that the center of curvature of the front end surface 104f coincides with the center axis AX100.

In one embodiment, the inductive wafer 104 further includes a substrate portion 144, insulating regions 146 to 148, contacts 151 to 153, and interlayer connection wiring 154. The substrate portion 144 has a body portion 144m and a surface portion 144f. The body portion 144m is formed, for example, by a crucible. The surface portion 144f covers the surface of the body portion 144m. The surface portion 144f is formed of an insulating material. The surface layer portion 144f is, for example, a thermal oxide film of tantalum.

The second portion 142a of the second electrode 142 extends below the substrate portion 144, and an insulating region 146 is provided between the substrate portion 144 and the second electrode 142. The insulating region 146 is formed, for example, of SiO ₂ , SiN, Al ₂ O ₃ or polyimine.

The first portion 141a of the first electrode 141 extends below the substrate portion 144 and the second portion 142a of the second electrode 142. An insulating region 147 is provided between the first electrode 141 and the second electrode 142. The insulating region 147 is formed, for example, of SiO ₂ , SiN, Al ₂ O ₃ or polyimine.

The insulating region 148 will form the upper surface 104t of the sensing wafer 104. The insulating region 148 is formed, for example, of SiO ₂ , SiN, Al ₂ O ₃ or polyimine. The insulating region 148 is formed with contacts 151 to 153. The contact 153 is formed of a conductor and is connected to the third electrode 143. Specifically, the third electrode 143 and the contact 153 are connected to each other by the interlayer connection wiring 154 that penetrates the insulating region 146, the second electrode 142, the insulating region 147, and the first electrode 141. An insulator is provided around the interlayer connection wiring 154, and the interlayer connection wiring 154 is insulated from the first electrode 141 and the second electrode 142. The contact 153 is connected to the circuit board 106 through the interlayer connection wiring 123 provided on the base substrate 102 and the wiring 183 provided in the radiation region 102h of the concave portion 102r. Contact 151 and contact 152 are similarly formed by conductors. The contact 151 and the contact 152 are respectively connected to the first electrode 141 and the second electrode 142 through the corresponding interlayer connection wiring. The contact 151 and the contact 152 are connected to the circuit board 106 through the corresponding interlayer connection wiring provided on the base substrate 102 and the corresponding wiring provided in the radiation region 102h of the recess 102r.

Hereinafter, the configuration of the circuit board 106 will be described. Fig. 10 is a view showing the configuration of a circuit board in an embodiment. As shown in FIG. 10, the circuit board 106 has a high frequency oscillator 161, a plurality of C/V conversion circuits 162A to 162H, and an A/D converter 163. In one embodiment, the circuit substrate 106 can further have a memory device 165 and a communication device 166. In still another embodiment, the circuit board 106 may further include a processor 164 and a power source 167.

Each of the plurality of sensing chips 104A to 104 is connected to the circuit board 106 through a wiring group corresponding to the plurality of wiring groups 108A to 108H. Further, each of the complex sensor chips 104A to 104H is connected to a C/V conversion circuit corresponding to the plurality of C/V conversion circuits 162A to 162H through a plurality of wirings included in the corresponding wiring group. Hereinafter, one sense wafer 104 having the same configuration as each of the complex sense wafers 104A to 104H and one wiring group 108 having the same configuration as the complex wiring groups 108A to 108H are the same as the complex C/V conversion circuits 162A to 162H. A C/V conversion circuit 162 is constructed to explain.

The wiring group 108 includes wirings 181 to 183. One end of the wiring 181 is connected to the contact 151 to which the first electrode 141 is connected. This wiring 181 is connected to the ground potential line GL to which the ground GC of the circuit board 106 is connected through the switch SWG. Further, one end of the wiring 182 is connected to the contact 152 to which the second electrode 142 is connected, and the other end of the wiring 182 is connected to the C/V conversion circuit 162. Further, one end of the wiring 183 is connected to the contact 153 to which the third electrode 143 is connected, and the other end of the wiring 183 is connected to the C/V conversion circuit 162.

The high frequency oscillator 161 is connected to a so-called battery power source 167 and is configured to generate a high frequency signal since receiving power from the power source 167. In addition, the power source 167 is also coupled to the processor 164 and the communication device 166. The high frequency oscillator 161 has a plurality of output lines. The high frequency oscillator 161 applies the generated high frequency signal to the wiring 182 and the wiring 183 through the plurality of output lines. Therefore, the high frequency signal from the high frequency oscillator 161 is applied to the second electrode 142 and the electric 3 electrode 143 of the sensing wafer 104.

The input of the C/V conversion circuit 162 is connected to the wiring 182 and the wiring 183. That is, the second electrode 142 and the third electrode 143 of the induction wafer 104 are connected to the input of the C/V conversion circuit 162. The C/V conversion circuit 162 is configured to generate an electrode connected to the input from the voltage amplitude in its input. The voltage signal of the formed electrostatic capacitor outputs the voltage signal. In addition, the larger the electrostatic capacitance formed by the electrodes connected to the C/V conversion circuit 162, the larger the magnitude of the voltage signal output by the C/V conversion circuit.

An equivalent circuit diagram of the circuit substrate 106 and the inductive wafer 104 is shown in FIG. In FIG. 11, the capacitor element C1 is an element of the third electrode 143 of the induction wafer 104 corresponding to the electrostatic capacitance formed in the front (X direction). Further, the capacitive element C2 senses an element of the second electrode 142 of the wafer 104 corresponding to the electrostatic capacitance formed under the (-Z direction). The measuring device 100 is a moving object transported by the transport device, and the ground GC of the circuit board 106 is not connected to the ground GND of the program module. Therefore, the potential of the ground GC of the circuit substrate 106 does not have the same potential as the ground GND. Therefore, in the equivalent circuit of Fig. 11, the earth GC system is shown as being connected to the ground GND through the voltage source VS and the impedance R3. Further, in the equivalent circuit, one end of the capacitor element C1 is connected to the ground GND through the voltage source VS and the impedance R1, and one end of the capacitor element C2 is connected to the ground GND through the voltage source VS and the impedance R2. Further, the capacitor element C1 is connected to the other end, that is, the third electrode 143 is connected to the high frequency oscillator 161, and the other end of the capacitor element C2, that is, the second electrode 142 is connected to the high frequency oscillator 161 through the switch SW.

The switch SW is turned on in the equivalent circuit of FIG. 11 in a state where the wiring 181 is connected to the ground potential line GL. Therefore, in a state where the wiring 181 is connected to the ground potential line GL, the second electrode 142 is cut from the C/V conversion circuit 162. Therefore, in this state, the C/V conversion circuit 162 outputs a voltage signal corresponding to the magnitude of the electrostatic capacitance formed by the third electrode 143. On the other hand, the switch SW is in a state of being closed in the equivalent circuit of FIG. 11 in a state where the wiring 181 is not connected to the ground potential line GL. Therefore, in a state where the wiring 181 is not connected to the ground potential line GL, the second electrode 142 is connected to the C/V conversion circuit 162. Therefore, in this state, the C/V conversion circuit 162 outputs an electrostatic capacitance formed in the front (X direction) corresponding to the third electrode 143 and the second electrode 142 is formed below (the -Z direction). The voltage signal of the voltage of the sum of the capacitances of the electrostatic capacitance.

The input of the A/D converter 163 is connected to the outputs of the complex C/V conversion circuits 162A to 162H. Also, the A/D converter 163 is connected to the processor 164. The A/D converter 163 is controlled by a control signal from the processor 164 to convert the output signals (voltage signals) of the complex C/V conversion circuits 162A-162G into digital values. That is, the A/D converter 163 generates a digital value indicating the magnitude of the electrostatic capacitance, and outputs the digital value to the processor.

The processor 164 is connected to the memory device 165. The memory device 165 is a so-called non-volatile memory memory device and is configured to memorize the digital value output by the A/D converter 163.

The communication device 166 is a communication device in accordance with any wireless communication standard. For example, the communication device 166 will follow Bluetooth (registered trademark). The communication device 166 is configured to wirelessly transmit the digital values memorized by the memory device 165.

As described above, in the sensor wafer 104 mounted on the measuring device 100, the third electrode 143, which is the sensing electrode, is disposed on the first electrode 141, and the second electrode is interposed between the first electrode 141 and the third electrode 143. Part 2 of 142. When the induction wafer 104 is used, the potential of the first electrode 141 is set to the ground potential, and the second electrode 142 and the third electrode 143 are supplied with the high frequency signal. At this time, the voltage amplitude of the third electrode 143 does not affect the direction from which the first electrode 141 is provided with respect to the third electrode 143, that is, the electrostatic capacitance below the induction wafer 104, and reflects a specific direction. That is, the voltage amplitude of the electrostatic capacitance in the direction (X direction) toward the front surface 143f of the third electrode 143. Thus, by sensing the wafer 104, the electrostatic capacitance can be measured with high directivity in a specific direction.

In the first embodiment, the first electrode 141 and the second electrode 142 are opened on the region side (X direction) on the surface on which the third electrode 143 is disposed, and extend around the third electrode 143. According to this embodiment, the third electrode 143 can be shielded from the first electrode 141 and the second electrode 142 in directions other than the specific direction. Thereby, the directivity of the sensing wafer 104 with respect to a specific direction in the measurement of the electrostatic capacitance can be further improved.

Further, in one embodiment, the front end surface 104f of the induction wafer 104 is configured to have a curved surface having a specific curvature, and the front surface 143f of the third electrode 143 is extended along the front end surface 104f. According to this embodiment, the radial distance between each position of the front surface 143f of the third electrode 143 and the inner edge of the focus ring FR can be set to be slightly equidistant. Thereby, the electrostatic capacitance measurement accuracy can be further improved.

Further, in the measuring device 100, the sensing wafers 104A to 104H are arranged along the edge of the base substrate 102. Therefore, when the measuring device 100 is placed on the electrostatic chuck ESC, a complex digital value indicating the electrostatic capacitance between the focus ring FR and each of the sensing wafers 104A to 104H can be obtained. In addition, the electrostatic capacitance C is expressed by C = ε S / d. The dielectric constant of the medium between the front surface 143f of the ε-based third electrode 143 and the inner edge of the focus ring FR, and the area of the front surface 143f of the third electrode 143 of the S-system, and d can be regarded as the front surface 143f of the third electrode 143 and the focus ring FR. The distance between the inner edges. Therefore, the complex digital value obtained by the measuring device 100 is the distance between the front surface 143f of the third electrode 143 and the inner edge of the focus ring FR. Big, and the smaller.

In one embodiment, the measurer 100 is configured to store the digital value in the memory device 165 and wirelessly transmit the digital value from the communication device 166. By using the digital value of the wireless transmission in such a manner, the gap distance between the edge of the measuring device 100 and the inner edge of the focus ring FR (distance in the radial direction with respect to the central axis AX100) can be made fixed in the peripheral direction. The method is to correct the coordinate information of the transport position of the transport device.

Hereinafter, the method of adjusting the conveying device of the processing system 1 of the measuring device 100 will be described. Fig. 12 is a flow chart showing a method of adjusting the conveying device of the processing system according to the embodiment. In the method MT shown in FIG. 12, the measuring device 100 accommodated in any of the containers 4a to 4d is transported to the positioner AN by the transport device TU1. Then, in the step ST1, the position adjustment (position correction) of the measuring device 100 is performed by the positioner AN.

In the next step ST2, the measuring device 100 is transported to any of the program modules PM1 to PM6. Specifically, the measuring device 100 is transported to the loading chamber of one of the loading chamber LL1 and the loading chamber LL2 by the conveying device TU1. Next, the measuring device 100 is transported from one of the loading chambers to one of the program modules PM1 to PM6 by the transport device TU2, and placed on the electrostatic chuck ESC.

In the next step ST3, the measuring device 100 performs measurement of the electrostatic capacitance. Specifically, the measuring device 100 obtains a complex digital value corresponding to the electrostatic capacitance between the inner edge of the focus ring FR and the third electrode 143 of each of the sensing chips 104A to 104H of the measuring device 100, and memorizes the complex digital value. In the memory device 165. Additionally, the complex digital value can be retrieved at a predetermined point in time under the control of processor 164.

In the next step ST4, the measuring device 100 is carried out from the program module and returned to any of the containers 4a to 4d. In the next step ST5, the complex digital value stored in the memory device 165 is transmitted to the control unit MC. The complex digital value can be transmitted from the communication device 166 to the control unit MC by an instruction from the control unit MC, or can be controlled by the processor 164 based on the count of the timer set by the circuit substrate 106. The time point is transmitted to the control unit MC.

In the next step ST6, the control unit MC checks the transport position of the measuring device 100 based on the received complex digital value. Specifically, the control unit MC confirms the distribution of the gap between the inner edge of the focus ring FR and the edge of the measuring device 100 from the peripheral direction from the complex digital value, and A predetermined reference is made to determine whether the distribution of the gap between the inner edge of the focus ring FR and the edge of the measuring device 100 in the peripheral direction can be regarded as fixed.

The distribution of the gap between the inner edge of the focus ring FR and the edge of the measuring device 100 in the peripheral direction cannot be regarded as being fixed, and it is determined in the subsequent step STJ that the transport position of the specific transport device TU2 needs to be performed. The coordinate information is corrected, and the coordinate information of the transport device TU2 is corrected by the control unit MC in step ST7. For example, the correction amount for which the distribution of the gap between the inner edge of the focus ring FR and the edge of the measuring instrument 100 in the peripheral direction is fixed is calculated from the complex digit value, and the coordinate amount of the conveying device TU2 is corrected using the correction amount. Then, the steps ST1 to ST6 and the step STJ are performed again. On the other hand, in the case where the distribution of the gap between the inner edge of the focus ring FR and the edge of the measuring instrument 100 in the peripheral direction can be regarded as fixed, it is determined in the step STJ that the transport position of the specific transport device TU2 is not required. Correction of the coordinate information.

According to the method MT using the measuring device 100, the multi-digit value that can be used to correct the coordinate information of the transport position of the transport device TU2 of the processing system 1 can be provided by the measuring device 100, and the transport can be corrected as needed. The coordinate information of the device TU2. By using the carrier TU2 thus corrected for the transfer of the wafer W, the gap distance between the inner edge of the focus ring FR and the wafer W can be set to be slightly fixed. As a result, it is possible to suppress the shift of the plasma and suppress variations in characteristics of the so-called etching size change in the wafer surface. Moreover, generation of particles on the wafer W can be suppressed.

Hereinafter, an induction wafer that can be mounted on another embodiment of the measuring device 100 will be described. Figure 13 is a cross-sectional view showing an induction wafer according to another embodiment. FIG. 13 is a longitudinal cross-sectional view showing the sensing wafer 204. Further, the focus ring FR is displayed together with the sensing wafer 204.

The sensor wafer 204 has a first electrode 241, a second electrode 242, and a third electrode 243. Further, in one embodiment, the induction wafer 204 may further include a substrate portion 244 and an insulating region 247.

The substrate portion 244 has a body portion 244m and a surface portion 244f. The body portion 244m is formed, for example, by a crucible. The surface portion 244f covers the surface of the body portion 244m. The surface portion 244f is formed of an insulating material. The surface layer portion 244f is, for example, a thermal oxide film of tantalum.

The substrate portion 244 has an upper surface 244a, a lower surface 244b, and a front end surface 244c. The second electrode 242 is disposed below the lower surface 244b of the substrate portion 244 and extends in the X direction and the Y direction. Further, the first electrode 241 is provided below the second electrode 242 through the insulating region 247, and extends in the X direction and the Y direction.

The front end surface 244c of the substrate portion 244 is formed in a ladder shape. The lower side portion 244d of the front side end surface 244c protrudes from the upper side portion 244u of the front end side surface 244c toward the focus ring FR side. The third electrode 243 extends along the upper side portion 244u of the front end surface 244c.

When the induction wafer 204 is used as the sensor wafer of the measuring device 100, the first electrode 241 is connected to the wiring 181, the second electrode 242 is connected to the wiring 182, and the third electrode 243 is connected to the wiring 183.

In the sensor wafer 204, the third electrode 243 which is the sensing electrode is shielded under the sensing wafer 204 by the first electrode 241 and the second electrode 242. Therefore, according to the sensor wafer 204, the capacitance can be measured in a specific direction, that is, a direction (X direction) in which the front surface 243f of the third electrode 243 faces.

Hereinafter, the performance evaluation result of the sensing wafer 204 will be described. In this performance evaluation, the third electrode 243 of the sensing wafer 204 is connected to the electrostatic capacitance measuring device, and the sensing wafer 204 is moved in the direction RD toward the inner edge P2i of the second portion P2 of the focus ring FR, and the static electricity is measured. capacitance. Moreover, for comparison, the electrode 1004 of the sensing wafer 1000 shown in FIG. 2 is connected to the capacitance measuring device, and the sensing wafer 1000 is moved in the direction RD toward the inner edge P2i of the second portion P2 of the focus ring FR. And measure the electrostatic capacitance. Further, the distance LVD between the upper surface P1t of the first portion P1 and the lower surface 244b of the induction wafer 204 when the electrostatic capacitance was measured was 300 μm. Further, the distance LVD between the upper surface P1t of the first portion P1 and the lower surface 1002b of the sensing wafer 1000 when the capacitance is measured is also 300 μm.

A graph representing the measured electrostatic capacitance is shown in FIG. In Fig. 14, the horizontal axis indicates the distance LRD between the lower portion of the front end surface 244c of the sensing wafer 204 and the inner edge P2i of the second portion P2 of the focus ring FR, and the lower portion 244d of the end surface 1002c of the sensing wafer 1000. The distance LRD between the inner edges P2i of the second portion P2 of the focus ring FR, and the vertical axis indicates the electrostatic capacitance. As shown in FIG. 14, the electrostatic capacitance measured by the sensing wafer 1000 rises when the distance LRD is 2.5 mm, but the electrostatic capacitance measured by the sensing wafer 204 decreases the amount of increase when the distance LRD is 2.5 mm. That is, it was confirmed that the electrostatic capacitance can be measured by the induction wafer 204 with high directivity in a specific direction (direction RD of FIG. 13).

Hereinafter, the sensor wafer which can be mounted on another embodiment of the measuring device 100 will be described. Figure 15 is a longitudinal cross-sectional view showing a sensing wafer according to still another embodiment. Figure 15 shows the induction The wafer 104A is a modified form of the sensing wafer 104 and is different from the sensing wafer 104 in that it has a substrate portion 144A instead of the substrate portion 144. The substrate portion 144A is formed of an insulating material. For example, the substrate portion 144A is formed of borosilicate glass. Further, the substrate portion 144A may be formed of tantalum nitride.

The substrate portion 144A is a polyhedron and has a surface including a front surface 144a and a lower surface 144b. In one example, the surface of the substrate portion 144A further includes an upper surface 144c, a rear surface 144d, and a pair of side surfaces. The lower 144b and the upper 144c extend in the X direction and the Y direction, and oppose each other. The front surface 144a constitutes the front end surface of the substrate portion 144A in the X direction and extends in the direction in which the lower surface 144b intersects. The front face 144a can have a predetermined curvature. This curvature is the reciprocal of the distance between the central axis AX100 and the front surface 144a when the sensing wafer 104A is mounted on the base substrate 102. The rear surface 144d constitutes the rear end surface of the substrate portion 144A in the X direction and faces the front surface 144a. The pair of sides may be between an edge portion of the Y direction of the front surface 144a and an edge portion of the Y direction of the rear surface 144d, and the other edge portion of the Y direction of the front surface 144a and the other edge of the Y direction of the rear surface 144d. It is extended between the ministries.

The third electrode 143 extends along the front surface 144a and the upper surface 144c of the substrate portion 144A. The insulating region 146 extends to cover the lower surface 144b of the substrate 144A, the upper surface 144c, the rear surface 144d, and a pair of side surfaces and a third electrode 143 extending over the upper surface 144c. The second electrode 142 is disposed to cover the insulating region 146. Further, the second portion 142a of the second electrode 142 extends through the insulating region 146 to extend below the lower surface 144b of the substrate portion 144A. Further, the insulating region 147 is extended to cover the second electrode 142. Further, the first electrode 141 is provided to cover the insulating region 147. Further, the first portion 141a of the first electrode 141 extends through the insulating region 147 and extends below the second portion 142a of the second electrode 142.

In the case where the body portion 144m of the substrate portion 144 of the sensing wafer 104 is formed of germanium, the sensing wafer 104 has an internal electrostatic capacitance. Because of this internal electrostatic capacitance, it is necessary to set the output of the high frequency oscillator 161 to a larger output. On the other hand, since the substrate portion 144A of the sensing wafer 104A is formed of an insulating material, the internal electrostatic capacitance is extremely small. Thereby, the output of the high frequency oscillator 161 can be made smaller in the measuring device 100 having the sensing wafer 104A.

Further, since the measuring device 100 can be used in a temperature band region (for example, 20 ° C to 80 ° C) containing a high temperature and a reduced pressure environment (for example, 1 Torr (133.3 Pa) or less), it is necessary to suppress generation of gas from the substrate portion 144A. Therefore, the substrate portion can be formed from borosilicate glass, tantalum nitride, quartz or alumina. 144A. By the substrate portion 144A, the generation of gas can be suppressed.

Further, since the measuring device 100 is used in a temperature band region containing a high temperature (for example, 20 ° C to 80 ° C), the substrate portion 144A preferably has a linear expansion coefficient close to the linear expansion coefficient of the constituent material of the base substrate 102. Therefore, in the case where the base substrate 102 is formed of tantalum, the substrate portion 144A can be formed, for example, of borosilicate glass or tantalum nitride. The linear expansion coefficient of the substrate portion 144A is similar to the linear expansion coefficient of the base substrate 102. Therefore, damage of the induction wafer 104 and peeling of the induction wafer 104 from the base substrate 102 due to the difference in linear expansion coefficient between the substrate portion 144A and the linear expansion coefficient of the base substrate 102 can be suppressed.

Also, the weight of the measuring device 100 is preferably smaller. Therefore, the density (mass per unit volume) of the substrate portion 144A is preferably close to or lower than the density of the base substrate 102. Therefore, in the case where the base substrate 102 is formed of tantalum, the substrate portion 144A can be formed, for example, of borosilicate glass.

Although various embodiments have been described above, the present invention is not limited to the above embodiments, and various modifications can be made. For example, the number of program modules of the processing system 1 can be any number of one or more. Further, in the above description, the plasma processing apparatus is exemplified as the program modules PM1 to PM6. However, the program modules PM1 to PM6 may be any processing means as long as they are electrostatic chucks and focus rings. Further, although the plasma processing apparatus 10 is a capacitive coupling type plasma processing apparatus, the plasma processing apparatus which can be used as the program modules PM1 to PM6 may be, for example, an inductively coupled plasma processing apparatus, using a so-called microwave. Like the plasma processing device of the surface wave, it is any plasma processing device.

Further, in the above embodiment, the control unit MC obtains the complex digital value from the measuring device 100 to correct the coordinate information of the transport device TU2, but may perform the measurement from the other device by the computer other than the control unit MC. The acquisition of the complex digital value of 100 and the correction of the coordinate information of the transport device TU2.

102‧‧‧Base substrate

102h‧‧‧radiation area

104‧‧‧Induction chip

104b‧‧‧ below

104f‧‧‧ front side face

104t‧‧‧above

104r‧‧‧ rear end face

123‧‧‧Wiring

141‧‧‧1st electrode

141a‧‧‧Part 1

142‧‧‧2nd electrode

142a‧‧‧Part 2

143‧‧‧3rd electrode

143f‧‧‧ front

144‧‧‧Parts Department

144f‧‧‧Surface Department

144m‧‧‧ body department

146‧‧‧Insulated area

147‧‧‧Insulated area

148‧‧‧Insulated area

153‧‧‧Contacts

154‧‧‧ wiring

183‧‧‧Wiring

Claims (10)

An inductive wafer for measuring an electrostatic capacitance, comprising: a first electrode having a first portion; and a second electrode having a second portion extending over the first portion and being in the sensing wafer Insulating from the first electrode; and the third electrode has a front surface extending in a direction in which the first portion and the second portion intersect, and is disposed on the first portion and the second portion, and The first electrode and the second electrode are insulated from the induction wafer. The sensor wafer of claim 1, wherein the first electrode and the second electrode are opened on a side of the front surface on which the third electrode is disposed, and are extended around the third electrode. . The sensing wafer of claim 1 or 2, wherein the sensing wafer is further provided with an end surface; the end surface has a curved surface having a predetermined curvature; and the front surface of the third electrode extends along the end surface. The sensor wafer according to any one of claims 1 to 2, further comprising a substrate portion having a surface including a front surface and a lower surface, the surface having an insulating property; the third electrode is along the substrate portion The front portion is extended; the second portion of the second electrode extends along the lower surface of the substrate portion. The sensor wafer of claim 4, wherein the substrate portion is formed of an insulating material. The sensor wafer of claim 5, wherein the insulating material is borosilicate glass, tantalum nitride, quartz or aluminum oxide. A measuring device for measuring an electrostatic capacitance, comprising: a base substrate; a plurality of sensing wafers, the plurality of sensing wafers arranged along an edge of the base substrate, and each of which is in the scope of claims 1 to 6 And the circuit board is mounted on the base substrate; the circuit board has a ground potential line electrically connected to the first electrode; and the high frequency oscillator generates a high frequency a high frequency oscillator of the signal is electrically connected to the second electrode and the third electrode; and the C/V conversion circuit converts a voltage amplitude of the third electrode of each of the plurality of sensing chips into an electrostatic capacitance The voltage signal and the A/D converter convert the voltage signal output by the C/V conversion circuit into a digital value. The measuring device of claim 7, wherein the circuit substrate further comprises: a memory device for storing the digital value; and a communication device for wirelessly transmitting the digital value memorized by the memory device. The measuring device of claim 7 or 8, wherein the circuit substrate further has a switch for selectively connecting the first electrode to the ground potential line. The measuring device according to any one of claims 7 to 8, wherein the base substrate has a disc shape; each of the plurality of sensing wafers is a sensing wafer of claim 3; each of the plurality of sensing wafers The end face is disposed along the edge of the base substrate.