TWI687758B - Photomask and method of forming the same and methods of manufacturing electronic device and display device using the photomask - Google Patents

Abstract

A phase shift mask includes a substrate, a second phase shift pattern on the substrate, the second phase shift pattern extending to an outermost perimeter of the substrate, the second phase shift pattern being formed of a material that is semi-transmissive to light of a first wavelength and the substrate being substantially transparent to the light of the first wavelength such that the mask transmits about 2 to about 10 % of the light of the first wavelength at the second phase shift pattern, and a first phase shift pattern on the substrate, the second phase shift pattern being disposed between the outermost perimeter of the substrate and the first phase shift pattern.

Description

Photomask and its forming method and method for manufacturing electronic device and display device using the photomask [Cross-reference to related applications]

This application advocates the application on October 20, 2014 and the name is "Photomask and Method Of Forming The Same and Methods Of Manufacturing Electronic Device" And Display Device Using The Photomask) priority of US Provisional Application No. 62/066,046, the full text of which is incorporated into this case for reference.

On December 1, 2014, the application was filed with the Korean Intellectual Property Bureau and the name was "Photomask and Method Of Forming The Same and Methods Of Manufacturing Electronic Device." And Display Device Using The Photomask)'s Korean Patent Application No. 10-2014-0169976 is incorporated in this case for reference.

The invention relates to a photomask, a method for manufacturing the photomask, a method for manufacturing an electronic device using the photomask, and a method for manufacturing a display device.

In recent years, in the development of high-resolution display devices, the line width of pixel transistors in the manufacture of thin-film transistor liquid crystal displays (TFT LCDs) has gradually decreased.

Each embodiment relates to a phase shift mask, including: a substrate; a second phase shift pattern on the substrate, the second phase shift pattern extending to the outermost periphery of the substrate, the second phase The shift pattern is formed of a material that has translucency for the light of the first wavelength, and the substrate is substantially transparent to the light of the first wavelength, so that the mask is in the second phase About 2% to about 10% of the light of the first wavelength is transmitted at the shift pattern; and a first phase shift pattern on the substrate, the second phase shift pattern is disposed at the outermost of the substrate Between the periphery and the first phase shift pattern.

The second phase shift pattern may have an opening corresponding to the alignment key.

The minimum transmittance of the entire area of the phase shift mask to the light of the first wavelength may be about 2%.

The phase shift mask may not include opaque areas.

The embodiments also relate to a method of manufacturing a unit substrate, the method comprising: providing a mother substrate having a size sufficient to provide at least two unit substrates; and aligning a phase shift mask with the mother substrate A first position; illuminating the first area of the mother substrate via the phase shift mask aligned with the first position; aligning the phase shift mask with the second position of the mother substrate so that The phase shift mask overlaps the sub-region of the irradiated first region; and the second region of the mother substrate is irradiated via the phase shift mask aligned with the second position, so that The sub-region is irradiated a second time.

The phase shift mask may include: a substrate; a second phase shift pattern on the substrate, the second phase shift pattern extending to the outermost periphery of the substrate, the second phase shift pattern is composed of The light of the first wavelength has a semi-transmissive material, and the substrate is substantially transparent to the light of the first wavelength, so that the mask transmits approximately at the second phase shift pattern 2% to about 10% of the light of the first wavelength; and a first phase shift pattern on the substrate, the second phase shift pattern is disposed on the outermost periphery of the substrate and the first Between a phase shift pattern, when the light of the first wavelength is irradiated through the first phase shift pattern, the first phase shift pattern may cause interference.

The phase shift mask may include: a substrate; and a phase shift layer on the substrate, wherein an edge portion of the phase shift mask is a translucent area.

The sub-region may be illuminated via the translucent region of the phase shift mask.

The translucent area may have an opening corresponding to the alignment key.

An alignment key corresponding to the opening may be formed in the sub-region.

The mother substrate may be a silicon wafer or a mother display panel substrate.

The method may further include: after irradiating the second region, separating the mother substrate into at least two unit substrates, wherein the sub-region is in a lane between adjacent unit substrates.

The embodiments also relate to a semiconductor device manufactured according to the method of the embodiments.

The embodiments also relate to a display panel manufactured according to the method of the embodiments.

The embodiments also relate to a phase shift mask, including: a substrate; and a phase shift layer on the substrate, wherein an edge portion of the phase shift mask is a translucent area.

The translucent area can transmit about 2% to 10% of light.

The phase shift layer may include one or more of chromium oxide or molybdenum silicide.

The phase shift mask may not include an opaque layer at the edge portion, and the edge portion is an outer edge of the phase shift mask.

The phase shift mask may include a main pattern area having substantially the same thickness as the translucent area.

The translucent area may be disposed between the main pattern area and the outermost edge of the phase shift mask.

The embodiments also relate to a reticle, including: a transparent substrate; a main pattern area formed on a central portion of the transparent substrate; and a translucent edge area from the main pattern area on the transparent substrate The outer portion extends to the outer portion of the transparent substrate.

The main pattern area may include at least one main pattern including a first phase shift pattern, and the translucent edge area may include a second phase extending from an outer portion of the main pattern area to an outer portion of the transparent substrate Shift pattern.

The second phase shift pattern may have a bottom surface and an exposed top surface, the bottom surface contacting the transparent substrate.

The first phase shift pattern and the second phase shift pattern may be formed of the same material.

The first phase shift pattern may have the same thickness as the second phase shift pattern.

The first phase shift pattern may have the same light transmittance as the second phase shift pattern.

Each of the first phase shift pattern and the second phase shift pattern may have a light transmittance of about 2% to about 10% of the exposure light used to expose the reticle.

Each of the first phase shift pattern and the second phase shift pattern may have a phase shift amount of 180±5° to the exposure light used to expose the reticle.

Each of the first phase shift pattern and the second phase shift pattern may be formed by a chromium (Cr) compound, a silicon (Si) compound, a metal silicide, or a combination thereof to make.

The first phase shift pattern may include a pattern to be transferred onto a device formation area of a substrate forming the electronic device, this pattern is used in a lithography process to form an electronic device, and the second phase shift pattern may be It includes at least one auxiliary pattern for transferring an alignment key to an area other than the device formation area where the substrate for an electronic device is formed, the alignment key being used to perform a photolithography process.

The embodiments also relate to a reticle, including: a main pattern area formed in a central portion of a transparent substrate and including at least one main pattern; and a translucent edge area extending from an outer portion of the main pattern area to all The outer portion of the transparent substrate. The translucent edge region may have a double-layer structure including an edge portion of the transparent substrate and a translucent layer formed on the edge portion.

The at least one main pattern may be formed of the same material as the translucent layer.

The at least one main pattern may include a first phase shift pattern, the translucent layer may include a second phase shift pattern, and each of the first phase shift pattern and the second phase shift pattern may be The exposure light used to expose the photomask has a light transmittance of about 2% to about 10%.

The first phase shift pattern may have the same thickness as the second phase shift pattern.

The embodiments also relate to a method of manufacturing a photomask, the method comprising: forming a phase shift layer on a transparent substrate to cover a central portion of the transparent substrate and an edge portion of the transparent substrate surrounding the central portion ; On the phase shift layer Forming a mask pattern; using the mask pattern as an etching mask to etch the phase shift layer to form at least one main pattern and a semi-transparent pattern, wherein the at least one main pattern includes the ones remaining on the central portion A first portion of the phase shift layer, and the translucent pattern includes a second portion of the phase shift layer remaining on the edge portion; and removing the mask pattern to expose the at least one main The top surface of the pattern and the top surface of the translucent pattern.

The phase shift layer may include a layer having a light transmittance of about 2% to about 10% for exposure light used to expose the photomask.

The phase shift layer may be formed to have the same thickness on both the center portion and the edge portion.

The embodiments also relate to a method of manufacturing an electronic device, the method comprising: preparing a photomask including a transparent substrate, a main pattern area, and a translucent edge area, wherein the main pattern area is formed in the center of the transparent substrate At least one main pattern, and the translucent area extends from the outer portion of the main pattern area to the outer portion of the transparent substrate; includes a plurality of device areas and defines a periphery of the plurality of device areas Forming a photoresist layer on the workpiece in the area; and using the photomask to perform at least a part of the peripheral area while performing multiple exposures on the workpiece on which the photoresist layer is formed in an exposure system Repeat exposure.

Multiple exposures of the workpiece may include: exposing the first device area of the plurality of device areas via the main pattern area of the photomask to transfer the at least one main pattern to the formed The photoresist layer on the first device region, and at the same time, the pair of translucent edge regions of the photomask are formed on the first device The first peripheral area of the peripheral area around the placement area is exposed for the first time; and the first pattern area of the plurality of device areas adjacent to the first device area is formed via the main pattern area of the photomask Two device regions are exposed to transfer the at least one main pattern to the photoresist layer formed on the second device region, and at the same time, the translucent edge regions of the photomask are interposed The first partial area of the first peripheral area between the first device area and the second device area is exposed a second time.

The first exposure of the first peripheral area may include transferring the image of the alignment key to the first peripheral area.

The second exposure of the first partial area may include transferring the image of the alignment key to the first partial area.

The method may further include: after the second exposure of the first partial region, a third device in the plurality of device regions adjacent to the second device region via the main pattern region of the photomask Area to expose to transfer the at least one main pattern to the photoresist layer formed on the third device area, and at the same time, via the pair of translucent edge areas of the photomask as the The second partial area, which is a part of the first partial area, is exposed for the third time.

The method may further include: after the third exposure of the second partial region, via the main pattern region of the photomask to the plurality of device regions formed adjacent to the third device region The fourth device area is exposed to transfer the at least one main pattern to the photoresist layer formed on the fourth device area, and at the same time, through the translucent edge area pair of the photomask The second partial area is exposed for the fourth time.

At least one of the first exposure of the first peripheral area, the second exposure of the first partial area, and the third exposure of the second partial area may include transferring the image of the alignment key to The first peripheral area, and in the fourth exposure of the second partial area, the second partial area may include the alignment key before performing the fourth exposure of the second partial area The area to which the image is transferred.

The translucent edge area of the photomask may include an auxiliary pattern for forming alignment keys, and the method may further include: developing the exposed photoresist layer to perform the process on the workpiece After the multiple exposures, a pattern corresponding to the at least one main pattern is formed in each of the plurality of device areas, and at least one alignment key is formed in the peripheral area.

The multiple exposures to the workpiece may be performed using a light source, and the translucent edge region may include a phase shift pattern having about 2% to about 10 for the exposure light emitted by the light source % Light transmittance.

The embodiments also relate to a method of manufacturing a display device, the method comprising: preparing a photomask including a transparent substrate, a main pattern area, and a translucent area, wherein the main pattern area is formed in a central portion of the transparent substrate And includes at least one main pattern, and the translucent area extends from an outer portion of the main pattern area to an outer portion of the transparent substrate; preparing a panel including a plurality of device areas and a plurality of alignment key areas, wherein The plurality of device regions are separated from each other, and the plurality of alignment key regions are formed around the plurality of device regions; a photoresist layer is formed on the panel to cover the plurality of device regions And the multiple alignment key regions; and in the exposure system, the multiple device regions covered by the photoresist layer and the multiple alignment key regions Simultaneously with the sequential exposure, the mask is used to repeatedly expose at least a portion of the plurality of alignment keys.

The sequential exposure of the plurality of device regions and the plurality of alignment key regions may include a first exposure operation and a second exposure operation, the first exposure operation is selected from the multiple The first device area of the device areas is exposed, and at the same time, the first alignment key area selected from the plurality of alignment key areas is exposed via the translucent edge area, and the second exposure operation is performed via The main pattern area exposes a second device area selected from the plurality of device areas and adjacent to the first device area, and at the same time, a pair of the first device area is selected from the first through the translucent edge area Align the first partial area of the key area for exposure.

The sequential exposure of the plurality of device regions and the plurality of alignment key regions may further include a third exposure operation selected from the plurality of device regions via the pair of main pattern regions And the third device area adjacent to any one of the first device area and the second device area is exposed, and at the same time, the The second partial area is exposed.

The translucent edge region may include a phase shift pattern having a light transmittance of about 2% to about 10% for exposure light emitted by the light source.

The translucent edge area of the photomask may include at least one auxiliary pattern for forming alignment keys, and the method may further include sequentially performing the plurality of device areas and the plurality of alignment key areas After exposure, the exposed photoresist layer is developed to form a pattern corresponding to the at least one main pattern in each of the plurality of device regions and form at least at least one of the plurality of alignment key regions An alignment key.

The minimum feature size that the at least one main pattern may have is the first size, and the minimum feature size that the at least one auxiliary pattern may have is about 10 times to about 300 times the first size.

For the sequential exposure of the plurality of device regions and the plurality of alignment key regions, i-line (365 nanometers), g-line (g-line) (436 nanometers), h The synthetic light emitted by the h-line (405 nm) or a combination of the above is performed.

The sequential exposure of the plurality of device regions and the plurality of alignment key regions may be performed using KrF excimer laser (248 nm) or ArF excimer laser (193 nm).

100: Mask

102: Transparent substrate

120: Phase shift pattern

120A: Phase shift layer

122: First phase shift pattern

124: second phase shift pattern

124T: top surface

150: mask pattern

200: Mask

700: Exposure system

710: Main platform

720: Panel

720A: the first device area

720B: Second device area

720C: Third device area

720D: Fourth device area

722: Surrounding area

722A: The first peripheral area

722B: Second peripheral area

722C: Third peripheral area

722D: Fourth peripheral area

728: photoresist layer

728E1, 728E2: District

730: Masking platform

732: The first alignment key observation unit

734: Second alignment key observation unit

740: Irradiation optical system

750: Imaging optical system

752: Exposure field

800: display device

802: host

810: LCD panel

820: Timing controller

830: Gate driver

840: source driver

A1, A2: Arrow

AK1: auxiliary pattern

AK2: auxiliary pattern

AK3: auxiliary pattern

B: Arrow

B-B’: line

C-C’: line

C1, C2: Arrow

CD1: the first key size

CD2: second key size

CLC: liquid crystal capacitor

CP: Central part

DCS: data control signal

DE: Double exposure area

DL1, DLm: data cable

EP: edge part

GCS: gate control signal

GL1, GLn: gate line

LAB: first partial area

LABC: Second local area

LAD: local area

LBC: local area

LCD: local area

MP: main pattern

MPR: main pattern area

PM: Mask

PX: pixel

QE: quadruple exposure area

SCAN1: the first scanning process

SCAN2: Second scanning process

SCAN3: the third scanning process

SCAN4: Fourth scanning process

SHOT1: first shot

SHOT2: second shot

SHOT3: third shot

SHOT4: fourth shot

STE: Translucent edge area

STP: Translucent pattern

TE: Triple exposure area

TFT: thin film transistor

TH1, TH2: thickness

P310, P320, P330, P332, P334, P336, P338, P340: process

P412, P422, P424, P430, P432, P434, P436, P440: process

By describing the exemplary embodiments in detail with reference to the accompanying drawings, the features of the present invention will be apparent to those skilled in the art. In the drawings: FIG. 1A is a plan view of a photomask according to an exemplary embodiment.

FIG. 1B is a cross-sectional view taken along the line BB ′ of FIG. 1A.

FIG. 2A is a plan view of a reticle of other exemplary embodiments.

2B is a cross-sectional view taken along line B-B' of FIG. 2A.

3A to 3D are cross-sectional views of manufacturing processes of a photomask manufacturing method in some exemplary embodiments.

FIG. 4 is a flowchart of an electronic device manufacturing method in an exemplary embodiment.

FIG. 5 illustrates an exposure method for manufacturing an electronic device in an exemplary embodiment Flow chart.

FIG. 6 illustrates a flowchart of a method of manufacturing a display device in an exemplary embodiment.

FIG. 7 illustrates a flowchart of an exposure method for manufacturing a display device in an exemplary embodiment.

FIG. 8 is a schematic diagram showing an exemplary configuration of an exposure system for manufacturing an electronic device and a method of manufacturing a display device in an exemplary embodiment.

FIG. 9 is a plan view of a panel used for manufacturing an electronic device and a method of manufacturing a display device in an exemplary embodiment, which illustrates a process of scanning the panel using an exposure system.

FIGS. 10A to 13B are flowcharts of the processes of the exposure process in the method of manufacturing an electronic device and a display device in an exemplary embodiment.

FIG. 14 is a block diagram of a display device in an exemplary embodiment.

Exemplary embodiments will be explained more fully below with reference to the drawings; however, the exemplary embodiments may be implemented in different forms and should not be considered limited to the embodiments described herein. Rather, these embodiments are provided to make the content of this disclosure thorough and complete, and will fully convey exemplary implementations to those skilled in the art.

In the drawings, the size of layers and regions may be exaggerated for clarity. Similar reference numbers refer to similar elements throughout.

The term "and/or" used in this article includes one or more of the related items listed Any and all combinations. When the "at least one of" type of narrative precedes a series of elements, it modifies the entire series of elements rather than just the individual elements in the series.

It should be understood that although the terms "first", "second", etc. may be used herein to describe various elements, components, regions, layers, and/or sections, these elements, components, regions, layers, and /Or sections should not be restricted by these terms. These terms are only used to distinguish individual elements, components, regions, layers or sections. Therefore, the first element, component, region, layer, or section described below may also be referred to as the second element, component, region, layer, or section without departing from the teachings of the present invention.

Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those of ordinary knowledge in the technical field to which the inventive concept belongs. It should be further understood that the terms (such as those defined in commonly used dictionaries) should be interpreted as having the same meaning in the relevant technical background, and unless clearly defined herein, they should not be interpreted as having Idealized or too formal meaning.

While some embodiments may be implemented in other forms, the individual process steps described herein may be implemented in other forms. For example, the two process steps generated in sequence can be performed substantially simultaneously or in the reverse order.

Factors such as manufacturing technology and/or tolerance, etc., and the results shown in the figure are not the same, it is expected. Therefore, the embodiments should not be regarded as being limited to the shape of the specific blocks shown here, but should include shape deviations like those caused by the manufacturing process. The term "and/or" used in this article includes the relevant items listed Any and all combinations of one or more.

FIG. 1A is a front plan view of a photomask 100 in an exemplary embodiment, and FIG. 1B is a cross-sectional view taken along line B-B' of FIG. 1A.

Referring to FIGS. 1A and 1B, the photomask 100 may include: a transparent substrate 102; a main pattern region (MPR) formed on a central portion (CP) of the transparent substrate 102; and a translucent edge region ( semi-transparent edge region (STE), formed on the transparent substrate 102 and extending from the outer portion of the main pattern region MPR to the outer portion of the transparent substrate 102.

The photomask 100 may be in the form of a single-layer phase shift mask (SL-PSM), in which only the phase shift pattern 120 is formed on the transparent substrate 102.

At least one main pattern (MP) may be formed on the main pattern region MPR, and the at least one main pattern MP includes the first phase shift pattern 122 as a part of the phase shift pattern 120.

The second phase shift pattern 124 may be formed in the translucent edge region STE. The second phase shift pattern 124 is another part of the phase shift pattern 120. The second phase shift pattern 124 may extend from the outer portion of the main pattern region MPR to the outer portion of the transparent substrate 102 in the translucent edge region STE.

Each of the first phase shift pattern 122 and the second phase shift pattern 124 may have a bottom surface in contact with the transparent substrate 102.

In the photomask 100, the translucent edge region STE may have a dual structure, and the dual structure may include only an edge portion (EP) of the transparent substrate 102 And a second phase shift pattern 124 formed on the edge portion EP of the transparent substrate 102 and being a translucent layer. The semi-transparent edge region STE may not include the light shielding layer, but only includes the transparent substrate 102 and the second phase shift pattern 124. The second phase shift pattern 124 may have a top surface 124T exposed on the opposite side of the transparent substrate 102.

In some embodiments, the transparent substrate 102 may be formed of quartz, glass, or plastic. Plastic can be polyimide (PI), polyamide (PA), liquid crystal (LC) polyarylate, polyethylene terephthalate (PET), polyether Polyether ether ketone (PEEK), polyether sulfone (PES), polyether nitrile (PEN), polyester, polycarbonate (PC), polyether ketone, or polyether sulfonate Amine (polyetherimide, PEI).

The first phase shift pattern 122 and the second phase shift pattern 124 may be formed of the same material. Each of the first phase shift pattern 122 and the second phase shift pattern 124 may be formed of a chromium (Cr) compound, a silicon (Si) compound, a metal silicide, or a combination thereof. The Cr compound may be one selected from the group consisting of chromium oxide, chromium nitride, chromium carbide, chromium oxynitride, and chromium oxynitride. The silicon compound may be one selected from the group consisting of silicon oxide and spin on glass (SOG). The metal silicide may include molybdenum (Mo), titanium (Ti), tantalum (Ta), zirconium (Zr), hafnium (Hf), niobium (Nb), vanadium (V), tungsten (W), cobalt (Co ), at least one metal of chromium (Cr), and nickel, silicon (Si), and at least one element selected from oxygen (O) and nitrogen (N). In some embodiments, the metal silicide may be one selected from TaSi, MoSi, WSi, its nitride, and its oxynitride.

In some embodiments, each of the first phase shift pattern 122 and the second phase shift pattern 124 may be formed of MoSiN, MoSiCN, MoSiON, MoSiCON, TaON, TiON, or a combination thereof.

The thickness TH1 of the first phase shift pattern 122 may be equal to the thickness TH2 of the second phase shift pattern 124.

The first phase shift pattern 122 and the second phase shift pattern 124 may have the same light transmittance. In some embodiments, the first phase shift pattern 122 and the second phase shift pattern 124 may have the same light transmittance, and the light transmittance is selected from about 2% to 10%. For example, each of the first phase shift pattern 122 and the second phase shift pattern 124 may have a light transmittance of about 2% to about 10% for i-line (365 nm).

In some embodiments, when a display device is manufactured by performing an exposure process using the photomask 100, the mother substrate used for manufacturing the display device may be formed through the translucent edge region STE on which the second phase shift pattern 124 is formed Some regions (for example, cutting regions) repeatedly perform the exposure process. For example, the cutting area may be an area in which an auxiliary pattern (such as an alignment key or a test pattern) is formed, the auxiliary pattern having a low bulk density and a relatively wide line width. Even if the cut area is repeatedly exposed two to four times through the translucent edge area STE on which the second phase shift pattern 124 is formed, since the second phase shift pattern 124 has a relatively low light transmittance (the light transmittance It is selected in the range of about 2% to about 10%), so that the formation of auxiliary patterns (eg, alignment keys) formed in the cutting area will not be adversely affected.

Each of the first phase shift pattern 122 and the second phase shift pattern 124 is The exposure light for exposing the reticle 100 may have a phase shift amount of about 180±5°.

The photomask 100 can be used in a lithography process for manufacturing various microelectronic devices. In some embodiments, the photomask 100 can be used to manufacture high-integration memory devices (eg, display devices, dynamic random access memory (DRAM), static random access memory (static RAM) , SRAM), and flash memory devices), processors (such as central processing unit (CPU), digital signal processor (DSP), and a combination of CPU and DSP), microelectronic devices ( For example, application specific integrated circuits (application specific integrated circuit, ASIC), micro-electro-mechanical-systems (MEMS) devices, and optoelectronic devices).

The at least one main pattern MP formed in the main pattern region MPR of the photomask 100 may be formed by a device for transferring a pattern required when forming an electronic device using a photolithography process to a substrate for forming the electronic device Pattern. In some embodiments, the at least one main pattern MP may include a pattern for forming a pixel area, a device area, a wafer area, or a cell area of the various microelectronic devices described above.

2A and 2B are diagrams of the reticle 200 in other exemplary embodiments. FIG. 2A is a plan view of a reticle 200 in other exemplary embodiments, and FIG. 2B is a cross-sectional view taken along line BB ′ of FIG. 2A. In FIGS. 2A and 2B, the same reference numerals as those in FIGS. 1A and 1B are used to denote the same elements, and details are not described again.

2A and 2B, at least one auxiliary pattern AK1, AK2 and AK3 It may be formed on the translucent edge region STE of the photomask 200. The at least one auxiliary pattern may be an opening type pattern formed in the second phase shift pattern 124 formed in the semi-transparent edge region STE to expose the transparent substrate 102.

When the pixel area, device area, wafer area or cell area of the microelectronic device is formed using the at least one main pattern MP, the at least one auxiliary pattern AK1, AK2 and AK3 may include means for aligning the patterns with each other Alignment key. For example, the at least one auxiliary pattern AK1, AK2, and AK3 may include various types of alignment keys or mask codes, the alignment keys including alignment keys for aligning various layers used to form an electronic device, Alignment keys for aligning the reticle with the exposure system, alignment keys for aligning individual dies in the mother substrate, and alignment keys for aligning the exposure lens with the reticle.

In some embodiments, the at least one auxiliary pattern AK1, AK2, and AK3 may include a first alignment key (auxiliary pattern AK1), a second alignment key (auxiliary pattern AK2), and a mask code (auxiliary pattern AK3) .

In some embodiments, during the exposure process using the photomask 200, the at least one auxiliary pattern (eg, the first alignment key (auxiliary pattern AK1), the second alignment key (auxiliary pattern AK2), and the photomask Each of the codes (auxiliary patterns AK3) may be a pattern to be transferred to a peripheral area of each of a plurality of unit device areas included in the mother substrate and each of them All constitute a display panel (ie, a cutting area for separating the plurality of unit device areas into individual display panels).

In some other embodiments, the at least one auxiliary pattern (eg, Each of the first alignment key (auxiliary pattern AK1), the second alignment key (auxiliary pattern AK2), and the mask code (auxiliary pattern AK3) may be used to transfer the alignment key to the wafer The pattern on the scribe lane between the multiple wafer regions on the.

The minimum feature size of the at least one main pattern MP may be a first critical dimension (CD) CD1. In addition, the minimum feature size of the at least one auxiliary pattern (each of the first alignment key (auxiliary pattern AK1), the second alignment key (auxiliary pattern AK2), and the mask code (auxiliary pattern AK3)) may be It is the second critical size CD2, and CD2 is about 10 to 300 times the first critical size CD1. In some embodiments, the at least one main pattern MP may have a minimum feature size of about 1 micrometer to about 10 micrometers and a minimum pitch of about 2 micrometers to about 30 micrometers. In some embodiments, each of the at least one auxiliary pattern (eg, a first alignment key (auxiliary pattern AK1), a second alignment key (auxiliary pattern AK2), and a mask code (auxiliary pattern AK3) ) May have a minimum feature size of about 10 microns to about 300 microns and a minimum pitch of about 20 microns to about 600 microns.

3A to 3D are cross-sectional views taken along the line B-B' of FIG. 1A, which illustrate the manufacturing process of the method of manufacturing a photomask in some exemplary embodiments. Although this exemplary embodiment illustrates a method of manufacturing the reticle 100 shown in FIGS. 1A and 1B, the method may be applied to the reticle 200 shown in FIGS. 2A and 2B or have various adjustments or changes The method of constructing a photomask. In FIGS. 3A to 3D, the same reference numerals as those in FIGS. 1A and 1B are used to denote the same elements, and details are not described again.

Referring to FIG. 3A, a phase shift layer 120A may be formed on the transparent substrate 102 and cover Cover the central portion CP of the transparent substrate 102 and the edge portion EP surrounding the central portion CP.

In some embodiments, the transparent substrate 102 may be a rectangular substrate approximately 6 inches wide and 6 inches long. In some embodiments, the transparent substrate 102 may be a large substrate, each side of which is about 300 mm or larger.

The phase shift layer 120A may be formed to have a light transmittance of about 2% to about 10% for exposure light irradiated to the phase shift layer 120A. For example, the phase shift layer 120A may be formed to have an optical density that can provide a light transmittance of about 2% to about 10%. In some embodiments, the composition ratio between the components of the phase shift layer 120A and/or the thickness of the phase shift layer 120A may be adjusted to control the light transmittance of the phase shift layer 120A.

The formed phase shift layer 120A may have the same thickness on both the center portion CP and the edge portion EP of the transparent substrate 102.

The specific material for forming the phase shift layer 120A may be the same as the materials of the first phase shift pattern 122 and the second phase shift pattern 124 described with reference to FIGS. 1A and 1B.

In some embodiments, the phase shift layer 120A may use a sputtering process, a vacuum evaporation process, a chemical vapor deposition (CVD) process, a metal organic CVD (MOCVD) process, Sol-gel process or a combination of the above.

Referring to FIG. 3B, a mask pattern 150 may be formed on the phase shift layer 120A.

The mask pattern 150 may be a photoresist pattern. The photoresist pattern may include materials that can react with laser beams or e-beams. In some embodiments, the photoresist pattern may include a positive photoresist or a negative photoresist.

The thickness of the mask pattern 150 can be determined in consideration of the thickness of the phase shift layer 120A and the etching selectivity. In some embodiments, the thickness of the formed mask pattern 150 may be about 100 angstroms to 800 angstroms, but the present exemplary embodiment is not limited thereto.

Referring to FIG. 3C, the mask pattern 150 may be used as an etching mask to etch the phase shift layer 120A, so that the first phase shift pattern 122 may remain on the central portion CP of the transparent substrate 102 and the second phase shift pattern 124 may remain on On the edge portion EP of the transparent substrate 102.

The first phase shift pattern 122 may constitute at least one main pattern MP. The second phase shift pattern 124 may constitute a translucent pattern STP.

In some embodiments, a plasma etching process may be used to etch the phase shift layer 120A. For example, when the phase shift layer 120A includes MoSiON, a plasma etching process using CF ₄ , CF ₄ /O ₂ , CHF ₃ , CHF ₃ /O ₂ , SF ₆ or SF ₆ /O ₂ as an etching gas may be used. However, this exemplary embodiment is not limited to this.

Referring to FIG. 3D, the mask pattern 150 may be removed to expose the top surface of at least one main pattern MP and the top surface of the translucent pattern STP.

The mask pattern 150 can be removed using an ashing process and a strip process.

Referring to FIGS. 1A to 2B, it can be known that the photomasks 100 and 200 in this exemplary embodiment may not include a blind region covered by a light shielding layer. Therefore, the process of forming the light-shielding layer to form the blind region and the process for removing unnecessary portions of the light-shielding layer can be omitted from the process of manufacturing the photomasks 100 and 200. Therefore, the possibility of defects due to removal of the light-shielding layer can be reduced, and the positions of the photomasks 100 and 200 can be reduced Turn-around time (TAT). In addition, the lifetime of the exposure system using the photomasks 100 and 200 according to the present exemplary embodiment can be extended, and the time and cost required for maintenance and repair of the exposure system can be reduced. In addition, when an electronic device is manufactured by using the exposure processes of the photomasks 100 and 200, productivity can be improved.

FIG. 4 illustrates a flowchart of a method of manufacturing an electronic device in an exemplary embodiment.

FIG. 8 is a schematic configuration diagram of an exposure system 700 used in the method for manufacturing an electronic device in an exemplary embodiment.

9 is a plan view of a panel 720 used as a workpiece in a method for manufacturing an electronic device, which illustrates the process of scanning the panel 720 using the exposure system 700 shown in FIG. 8.

FIGS. 10A to 13B are process flow charts of the exposure process, which is helpful for understanding the exposure method described below with reference to FIG. 4.

The manufacturing method of the electronic device in the exemplary embodiment shown in FIG. 4 will be explained below with further reference to FIGS. 1A to 2B and FIGS. 8 to 13B.

In the process P310 of FIG. 4, a photomask including a main pattern region MPR and a translucent edge region STE may be prepared. The translucent edge region STE extends from an outer portion of the main pattern region MPR to an outer portion of the transparent substrate 102.

In some embodiments, as shown in FIGS. 1A and 1B, the photomask may be a photomask 100 in which no pattern is formed on the translucent edge area STE. In some other embodiments, as shown in FIGS. 2A and 2B, the photomask may be a photomask 200 in which the at least one auxiliary pattern AK1, AK2, and AK3 is formed on the translucent edge region STE.

Hereinafter, an example in which the photomask 200 in FIGS. 2A and 2B is used as the photomask of the present exemplary embodiment will be explained. However, the present exemplary embodiment is not limited to this, and can also be applied to the case where the mask 100 of FIGS. 1A and 1B is used.

In the process P320 of FIG. 4, a photoresist layer may be formed on a workpiece including a plurality of device regions and a peripheral region, the peripheral region defining the plurality of device regions.

In some embodiments, the workpiece may be a mother substrate for manufacturing a display device or a wafer for manufacturing an integrated circuit (IC) device, but the exemplary embodiment is not limited thereto.

In FIGS. 8 and 9, a panel 720 used for manufacturing a mother substrate of a display device is shown as an example of a workpiece. The panel 720 may include a plurality of device areas 720A, 720B, 720C, and 720D and a peripheral area 722 that defines the plurality of device areas 720A, 720B, 720C, and 720D. In some embodiments, the peripheral area 722 may be disposed between and around the plurality of device areas 720A, 720B, 720C, and 720D. The peripheral area 722 may include a plurality of alignment key areas disposed around the plurality of device areas 720A, 720B, 720C, and 720D, respectively.

FIG. 10B shows a photoresist layer 728 formed on the panel 720.

Hereinafter, the method of manufacturing the electronic device shown in FIG. 4 will be explained on the assumption that the panel 720 shown in FIGS. 8 and 9 is used as a workpiece.

In the exposure system 700 in the process 330 of FIG. 4, while the mask 200 is used to repeatedly expose at least a portion of the peripheral region 722 of the panel 720, the mask 200 can be used to expose the panel 720 as a workpiece multiple times. A photoresist layer is formed on the workpiece.

In some embodiments, the exposure system 700 shown in FIG. 8 may be used to perform the process P330 of FIG. 4.

The exposure system 700 shown in FIG. 8 may be, for example, a scanning-type exposure system capable of performing an exposure process on a large glass substrate used for manufacturing a flat panel display (FPD).

Referring to FIG. 8, the panel 720 used as a workpiece may be carried on the main platform 710 of the exposure system 700. In some embodiments, the panel 720 may include a glass substrate, but the present exemplary embodiment is not limited thereto.

The mask platform 730 for supporting the photomask PM may be placed above the main platform 710. The mask PM may be the mask 100 shown in FIGS. 1A and 1B, the mask 200 shown in FIGS. 2A and 2B, or a mask whose structure is adjusted or changed within the scope of the present invention.

In some embodiments, when the position of the panel 720 is adjusted by the main platform 710, the first alignment key observation unit 732 can confirm the position of the alignment key on the panel 720 and adjust the position of the panel 720.

The mask platform 730 can adjust the position of the mask PM. For example, while the reticle PM is mounted on the mask stage 730, the position of the reticle PM can be adjusted in the XY plane, for example. In some embodiments, when the position of the mask PM is adjusted by the mask platform 730, the second alignment key observation unit 734 can confirm the position of the alignment key on the mask PM and adjust the position of the mask PM.

The irradiation optical system 740 can irradiate the exposure light onto the photomask PM. The pattern formed on a partial area of the photomask PM carried on the mask platform 730 may be illuminated The exposure light radiated by the optical system 740 and the exposure light that has passed through the reticle PM can pass through the imaging optical system 750 so that the pattern can be transferred to a partial area of the panel 720. In addition, the imaging optical system 750 can relatively scan the mask stage 730 for carrying the mask PM and the main stage 710 for carrying the panel 720, so that the main pattern formed on the main pattern region MPR on the mask PM Can be transferred to panel 720.

The imaging optical system 750 may include a plurality of projection optical systems. The plurality of sub-unit regions formed on the photomask PM may be irradiated with luminous flux from the irradiation optical system 740, respectively. The images of the plurality of sub-unit areas can be simultaneously projected onto the panel 720 through the projection optical systems of the imaging optical system 750.

Now, a process of scanning the panel 720 using the exposure system 700 shown in FIG. 8 will be explained with reference to FIG. 9.

The imaging optical system 750 of the exposure system 700 may have the exposure field 752 shown in FIG. 9. The first scanning process SCAN1 and the second scanning process SCAN2 may be sequentially performed on the panel 720 carried on the main platform 710 through the exposure field 752 in the direction of arrow A1 and arrow A2. After the second scanning process SCAN2 ends, the exposure field 752 can move in the direction of arrow B. Then, the third scanning process SCAN3 and the fourth scanning process SCAN4 may be executed through the exposure field 752 in the directions of the arrows C1 and C2. Therefore, the pattern formed on the photomask PM can be transferred to each of all the device regions 720A, 720B, 720C, and 720D of the panel 720. In the exposure system 700 shown in FIG. 8, the mask stage 730 for supporting the mask PM may have an XY stage capable of achieving the above scanning operation.

In the above scanning operation, it may be necessary to accurately map the picture on the reticle PM The projected image is aligned with the pattern previously formed on the panel 720. To achieve precise alignment between the reticle PM and the panel 720, an alignment key formed on the reticle PM and an alignment key formed on the panel 720 may be used.

While the size of the panel 720 used as a mother substrate for manufacturing electronic devices (for example, display devices) gradually becomes larger, patterns for forming electronic devices formed in the device regions 720A, 720B, 720C, and 720D of the panel 720 gradually It is reduced and highly integrated.

The manufacture of a display device using liquid crystal (LC) and organic electro-luminescence (organic EL) may involve an element formed by forming a stacked structure including a plurality of conductive patterns and a plurality of insulating layers (such as electrical Crystal). In recent years, as display devices require brighter and clearer images, higher and higher operating speeds, and lower and lower power consumption, the components and unit elements of display devices have gradually shrunk and are highly integrated To meet these requirements. In addition, the patterns formed on the photomask used for manufacturing the display device have also been gradually reduced and highly integrated. For example, the line width required when forming thin-film transistors (TFTs) for active matrix liquid crystal display (LCD) devices has also gradually decreased. Specifically, a phase shift mask (PSM) can be used as a photomask to form a fine pattern with a line width of about 2 microns or less on the panel.

On the contrary, a large mother substrate having a relatively large size may be used to manufacture a display device. Fine patterns can be formed on the device area (such as the device areas 720A, 720B, 720C, and 720D of the panel 720 shown in FIG. 9), and can be installed on the panel 720 Auxiliary patterns with a larger critical dimension (CD) than the patterns formed on the device regions 720A, 720B, 720C, and 720D are formed on the peripheral region 722 other than the placement regions 720A, 720B, 720C, and 720D. The auxiliary patterns may include, for example, various alignment keys, mask codes, or test patterns including alignment keys for aligning the various layers used to form the electronic device, alignment for aligning the mask with the exposure system Keys, alignment keys to align each die in the mother substrate, and alignment keys to align the exposure lens and the photomask.

In a general phase shift reticle, the edge region of the reticle outside the main pattern region in which the main patterns to be transferred to the device regions 720A, 720B, 720C, and 720D are formed is used as a blind region, and is covered with a light-shielding layer Describe the blind spot. However, the edge area of the reticle may not be an area for forming a main pattern required when forming a device but only an area for forming an auxiliary pattern (for example, an alignment key). The auxiliary pattern may have a size much larger than the resolution limit value of the pattern formed in the main pattern area. In addition, the density or pattern accuracy of the edge region of the photomask may not be as strict as in the device regions 720A, 720B, 720C, and 720D of the photomask.

In the photomask of the present exemplary embodiment, the blind area covered by the light shielding layer may not be formed in the edge area where the auxiliary patterns AK1, AK2, and AK3 (eg, alignment keys) are formed. Instead, the translucent edge region STE formed with the same material as the main pattern MP may be disposed in the edge region of the photomask. When the peripheral area 722 of the panel 720 is repeatedly exposed via the translucent edge area STE, the auxiliary patterns AK1, AK2, and AK3 (eg, alignment keys) formed in the translucent edge area STE are transferred to the panel with a desired accuracy The peripheral area 722 of 720, and no damage or defect will occur in the alignment key finally formed in the peripheral area 722 of the panel 720.

Therefore, like the process P330 of FIG. 4, the method of manufacturing an electronic device in the exemplary embodiment may include using multiple exposures to the workpiece on which the photoresist layer is formed while using the photomask 100 in the exposure system 700 or 200 repeats exposure of at least a portion of the peripheral area 722 of the panel 720.

In some embodiments, the exposure process using the process P330 of FIG. 4 can use the synthetic light emitted by the i-line (365 nm), g-line (436 nm), h-line (405 nm), or a combination thereof carried out. In some other embodiments, the exposure process using process P330 of FIG. 4 may be performed using KrF excimer laser (248 nm) or ArF excimer laser (193 nm). However, the light source applicable to the method of manufacturing an electronic device in the exemplary embodiment is not limited to the above example, but various other conventional light sources may also be used.

FIG. 5 is a flowchart of an exposure process using the process P330 of FIG. 4 in an exemplary embodiment.

Now, the exposure process using the process P330 of FIG. 4 in the exemplary embodiment will be explained with reference to FIGS. 5 and 9 to 13B.

Hereinafter, an example of using the photomask 200 shown in FIGS. 2A and 2B as the photomask in the present exemplary embodiment will be explained. However, the exposure process in this exemplary embodiment is not limited to this, and can be similarly applied to the case where the photomask 100 shown in FIGS. 1A and 1B is used.

Referring to FIGS. 5 and 10A to 10C, in process P332 of FIG. 5, the first device region 720A may be exposed through the main pattern region MPR of the reticle 200, and at the same time, through the translucent edge region of the reticle 200 STE is installed in the first device area The first peripheral area 722A around 720A is exposed for the first time.

The first device area 720A may be one selected from a plurality of device areas 720A, 720B, 720C, and 720D formed on the panel 720 and covered by the photoresist layer 728. The first device area 720A may be exposed to transfer at least one main pattern MP (refer to FIGS. 2A and 2B) to the photoresist layer disposed on the first device area 720A. While exposing the first device area 720A, the first peripheral area 722A disposed around the first device area 720A in the peripheral area 722 of the panel 720 may be simultaneously exposed through the translucent edge area STE of the photomask 200.

FIG. 10A shows an image transferred by the first shot SHOT1 affected by the first scanning process SCAN1 described with reference to FIG. 9. As used herein, the term "shot" refers to the planar image transferred to the panel 720 when the reticle is scanned once.

FIG. 10B is a schematic diagram of the photoresist layer 728 formed on the panel 720, where the image is transferred onto the panel 720 by the first shot SHOT1.

FIG. 10C is a cross-sectional view taken along the line CC ′ of FIG. 10B, which illustrates the region 728E1 in the photoresist layer 728 that is exposed for the first time by the first shot SHOT1.

By using the process P332 of FIG. 5 to expose the first device region 720A and the first peripheral region 722A disposed around the first device region 720A through the main pattern region MPR and the translucent edge region STE of the photomask 200, all the The image of the at least one main pattern MP is transferred to the photoresist layer 728 formed on the first device area 720A, and the image of the at least one auxiliary pattern AK1, AK2, and AK3 can be transferred to the first A surrounding area 722A.

Referring to FIGS. 5 and 11A to 11C, in the process P334 of FIG. 5, the second device region 720B may be exposed through the main pattern region MPR of the mask 200. While exposing the second device area 720B, the second peripheral area 722B disposed around the second device area 720B in the peripheral area 722 of the panel 720 may be simultaneously exposed through the translucent edge area STE of the photomask 200. The second peripheral region 722B may overlap the first peripheral region 722A in the first partial region LAB sandwiched between the first device region 720A and the second device region 720B. Therefore, while exposing the second device area 720B, the first partial area LAB sandwiched between the first device area 720A and the second device area 720B in the first peripheral area 722A may be exposed a second time, So that the first partial area LAB can be in a double exposure state.

The second device area 720B may be an area adjacent to the first device area 720A among the plurality of device areas 720A, 720B, 720C, and 720D. Therefore, by exposing the second device region 720B, the image of the at least one main pattern MP (refer to FIGS. 2A and 2B) can be transferred to the photoresist layer 728 formed on the second device region 720B. While exposing the second device area 720B, the images of the at least one auxiliary pattern AK1, AK2, and AK3 can be transferred to the second peripheral area 722B through the translucent edge area STE of the photomask 200.

FIG. 11A shows an image transferred by the first shot SHOT1 affected by the first scanning process SCAN1 described with reference to FIG. 9 and an image transferred by the second shot SHOT2 affected by the second scanning process SCAN2 .

In FIG. 11A, the first shot SHOT1 area and the second shot SHOT2 area The overlapping area between may correspond to the first local area LAB. A first exposure process using the first shot SHOT1 and a second exposure process using the second shot SHOT2 may be performed, thereby forming a double exposure area DE in the first partial area LAB.

FIG. 11B shows a schematic image of the photoresist layer 728 formed on the panel 720 due to the first shot SHOT1 and the photoresist formed on the panel 720 due to the second shot SHOT2. Schematic image of layer 728.

11C is a cross-sectional view taken along line CC ′ of FIG. 11B, which illustrates the area 728E1 of the photoresist layer 728 whose first exposure is performed using the first shot SHOT1 and the second shot SHOT2 pair. It performs the second exposure of the area 728E2 of the photoresist layer 728.

According to the process P334 of FIG. 5, the second device region 720B and the second peripheral region 722B disposed around the second device region 720B may be exposed through the main pattern region MPR and the translucent edge region STE. Therefore, the image of at least one main pattern MP can be transferred to the photoresist layer 728 formed on the second device area 720B, and the image of at least one auxiliary pattern AK1, AK2, and AK3 can be transferred to the second peripheral area 722B . In addition, at least one of the images of the auxiliary patterns AK1, AK2, and AK3 may be transferred to the first local area LAB.

Referring to FIGS. 5, 12A, and 12B, in the process P336 of FIG. 5, the third device region 720C may be exposed through the main pattern region MPR of the reticle 200, and at the same time, through the translucent edge region of the reticle 200 STE performs a third exposure on the second partial area LABC which is part of the first partial area LAB.

The third device area 720C may be the plurality of device areas 720A, 720B, 720C And the area adjacent to the second device area 720B in 720D. By exposing the third device region 720C, at least one main pattern MP (refer to FIGS. 2A and 2B) can be transferred to the photoresist 728 formed on the third device region 720C. While exposing the third device area 720C, the third peripheral area 722C disposed around the third device area 720C in the peripheral area 722 of the panel 720 may be simultaneously exposed through the translucent edge area STE of the photomask 200. The third peripheral area 722C may overlap the second peripheral area 722B in the local area LBC interposed between the second device area 720B and the third device area 720C. Therefore, while exposing the third device area 720C, the local area LBC overlapping the second peripheral area 722B in the third peripheral area 722C can be double-exposed, and the first portion as the third peripheral area 722C can be exposed The second partial area LABC which is a part of the area LAB is subjected to triple exposure.

FIG. 12A shows the transfer by the first shot SHOT1 affected by the first scanning process SCAN1 described with reference to FIG. 9, the second shot SHOT2 affected by the second scanning process SCAN2, and the third scan Schematic image of the third shot SHOT3 affected by the process SCAN3.

In FIG. 12A, the overlapping area between the area of the first shot SHOT1 and the area of the second shot SHOT2, and the overlap area between the area of the second shot SHOT2 and the area of the third shot SHOT3 may be the double exposure area DE. In addition, the overlapping area between the area of the first shot SHOT1, the area of the second shot SHOT2, and the area of the third shot SHOT3 may be a triple exposure area TE.

FIG. 12B shows the transfer to the photoresist layer formed on the panel 720 by the first shot SHOT1, the second shot SHOT2, and the third shot SHOT3, respectively Schematic image of 728.

In FIG. 12B, the first partial area LAB may include an area that is double-exposed by the first exposure process using the first shot SHOT1 and the second exposure process using the second shot SHOT2. The second partial area LABC, which is a partial area of the first partial area LAB included in the third peripheral area 722C, may be a triple exposure area. In addition, the local area LBC of the peripheral area 722 sandwiched between the second device area 720B and the third device area 720C may include a second exposure process using the second shot SHOT2 and a third exposure using the third shot SHOT3 The area that was double-exposed during the process.

According to the process P336 of FIG. 5, the third device region 720C and the third peripheral region 722C can be exposed through the main pattern region MPR and the translucent edge region STE of the reticle 200, so the image of the at least one main pattern MP can be It is transferred to the photoresist layer 728 formed on the third device area 720C, and the images of the at least one auxiliary pattern AK1, AK2, and AK3 may be transferred to the third peripheral area 722C. In addition, while the images of the at least one auxiliary pattern AK1, AK2, and AK3 transferred by exposing the second device area 720B and the second peripheral area 722B remain on the photoresist layer 728, the third device area 720C and the third peripheral area 722C may be exposed. Therefore, at least one of the images of the at least one auxiliary pattern AK1, AK2, and AK3 that has been formed in the peripheral area 722 can be exposed again with exposure light.

5, 13A, and 13B, in the process P338 of FIG. 5, the fourth device region 720D may be exposed through the main pattern region MPR of the reticle 200, and at the same time, through the translucent edge region of the reticle 200 STE makes the fourth exposure to the second partial area LABC.

The fourth device area 720D may be an area adjacent to the first device area 720A and the third device area 720C among the plurality of device areas 720A, 720B, 720C, and 720D. By exposing the fourth device region 720D, at least one main pattern MP (refer to FIGS. 2A and 2B) can be transferred to the photoresist layer 728 formed on the fourth device region 720D. While exposing the fourth device area 720D, the fourth peripheral area 722D disposed around the fourth device area 720D in the peripheral area 722 of the panel 720 may be simultaneously exposed through the translucent edge area STE of the photomask 200. In this case, the second partial area LAB can also be exposed in the peripheral area 722, so that the second partial area LABC can be quadruple exposed.

In addition, in the peripheral area 722, a local area LCD interposed between the third device area 720C and the fourth device area 720D and a local area LAD interposed between the first device area 720A and the fourth device area 720D Each of may include a double exposure area.

13A shows that the first shot SHOT1 affected by the first scan process SCAN1 described with reference to FIG. 9 is transferred, the second shot SHOT2 affected by the second scan process SCAN2 is transferred, and the third scan is transferred Schematic image of the third shot SHOT3 affected by the process SCAN3 and the fourth shot SHOT4 affected by the fourth scanning process SCAN4.

In FIG. 13A, the overlapping area between the area of the first shot SHOT1 and the area of the second shot SHOT2, the overlap area between the area of the second shot SHOT2 and the area of the third shot SHOT3, and the area of the third shot SHOT3 The overlapping area with the area of the fourth shot SHOT4, and the area between the area of the first shot SHOT1 and the fourth shot SHOT4 may include the double exposure area DE. In addition, the first shot SHOT1 area, the second shot SHOT2 area, The overlapping area between the area of the third shot SHOT3 and the area of the fourth shot SHOT4 may be the quadruple exposure area QE.

FIG. 13B is a schematic image of the photoresist layer 728 formed on the panel 720 by the first shot SHOT1, the second shot SHOT2, the third shot SHOT3, and the fourth shot SHOT4, respectively.

In FIG. 13B, the first local area LAB may include areas that are double-exposed by the first exposure process using the first shot SHOT1 and the second exposure process using the second shot SHOT2, and the second partial area LABC may be four Heavy exposure area. In addition, in the peripheral area 722, a local area LBC sandwiched between the second device area 720B and the third device area 720C, a local area LCD sandwiched between the third device area 720C and the fourth device area 720D, and The local area LAD sandwiched between the first device area 720A and the fourth device area 720D may include a double exposure area.

According to the process P338 of FIG. 5, the fourth device region 720D and the fourth peripheral region 722D disposed around the fourth device region 720D may be exposed through the main pattern region MPR and the translucent edge region STE of the photomask 200. Therefore, the image of the at least one main pattern MP may be transferred to the photoresist layer 728 formed on the fourth device area 720D, and the image of the at least one auxiliary pattern AK1, AK2, and AK3 may be transferred to the fourth Surrounding area 722D. In addition, before exposing the fourth device area 720D and the fourth peripheral area 722D, and while the images of the at least one auxiliary pattern AK1, AK2, and AK3 have been formed on the photoresist layer 728 in the peripheral area 722, The fourth device area 720D and the fourth peripheral area 722D may be exposed. Therefore, the at least one auxiliary pattern AK1, AK2, AK3 that has been formed in the peripheral area 722 can be exposed to the exposure light At least one of the images is exposed again.

Although the case of using the scanning exposure system 700 to perform the process P330 of FIG. 4 and the processes P332 to P338 of FIG. 5 is explained above, the present exemplary embodiment is not limited to this. For example, a stepper-type exposure system may be used to perform the process P330 of FIG. 4 and the processes P332 to P338 of FIG. 5.

Referring back to FIG. 4, in the process P340, the exposed photoresist layer 728 may be developed as shown in FIG. 13B so that a photoresist pattern having a shape corresponding to the at least one main pattern MP may be formed on In each of the plurality of device regions 720A, 720B, 720C, and 720D, and at least one alignment key having a shape corresponding to the at least one auxiliary pattern AK1, AK2, AK3 may be formed in the peripheral region 722 .

The at least one alignment key formed in the peripheral area 722 may be formed by transferring images of the auxiliary patterns AK1, AK2, and AK3, and may include various types of alignment keys or mask codes. The keys include alignment keys for aligning the various layers used to form the electronic device, alignment keys for aligning the photomask with the exposure system, alignment keys for aligning the individual dies in the mother substrate, and Align the exposure lens with the alignment key of the reticle.

The at least one alignment key formed in the peripheral region 722 may have a larger critical size than the patterns formed in the device regions 720A, 720B, 720C, and 720D. In some embodiments, the minimum feature size of the at least one alignment key formed in the peripheral area 722 may be greater than about 10 times to 300 times the feature size of the pattern formed in the device areas 720A, 720B, 720C, and 720D . Therefore, formed in the peripheral area 722 The at least one alignment key in may have a size that is much larger than the patterns formed in the device regions 720A, 720B, 720C, and 720D. The bulk density or pattern accuracy of the at least one alignment key formed in the peripheral region 722 may not be as strict as the patterns formed in the device regions 720A, 720B, 720C, and 720D. Therefore, even if the double-exposure process or the quadruple-exposure process is performed according to the method described with reference to FIGS. 4 and 5, an alignment key having a desired size and resolution can be formed in the peripheral region 722.

In the manufacturing method of the electronic device described with reference to FIGS. 4, 5, and 8 to 13B, the exposure process may be performed using a photomask 100 or 200 that does not have a blind area covered by a light shielding layer. As described above, since the photomask 100 or 200 required for the exposure process does not include a light shielding layer, a simple forming process can be used to form the photomask 100 or 200, and the process for removing unnecessary light shielding layers can be omitted . Therefore, the exposure process can be performed using the reticle 100 or 200 formed using a process that has eliminated the possibility of occurrence of defects. Therefore, the processing time (TAT) of the photomask 100 or 200 required for manufacturing the electronic device can be reduced, and the life of the exposure system used for manufacturing the electronic device can be extended. In addition, the time and cost required for maintenance and repair of the exposure system can be reduced. In this way, the productivity of electronic device manufacturing can be improved.

FIG. 6 illustrates a flowchart of a method for manufacturing a display device in an exemplary embodiment.

A method of manufacturing a display device according to an exemplary embodiment will now be explained with reference to FIGS. 6 and 8 to 13B. Hereinafter, the same description as provided with reference to FIGS. 8 to 13B will be omitted.

In the process P412 of FIG. 6, a photomask may be prepared. The photomask may include a main The pattern region MPR and the translucent edge region STE extend from the outer portion of the pattern region MPR to the outer portion of the transparent substrate 102.

This embodiment will be described on the assumption that the mask 200 shown in FIGS. 2A and 2B is used as a mask.

In the process P422 of FIG. 6, a panel including multiple device areas and multiple alignment key areas can be prepared.

In some embodiments, the panel may include first to fourth device areas 720A, 720B, 720C, and 720D and first to fourth peripheral areas 722A, 722B, 722C and 720D's panel 720. The first to fourth peripheral areas 722A, 722B, 722C, and 722D of the panel 720 may respectively form multiple alignment key areas.

In the process P424 of FIG. 6, a photoresist layer 728 may be formed on the panel 720.

The photoresist layer 728 may be formed to cover the first to fourth peripheral regions 722A, 722B, 722C, and 722D surrounding the first to fourth device regions 720A, 720B, 720C, and 720D, respectively.

In the process P430 of FIG. 6, in the exposure system, the mask 200 may be used to repeat at least a part of the first to fourth peripheral regions 722A, 722B, 722C, and 722D as the plurality of alignment key regions During exposure, the plurality of device regions 720A, 720B, 720C, and 720D covered by the photoresist layer 728 and the first to fourth peripheral regions 722A, 722B, 722C, and 722D may be sequentially exposed.

In some embodiments, the exposure system 700 shown in FIG. 8 may be used as the exposure system.

In some embodiments, the exposure process using the process P430 of FIG. 6 may use the synthetic light emitted by the i-line (365 nm), g-line (436 nm), h-line (405 nm), or a combination thereof carried out. For example, the exposure process may be performed using light with ultraviolet (ultraviolet, UV) combined wavelength (g-line, h-line, or i-line) emitted by a mercury lamp as an exposure light source. In some other embodiments, the exposure process using process P430 of FIG. 6 may be performed using KrF excimer laser (248 nm) or ArF excimer laser (193 nm). However, the light source applicable to the method of manufacturing the display device in the exemplary embodiment is not limited to the above example, but various other conventional light sources may also be used.

FIG. 7 is a flowchart of an exposure process using the process P430 of FIG. 6 in an exemplary embodiment.

Now, the exposure process using the process P430 of FIG. 6 will be explained with reference to FIGS. 7 and 9 to 13B.

In process P432 of FIG. 7, the first device region 720A may be exposed through the main pattern region MPR of the reticle 200, and at the same time, the first peripheral region 722A may be first traversed through the translucent edge region STE of the reticle 200 In the second exposure, the first peripheral area 722A is a first alignment key area disposed around the first device area 720A.

Since the first exposure process according to the process P432 of FIG. 7 is approximately the same as that described in the process P332 of FIG. 5, it will not be repeated here.

In the process P434 of FIG. 7, the main pattern region MPR of the mask 200 can be used The second device area 720B is exposed, and at the same time, the first partial area LAB may be exposed a second time via the translucent edge area STE of the photomask 200, the first partial area LAB is selected as the first alignment key The first peripheral area of the district is 722A.

Since the second exposure process according to the process P434 of FIG. 7 is approximately the same as that described in the process P334 of FIG. 5, it will not be repeated here.

In the process P436 of FIG. 7, the third device region 720C may be exposed through the main pattern region MPR of the reticle 200, and at the same time, the translucent edge region STE of the reticle 200 may be used to select the first local region LAB. The second local area LABC is exposed.

In some embodiments, the exposure process in process P436 according to FIG. 7 may be performed in a manner substantially similar to the third exposure process in process P336 according to FIG. 5.

In some other embodiments, the exposure process according to process P436 of FIG. 7 may be performed in a manner substantially similar to the fourth exposure process in process P338 according to FIG. 5.

Referring back to FIG. 6, in process P440, the exposed photoresist layer 728 can be developed so that it can be in each of the plurality of device regions (eg, device regions 720A, 720B, 720C, and 720D) A photoresist pattern having a shape corresponding to the at least one main pattern MP is formed, and may be in a peripheral region including the first to fourth peripheral regions 722A, 722B, 722C, and 722D (which are alignment key regions) At least one alignment key is formed in 722.

Because the process according to process P440 of FIG. 6 and the process P340 of FIG. 4 The narrators are about the same, so they will not be repeated here.

In the method of manufacturing a display device in the exemplary embodiment described with reference to FIGS. 6 and 7, a photomask 200 that does not contain a blind area covered by a light-shielding layer may be used to perform an exposure process. Therefore, since the photomask 200 required for the exposure process does not include a light-shielding layer, a simple process can be used to form the photomask 200, and a process for removing unnecessary light-shielding layers can be omitted. Therefore, the exposure process can be performed using the reticle 200 formed using a process that has reduced the possibility of occurrence of defects. Therefore, the processing time of the photomask 200 required for manufacturing the display device can be reduced, and the life of the exposure system used for manufacturing the display device can be extended. In addition, the time and cost required for maintenance and repair of the exposure system can be reduced. In this way, the productivity of display device manufacturing can be improved.

FIG. 14 is a block diagram of a display device 800 according to an exemplary embodiment.

14, the display device 800 may include a liquid crystal panel 810, a timing controller 820, a gate driver 830, and a source driver 840.

The liquid crystal panel 810 may include a plurality of gate lines GL1, ..., and GLn; a plurality of data lines DL1, ..., and DLm; and a plurality of pixels PX, the plurality of pixels PX arranged in a matrix shape And it is defined by the intersection between the plurality of gate lines GL1, ..., and GLn and the plurality of data lines DL1, ..., and DLm.

The plurality of pixels PX may have the same structure and provide the same function. For simplicity, only one pixel PX is shown in FIG. 14. Each of the plurality of pixels PX may include a thin film transistor TFT and a liquid crystal capacitor CLC. The gate electrode of the thin film transistor TFT may be connected to the corresponding gate line. Thin film transistor TFT The source electrode can be connected to the corresponding data line. The liquid crystal capacitor CLC may be connected to the drain electrode of the thin film transistor TFT.

The timing controller 820 can receive external signals from the host 802. The external signal may include an image signal and a reference signal. The reference signal may be a signal synchronized with the frame frequency (for example, a vertical synchronization signal or a horizontal synchronization signal). The timing controller 820 can convert the input external signal and generate a gate control signal GCS and a data control signal DCS.

The timing controller 820 can output the generated gate control signal GCS to the gate driver 830. In addition, the timing controller 820 can output the generated data control signal DCS to the source driver 840. The timing controller 820 can control the gate driver 830 and the source driver 840 in response to the gate control signal GCS and the data control signal DCS.

The gate driver 830 may sequentially apply the gate signal to the plurality of gate lines GL1,..., And GLn of the liquid crystal panel 810 in response to the gate control signal GCS generated by the timing controller 820.

The source driver 840 may apply a data signal to the plurality of data lines DL1,..., And DLm of the liquid crystal panel 810 in response to the data control signal DCS generated by the timing controller 820.

When the gate signal is sequentially applied from the gate driver 830 to the plurality of gate lines GL1, ..., and GLn, data corresponding to the gate line to which the gate signal is applied can be synchronized with the gate signal The source driver 840 is applied to the plurality of data lines DL1,..., And DLm.

In a frame, by applying a gate signal to the plurality of gate lines GL1, ..., and GLn, an image of a frame can be displayed. When a gate signal is applied to one gate line (for example, gate line GL1) selected from the plurality of gate lines GL1, ..., and GLn, a thin film transistor (TFT) connected to the gate line GL1 ) Can be switched on in response to the applied gate signal. When a data signal is applied to the data line DL1 connected to the turned-on thin film transistor, the applied data signal can be applied through the turned-on thin film transistor and electrically charged in the liquid crystal capacitor CLC. As the thin film transistor is repeatedly turned on and off, the data signal can be electrically stored in and released from the liquid crystal capacitor CLC. The light transmittance of the liquid crystal can be adjusted according to the voltage stored in the liquid crystal capacitor CLC, so that the liquid crystal panel 810 can operate.

In some embodiments, the plurality of pixels of the liquid crystal panel 810 may be formed using an exposure process using the reticle 100 shown in FIGS. 1A and 1B or an exposure process using the reticle 200 shown in FIGS. 2A and 2B Everyone in PX. In some embodiments, the plurality of pixels of the liquid crystal panel 810 may be manufactured using the method of manufacturing an electronic device described with reference to FIGS. 4 and 5 or the method of manufacturing a display device described with reference to FIGS. 6 and 7 Everyone in PX.

In summary, when manufacturing a high-resolution display device, in the manufacture of a thin film transistor liquid crystal display (TFT LCD), the line width of the pixel transistor is gradually decreasing. In the lithography process for manufacturing electronic devices (such as display devices), the photomask may be irradiated with light so that the pattern formed on the photomask can be transferred to the photoresist layer formed on the display panel. In the manufacture of display devices, used to form thin film transistor arrays The impact of the listed lithography process on the large-scale productivity of display devices is gradually increasing.

A large-area transparent substrate can be used as a transparent substrate for forming a thin film transistor array to promote mass production. In order to expose a large-area transparent substrate, a proximity optical projection system (proximity optical projecting system) may be used. The proximity optical projection system is used to divide the transparent substrate into a plurality of exposure areas and the divided exposure areas of the transparent substrate Expose sequentially. In general, the photomask includes a blind area, which is formed in an edge area of the photomask and includes a light-shielding layer to prevent the divided exposure area from being repeatedly exposed. However, since the light shielding layer is used in the process of forming the photomask, the time and cost required for the process of forming the photomask may increase. In addition, as the line width required for the pixel transistor of the display device is miniaturized, a fine pattern with a critical dimension (CD) of about 2 microns or less in the pattern area can be formed using a phase shift mask (PSM) . In the manufacture of phase shift masks, when a light-shielding layer is used to form a blind region, not only does the time it takes to remove unnecessary light-shielding layers from the pattern region increase, but the possibility of defects also increases, which in turn reduces The manufacturing efficiency of the photomask.

As described above, the embodiments relate to a photomask without a light-shielding layer, a method of manufacturing the photomask, a method of manufacturing an electronic device using a photomask without a light-shielding layer, and a method of manufacturing a display device .

Each embodiment can provide a photomask having a pattern area with reduced line width and no light shielding layer. Since the photomask does not include a light shielding layer, the possibility of defects due to the use of the light shielding layer can be eliminated, and the photomask can have a simple structure formed by a simple manufacturing process.

In addition, each embodiment can provide a method for manufacturing a photomask without using a light-shielding layer, This can reduce the possibility of defects during the manufacturing process of the photomask and can simplify the manufacturing process of the photomask.

In addition, various embodiments can provide a method of manufacturing an electronic device, whereby a photomask without a light-shielding layer can be used to efficiently transfer a reduced pattern to a large-area substrate.

In addition, the embodiments can provide a method for manufacturing a display device, whereby a photomask without a light-shielding layer can be used to efficiently transfer a reduced pattern to a large-area substrate.

Exemplary embodiments have been disclosed herein, and although specific terms are used, these terms are used and are intended to be construed as only general and descriptive meanings and not for limiting purposes. In some cases, those with ordinary knowledge in the technology of this application will know that, unless otherwise specified, the relevant features, characteristics, and/or elements described in the specific embodiments may be used alone or may be implemented with other The relevant features, characteristics, and/or elements described in the examples are used in combination. Therefore, those skilled in the art should understand that changes in various forms and details can be made without departing from the spirit and scope of the patent application scope of the present invention described below.

100: Mask

120: Phase shift pattern

122: First phase shift pattern

124: second phase shift pattern

B-B’: line

MP: main pattern

MPR: main pattern area

STE: Translucent edge area

Claims (19)

A phase shift mask includes: a substrate; a second phase shift pattern located on the substrate, the second phase shift pattern extending to the outermost periphery of the substrate, the second phase shift pattern One wavelength of light is formed of a semi-transmissive material, and the substrate is substantially transparent to the first wavelength of light, so that the phase shift mask is transmitted at the second phase shift pattern About 2% to 10% of the light of the first wavelength; and a first phase shift pattern on the substrate, the second phase shift pattern is disposed on the outermost periphery of the substrate and the first Between a phase shift pattern, wherein the second phase shift pattern has an opening, and the opening corresponds to an alignment key. The phase shift mask as described in item 1 of the patent application range, wherein the minimum transmittance of the entire area of the phase shift mask to the light of the first wavelength is about 2%. The phase shift mask as described in item 1 of the patent application scope, wherein the phase shift mask does not include an opaque area. A method of manufacturing a unit substrate, the method comprising: providing a mother substrate having a size sufficient to provide at least two unit substrates; aligning the phase shift mask as described in item 1 of the patent application scope to the A first position of the mother substrate; irradiating the first area of the mother substrate via the phase shift mask aligned with the first position; Aligning the phase shift mask to the second position of the mother substrate so that the phase shift mask overlaps with the sub-region of the irradiated first area; and by aligning with the second position The phase shift mask illuminates the second region of the mother substrate so that the sub-region is irradiated a second time. The method for manufacturing a unit substrate as described in item 4 of the patent application scope, wherein the phase shift mask includes: a substrate; a second phase shift pattern on the substrate, the second phase shift pattern extending to the At the outermost periphery of the substrate, the second phase shift pattern is formed of a material that has translucency to the light of the first wavelength, and the substrate is substantially transparent to the light of the first wavelength, to Causing the phase shift mask to transmit about 2% to 10% of the light of the first wavelength at the second phase shift pattern; and a first phase shift pattern on the substrate, the second phase The shift pattern is disposed between the outermost periphery of the substrate and the first phase shift pattern, and when the light of the first wavelength is irradiated through the first phase shift pattern, the first phase shift pattern Will cause interference. The method for manufacturing a unit substrate as described in item 4 of the patent application range, wherein the phase shift mask includes: a substrate; and a phase shift layer on the substrate, wherein an edge portion of the phase shift mask is half Transparent area. The method of manufacturing a unit substrate as described in item 6 of the patent application range, wherein the sub-region is irradiated via the translucent region of the phase shift mask. The method of manufacturing a unit substrate as described in item 7 of the patent application range, wherein the translucent area has an opening corresponding to the alignment key. The method of manufacturing a unit substrate as described in item 8 of the patent application range, wherein the alignment key corresponding to the opening is formed in the sub-region. The method for manufacturing a unit substrate as described in item 4 of the patent application range, wherein the mother substrate is a silicon wafer or a mother display panel substrate. The method for manufacturing a unit substrate as described in item 10 of the scope of the patent application further includes: after irradiating the second region, separating the mother substrate into at least two unit substrates, wherein the sub-regions are located in adjacent In the channel between the unit substrates. A semiconductor device manufactured according to the method for manufacturing a unit substrate as described in item 4 of the patent application scope. A display panel manufactured according to the method of manufacturing a unit substrate as described in item 4 of the patent application scope. A phase shift mask includes: a substrate; and a phase shift layer on the substrate, wherein an edge portion of the phase shift mask is a translucent area, wherein the translucent area has an opening, and the opening corresponds to Alignment key. The phase shift mask as described in item 14 of the patent application range, wherein the translucent region transmits about 2% to 10% of light. The phase shift mask as recited in item 15 of the patent application range, wherein the phase shift layer includes one or more of chromium oxide or molybdenum silicide. The phase shift mask of claim 14 of the patent application scope, wherein the phase shift mask does not include an opaque layer at the edge portion, and the edge portion is an outer edge of the phase shift mask. A phase shift mask as described in item 14 of the patent application range, wherein the phase shift mask includes a main pattern area having substantially the same thickness as the translucent area. The phase shift mask of claim 18, wherein the translucent area is disposed between the main pattern area and the outermost edge of the phase shift mask.

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