TWI687040B - Motor drive circuit, cooling device and electronic equipment - Google Patents

Abstract

The subject of the invention is to improve the linearity of the rotational speed with respect to the control input. For the TH terminal, input the analog voltage V _TH indicating the speed. For the OSC terminal, in the first stage, the capacitor C21 and the discharge resistor R22 are connected in parallel between the OSC terminal itself and the opposite ground. The charging resistor R21 and the first switch 252 are provided in series between the reference voltage line 254 that stabilizes the voltage and the OSC terminal. The switching circuit 250 is such that when the oscillator voltage V _OSC generated in the OSC terminal reaches the upper threshold V _H , the first switch 252 is turned off, and when the oscillator voltage V _OSC decreases to the lower threshold V _L , the通第1开关252. The oscillator voltage V _OSC is compared with the voltage V _{TH of the} TH terminal, and a pulse-modulated control pulse S3 is generated.

Description

Motor drive circuit, cooling device and electronic equipment

The invention relates to a motor driving device.

In recent years, with the increasing speed of personal computers or workstations, LSI (Large Scale Integrated Circuit) for arithmetic processing such as CPU (Central Processing Unit) or DSP (Digital Signal Processor) has been implemented )'S movement speed is showing an upward trend. Such an LSI system will generate more heat as its operating speed and pulse frequency become higher. The heat generated from the LSI has a problem that causes the LSI itself to thermally burst or affect the surrounding circuits. Therefore, proper thermal cooling of the heating element represented by LSI has become an extremely important technique. In many electronic devices, in order to cool the LSI, an air-cooled cooling method using a cooling fan is used. In this method, for example, a cooling fan is arranged facing the surface of the LSI, and cool air is blown to the surface of the LSI. When cooling the LSI by the cooling fan in this way, the temperature near the LSI is monitored, and the rotation of the fan is changed according to the temperature to adjust the degree of cooling. FIG. 1 is a circuit diagram of a cooling device including an integrated circuit for driving a fan motor studied by the inventors. In addition, any configuration of FIG. 1 cannot be regarded as a known technique. The cooling device 2r includes a fan motor 6 and a driving device 9r that drives the fan motor 6. The driving device 9r is configured to drive the integrated circuit 200r and its peripheral components. The components of the driving device 9r are mounted on a common printed circuit board. The fan motor 6 is a brushless DC motor. The Hall sensor 8 is provided near the fan motor 6 in order to detect the position of the rotor. The ground terminals (GND) of pin 1 and pin 16 of the driving integrated circuit 200r are grounded. For the power supply terminal (VCC) of pin 3, the power supply voltage V _DD is input through the diode D1 for preventing backflow. The output of the driving section 230 is connected to the fan motor 6 via pin 2 (OUT2) and pin 15 (OUT1). In addition, in this manual, the pin numbers are for convenience, regardless of the pin layout. The Hall bias circuit 204 generates a Hall bias voltage V _HB and supplies it to the Hall sensor 8 through the Hall bias terminal (HB) of pin 10. For the Hall input terminals (H+, H-) of pins 9 and 11, the Hall signals H+ and H- generated by the Hall sensor 8 are input. The Hall comparator 202 compares the Hall signals H ⁻ and H ⁺ , and generates a pulse signal S1 indicating the rotor position, and outputs it to the control logic circuit 208. The control logic circuit 208 performs commutation control in synchronization with the pulse signal S1. The reference voltage source 214 generates a reference voltage V _REF stabilized by a specific voltage level. The reference voltage V _REF is output to the outside through the reference voltage terminal (REF) of pin 12. At the oscillator terminal (OSC) of pin 6, an external capacitor C1 is provided. The oscillator 220 generates a triangular wave oscillator voltage V _OSC by charging and discharging the capacitor C1. At the minimum speed setting terminal (MIN) of pin 4, input the voltage V _MIN indicating the minimum speed of the fan motor 6. The voltage V _MIN at the MIN terminal is generated by dividing the reference voltage V _REF by the resistors R11 and R12. The PWM comparator 216 compares the voltage V _MIN of the MIN terminal with the oscillator voltage V _OSC . The output S2 of the PWM comparator 216 has a duty ratio according to the voltage V _MIN of the MIN terminal. The PWM comparator 218 compares the voltage V _TH of the speed control terminal (TH) of pin 5 with the oscillator voltage V _OSC . The output S3 of the PWM comparator 218 has a duty ratio according to the voltage V _TH of the TH terminal. At the PWM input, an input PWM signal having a duty ratio (input duty ratio) according to the target rotation speed of the fan motor 6 is given. After the input PWM signal is inverted by the converter 10, it is smoothed by the RC filter 12 and input to the TH terminal. The control logic circuit 208 logically synthesizes the output pulses S2 and S3 of the PWM comparators 216 and 218 to generate a pulse signal S4. The duty cycle of the pulse signal S4 is the larger of the duty cycles of the output pulses S2 and S3 of the PWM comparators 216 and 218. The driving section 230 includes Hall amplifiers 232 and 234. The Hall amplifier 232 amplifies the difference between the Hall signals H+ and H- with the first polarity, and outputs it from the OUT2 terminal. The Hall amplifier 234 amplifies the difference between the Hall signals H+ and H- with the second polarity, and outputs it from the OUT15 terminal. Each of the Hall amplifiers 232 and 234 has a push-pull output section. The output stages of the Hall amplifiers 232 and 234 are switched according to the pulse signal S4 from the control logic circuit 208. The output voltages of the OUT1 terminal and the OUT2 terminal alternately become active (commutation control) according to the output S1 of the Hall comparator 202. In addition, the output voltage of the active one has an envelope obtained by amplifying the Hall signal, and in accordance with the duty ratio of the output pulse S3 (or S2) of the PWM comparator 218 (or 216), the on state and the high state are switched Impedance state. The lock protection circuit 240 detects the locked state of the fan motor 6. The TSD circuit 242 detects the overheating state. The signal output circuit 244 generates an alarm signal indicating abnormality, and outputs it from the alarm terminal (AL) of pin 8. The signal output circuit 244 generates an FG (Frequency Generator) signal having a period according to the rotation speed of the fan motor 6, and outputs it from the FG terminal of pin 7. FIG. 2 is an operation waveform diagram of the driving integrated circuit 200r of FIG. The vertical axis and the horizontal axis of the waveform diagram or timing diagram in this specification are appropriately enlarged or reduced for easy understanding, and the waveforms shown are also simplified, exaggerated, or emphasized for easy understanding. In order to expand the display to a sufficiently short time scale with respect to the period of the Hall signals H+ and H-, FIG. 2 shows that the Hall signals H+ and H- are substantially displayed as fixed voltage levels. The output OUT1 has a duty ratio based on the comparison between the lower of V _MIN and V _TH and the oscillator voltage V _OSC . With this, the larger the duty ratio of the input PWM signal, the greater the torque (rotation speed) of the fan motor 6. In addition, the minimum torque, that is, the minimum speed can be set according to the voltage V _{MIN of the} MIN terminal. [Prior Art Literature] [Patent Literature] [Patent Literature 1] Japanese Patent Laid-Open No. 2005-224100 [Patent Literature 2] Japanese Patent Laid-Open No. 2004-166429 [Patent Literature 3] Japanese Laid-Open Patent No. 2009-296839

[Problems to be Solved by the Invention] The present inventors conducted a study on the driving integrated circuit 200r in FIG. 1, and as a result, they learned the following problems. Subject 1. Figures 3(a) to (c) show the relationship between the input duty cycle, the voltage V _{TH of the} TH terminal, the output duty cycle of the output OUT1 (OUT2), and the rotation speed in the drive device 9r of FIG. 1 Figure. As shown in FIG. 3(a), the voltage V _TH of the TH terminal varies linearly with respect to the input duty cycle of the input PWM signal, and therefore, as shown in FIG. 3(b), the duty cycle of the output OUT1, OUT2 (output Duty cycle) also changes linearly with respect to the input duty cycle. In FIG. 3(c), the relationship between the input duty ratio and the rotation speed of the fan motor 6 is shown. In Fig. 3(c), the ideal characteristic (i) under the assumption of no load and no loss is shown. The actual actual characteristic (i) is lower than the ideal characteristic (i) due to the influence of the heating of the motor coil, the friction loss of the bearing, the wind loss accompanying the rotation of the rotor, and the heating of various parts of the motor. The higher, the more significant its impact. As the speed increases, the compression of the speed relative to the input duty cycle cannot be avoided by itself. Subject 2. Patent Document 3 (Japanese Patent Laid-Open No. 2009-296839) discloses related technologies. In this document, a PWM signal is read, a compensation operation is performed to obtain a compensation signal, and a compensation value is added and subtracted from the compensation signal to perform an operation, and the rotation speed of the fan is controlled based on the obtained compensated PWM signal. However, the driving integrated circuit is used in combination with various fan motors. The rotation characteristics of the fan motor shown in FIG. 3(c) vary according to the type of fan motor 6, blade shape or size, and the heat dissipation of fan motor 6 or drive integrated circuit 200r. Therefore, it would be more convenient for each driving integrated circuit 200r to set an optimal correction characteristic with respect to its use condition. An aspect of the present invention has been completed in view of Problem 1, and one of its illustrative objectives is to provide a motor drive device that has improved linearity with respect to the rotational speed of a control input. In addition, another aspect of the present invention has been completed in view of the problem 2. One of the exemplary objectives is to provide the best correction characteristics for the use conditions and to improve the linearity of the rotational speed relative to the rotational speed control signal Motor drive. [Technical Means for Solving the Problem] 1. One aspect of the present invention relates to a motor driving device that drives a fan motor by PWM (Pulse Width Modulation). The motor driving device includes: a speed control terminal, which receives an analog control voltage indicating the speed; a first oscillator terminal, which is in the first platform, between itself and the opposite ground, a capacitor and a discharge resistor are connected in parallel; a charging resistance and The first switch is connected in series between the reference voltage line that stabilizes its voltage and the first oscillator terminal; the switching circuit, when the oscillator voltage generated in the first oscillator terminal reaches the upper threshold, turns off Turn off the first switch, and turn on the first switch when the oscillator voltage drops to the lower threshold; the PWM comparator compares the voltage of the speed control terminal with the oscillator voltage and generates a control pulse; the output circuit , Which drives the fan motor based at least on the control pulse. The slope of the oscillator voltage is not a straight line, but varies according to the CR time constant. In this way, the linearity of the voltage of the speed control terminal and the output duty ratio can be improved. In addition, the charging and discharging slope, and even the frequency of the oscillator voltage can be specified by the charging current and the discharging resistance. In a certain aspect, the motor driving device may further include a second oscillator terminal. In the first platform, the charging resistor is externally placed between the second oscillator terminal and the first oscillator terminal, and the first switch may also be provided between the second oscillator terminal and the output of the reference voltage source. In one aspect, the switching circuit includes: a first resistor, a second resistor, and a third resistor, which are connected in series between the output of the reference voltage source and the ground in sequence; the second switch is arranged in parallel with the third resistor ; And a comparator, which compares the voltage between the connection point of the first resistor and the second resistor with the oscillator voltage; and can also control the on and off of the first switch and the second switch according to the output of the comparator . In one aspect, the motor drive device further includes: a first current source that supplies a specific charging current to the oscillator terminal in the enabled state; and a second current source that is supplied from the oscillator terminal in the enabled state A specific discharge current is imported; and at least one of the first current source and the second current source can also be configured to be switched on and off by a switching circuit. The switching circuit can also switch between the first mode and the second mode. The first mode sets the first current source and the second current source to the disabled state, and controls the on and off of the first switch; the first In the 2 mode, the first switch is turned off, and the first current source and the second current source are set to the enabled state to control the on and off of at least one of the first current source and the second current source. In the second mode in which the first current source and the second current source are set to the enabled state, the slope of the slope of the oscillator voltage can be used as a straight line and can be used in conventional platforms. In a certain aspect, the motor driving device may further include: a first current source that supplies a specific charging current to the oscillator terminal in the enabled state; and a second current source that can control the connection in the enabled state On and off; and during the on-time, a specific discharge current is introduced from the oscillator terminal. The switching circuit can also switch between the first mode and the second mode. The first mode sets the first current source and the second current source to the disabled state, and controls the on and off of the first switch; the second mode is Turn off the first switch, and control the turning on and off of the second current source. In one aspect, the switching circuit includes: a first resistor, a second resistor, and a third resistor, which are connected in series between the output of the reference voltage source and the ground in sequence; the second switch is arranged in parallel with the third resistor ; And a comparator that compares the voltage at the junction of the first resistor and the second resistor with the oscillator voltage; and (i) in the first mode, based on the output of the comparator, controls the first switch and the second The switch is turned on and off. (ii) In the second mode, the second current source and the second switch can also be turned on and off according to the output of the comparator. In a certain aspect, the motor driving device may further include a selector terminal that receives a selection signal indicating the first mode and the second mode. In a certain aspect, the motor driving device can also be integrated into one volume of one semiconductor substrate. "One volume" refers to the case where the constituent elements including the circuit are all formed on the semiconductor substrate, and the main constituent elements of the circuit are one volume, and a part of the resistance can also be used for the adjustment of the circuit constant Or the capacitor is provided outside the semiconductor substrate. By integrating the circuit as one integrated circuit, the circuit area can be reduced, and the characteristics of the circuit element can be uniformly maintained. For the speed control terminal, the input pulse modulation signal can also be input through the filter. Another aspect of the invention relates to a cooling device. The cooling device includes a fan motor and any of the above-mentioned motor driving devices that drive the fan motor. Another aspect of the present invention relates to a motor drive integrated circuit (PWM) driven by PWM (Pulse Width Modulation) of a fan motor. The motor-driven integrated circuit includes: a rotation speed control terminal, which receives an analog voltage indicating the rotation speed; a first oscillator terminal, which is connected in parallel with a capacitor and a discharge resistor between itself and the ground in the first platform; second The oscillator terminal, which is on the first platform, has an external charging resistor between itself and the first oscillator terminal; the first switch is provided between the reference voltage line that stabilizes its voltage and the first oscillator terminal Switching circuit, when the oscillator voltage generated in the first oscillator terminal reaches the upper threshold, the first switch is turned off, and when the oscillator voltage drops to the lower threshold, the first switch is turned on; The PWM comparator compares the voltage of the speed control terminal with the oscillator voltage to generate a control pulse; the output circuit drives the fan motor based at least on the control pulse. A certain aspect of the motor-driven integrated circuit further includes: a first current source that supplies a specific charging current to the oscillator terminal in the enabled state; a second current source that imports a specific charge from the oscillator terminal in the enabled state The discharge current. The switching circuit may also be switchable (i) the first mode, which controls the on and off of the first switch with the first current source and the second current source as disabled states; (ii) the second mode, which is off The first switch is turned on, and the first current source and the second current source are enabled, and the second current source is controlled to be turned on and off. 2. Another aspect of the present invention relates to a motor drive circuit for PWM (Pulse Width Modulation) drive of a fan motor. The motor drive circuit includes: a rotation speed control input section, which inputs a rotation speed control signal indicating the rotation speed of the fan motor; a first setting input section, which inputs the first information indicating the first parameter α; and a digital pulse width modulator, which is defined as The correction function y=f(x) protruding downwards and the degree of bending of the correction function f(x) can be changed based on the first parameter α, and an output corresponding to the speed control signal and the correction function f(x) is generated Control pulse for duty cycle; output circuit that drives the fan motor based at least on the control pulse. According to this aspect, by assigning the first parameter α according to the used condition, the optimal correction characteristic can be set, and the linearity of the rotation speed with respect to the rotation speed control signal can be improved. When the minimum value corresponding to the speed control signal is set to x ₀ and the maximum value corresponding to the speed control signal is set to x ₁₀₀ , the line corresponding to y=ax can also satisfy f(x ₀ )= The correction function y=f(x) is defined by ax ₀ and f(x ₁₀₀ )=ax ₁₀₀ . The first information can also be input to the first setting input unit as an analog voltage. The first information can also be input to the first setting input section as digital data. The first setting input unit may also include a first memory that holds the first information. The first setting input part may also include an I ² C (Inter IC) bus interface circuit that receives the first information of digital data. In a certain aspect, the motor drive circuit may further include a second setting input section that inputs second information indicating the second parameter β. The second parameter β may also specify a. Another aspect of the invention also relates to a motor drive circuit. The motor drive circuit includes: a speed control terminal, which receives a speed control signal indicating the speed of the fan motor; an input circuit, which converts the speed control signal into an input digital value x; a first setting terminal, which receives the first parameter indicating the first 1 Information; duty calculation section, which sets the input digital value corresponding to the minimum value of the speed control signal to x ₀ , and sets the input digital value corresponding to the maximum value of the speed control signal to x ₁₀₀ , corresponding to y= The straight line of ax, and define the correction function y=f(x) that meets f(x ₀ )=ax ₀ and f(x ₁₀₀ )=ax ₁₀₀ , and can be changed and modified based on the first parameter α The bending degree of the function f(x), and calculate the duty command value y corresponding to the input digital value x; the digital pulse width modulator, which generates a control pulse with an output duty ratio corresponding to the duty command value y; The output circuit drives the fan motor at least based on the control pulse. According to this aspect, by assigning the first parameter α according to the used condition, the optimal correction characteristic can be set, and the linearity of the rotation speed with respect to the rotation speed control signal can be improved. In a certain aspect, when the input digital value with the maximum difference between ax and f(x) is set to x _c , the first parameter α may also specify the difference between ax _c and f(x _c ). In a certain aspect, x _c can also be set to a value corresponding to a range of 33 to 66% of the input duty cycle. x _c can also be set to a value corresponding to 50% of the input duty cycle. In one aspect, the first information is input to the first setting terminal as an analog voltage, and the motor drive circuit may further include the first A/D conversion of the first parameter α that converts the analog voltage of the first setting terminal to digital Device. In a certain aspect, it may further include a second setting terminal that receives the second information indicating the second parameter β. The second parameter β may also specify a. In a certain aspect, the second information is input to the second setting terminal as an analog voltage, and the motor drive circuit may further include a second A/D conversion that converts the analog voltage of the second setting terminal into a digital second parameter β Device. In one aspect, the first information is input to the first setting terminal as digit data, and the motor drive circuit may further include: an interface circuit that receives the digital data input to the first setting terminal and obtains the first parameter α ; And the first memory holding the first parameter α. In one aspect, the second information is input to the second setting terminal as digit data, and the motor drive circuit may further include: an interface circuit that receives the digital data input to the second setting terminal and obtains the second parameter β ; And the second memory holding the second parameter β. In a certain aspect, it further includes a third setting terminal that receives the third information indicating the third parameter γ. The duty calculation unit may clamp the duty command value y using the third parameter γ as the lower limit. In a certain aspect, an input pulse modulation signal having an input duty ratio as a speed control signal may also be input to the speed control terminal. The input circuit may also include a duty/digital converter that accepts an input pulse modulation signal and converts to an input digital value x according to the input duty cycle. The motor drive circuit can also be integrated into one volume on one semiconductor substrate. "One volume" refers to the case where all the components including the circuit are formed on the semiconductor substrate, or the main component of the circuit is one volume, and a part of the resistance or The capacitor is provided outside the semiconductor substrate. By integrating the circuit as one integrated circuit, the circuit area can be reduced, and the characteristics of the circuit element can be uniformly maintained. Another aspect of the invention relates to a cooling device. The cooling device includes a fan motor and the above-mentioned motor drive integrated circuit that drives the fan motor. Another aspect of the invention relates to electronic equipment. The electronic device may also include a processor and the aforementioned cooling device that cools the processor. In addition, any combination of the above constituent elements or the constituent elements of the present invention or expressions between methods, devices, systems, etc., can be effectively used as the aspect of the present invention. [Effect of the Invention] According to one aspect of the present invention, the linearity of the rotation speed with respect to the control input can be improved.

(First Embodiment) FIG. 4 is a circuit diagram showing the configuration of a cooling device 2a including a driving integrated circuit 200a of the first embodiment. The cooling device 2a is mounted on, for example, a desktop or laptop computer, workstation, game machine, video machine, video machine, etc., and cools the CPU (Central Processing Unit) and GPU (Graphics Processing Unit: graphics Cooling object (not shown) such as processing unit), power supply device, etc. The cooling device 2a includes a fan motor 6 provided opposite to the cooling target and a driving device 9a that drives the fan motor 6. The driving device 9a is configured by the driving integrated circuit 200a of the embodiment and its peripheral components. Hereinafter, the configuration of the drive device 9a will be described focusing on the differences from the drive device 9 of FIG. 1. The driving integrated circuit 200a is a functional integrated circuit integrated on one semiconductor substrate. At the rotation speed control terminal (TH), an analog control voltage V _TH indicating the rotation speed of the fan motor 6 is input. In this platform, for the TH terminal, an input pulse modulation signal PWM having an input duty ratio is input through the converter 10 and the RC filter 12. In other platforms, an analog voltage generated by a thermistor or the like can also be input to the TH terminal. For the first oscillator terminal (OSC) of pin 6, an external capacitor C21 and a discharge resistor R22 are connected in parallel between its own OSC and the ground. Between the second oscillator terminal (OSCH) of pin 13 and the OSC terminal, an external charging resistor R21 is provided. The driving integrated circuit 200a includes a switching circuit 250 and a first switch 252 instead of the oscillator 220 of FIG. 1. As described with reference to FIG. 1, the reference voltage source 214 generates the reference voltage V _REF . The reference voltage line 254 is connected to the output of the reference voltage source 214 and stabilizes its voltage. The reference voltage V _{REF is} supplied to each block inside the driving integrated circuit 200a via the reference voltage line 254. The first switch 252 is provided between the reference voltage line 254 and the OSCH terminal. That is, the first switch 252 and the charging resistor R21 are provided in series between the reference voltage line 254 and the OSC terminal. The switching circuit 250 turns off the first switch 252 when the oscillator voltage V _OSC generated at the OSC terminal reaches a specific upper threshold V _H (for example, 3.5 V), and the oscillator voltage V _OSC decreases to the lower threshold At the limit value V _L (for example, 1.5V), the first switch 252 is turned on. The PWM comparator 218 compares the voltage V _{TH of the} TH terminal with the oscillator voltage V _OSC and generates a control pulse S3. The control logic circuit 208 and the driving section 230 at least constitute an output circuit 260 that drives the fan motor 6 based on the control pulse S8. The control logic circuit 208 and the driving section 230 are as described with reference to FIG. 1. The present invention is grasped as a block diagram or a circuit diagram of FIG. 4, or relates to various devices and circuits derived from the above description, and is not limited to a specific configuration. In the following, not to narrow the scope of the present invention, but to help understand the essence of the invention or the operation of the circuit, and to make it clear, etc., a more specific configuration example is described. FIG. 5 is a circuit diagram showing a configuration example of the switching circuit 250. The first resistor R31, the second resistor R32, and the third resistor R33 are sequentially connected in series between the reference voltage line 254 and the ground. The second switch 256 is an N-channel MOSFET (Metal Oxide Semiconductor Field Effect Transistor) and is provided in parallel with the third resistor R33. The second switch 256 may also be an NPN type bipolar transistor. The comparator 258 compares the voltage V _N1 at the connection point N1 of the first resistor R31 and the second resistor R32 with the oscillator voltage V _OSC . The first switch 252 and the second switch 256 complementarily control on and off based on the output S5 of the comparator 258. Specifically, the comparator output to S5 258 V _N1> V _OSC at a high level when at V _N1> when V _OSC is low level. When the output S5 is at a high level, the first switch 252 is turned off, and the second switch 256 is turned on, and the discharge state is reached. In the discharge state, the capacitor C21 is discharged through the discharge resistor R22, so it becomes the interval of the falling slope of the oscillator voltage V _OSC . Since the second switch 256 is turned on in the discharge state, the third resistor R33 is short-circuited, and V _N1 =V _REF ×R32/(R31+R32), which corresponds to the lower threshold V _L. When the output S5 is at the low level, the first switch 252 is turned on, and the second switch 256 is turned off, and the charging state is reached. In the charging state, the capacitor C21 is charged via the charging resistor R21, and thus becomes the interval of the rising slope of the oscillator voltage V _OSC . Since the second switch 256 is turned off in the charging state, V _N1 =V _REF ×(R32+R33)/(R31+R32+R33), which is equivalent to the upper threshold V _H. In addition, the switching circuit 250 is grasped as a hysteresis comparator. Therefore, in addition to the configuration of FIG. 5, the switching circuit 250 may be configured using a known hysteresis comparator. Or, an independent comparator may be prepared for each of V _H and V _L. The above is the configuration for driving the integrated circuit 200a. Next, the operation will be described. Fig. 6 is an operation waveform diagram of the driving device 9a of Fig. 4. The oscillator voltage V _OSC of the OSC terminal is charged through the charging resistor R21 during the charging period when the first switch 252 is turned on, and increases with a larger slope. When the oscillator voltage V _OSC reaches the upper threshold V _H , the first switch 252 is turned off, and the capacitor C21 is slowly charged via the discharge resistor R22. Next, the voltage V _OSC of the oscillator is lowered to a lower side of the threshold V _L, the first switch 252 is turned on. By repeating this operation, the oscillator voltage V _OSC is as shown in FIG. 6 and becomes a sawtooth waveform with a non-linear rising and falling slope. When comparing the voltage V _TH with the non-linear sawtooth waveform, the resulting duty cycle of the control pulse S3 is non-linear with respect to the voltage level of the voltage V _TH . FIG. 7 (a) a view showing the oscillator voltage V _OSC 'waveform diagram of the voltage V _OSC of the oscillator 4 of FIG. 1 of. Here, for easy understanding and convenience, the slope of the rising slope of the oscillator voltage V _OSC ′ in FIG. 1 coincides with the slope of the rising slope of the oscillator voltage V _{OSC in} FIG. 4. 7(b) is a graph showing the relationship between the voltage V _{TH of the} TH terminal and the duty ratio of the control pulse S3. (i) shows the characteristics of the driving integrated circuit 200a of FIG. 4, and (ii) shows the characteristics of the driving integrated circuit 200r of FIG. As can be seen from FIG. 7(b), in the driving integrated circuit 200a of FIG. 4, the control pulse S3 changes non-linearly and arcuately with respect to the voltage _VTH . By the characteristics of the bow (referred to as correction characteristics), the relationship between the input duty cycle and the rotation speed can be corrected, and the target characteristic (iii) of FIG. 3(c) can be approached. FIG. 8 is a graph showing the control characteristics when changing the combination of the charging resistance R21 and the discharging resistance R22. Here it is set to C21=100pF. (i) R21=10kΩ, R22=100kΩ (ii) R21=10kΩ, R22=10kΩ (iii) R21=10kΩ, R22=100kΩ//470kΩ 100kΩ//470kΩ is a parallel connection of 100kΩ and 470kΩ. In this example, the combination of (i) is closest to the target characteristic. The actual characteristics shown in FIG. 3(c) vary depending on the type of fan motor 6, the shape or size of the blade, and the heat dissipation of fan 6 or drive integrated circuit 200. According to the driving integrated circuit 200a of the embodiment, as shown in FIG. 8, since the curve of the control characteristic can be changed according to the combination of the charging resistance R21 and the discharging resistance R22, the optimal combination can be selected according to the actual characteristics, thereby approaching Target characteristics. In this manner, according to the driving integrated circuit 200a of the embodiment, the linearity of the rotation speed with respect to the control input _VTH (that is, the duty ratio of the PWM input signal) can be improved. (Second Embodiment) Fig. 9 is a circuit diagram of a driving integrated circuit 200b according to a second embodiment. The driving integrated circuit 200b includes the first current source CS1, the second current source CS2, and the logic gate 259 in addition to the driving integrated circuit 200a of FIG. 4. The first current source CS1 and the second current source CS2 can be switched on and off. The first power flow CS1 is in the enabled state and supplies a specific amount of charging current I _C1 to the OSC terminal. The second current source CS2 is in the enabled state, and a certain amount of discharge current I _{C2 is introduced} from the OSC terminal. In addition to switching between activation and deactivation, at least one of the first current source CS1 and the second current source CS2 can be controlled to be turned on and off by the switching circuit 250. In FIG. 9, only the second current source CS2 can be controlled to be turned on and off based on the output S5 of the comparator 258. The driving integrated circuit 200b has a selector terminal (SELO) for setting the oscillator mode. The SELO terminal inputs the high level or low level voltage. The first current source CS1 and the second current source CS2 are activated when the voltage at the SELO terminal is at the first level (eg, high level), and disabled when the voltage at the SELO terminal is at the second level (eg, low level). In addition to setting the SELO terminal, you can also input the signal for setting the mode through an interface such as an I ² C bus. Or, a non-volatile memory can be built in the driving integrated circuit 200b, and the mode can be selected according to the data of the non-volatile memory. The logic gate 259 is provided to open the first switch 252. The logic gate 259 fixes the first switch 252 to OFF when the SELO terminal is at the first level (high level). In addition, the logic gate 259 passes the output S5 of the comparator 258 when the SELO terminal is at the second level (low level), and switches the first switch 252 on and off. In addition, for easy understanding here, although the logic gate 259 is shown by the symbol of the OR gate, the actual configuration is not limited to the OR gate, and may be other configurations having the same function. The above is the configuration for driving the integrated circuit 200b. The driving integrated circuit 200b can be used by switching between the first mode and the second mode according to the platform used. The first mode is selected by inputting the low level to the SELO terminal. In the first mode, the first current source CS1 and the second current source CS2 are disabled and operate in the same manner as in the first embodiment. The second mode is selected by inputting the high level to the SELO terminal. In the second mode, the first switch 252 is fixedly turned off, and the first current source CS1 and the second current source CS2 are enabled. In the platform where the second mode is selected, there is no need for the charging resistor R21 and the discharging resistor R22. Next, according to the output S5 of the comparator 258, when the second current source CS2 is turned on, the capacitor C21 is discharged with I _C2 -I _C1 , and when the second current source CS2 is turned off, the capacitor C21 is charged with I _C1 . In the second mode, the oscillator voltage V _OSC becomes a triangular wave. Therefore, the same operation as the driving integrated circuit 200r of FIG. 1 can be performed. In the second mode, since the charging resistor R21 and the discharging resistor R22 are not required, circuit components can be reduced. (Use) Finally, the use of the cooling device 2 will be described. FIG. 10 is a perspective view of the PC including the cooling device 2. The PC 500 includes a housing 205, a CPU 504, a motherboard 506, a heat sink 508, and a plurality of cooling devices 2. The CPU 504 is installed on the motherboard 506. The heat sink 508 is in close contact with the upper surface of the CPU 504. The cooling device 2_1 is opposed to the heat sink 508 and blows air to the heat sink 508. The cooling device 2_2 is provided on the back of the frame 502 and sends outside air into the frame 502. In addition to the PC500 of FIG. 10, the cooling device 2 can be mounted on various electronic devices such as workstations, notebook PCs, televisions, and refrigerators. The first and second embodiments have been described above. Those skilled in the art should understand that this embodiment is only an example, and that various constituent elements or combinations of processing procedures may have various modifications, and such modifications are also within the scope of the present invention. In the following, a description will be given of variations related to the first and second embodiments. (First Variation) The elements constituting the driving integrated circuit 200 may be all in one volume, or may be divided into other integrated circuits, and a part of them may be constituted by discrete parts. It is sufficient to decide which part to integrate into based on cost, occupied area, and usage. Conversely, in the embodiment, a part of the circuit elements external to the driving integrated circuit 200 may be integrated into the driving integrated circuit 200. 11(a) to (c) are circuit diagrams of the driving integrated circuit 200 according to the first modification. In FIG. 11( a ), the capacitor C21 is integrated into the driving integrated circuit 200. Thereby, no external capacitors are needed and the cost and installation area can be reduced. In FIG. 11( b ), the charging resistor R21 is integrated into the driving integrated circuit 200. This reduces the cost and installation area by reducing one external resistor. In addition, since the OSCH terminal is unnecessary, the size of the chip that drives the integrated circuit 200 may be reduced. In FIG. 11(c), both the charging resistor R21 and the discharging resistor R22 are integrated into the driving integrated circuit 200. This reduces the cost and installation area by reducing one external resistor. In addition, since the OSCH terminal is unnecessary, the size of the chip that drives the integrated circuit 200 may be reduced. In FIG. 11(c), it is desirable to use at least one of the charging resistor R21 and the discharging resistor R22, preferably both as variable resistors. In this way, the correction characteristics can be fine-tuned for each platform. (Second Modification) In the embodiment, although R21<R22 is used to describe the case where the falling slope of the oscillator voltage V _OSC is long, it is also possible to use R21>R22 to make the rising slope time longer. In this case, the logic of the control pulse S3 may be reversed, or the polarity of the voltage V _TH of the TH terminal may be reversed. (Third Variation) In the embodiment, the case where the fan motor to be driven is a single-phase drive motor is described, but the present invention is not limited to this, and can also be used to drive other motors. (Fourth Modification) The structure and driving method of the driving section 230 are not limited to those described in the embodiments. In the embodiment, the amplitude (envelope) of the output voltage of the OUT1 terminal and the OUT2 terminal is changed according to the Hall signals H+ and H-, but the amplitude may be constant. (Fifth Modification) The polarities and logic levels of the signals described in the embodiments are exemplified, and may be reversed as appropriate. (Third Embodiment) FIG. 12 is a circuit diagram showing a configuration of a cooling device 2 including a driving integrated circuit 200 of a third embodiment. The cooling device 2 is mounted on, for example, a desktop or laptop computer, a workstation, a game machine, a video machine, a video machine, etc. as shown in FIG. 10, and cools the CPU (Central Processing Unit) and GPU (Graphics Processing Unit: graphics processing unit), power supply device and other cooling objects. The cooling device 2 includes a fan motor 6 and a driving device 9 that drive the fan motor 6 that are opposed to the cooling target. The drive device 9 is configured by the drive integrated circuit 200 of the third embodiment and its peripheral components. The components of the drive device 9 are mounted on a common printed circuit board. In FIG. 12, regarding the driving integrated circuit 200, only the relevant parts of the present invention are shown, and the irrelevant structure is omitted. The fan motor 6 is a brushless DC motor. The Hall sensor 8 is provided near the fan motor 6 in order to detect the position of the rotor. The driving integrated circuit 200 is a functional integrated circuit integrated on one semiconductor substrate. For the speed control terminal (PWM) of pin 5 of the driving integrated circuit 200, a speed control signal S _IN indicating the speed of the fan motor 6 is input from the outside. The driving integrated circuit 200 drives the fan motor 6 by PWM (Pulse Width Modulation) according to the rotation speed control signal S _IN . In this embodiment, an input pulse modulation signal (input PWM signal) S _PWM having a duty ratio D _IN as a speed control signal S _IN is input to the speed control terminal (PWM) of pin 5. The input circuit 201 receives the input pulse modulation signal S _PWM and generates an input digital value x according to the input duty ratio D _IN . The input circuit 201 may be constituted by a digital filter, or by a combination of an analog filter and an A/D converter. The PWM terminal and input circuit 201 may also be referred to as a rotation speed control input unit. The ground terminal (GND) of the 16th pin of the driving integrated circuit 200 is grounded. For the power supply terminal (VCC) of pin 10, the power supply voltage V _DD is input through the diode D1 for preventing backflow. The output of the driving section 230 is connected to the fan motor 6 via pin 9 (OUT1) and pin 7 (OUT2). In addition, in this manual, the pin numbers are for convenience, regardless of the pin layout. For the Hall input terminals (H-, H+) of pins 2 and 3, the Hall signals H-, H+ generated by the Hall sensor 8 are input. The Hall comparator 202 compares the Hall signals H+ and H-, and generates a pulse signal S1 indicating the position of the rotor, and outputs it to the control logic circuit 100. The control logic circuit 100 performs commutation control in synchronization with the pulse signal S1. The reference voltage source 214 generates a reference voltage V _REF stabilized by a specific voltage level. The reference voltage V _REF is output to the outside through the reference voltage terminal (REF) of the 11th pin. The reference voltage V _REF is supplied to the Hall sensor 8 as a Hall bias signal V _HB . For the first setting terminal (ADJ) of pin 13, enter the first information indicating the first parameter α. In the present embodiment, the first information is given to the ADJ terminal as the analog voltage V _ADJ . For example, in the driving integrated circuit 200, external resistors R11 and R12 are provided, and the analog voltage V _ADJ is generated by dividing the reference voltage V _REF . In this case, the first parameter α can be set according to the voltage division ratio of the resistors R11 and R12. The first A/D converter 270 converts the analog voltage V _ADJ of the ADJ terminal into a digital first parameter α. The ADJ terminal and the first A/D converter 270 may also be referred to as a first setting input unit. For the second setting terminal (SLOPE) of pin 15, enter the second information indicating the second parameter β. In the present embodiment, the second information system is given to the SLOPE terminal as the analog voltage V _SLOPE . For example, in the driving integrated circuit 200, external resistors R21 and R22 are provided, and the analog voltage V _SLOPE is generated by dividing the reference voltage V _REF . In this case, the second parameter β can be set based on the voltage division ratio of the resistors R21 and R22. The second A/D converter 272 converts the analog voltage V _SLOPE of the SLOPE terminal into a digital second parameter β. The SLOPE terminal and the second A/D converter 272 may also be referred to as a second setting input unit. For the third setting terminal (MIN) of pin 12, enter the third information indicating the third parameter γ. In the present embodiment, the third information is given to the MIN terminal as the analog voltage V _MIN . For example, in the driving integrated circuit 200, external resistors R31 and R32 are provided, and the analog voltage V _MIN is generated by dividing the reference voltage V _REF . In this case, the third parameter γ can be set according to the voltage division ratio of the resistors R31 and R32. The third A/D converter 274 converts the analog voltage V _MIN of the MIN terminal into a digital third parameter γ. The MIN terminal and the third A/D converter 274 may also be referred to as a third setting input unit. The control logic circuit 100 calculates the output duty ratio D _OUT based on the input digital value x, the first parameter α, the second parameter β, and the third parameter γ. Then, a control pulse with the calculated output duty ratio D _OUT is generated. The control logic circuit 100 synthesizes the output S1 of the Hall comparator 202 and the control pulse, and generates a driving signal S5. The driving section 209 includes a pre-driver 210 and an H-bridge circuit 212. The pre-driver 210 drives the H-bridge circuit 212 according to the drive signal S5. In this way, in synchronization with the output S1 of the Hall comparator 202, the outputs OUT1 and OUT2 become active alternately (commutation control), and the active output is switched according to the control pulse (PWM drive). In addition, the driving section 209 may also have the configuration of the driving section 230 of FIG. 1. The RNF terminal of pin 8 is connected to the lower terminal of the H bridge circuit 212. Insert the current detection resistor R _NF between the RNF terminal and the external ground. In the resistance R _NF , a detection voltage V _NF proportional to the current flowing to the fan motor 6 is generated. The detection voltage V _{NF is} input to the current detection terminal (CS) of pin 6. The current clamp comparator 206 compares the detection voltage V _NF with a specific voltage V _CL . The voltage V _CL defines the upper limit of the current flowing to the fan motor 6. When the output (current limit signal) S6 of the current clamp comparator 206 becomes effective (high level), the control logic circuit 100 changes the logic value of the drive signal S5 in order to stop the energization of the fan motor 6. The TSD circuit 242 detects the overheating state. The signal output circuit 244 generates an FG (Frequency Generator) signal having a period according to the rotation speed of the fan motor 6 and outputs it from the FG terminal of pin 1. The above is the overall structure of the driving integrated circuit 200. Next, the internal structure will be described. FIG. 13 is a block diagram showing the structure of the driving integrated circuit 200 of FIG. In addition, in FIG. 13, only the configuration for generating the driving signal S5 is shown, and other configurations are appropriately omitted. The control logic circuit 100 includes a duty calculation unit 108, a digital pulse modulator 110, and an output logic unit 112. The control logic circuit 100 may also be constituted by hardware logic, and may also be constituted by a combination of a processor and software. The duty calculation unit 108 holds the correction function f(x), and uses the correction function to calculate the duty command value y=f(x). Fig. 14 is a graph showing the correction function f(x). The horizontal axis is shown as x, and the vertical axis is shown as y. Set the input digital value corresponding to the minimum value of the speed control signal S _PWM (that is, the duty ratio 0%) to x ₀ , and set the input corresponding to the maximum value of the speed control signal S _PWM (that is, the duty ratio is 100%) The digital value is set to x ₁₀₀ . In this embodiment, the input digital value x is 6 bits, so x ₀ =0 and x ₁₀₀ =64. The straight line with y=ax is shown in Figure 14. Here set a=1. The correction function f(x) satisfies f(x ₀ )=ax ₀ , f(x ₁₀₀ )=ax ₁₀₀ , and protrudes downward and bends. The bow-shaped correction function f(x) can also use a curve derived from logical analysis, and can also obtain the compression characteristics of FIG. 3(c) by self-fitting and can be obtained by inversely calculating the compression characteristics, or approximate Such. The correction function y=f(x) can change the degree of bending based on the first parameter α. Various parameters are explained here. Set the input digit value with the maximum difference between ax and f(x) as x _c . In Fig. 14, x _c corresponds to the value of the input duty ratio D _IN =50% (ie 32). The first parameter α specifies the difference Δ between ax _c and f(x). In addition, the second parameter β defines the slope a of y=ax. In addition, the duty calculation unit 108 sets the third parameter γ as the lower limit and clamps the duty command value y. That is, the third parameter γ specifies the minimum value of the output duty ratio D _OUT , in other words, the minimum rotation speed of the fan motor 6. An example of γ=0 is shown in FIG. 14. 15(a) and (b) are diagrams illustrating the parameter dependency of the input/output characteristics of the duty calculation unit 108. FIG. Fig. 15(a) shows the input/output characteristics when the second parameter β is changed. (i) to (iii) show the characteristics when a=1, 0.5, and 1.33, respectively. Fig. 15(b) shows the input/output characteristics when the third parameter γ is changed. Return to Figure 13. The digital pulse modulator 110 generates a control pulse S4 having an output duty ratio D _OUT according to the duty command value y. The digital pulse modulator 110 can be constructed using a digital counter. The output circuit 120 drives the fan motor 6 based on at least the control pulse S4. The output circuit 120 includes an output logic section 112 of the control logic circuit 100, a driving stage 209, a Hall comparator 202, and a current clamp comparator 206. The output logic unit 112 generates the drive signal S5 based on the pulse signal S1 from the Hall comparator 202, the current limit signal S6 from the current clamp comparator 206, and the control pulse S4. The output logic unit 112 may use a known technique. The above is the configuration for driving the integrated circuit 200. Next, the operation will be described. 16(a) is a diagram showing the relationship between the input duty ratio D _IN and the output duty ratio D _OUT driving the integrated circuit 200, and FIG. 16(b) is a diagram showing the input duty ratio D _IN and the rotation speed of the fan motor 6 Diagram of the relationship. (i) shows the target characteristics, (ii) shows the characteristics when the output duty ratio is calculated based on y=ax without using the correction function f(x), (iii) shows the characteristics of the driving integrated circuit 200 of FIG. 12 . In this manner, according to the driving integrated circuit 200 of the third embodiment, the actual rotation characteristic (iii) can be brought close to the target characteristic (i), and the linearity of the rotation speed with respect to the rotation speed control signal S _PWM can be improved. In particular, in the driving integrated circuit 200 of the third embodiment, the degree of curvature of the correction function f(x) can be adjusted according to the first information V _ADJ given to the AJD terminal. Therefore, depending on the type or characteristic of the fan motor 6 to be driven, the shape of the fan, and the environment in which the cooling device 2 is used, by changing the corrected curve, a higher linearity can be achieved under various conditions. Also, the slope of the correction function f(x) can be adjusted based on the second information V _SLOPE given to the SLOPE terminal, and the minimum speed can be set based on the third information V _MIN given to the MIN terminal. Those skilled in the art should understand that the third embodiment is also an example, and that various constituent elements or combinations of processing procedures may have various modifications, and such modifications are also within the scope of the present invention. Hereinafter, a description will be given of a modification related to the third embodiment. (First modification) FIG. 17(a) is a block diagram of a driving integrated circuit 200a according to a first modification. In this variation, the first information showing the first parameter α is input as digital data to the ADJ terminal. The interface circuit 280 receives the digital data input to the ADJ terminal and obtains the first parameter α. The first memory 282 retains the first parameter α. Similarly, the second information displaying the second parameter β and the third information displaying the third parameter γ are also input to the SLOPE terminal and the MIN terminal as digital data. The interface circuit 280 obtains the second parameter β and the third parameter γ from the digital data, and stores them in the second memory 284 and the third memory 286. For example, the interface circuit 280 may also be a receiver of I ² C bus. In addition, in the case where each digital data is transmitted in multiple times, the ADJ terminal, SLOPE terminal, and MIN terminal can be shared. In addition, the memories 282, 284, and 286 may be non-volatile memories or volatile memories. (Second Variation) In the embodiment, although the rotation speed control signal S _{PWM of} pulse width modulation is input to the PWM terminal, the present invention is not limited to this. FIG. 17(b) is a block diagram of a driving integrated circuit 200b according to a second modification. The driving integrated circuit 200b changes the PWM terminal and includes the _TH terminal that receives the rotational speed control signal S _IN of the analog voltage V _TH . The input circuit 201 also includes an A/D converter 288 that converts the voltage at the TH terminal into an input digital value x. (Third Variation) In the embodiment, although x _{c in} FIG. 14 is set to a value corresponding to D _IN =50%, the present invention is not limited to this, and may be set to correspond to D _IN =30 to Value in the range of 66%. Or, the fourth parameter of x _c can be set from external input. (Fourth Modification) In the embodiment, the second parameter β and the third parameter γ can be set from the outside, but one or both of them may be predetermined in the driving integrated circuit 200. In this case, the number of terminals and the number of external resistors can be reduced. (Fifth Modification) In the embodiment, the case where the fan motor to be driven is a single-phase drive motor is described, but the present invention is not limited to this, and can also be used to drive other two-phase or three-phase motors . (Sixth Modification) The embodiment describes the case where the Hall sensor 8 is externally mounted on the driving integrated circuit 200, but the Hall sensor 8 may be built in the Hall. Or the present invention omits the Hall sensor 8 and can be used for sensorless drive for detecting the rotor position based on the back electromotive force.

2‧‧‧Cooling device 2-1‧‧‧Cooling device 2-2‧‧‧Cooling device 2a‧‧‧Cooling device 2r‧‧‧Cooling device 6‧‧‧Fan motor 8‧‧‧Hall sensor 9 ‧‧‧Drive unit 9a‧‧‧Drive unit 9r‧‧‧Drive unit 10‧‧‧Converter 12‧‧‧‧RC filter 100‧‧‧Control logic circuit 108‧‧‧Duty calculation unit 110‧‧‧ Digital pulse modulator 112‧‧‧‧ Output logic 120‧‧‧ Output circuit 200‧‧‧Drive integrated circuit 200a‧‧‧ Drive integrated circuit 200b‧‧‧‧Drive integrated circuit 200r‧‧‧ Drive integrated circuit 201‧‧‧ input circuit 202‧‧‧ Hall comparator 204‧‧‧ Hall bias circuit 206‧‧‧ current clamp comparator 208‧‧‧ control logic circuit 209‧‧‧ drive section 210‧‧‧ Pre-driver 212‧‧‧H bridge circuit 214‧‧‧ Reference voltage source 216‧‧‧PWM comparator 218‧‧‧PWM comparator 220‧‧‧Oscillator 230‧‧‧Drive section 232‧‧‧Hall amplifier 234 ‧‧‧Hall amplifier 240‧‧‧Lock protection circuit 242‧‧‧TSD circuit 244‧‧‧Signal output circuit 250‧‧‧Switch circuit 252‧‧‧First switch 254‧‧‧ Reference voltage line 256‧‧‧ 2nd switch 258‧‧‧comparator 259‧‧‧ logic gate 260‧‧‧ output circuit 270‧‧‧1st A/D converter 272‧‧‧ 2nd A/D converter 274‧‧‧th 3A/D conversion 280‧‧‧Interface circuit 282‧‧‧ First memory 284‧‧‧ Second memory 286‧‧‧ Third memory 288‧‧‧A/D converter 500‧‧‧PC502‧‧‧Frame 504‧‧‧CPU506‧‧‧Main board 508‧‧‧ Heat sink AL‧‧‧Alarm terminal ADJ‧‧‧ First setting terminal C1‧‧‧Capacitor C21‧‧‧Capacitor CS‧‧‧Current detection terminal CS1‧‧ ‧First current source CS2 ‧‧‧ Second current source D1 ‧‧‧ Diode D _OUT ‧‧‧ Output duty cycle D _IN ‧‧‧ Input duty cycle FG‧‧‧ Terminal GND‧‧‧Ground terminal H+ ‧‧‧Hall input terminal H-‧‧‧Hall input terminal HB‧‧‧Hall bias terminal I _C1 ‧‧‧Charge current I _C2 ‧‧‧Discharge current MIN‧‧‧Minimum speed setting terminal N1‧‧ ‧Connection point OSC‧‧‧Oscillator terminal OSCH‧‧‧The second oscillator terminal OUT1‧‧‧Terminal OUT2‧‧‧Terminal PWM‧‧‧Input pulse modulation signal R11‧‧‧Resistance R12‧‧‧Resistance R21‧ ‧‧ charging resistor R22‧‧‧ discharge resistor R31‧‧‧ R32‧‧‧ first resistor second resistor R33‧‧‧ third reference voltage terminal resistor REF‧‧‧ RNF‧‧‧ current detecting terminal R _NF ‧‧‧ Resistor S1‧‧‧Pulse signal S2‧‧‧Pulse signal S3‧‧‧Pulse signal S4‧‧‧Pulse signal S5‧‧‧Drive signal S6‧‧‧Current limit signal SELO‧‧‧Selector terminal S _IN ‧‧‧Speed control signal SLOPE‧‧‧Second setting terminal S _PWM ‧‧‧Input pulse modulation signal V _ADJ ‧‧‧ Analog voltage VCC‧‧‧Power supply terminal V _CL ‧‧‧Voltage V _DD ‧‧‧Power supply voltage V _H ‧‧‧ Upper side limit V _HB ‧‧‧ Hall Bias voltage V _L ‧‧‧Lower threshold V _MIN ‧‧‧Minimum speed voltage V _N1 ‧‧‧Voltage V _OSC ‧‧‧Oscillator voltage V _OSC ^' ‧‧‧Oscillator voltage V _REF ‧‧‧ Reference voltage V _SLOPE ‧‧‧ analog voltage V _TH ‧‧‧ control voltage x‧‧‧ input digital value y‧‧‧ duty command value α‧‧‧first parameter β‧‧‧second parameter γ‧‧‧ 3 parameters

1 is a circuit diagram of a cooling device including an integrated circuit for driving a fan motor studied by the inventors. FIG. 2 is an operation waveform diagram of the driving integrated circuit of FIG. 1. 3(a) to (c) are diagrams showing the relationship between the input duty ratio, the voltage of the TH terminal, the output duty ratio of the output OUT1 (OUT2), and the rotation speed in the driving device of FIG. 1. 4 is a circuit diagram showing the structure of a cooling device including a driving integrated circuit according to the first embodiment. 5 is a circuit diagram showing a configuration example of a switching circuit. ^' Figure 6 is an operation waveform diagram of the driving device of Figure 4. FIG. 7 (a) based oscillators FIG waveform diagram showing a voltage V _OSC ^'in FIG. 4 of the oscillator of the voltage V _OSC, FIG. 7 (b) shows the relationship-based duty ratio of the control voltage terminal TH of pulses Figure. FIG. 8 is a graph showing the control characteristics when changing the combination of charge resistance and discharge resistance. 9 is a circuit diagram of a driving integrated circuit according to a second embodiment. 10 is a perspective view of a PC equipped with a cooling device. 11(a) to (c) are circuit diagrams of a driving integrated circuit according to a first modification. 12 is a circuit diagram showing the structure of a cooling device including a driving integrated circuit according to a third embodiment. 13 is a block diagram showing the structure of the driving integrated circuit of FIG. Fig. 14 is a graph showing the correction function f(x). 15(a) and (b) are diagrams illustrating the parameter dependency of the input/output characteristics of the duty calculation unit. 16(a) is a diagram showing the relationship between the input duty ratio D _IN and the output duty ratio D _OUT driving the integrated circuit, and FIG. 16(b) is showing the relationship between the input duty ratio D _IN and the speed of the fan motor Picture. FIG. 17(a) is a block diagram of a driving integrated circuit according to a first modification, and FIG. 17(b) is a block diagram of a driving integrated circuit according to a second modification.

2a‧‧‧cooling device

6‧‧‧Fan motor

8‧‧‧ Hall sensor

9a‧‧‧Drive device

10‧‧‧Converter

12‧‧‧RC filter

200a‧‧‧Drive integrated circuit

202‧‧‧ Hall comparator

204‧‧‧Hall bias circuit

208‧‧‧Control logic circuit

214‧‧‧ Reference voltage source

216‧‧‧PWM Comparator

218‧‧‧PWM Comparator

230‧‧‧Drive section

232‧‧‧ Hall amplifier

234‧‧‧ Hall amplifier

240‧‧‧Lock protection circuit

242‧‧‧TSD circuit

244‧‧‧Signal output circuit

250‧‧‧Switch circuit

252‧‧‧First switch

254‧‧‧ Reference voltage line

260‧‧‧ Output circuit

AL‧‧‧Alarm terminal

C21‧‧‧Capacitor

D1‧‧‧Diode

FG‧‧‧terminal

GND‧‧‧Ground terminal

H+‧‧‧Hall input terminal

H-‧‧‧ Hall input terminal

HB‧‧‧Hall bias terminal

MIN‧‧‧Minimum speed setting terminal

OSC‧‧‧Oscillator terminal

OSCH‧‧‧ 2nd Oscillator Terminal

OUT1‧‧‧terminal

OUT2‧‧‧terminal

PWM‧‧‧Input pulse modulation signal

R11‧‧‧Resistance

R12‧‧‧Resistance

R21‧‧‧Charging resistor

R22‧‧‧Discharge resistance

REF‧‧‧Reference voltage terminal

S1‧‧‧Pulse signal

S2‧‧‧Pulse signal

S3‧‧‧Pulse signal

S4‧‧‧Pulse signal

V _DD ‧‧‧ Power supply voltage

V _HB ‧‧‧ Hall bias voltage

V _MIN ‧‧‧ Lowest speed voltage

V _OSC ‧‧‧ Oscillator voltage

V _REF ‧‧‧ Reference voltage

V _TH ‧‧‧ Control voltage

Claims (19)

A motor drive circuit, characterized in that it is a PWM (Pulse Width Modulation) driver for a fan motor, and includes: a rotation speed control input section that inputs a rotation speed control signal indicating the rotation speed of the fan motor; 1 Setting input section, which inputs the first information indicating the first parameter α; digital pulse width modulator, which defines a correction function y=f(x) which protrudes downward and bending, where x is corresponding to the above speed control The value of the signal, y is the output duty cycle, the correction function f(x) specifies the function corresponding to the value x of the speed control signal and the output duty cycle y, and the correction can be changed based on the first parameter α The degree of curvature of the function f(x) generates a control pulse including an output duty ratio corresponding to the rotation speed control signal and the correction function f(x); and an output circuit that drives the fan motor based at least on the control pulse. As in the motor drive circuit of claim 1, wherein the value corresponding to the minimum value of the rotation speed control signal is set to x ₀ , and the value corresponding to the maximum value of the rotation speed control signal is set to x ₁₀₀ to satisfy f(x ₀ )=ax ₀ , f(x ₁₀₀ )=ax ₁₀₀ defines the above correction function y=f(x). The motor drive circuit according to claim 1 or 2, wherein the first information is input to the first setting input unit as an analog voltage. A motor drive circuit according to claim 1 or 2, wherein the first information is output as digital data to the first setting input section, and the first setting input section includes a first memory that holds the first information. According to the motor drive circuit of claim 1 or 2, wherein the first setting input section includes an I ² C (Inter IC) bus interface circuit that receives the first information of the digital data. The motor drive circuit according to claim 2 further includes: a second setting unit that inputs second information indicating the second parameter β, and the second parameter β specifies a value. A motor drive circuit, characterized in that it is a PWM (Pulse Width Modulation) driver for a fan motor, and includes: a speed control terminal that receives a speed control signal indicating the speed of the fan motor; an input circuit , Which converts the speed control signal into an input digital value x; the first setting terminal, which receives the first information indicating the first parameter α; the duty calculation unit, which will correspond to the input speed of the minimum value of the speed control signal When the value is set to x ₀ , the input digital value corresponding to the maximum value of the above speed control signal is set to x ₁₀₀ , which corresponds to the straight line of y=ax, and the definition satisfies f(x ₀ )=ax ₀ , f(x ₁₀₀ )=ax _100, the downward convex bending correction function y=f(x), and the bending degree of the correction function f(x) can be changed based on the first parameter α, and the corresponding input digital value x can be calculated Duty command value y; a digital pulse width modulator that generates a control pulse including an output duty ratio corresponding to the duty command value y; and an output circuit that drives the fan motor based at least on the control pulse. As in the motor drive circuit of claim 7, where the input digital value with the maximum difference between ax and f(x) is set to x _c , the above first parameter α specifies the difference between ax _c and f(x _c ) . The motor drive circuit according to any one of claims 7 or 8, wherein the first information is input to the first setting terminal as an analog voltage, and the motor drive circuit further includes a first A/D converter, which converts the above The first parameter α of the analog voltage of the first setting terminal is converted into digital. The motor drive circuit according to claim 7 or 8, further includes: a second setting terminal that receives second information indicating the second parameter β; and the second parameter β specifies a value. The motor drive circuit of claim 10, wherein the second information is input to the second setting terminal as an analog voltage, and the motor drive circuit further includes a second A/D converter, which compares the second setting terminal with an analog The voltage is converted into digital second parameter β. A motor drive circuit according to claim 7 or 8, wherein the first information is input as digital data to the first setting terminal; and the motor drive circuit further includes: an interface circuit that receives input to the first setting terminal Digital data, and obtain the first parameter α; and the first memory, which retains the first parameter α. The motor drive circuit according to claim 11, wherein the second information is input as digital data to the second setting terminal; and the motor drive circuit further includes: an interface circuit that receives digital data input to the second setting terminal And obtain the second parameter β; and the second memory, which retains the second parameter β. If the motor drive circuit of claim 7 or 8, further includes: a third setting terminal that receives the third information indicating the third parameter γ; and the duty calculation unit uses the third parameter γ as the lower limit and The above duty command value y is clamped. The motor drive circuit according to claim 7 or 8, wherein the input pulse modulation signal including the input duty ratio to the rotation speed control terminal is used as the rotation speed control signal, and the input circuit includes a duty/digital converter, the Duty/digital converter is on The input pulse modulation signal is converted into an input digital value x corresponding to the above input duty cycle. The motor drive circuit according to claim 9, further comprising: a reference voltage source that generates a reference voltage, and a reference voltage terminal that outputs the reference voltage to the outside; and two resistors connected in series between the reference voltage terminal and ground The voltage at the connection point is input to the first setting terminal. The motor drive circuit according to claim 7 or 8, wherein it is a volume on a semiconductor substrate. A cooling device is characterized by comprising: a fan motor, and a motor drive circuit such as claim 7 or 8 that drives the fan motor. An electronic device, characterized by comprising: a processor, and a cooling device as claimed in claim 18 that cools the processor.

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