TWI651925B - Motor drive device, motor drive integrated circuit, and cooling device and electronic device using the same - Google Patents

Abstract

The subject of the present invention is to improve the linearity of the rotational speed relative to the control input.

For the TH terminal, enter the analog voltage V _TH that indicates the speed. For the OSC terminal, the capacitor C21 and the discharge resistor R22 are connected in parallel between the OSC terminal itself and the ground in the first stage. The charging resistor R21 and the first switch 252 are provided in series between the reference voltage line 254 for stabilizing the voltage and the OSC terminal. The switching circuit 250 turns off the first switch 252 when the oscillator voltage V _OSC generated in the OSC terminal reaches the upper threshold V _H , and when the oscillator voltage V _OSC decreases to the lower threshold V _L , The first switch 252 is turned on. The oscillator voltage V _OSC is compared with the voltage V _{TH of the} TH terminal to generate a pulse-modulated control pulse S3.

Description

Motor drive device, motor drive integrated circuit, and cooling device and electronic device using the same

The present invention relates to a motor driving device.

In recent years, with the increase in the speed of personal computers and workstations, LSIs (Large Scale Integrated Circuits) such as CPUs (Central Processing Units) or DSPs (Digital Signal Processors) The speed of movement is on the rise. In such an LSI system, as the speed of the operation is increased, the amount of heat generated will increase. The heat generated from the LSI has a problem that causes the LSI itself to burst or cause influence on surrounding circuits. Therefore, proper thermal cooling of a heating element represented by LSI has become an extremely important technology.

In many electronic devices, in order to cool the LSI, an air-cooled cooling method by a cooling fan is employed. In this method, for example, a cooling fan is disposed on the surface of the LSI, and cold air is blown onto the surface of the LSI. When cooling by the LSI of the cooling fan, the temperature in the vicinity of the LSI is monitored, and the degree of cooling is adjusted by changing the rotation of the fan depending on the temperature.

Fig. 1 is a circuit diagram of a cooling device including a drive integrated circuit of a fan motor, which has been studied by the inventors of the present invention. In addition, any configuration of FIG. 1 cannot be considered as a known technique.

The cooling device 2r includes a fan motor 6 and a driving device 9r that drives the fan motor 6. The drive device 9r is configured to drive the integrated circuit 200r and its peripheral components. Drive device 9r The component parts are mounted on a common printed circuit board.

The fan motor 6 is a brushless DC motor. The Hall sensor 8 is provided in the vicinity of the fan motor 6 in order to detect the position of the rotor. The ground terminal (GND) of the No. 1 pin and the 16th pin of the drive integrated circuit 200r is grounded. For the power supply terminal (VCC) of the pin No. 3, the power supply voltage V _DD is input via the counter current prevention diode D1. The output of the driving section 230 is connected to the fan motor 6 via the 2nd pin (OUT2) and the 15th pin (OUT1). In addition, in the present specification, the number of the pin is convenient for the user, regardless of the layout of the pin or the like.

The Hall bias circuit 204 generates a Hall bias voltage V _HB and supplies it to the Hall sensor 8 via a Hall bias terminal (HB) of a 10 pin. For the Hall input terminals (H+, H-) of the 9th pin and the 11th pin, the Hall signals H+, H- generated by the Hall sensor 8 are input. The Hall comparator 202 compares the Hall signals H ^- , H ⁺ and generates a pulse signal S1 showing the rotor position and outputs it to the control logic circuit 208. The control logic circuit 208 performs commutation control in synchronization with the pulse signal S1.

The reference voltage source 214 is a reference voltage V _{REF that is} stabilized by a particular voltage level. The reference voltage V _REF is output to the outside via the reference voltage terminal (REF) of the 12th pin.

On the 6th pin of the oscillator terminal (OSC), the external capacitor C1. The oscillator 220 generates a triangular wave oscillator voltage V _OSC by charging and discharging the capacitor C1.

At the lowest speed setting terminal (MIN) of pin 4, input the voltage V _MIN indicating the minimum speed of the fan motor 6. The voltage V _MIN of the MIN terminal is generated by dividing the reference voltage V _REF by the resistors R11 and R12.

The PWM comparator 216 compares the voltage V _MIN of the MIN terminal with the oscillator voltage V _OSC . The output S2 of the PWM comparator 216 has a duty cycle according to the voltage _VMIN of the MIN terminal.

The PWM comparator 218 compares the voltage V _TH of the speed control terminal (TH) of the pin 5 with the oscillator voltage V _OSC . The output S3 of the PWM comparator 218 has a duty cycle according to the voltage _VTH of the TH terminal.

At the PWM input, an input PWM signal having a duty cycle (input duty cycle) according to the target rotational speed of the fan motor 6 is given. The input PWM signal is inverted by the converter 10, smoothed by the RC filter 12, and input to the TH terminal.

Control logic circuit 208 logically combines the output pulses S2, S3 of PWM comparators 216 and 218 to produce pulse signal S4. The duty cycle of the pulse signal S4 is the greater of the duty cycles of the output pulses S2, S3 of the PWM comparators 216 and 218.

Drive section 230 includes Hall amplifiers 232, 234. The Hall amplifier 232 amplifies the difference between the Hall signals H+ and H- with the first polarity and outputs it from the OUT2 terminal. The Hall amplifier 234 amplifies the difference between the Hall signals H+ and H- with the second polarity and outputs it from the OUT15 terminal. Each of the Hall amplifiers 232, 234 has an output section in a push-pull form. The output segments of each of the Hall amplifiers 232, 234 are switched in accordance with the pulse signal S4 from the control logic circuit 208. The output voltages of the OUT1 terminal and the OUT2 terminal are interactively active (commutation control) in accordance with the output S1 of the Hall comparator 202. Moreover, the output voltage of one of the active ones has an envelope obtained by amplifying the Hall signal, and is switched on and off according to the duty ratio of the output pulse S3 (or S2) of the PWM comparator 218 (or 216). Impedance state.

The lock protection circuit 240 detects the locked state of the fan motor 6. The TSD circuit 242 detects an overheat condition. The signal output circuit 244 generates an alarm signal for displaying an abnormality and outputs it from the alarm terminal (AL) of the pin No. 8. Further, the signal output circuit 244 generates an FG (Frequency Generator) signal having a period according to the number of revolutions of the fan motor 6, and outputs it from the FG terminal of the No. 7 pin.

Fig. 2 is a waveform diagram showing the operation of the driving integrated circuit 200r of Fig. 1. The vertical axis and the horizontal axis of the waveform diagram or the timing chart in the present specification are appropriately enlarged and reduced for easy understanding, and the waveforms shown are also simplified, exaggerated or emphasized for easy understanding. 2 is a time scale in which the period of the Hall signals H+ and H- is sufficiently short, so that the Hall signals H+ and H- are substantially displayed as fixed voltage levels. The output OUT1 has a duty ratio based on a comparison between the lower of V _MIN and V _TH and the oscillator voltage V _OSC . Thereby, the larger the duty ratio of the input PWM signal is, the more the torque (rotation speed) of the fan motor 6 is increased. Further, the minimum torque, that is, the minimum rotation speed, can be set according to the voltage V _{MIN of the} MIN terminal.

[Previous Technical Literature] [Patent Literature]

[Patent Document 1] Japanese Patent Laid-Open Publication No. 2005-224100

[Patent Document 2] Japanese Patent Laid-Open Publication No. 2004-166429

[Patent Document 3] Japanese Patent Laid-Open Publication No. 2009-296839

The inventors of the present invention have studied the driving integrated circuit 200r of Fig. 1, and as a result, the following problems have been known.

Question 1.

FIG. 3 (a) ~ (c) driving the input lines showed 9r in the apparatus of FIG. 1 duty ratio, TH voltage V _TH, the output OUT1 (OUT2) of the output duty cycle, and illustrates the relationship of the rotation speed of the terminal. As shown in FIG. 3(a), the voltage V _TH of the TH terminal changes linearly with respect to the input duty ratio of the input PWM signal, and thus the duty ratios of the outputs OUT1 and OUT2 are output as shown in FIG. 3(b). The duty cycle) also varies linearly with respect to the input duty cycle.

In Fig. 3(c), the relationship between the input duty ratio and the rotational speed of the fan motor 6 is shown. In Fig. 3(c), the ideal characteristic (i) of assuming no load and no loss is shown. The actual characteristics of reality (i) are caused by the heat generation of the motor coil, the friction loss of the bearing, the wind loss accompanying the rotation of the rotor, and the heat generation of various parts of the motor, so that it is lower than the ideal characteristic (i), and the rotation speed is low. The higher the impact, the more significant the impact. As the rotational speed increases, the rotational speed relative to the input duty cycle is inherently unavoidable.

Question 2.

In the patent document 3 (JP-A-2009-296839), related art is disclosed. Surgery. In this document, the PWM signal is read, a compensation operation is performed to obtain a compensation signal, and the compensation signal is added and subtracted from the compensation signal for calculation, and the rotational speed of the fan is controlled based on the obtained PWM signal.

However, the drive integrated circuit is used in combination with various fan motors. The rotation characteristics of the fan motor shown in Fig. 3(c) vary depending on the type of the fan motor 6, the shape or size of the blade, the heat dissipation of the fan motor 6 or the drive integrated circuit 200r. Therefore, it is more convenient for each of the driving integrated circuits 200r to set an optimum correction characteristic with respect to its use condition.

One aspect of the present invention has been accomplished in view of the subject matter 1, and one of its exemplary objects is to provide a motor drive device that is improved in linearity with respect to a rotational speed of a control input. Further, another aspect of the present invention has been made in view of the problem 2, and an exemplary object thereof is to provide an optimum correction characteristic for use conditions and to improve linearity with respect to a rotational speed control signal. Motor drive unit.

1. A certain aspect of the present invention relates to a motor drive device that performs PWM (Pulse Width Modulation) driving on a fan motor. The motor driving device includes: a rotation speed control terminal that receives an analog voltage indicating an analog speed; and a first oscillator terminal that is connected in parallel with the capacitor and the discharge resistor between the self and the ground in the first platform; the charging resistor and The first switch is provided in series between the reference voltage line for stabilizing the voltage and the first oscillator terminal, and the switching circuit is configured to turn off the oscillator voltage generated in the first oscillator terminal when the upper threshold is reached. The first switch is turned off, and the first switch is turned on when the oscillator voltage is lowered to the lower threshold; the PWM comparator compares the voltage of the speed control terminal with the oscillator voltage, and generates a control pulse; the output circuit It drives the fan motor based at least on the control pulse.

The slope of the oscillator voltage is not a straight line, but varies according to the CR time constant. Thereby, the line shape of the voltage of the rotation speed control terminal and the output duty ratio can be improved. In addition, the charging and discharging slopes, and even the oscillator voltage, can be specified by the charging current and the discharging resistor. rate.

In some aspects, the motor drive device may further include a second oscillator terminal. In the first platform, the charging resistor is externally disposed between the second oscillator terminal and the first oscillator terminal, and the first switch may be disposed between the second oscillator terminal and the output of the reference voltage source.

In a certain aspect, the switching circuit includes: a first resistor, a second resistor, and a third resistor, which are sequentially connected in series between the output of the reference voltage source and the ground; and the second switch is disposed in parallel with the third resistor. And a comparator that compares the voltage of the connection point between the first resistor and the second resistor with the oscillator voltage; and controls the on and off of the first switch and the second switch according to the output of the comparator .

In one aspect, the motor driving device further includes: a first current source that supplies a specific charging current to the oscillator terminal in the energizing state; and a second current source that is in the energizing state from the oscillator terminal A specific discharge current is introduced; and at least one of the first current source and the second current source may be configured to be controlled to be turned on or off by a switching circuit. The switching circuit may switch between the first mode and the second mode, and the first mode sets the first current source and the second current source to be disabled, and controls the first switch to be turned on and off; In the second mode, the first switch is turned off, and the first current source and the second current source are set to be energized, and at least one of the first current source and the second current source is controlled to be turned on and off.

In the second mode in which the first current source and the second current source are in the energized state, the slope of the slope of the oscillator voltage can be used as a straight line, and can be used in a conventional platform.

In a certain aspect, the motor driving device may further include: a first current source that supplies a specific charging current to the oscillator terminal in the energizing state; and a second current source that is controllable in the energizing state On and off; and a specific discharge current is drawn from the oscillator terminal during the turn-on. The switching circuit can also switch between the first mode and the second mode, wherein the first current source and the second current source are disabled, and the first switch is turned on and off; the second mode is The first switch is turned off, and the second current source is turned on and off.

In a certain aspect, the switching circuit includes: a first resistor, a second resistor, and a third resistor, The serial connection is sequentially connected between the output of the reference voltage source and the ground; the second switch is disposed in parallel with the third resistor; and the comparator, the voltage of the connection point between the first resistor and the second resistor, and the oscillator The voltage is compared; and (i) in the first mode, the first switch and the second switch are controlled to be turned on and off according to the output of the comparator, and (ii) in the second mode, according to the comparator The output controls the second current source and the second switch to be turned on and off.

In one aspect, the motor driving device may further include a selector terminal that receives a selection signal indicating the first mode and the second mode.

In a certain aspect, the motor driving device can also be bulked on one semiconductor substrate.

"One volumetric" refers to a situation in which all the constituent elements of the circuit are formed on the semiconductor substrate, and the main constituent elements of the circuit are bulkified, and a part of the resistor may be used for the adjustment of the circuit constant. Or the capacitor is disposed outside the semiconductor substrate.

By integrating the circuit as one integrated circuit, the circuit area can be reduced, and the characteristics of the circuit elements can be uniformly maintained.

For the speed control terminal, an input pulse modulation signal can also be input via a filter.

Another aspect of the invention pertains to a cooling device. The cooling device includes a fan motor and any of the above-described motor driving devices that drive the fan motor.

Another aspect of the present invention relates to a motor-driven integrated circuit that performs PWM (Pulse Width Modulation) driving on a fan motor. The motor drive integrated circuit includes: a rotation speed control terminal that receives an analog voltage indicating an analog speed; and a first oscillator terminal that is connected in parallel with the capacitor and the discharge resistor between the ground and the ground in the first platform; The oscillator terminal is externally provided with a charging resistor between the first oscillator terminal and the first oscillator terminal, and the first switch is provided between the reference voltage line for stabilizing the voltage and the first oscillator terminal. Switching circuit When the oscillator voltage generated in the first oscillator terminal reaches the upper threshold, the first switch is turned off, and when the oscillator voltage is lowered to the lower threshold, the first switch is turned on, and the PWM comparator is turned on. The voltage of the speed control terminal is compared with the oscillator voltage to generate a control pulse; and the output circuit drives the fan motor based at least on the control pulse.

The motor-driven integrated circuit of a certain aspect further includes: a first current source that supplies a specific charging current to the oscillator terminal in an enabled state; and a second current source that imports a specific one from the oscillator terminal in an enabled state The discharge current. The switching circuit may be switchable (i) first mode, which controls the first switch to be turned on and off by using the first current source and the second current source as a deactivated state; (ii) the second mode is broken. The first switch is turned on, and the first current source and the second current source are turned on, and the second current source is turned on and off.

2. Another aspect of the present invention relates to a motor drive circuit that performs PWM (Pulse Width Modulation) driving on a fan motor. The motor drive circuit includes a rotation speed control input unit that inputs a rotation speed control signal indicating a rotation speed of the fan motor, a first setting input unit that inputs a first information indicating the first parameter α, and a digital pulse width modulator defined by The bending correction function y=f(x) is convex downward, and the degree of bending of the correction function f(x) can be changed based on the first parameter α, and an output having a rotation speed control signal and a correction function f(x) is generated. a duty cycle control pulse; an output circuit that drives the fan motor based at least on the control pulse.

According to this aspect, the optimum correction characteristic can be set by giving the first parameter α in accordance with the state of use, and the linearity with respect to the rotational speed of the rotational speed control signal can be improved.

The value corresponding to the minimum value of the rotation speed control signal is set to x ₀ , and when the value corresponding to the maximum value of the rotation speed control signal is set to x ₁₀₀ , the line corresponding to y=ax can also satisfy f(x ₀ )= The correction function y=f(x) is defined by the way ax ₀ and f(x ₁₀₀ )=ax ₁₀₀ .

The first information can also be input to the first setting input unit as an analog voltage.

The first information can also be input to the first setting input unit as digital data. The first setting input unit may include a first memory that holds the first information.

The first setting input unit may further include an I ² C (Inter IC) bus interface circuit that receives the first information of the digital data.

In a certain aspect, the motor drive circuit may further include a second setting input unit that inputs the second information indicating the second parameter β. The second parameter β can also specify a.

Another aspect of the invention also relates to a motor drive circuit. The motor drive circuit includes: a rotation speed control terminal that receives a rotation speed control signal indicating a rotation speed of the fan motor; an input circuit that converts the rotation speed control signal into an input digit value x; and a first setting terminal that receives the indication of the first parameter α 1 information; a duty calculation unit that sets an input digit value corresponding to a minimum value of the rotation speed control signal to x ₀ and an input digit value corresponding to a maximum value of the rotation speed control signal to x ₁₀₀ , corresponding to y= A straight line of ax, and a correction function y=f(x) that satisfies the downward convex curvature of f(x ₀ )=ax ₀ and f(x ₁₀₀ )=ax ₁₀₀ , and can be modified based on the first parameter α a degree of bending of the function f(x), and computing a duty command value y corresponding to the input digit value x; a digital pulse width modulator that generates a control pulse having an output duty ratio corresponding to the duty command value y; An output circuit that drives the fan motor based on at least a control pulse.

According to this aspect, the optimum correction characteristic can be set by giving the first parameter α in accordance with the state of use, and the linearity with respect to the rotational speed of the rotational speed control signal can be improved.

In a certain aspect, when the input digit value where the difference between ax and f(x) is the maximum is x _c , the first parameter α may also specify the difference between ax _c and f(x _c ).

In a certain aspect, x _c can also be set to a value corresponding to an input duty ratio of 33 to 66%. x _c can also be set to a value corresponding to 50% of the input duty cycle.

In a certain aspect, the first information is input to the first set terminal as an analog voltage, and the motor drive circuit may further include a first A/D conversion of the first parameter α that converts the analog voltage of the first set terminal into a digital one. Device.

In a certain aspect, the second setting terminal that receives the second information indicating the second parameter β may be further included. The second parameter β can also specify a.

In a certain aspect, the second information is input to the second setting terminal as an analog voltage, and the motor driving circuit may further include a second A/D conversion of the second parameter β for converting the analog voltage of the second setting terminal into a digital value. Device.

In a certain aspect, the first information is input to the first setting terminal as the bit data, and the motor driving circuit may further include: a interface circuit that receives the digital data input to the first setting terminal and obtains the first parameter α And maintaining the first memory of the first parameter α.

In a certain aspect, the second information is input to the second setting terminal as the bit data, and the motor driving circuit may further include: a interface circuit that receives the digital data input to the second setting terminal and obtains the second parameter β And the second memory that holds the second parameter β.

In another aspect, the third setting terminal that receives the third information indicating the third parameter γ is further included. The duty calculation unit may clamp the duty command value y by using the third parameter γ as a lower limit.

In a certain aspect, an input pulse modulation signal having an input duty ratio as a rotation speed control signal may be input to the rotation speed control terminal. The input circuit can also include a duty/digital converter that accepts an input pulse modulation signal and converts to an input digital value x according to the input duty cycle.

The motor drive circuit can also be bulked on one semiconductor substrate.

"One volume" refers to the case where all the components of the circuit are formed on the semiconductor substrate, or the main constituent elements of the circuit are bulked, and may also be used for the adjustment of the circuit constants. The capacitor is disposed outside the semiconductor substrate. By integrating the circuit as one integrated circuit, the circuit area can be reduced, and the characteristics of the circuit elements can be uniformly maintained.

Another aspect of the invention pertains to a cooling device. The cooling device includes a fan motor and the above-described motor drive integrated circuit that drives the fan motor.

Another aspect of the invention pertains to electronic machines. The electronic device can also include a processor, and the aforementioned cooling device of the cooling processor.

Further, any combination of the above constituent elements or constituent elements of the present invention or a method of conversion between methods, apparatuses, systems, and the like can be effectively used as the aspect of the present invention.

According to one aspect of the invention, the linearity of the rotational speed relative to the control input can be improved.

2‧‧‧Cooling device

2-1‧‧‧Cooling device

2-2‧‧‧Cooling device

2a‧‧‧Cooling device

2r‧‧‧Cooling device

6‧‧‧Fan motor

8‧‧‧ Hall sensor

9‧‧‧ drive

9a‧‧‧ drive unit

9r‧‧‧ drive unit

10‧‧‧Converter

12‧‧‧RC filter

100‧‧‧Control logic

108‧‧‧Occupy Operations Department

110‧‧‧Digital Pulse Modulator

112‧‧‧Output logic

120‧‧‧Output circuit

200‧‧‧Drive integrated circuit

200a‧‧‧Drive integrated circuit

200b‧‧‧Drive integrated circuit

200r‧‧‧Drive integrated circuit

201‧‧‧Input circuit

202‧‧‧Hall Comparator

204‧‧‧Hall bias circuit

206‧‧‧Current Clamp Comparator

208‧‧‧Control logic

209‧‧‧Drive segment

210‧‧‧Pre-driver

212‧‧‧H bridge circuit

214‧‧‧reference voltage source

216‧‧‧PWM comparator

218‧‧‧PWM comparator

220‧‧‧Oscillator

230‧‧‧Drive segment

232‧‧‧Hall Amplifier

234‧‧‧ Hall amplifier

240‧‧‧Lock protection circuit

242‧‧‧TSD circuit

244‧‧‧Signal output circuit

250‧‧‧Switching circuit

252‧‧‧1st switch

254‧‧‧reference voltage line

256‧‧‧2nd switch

258‧‧‧ comparator

259‧‧‧Logic gate

260‧‧‧Output circuit

270‧‧‧1A/D converter

272‧‧‧2A/D converter

274‧‧‧3A/D converter

280‧‧‧Interface circuit

282‧‧‧1st memory

284‧‧‧2nd memory

286‧‧‧3rd memory

288‧‧‧A/D converter

500‧‧‧PC

502‧‧‧ frame

504‧‧‧CPU

506‧‧‧ motherboard

508‧‧‧ Heatsink

AL‧‧‧Alarm Terminal

ADJ‧‧‧1st setting terminal

C1‧‧‧ capacitor

C21‧‧‧ capacitor

CS‧‧‧current detection terminal

CS1‧‧‧1st current source

CS2‧‧‧2nd current source

D1‧‧‧ diode

D _OUT ‧‧‧output duty cycle

D _IN ‧‧‧ input duty cycle

FG‧‧‧ terminal

GND‧‧‧ Grounding terminal

H+‧‧‧ Hall input terminal

H-‧‧‧ Hall input terminal

HB‧‧‧ Hall bias terminal

I _C1 ‧‧‧Charging current

I _C2 ‧‧‧discharge current

MIN‧‧‧minimum speed setting terminal

N1‧‧‧ connection point

OSC‧‧‧Oscillator terminal

OSCH‧‧‧2nd oscillator terminal

OUT1‧‧‧ terminal

OUT2‧‧‧ terminal

PWM‧‧‧ input pulse modulation signal

R11‧‧‧ resistance

R12‧‧‧ resistance

R21‧‧‧Charging resistor

R22‧‧‧Discharge resistor

R31‧‧‧1st resistor

R32‧‧‧2nd resistor

R33‧‧‧3rd resistor

REF‧‧‧reference voltage terminal

RNF‧‧‧ terminal

R _NF ‧‧‧Resistance for current detection

S1‧‧‧ pulse signal

S2‧‧‧ pulse signal

S3‧‧‧ pulse signal

S4‧‧‧ pulse signal

S5‧‧‧ drive signal

S6‧‧‧ current limit signal

SELO‧‧‧ selector terminal

S _IN ‧‧‧Speed control signal

SLOPE‧‧‧2nd setting terminal

S _PWM ‧‧‧ input pulse modulation signal

V _ADJ ‧‧‧ analog voltage

VCC‧‧‧ power terminal

V _CL ‧‧‧ voltage

V _DD ‧‧‧Power supply voltage

V _H ‧‧‧ upper threshold

V _HB ‧‧‧Hall bias voltage

V _L ‧‧‧ lower threshold

V _MIN ‧‧‧ minimum speed voltage

V _N1 ‧‧‧ voltage

V _OSC ‧‧‧Oscillator voltage

V _OSC ^' ‧‧‧Oscillator voltage

V _REF ‧ ‧ reference voltage

V _SLOPE ‧‧‧ analog voltage

V _TH ‧‧‧ control voltage

x‧‧‧Input digit value

Y‧‧‧ duty command value

Α‧‧‧1st parameter

Β‧‧‧2nd parameter

Γ‧‧‧3rd parameter

Fig. 1 is a circuit diagram of a cooling device including a drive integrated circuit of a fan motor studied by the inventors of the present invention.

FIG. 2 is an operation waveform diagram of the driving integrated circuit of FIG. 1. FIG.

3(a) to 3(c) are diagrams showing the relationship between the input duty ratio, the voltage of the TH terminal, the output duty ratio of the output OUT1 (OUT2), and the number of revolutions in the driving device of Fig. 1.

Fig. 4 is a circuit diagram showing a configuration of a cooling device including the drive integrated circuit of the first embodiment.

Fig. 5 is a circuit diagram showing a configuration example of a switching circuit.

Fig. 6 is a waveform diagram showing the operation of the driving device of Fig. 4.

FIG. 7 (a) based oscillators FIG waveform diagram showing a voltage V _OSC ^'in FIG. 4 of the oscillator of the voltage V _OSC, FIG. 7 (b) shows the relationship-based duty ratio of the control voltage terminal TH of pulses Figure.

Fig. 8 is a view showing control characteristics when a combination of a charging resistor and a discharge resistor is changed.

Fig. 9 is a circuit diagram of a drive integrated circuit of the second embodiment.

Fig. 10 is a perspective view of a PC equipped with a cooling device.

11(a) to 11(c) are circuit diagrams of a drive integrated circuit of a first modification.

Fig. 12 is a circuit diagram showing a configuration of a cooling device including the drive integrated circuit of the third embodiment.

Figure 13 is a block diagram showing the construction of the driving integrated circuit of Figure 12.

Figure 14 is a diagram showing the correction function f(x).

15(a) and 15(b) are diagrams showing the parameter dependence of the input/output characteristics of the duty calculation unit. Figure.

Fig. 16(a) is a diagram showing the relationship between the input duty ratio D _{IN of the} driving integrated circuit and the output duty ratio D _OUT , and Fig. 16 (b) shows the relationship between the input duty ratio D _IN and the rotational speed of the fan motor. Picture.

Fig. 17 (a) is a block diagram of a drive integrated circuit of a first modification, and Fig. 17 (b) is a block diagram of a drive integrated circuit of a second modification.

(First embodiment)

Fig. 4 is a circuit diagram showing a configuration of a cooling device 2a including the drive integrated circuit 200a of the first embodiment. The cooling device 2a is mounted on, for example, a desktop or laptop computer, a workstation, a game machine, a video device, a video device, etc., and cools a CPU (Central Processing Unit), a GPU (Graphics Processing Unit: graphics). Cooling target (not shown) such as processing unit) and power supply unit. The cooling device 2a includes a fan motor 6 that is provided to cool the object and a drive device 9a that drives the fan motor 6.

The drive unit 9a is configured by driving the integrated circuit 200a and its peripheral components in an embodiment. Hereinafter, the configuration of the drive device 9a will be described focusing on differences from the drive device 9 of Fig. 1. The drive integrated circuit 200a is a functional integrated circuit integrated on one semiconductor substrate.

At the speed control terminal (TH), an analog voltage V _TH indicating the speed of the fan motor 6 is input. In the platform, an input pulse modulation signal PWM having an input duty ratio is input to the TH terminal via the converter 10 and the RC filter 12. In other platforms, an analog voltage generated by a thermistor or the like can also be input to the TH terminal.

For the first oscillator terminal (OSC) of pin 6, the external capacitor C21 and the discharge resistor R22 are connected in parallel between the own OSC and the ground. An external charging resistor R21 is provided between the second oscillator terminal (OSCH) of the pin 13 and the OSC terminal.

The drive integrated circuit 200a includes a switching circuit 250 and a first switch 252 instead of the oscillator 220 of FIG. As explained with reference to Figure 1, the reference voltage source 214 generates a reference voltage V _REF . The reference voltage line 254 is coupled to the output of the reference voltage source 214 and stabilizes its voltage. The reference voltage V _{REF is} supplied to each block inside the driving integrated circuit 200a via the reference voltage line 254.

The first switch 252 is provided between the reference voltage line 254 and the OSCH terminal. That is, the first switch 252 and the charging resistor R21 are provided in series between the reference voltage line 254 and the OSC terminal.

The switching circuit 250 turns off the first switch 252 when the oscillator voltage V _OSC generated at the OSC terminal reaches a specific upper side threshold value V _H (for example, 3.5 V), and lowers the oscillator voltage V _OSC to the lower side. When the limit value V _L (for example, 1.5 V) is reached, the first switch 252 is turned on.

The PWM comparator 218 compares the voltage V _TH and TH V _OSC terminal voltage of the oscillator, and generates a control pulse S3.

The control logic circuit 208 and the drive section 230 constitute at least an output circuit 260 that drives the fan motor 6 based on the control pulse S8. The control logic circuit 208 and the drive section 230 are as described with reference to FIG.

The present invention is known as a block diagram or a circuit diagram of FIG. 4, or is related to various devices and circuits derived from the above description, and is not limited to a specific configuration. In the following, in order to reduce the scope of the present invention, a more specific configuration example will be described in order to facilitate the understanding of the nature of the invention or the understanding of the operation of the circuit.

FIG. 5 is a circuit diagram showing a configuration example of the switching circuit 250. The first resistor R31, the second resistor R32, and the third resistor R33 are connected in series between the reference voltage line 254 and the ground. The second switch 256 is an N-channel MOSFET (Metal Oxide Semiconductor Field Effect Transistor) and is provided in parallel with the third resistor R33. The second switch 256 can also be an NPN type bipolar transistor.

The comparator 258 compares the voltage V _N1 of the connection point N1 between the first resistor R31 and the second resistor R32 with the oscillator voltage V _OSC . The first switch 252 and the second switch 256 are complementarily controlled to be turned on and off in accordance with the output S5 of the comparator 258.

Specifically, the comparator output to S5 258 V _N1> V _OSC at a high level when at V _N1> when V _OSC is low level. When the output S5 is at the high level, the first switch 252 is turned off, and the second switch 256 is turned on to be in a discharged state.

In the discharge state, the capacitor C21 is discharged via the discharge resistor R22, and thus becomes a section of the falling slope of the oscillator voltage V _OSC . Since the second switch 256 is turned on in the discharge state, the third resistor R33 is short-circuited, and V _N1 = V _REF × R32 / (R31 + R32), which corresponds to the lower threshold V _L .

When the output S5 is at the low level, the first switch 252 is turned on, and the second switch 256 is turned off to be in a charged state. In the charged state, the capacitor C21 is charged via the charging resistor R21, and thus becomes a section of the rising slope of the oscillator voltage V _OSC . Since the second switch 256 is turned off in the state of charge, V _N1 = V _REF × (R32 + R33) / (R31 + R32 + R33), which corresponds to the upper threshold V _H .

Further, the switching circuit 250 is grasped as a hysteresis comparator. Therefore, the switching circuit 250 can be constructed using a known hysteresis comparator in addition to the configuration of FIG. Alternatively, an independent comparator can be prepared for each of V _H and V _L .

The above is the configuration of the integrated circuit 200a. Next, the operation will be described.

Fig. 6 is a waveform diagram showing the operation of the driving device 9a of Fig. 4. The oscillator voltage V _OSC of the OSC terminal is charged by the charging resistor R21 during the charging period in which the first switch 252 is turned on, and is increased with a large slope. When the oscillator voltage V _OSC reaches the upper threshold value V _H , the first switch 252 is turned off, and the capacitor C21 is gradually charged via the discharge resistor R22. Next, when the oscillator voltage V _{OSC is} lowered to the lower threshold V _L , the first switch 252 is turned on. By repeating this operation, the oscillator voltage V _OSC is a sawtooth waveform having a nonlinear rising slope and a falling gradient as shown in FIG. 6 .

When the voltage V _{TH is} compared with the non-linear sawtooth waveform, the duty cycle of the control pulse S3 obtained as a result is a nonlinear change with respect to the voltage level of the voltage V _TH . FIG. 7 (a) a view showing the oscillator voltage V _OSC 'waveform diagram of the voltage V _OSC of the oscillator 4 of FIG. 1 of. Here, the slope of the rising slope of the oscillator voltage V _OSC ' of FIG. 1 and the slope of the rising slope of the oscillator voltage V _OSC of FIG. 4 are conveniently coincident for easy understanding. Fig. 7(b) is a view showing the relationship between the voltage V _{TH of the} TH terminal and the duty ratio of the control pulse S3. (i) shows the characteristics of the driving integrated circuit 200a of Fig. 4, and (ii) shows the characteristics of the driving integrated circuit 200r of Fig. 1. As is apparent from Fig. 7(b), in the driving integrated circuit 200a of Fig. 4, the control pulse S3 changes linearly arcuately with respect to the voltage _VTH . By the characteristic of the bow (referred to as the correction characteristic), the relationship between the input duty ratio and the rotational speed can be corrected, and the target characteristic (iii) of Fig. 3(c) can be approximated.

Fig. 8 is a view showing control characteristics when the combination of the charging resistor R21 and the discharge resistor R22 is changed. This is set to C21=100pF.

(i) R21 = 10kΩ, R22 = 100kΩ

(ii) R21 = 10kΩ, R22 = 10kΩ

(iii) R21=10kΩ, R22=100kΩ//470kΩ

100kΩ//470kΩ is a parallel connection of 100kΩ and 470kΩ. In this example, the combination of (i) is closest to the target characteristic.

The actual characteristics shown in FIG. 3(c) vary depending on the type of the fan motor 6, the shape or size of the blade, and the heat dissipation of the fan 6 or the drive integrated circuit 200. According to the drive integrated circuit 200a of the embodiment, as shown in FIG. 8, since the curve of the control characteristic can be changed according to the combination of the charging resistor R21 and the discharge resistor R22, the optimum combination can be selected according to the actual characteristics, thereby being accessible. Target characteristics.

As described above, according to the driving integrated circuit 200a of the embodiment, the linearity of the rotational speed with respect to the control input _VTH (i.e., the duty ratio of the PWM input signal) can be improved.

(Second embodiment)

Fig. 9 is a circuit diagram of the drive integrated circuit 200b of the second embodiment. The drive integrated circuit 200b includes a first current source CS1, a second current source CS2, and a logic gate 259 in addition to the drive integrated circuit 200a of FIG.

The first current source CS1 and the second current source CS2 are configured to be switched between activation and deactivation. The first power supply stream CS1 is in an enabled state, and supplies a specific amount of charging current I _C1 to the OSC terminal. The second current source CS2 is in an enabled state, and a specific amount of discharge current I _{C2 is} supplied from the OSC terminal.

Further, in addition to switching between activation and deactivation, at least one of the first current source CS1 and the second current source CS2 is configured to be controlled to be turned on and off by the switching circuit 250. In FIG. 9, only the second current source CS2 can be controlled to be turned on and off in accordance with the output S5 of the comparator 258.

The drive integrated circuit 200b has a selector terminal (SELO) for setting an oscillator mode. The SELO terminal is a voltage that inputs a high or low level. The first current source CS1 and the second current source CS2 are activated when the voltage of the SELO terminal is at the first level (for example, a high level), and are disabled when the voltage of the SELO terminal is at the second level (for example, a low level). In addition to the SELO terminal, a signal for setting the mode can be input via an interface such as an I ² C bus. Alternatively, the non-volatile memory may be built in the driving integrated circuit 200b, and the mode is selected based on the data of the non-volatile memory.

The logic gate 259 is provided to open the first switch 252. The logic gate 259 is fixed to the first switch 252 when the SELO terminal is at the first level (high level). Further, when the SELO terminal is at the second level (low level), the logic gate 259 passes the output S5 of the comparator 258, and switches the first switch 252 on and off. Here, for the sake of easy understanding, the logic gate 259 is shown by the symbol of the OR gate, but the actual configuration is not limited to the OR gate, and may be another configuration having the same function.

The above is the configuration of the drive integrated circuit 200b.

The drive integrated circuit 200b can be used by switching between the first mode and the second mode depending on the platform used. The first mode is selected by inputting a low level to the SELO terminal. In the first mode, the first current source CS1 and the second current source CS2 are deactivated, and operate in the same manner as in the first embodiment.

The second mode is selected by inputting a high level to the SELO terminal. In the second mode, the first switch 252 is fixedly turned off, and the first current source CS1 and the second current source CS2 are activated. In the platform in which the second mode is selected, the charging resistor R21 and the discharging resistor R22 are not required. Next, according to the output S5 of the comparator 258, when the second current source CS2 is turned on, the capacitor C21 is discharged at I _{C2 -} I _C1 , and when the second current source CS2 is turned off, the capacitor _C 21 is charged at I _C1 . In the second mode, the oscillator voltage V _OSC becomes a triangular wave. Therefore, the same operation as that of the driving integrated circuit 200r of Fig. 1 can be performed. In the second mode, since the charging resistor R21 and the discharging resistor R22 are not required, the circuit components can be reduced.

(use)

Finally, the use of the cooling device 2 will be explained. Figure 10 is a perspective view of a PC including a cooling device 2. The PC 500 includes a housing 205, a CPU 504, a motherboard 506, a heat sink 508, and a plurality of cooling devices 2.

The CPU 504 is mounted on the motherboard 506. The heat sink 508 is in close contact with the upper surface of the CPU 504. The cooling device 2_1 is disposed opposite to the heat sink 508, and blows air to the heat sink 508. The cooling device 2_2 is disposed on the back surface of the casing 502, and sends outside air to the inside of the casing 502.

The cooling device 2 can be mounted on various electronic devices such as a workstation, a notebook PC, a television, and a refrigerator, in addition to the PC 500 of FIG.

The first and second embodiments have been described above. It will be understood by those skilled in the art that the embodiments are exemplified, and various combinations of the various components or combinations of the various processing procedures are possible, and such variations are also within the scope of the invention. Hereinafter, a modification related to the first and second embodiments will be described.

(First variation)

The components constituting the integrated integrated circuit 200 may be entirely formed into a volume, or may be divided into other integrated circuits, or a part thereof may be formed as discrete components. Which part of the integrated system is determined according to the cost, the occupied area, the use, and the like. Conversely, in the embodiment, a part of the circuit component externally mounted to the driving integrated circuit 200 may be integrated into The integrated circuit 200 is driven. 11(a) to 11(c) are circuit diagrams of the drive integrated circuit 200 of the first modification. In FIG. 11(a), the capacitor C21 is integrated in the drive integrated circuit 200. Thereby, there is no need for an external capacitor to reduce the cost and the installation area.

In FIG. 11(b), the charging resistor R21 is integrated in the driving integrated circuit 200. Thereby, the cost and the mounting area can be reduced by reducing one external resistor. Further, since the OSCH terminal is not required, there is a case where the wafer size of the drive integrated circuit 200 can be reduced.

In FIG. 11(c), both of the charging resistor R21 and the discharging resistor R22 are integrated in the driving integrated circuit 200. Thereby, the cost and the mounting area can be reduced by reducing one external resistor. Further, since the OSCH terminal is not required, there is a case where the wafer size of the drive integrated circuit 200 can be reduced. In FIG. 11(c), it is desirable that at least one of the charging resistor R21 and the discharge resistor R22 is preferably a variable resistor. In this way, the correction characteristics can be fine-tuned for each platform.

(2nd variation)

In the embodiment, R21 < R22 is used to describe that the slope of the oscillator voltage V _OSC is long. However, R21 > R22 may be used to increase the time of the rising gradient. In this case, the logic of the control pulse S3 may be inverted or the polarity of the voltage V _TH of the TH terminal may be inverted.

(3rd variation)

In the embodiment, the case where the fan motor to be driven is a single-phase drive motor will be described. However, the present invention is not limited thereto, and may be used for driving other motors.

(fourth variation)

The configuration and driving method of the driving segment 230 are not limited to the embodiments. In the embodiment, the amplitude (envelope) of the output voltages of the OUT1 terminal and the OUT2 terminal is changed according to the Hall signals H+ and H-, but the amplitude may be constant.

(5th variation)

The polarity and logic level of each signal described in the embodiment are exemplified, and When reversed.

(Third embodiment)

Fig. 12 is a circuit diagram showing the configuration of the cooling device 2 including the drive integrated circuit 200 of the third embodiment. The cooling device 2 is mounted on, for example, a desktop or laptop computer, a workstation, a game device, a video device, a video device, and the like as shown in FIG. 10, and cools a CPU (Central Processing Unit) and a GPU. (Graphics Processing Unit), cooling device such as power supply unit. The cooling device 2 includes a fan motor 6 that is disposed opposite to the cooling target and a driving device 9 that drives the fan motor 6.

The drive unit 9 is configured by driving the integrated circuit 200 and its peripheral components in the third embodiment. The components of the drive unit 9 are mounted on a common printed circuit board. In Fig. 12, with respect to the drive integrated circuit 200, only the related portions of the present invention are shown, and the irrelevant configuration is omitted.

The fan motor 6 is a brushless DC motor. The Hall sensor 8 is provided in the vicinity of the fan motor 6 in order to detect the position of the rotor. The drive integrated circuit 200 is a functional integrated circuit that is integrated on one semiconductor substrate.

For the rotation speed control terminal (PWM) of the No. 5 pin of the integrated circuit 200, a rotation speed control signal S _IN indicating the rotation speed of the fan motor 6 is input from the outside. The drive integrated circuit 200 drives the fan motor 6 by PWM (Pulse Width Modulation) in accordance with the rotation speed control signal S _IN .

In the present embodiment, an input pulse modulation signal (input PWM signal) S _PWM having an input duty ratio D _IN as a rotation speed control signal S _IN is input to the rotation speed control terminal (PWM) of the No. 5 pin. The input circuit 201 receives the input pulse modulation signal S _PWM and generates an input digital value x based on the input duty ratio D _IN . The input circuit 201 may be configured by a digital filter, or may be configured by a combination of an analog filter and an A/D converter. The PWM terminal and the input circuit 201 may also be referred to as a rotational speed control input unit.

The ground terminal (GND) of the 16th pin of the driving integrated circuit 200 is grounded. The power supply voltage V _DD is input to the power supply terminal (VCC) of the pin 10 via the counter current prevention diode D1. The output of the driving section 230 is connected to the fan motor 6 via pin 9 (OUT1) and pin 7 (OUT2). In addition, in the present specification, the number of the pin is convenient for the user, regardless of the layout of the pin or the like.

For the Hall input terminals (H-, H+) of pins 2 and 3, the Hall signals H-, H+ generated by the Hall sensor 8 are input. The Hall comparator 202 compares the Hall signals H+, H-, and generates a pulse signal S1 indicating the rotor position, and outputs it to the control logic circuit 100. The control logic circuit 100 performs commutation control in synchronization with the pulse signal S1.

The reference voltage source 214 produces a reference voltage V _{REF that is} stabilized by a particular voltage level. The reference voltage V _REF is output to the outside via the reference voltage terminal (REF) of the 11th pin. The reference voltage V _REF is supplied to the Hall sensor 8 as a Hall bias signal V _HB .

For the first setting terminal (ADJ) of the 13th pin, the first information indicating the first parameter α is input. In the present embodiment, the first information is supplied to the ADJ terminal as the analog voltage V _ADJ . For example, the external resistors R11 and R12 in the integrated circuit 200 are driven, and the analog voltage V _ADJ is generated by dividing the reference voltage V _REF . In this case, the first parameter α can be set based on the voltage division ratio of the resistors R11 and R12. The first A/D converter 270 converts the analog voltage V _ADJ of the ADJ terminal into a first parameter α of a digital digit. The ADJ terminal and the first A/D converter 270 may also be referred to as a first setting input unit.

For the second setting terminal (SLOPE) of the 15th pin, the second information indicating the second parameter β is input. In the present embodiment, the second information is supplied to the SLOPE terminal as the analog voltage V _SLOPE . For example, the external resistors R21 and R22 in the integrated circuit 200 are driven, and the analog voltage V _SLOPE is generated by dividing the reference voltage V _REF . In this case, the second parameter β can be set based on the voltage division ratio of the resistors R21 and R22. The second A/D converter 272 converts the analog voltage V _SLOPE of the SLOPE terminal into the second parameter β of the digit. The SLOPE terminal and the second A/D converter 272 may also be referred to as a second setting input unit.

For the third setting terminal (MIN) of the 12th pin, the third information indicating the third parameter γ is input. In the present embodiment, the third information is supplied to the MIN terminal as the analog voltage V _MIN . For example, the external resistors R31 and R32 in the integrated circuit 200 are driven, and the analog voltage V _MIN is generated by dividing the reference voltage V _REF . In this case, the third parameter γ can be set based on the voltage division ratio of the resistors R31 and R32. The third A/D converter 274 converts the analog voltage V _{MIN such} as the MIN terminal into the third parameter γ of the digit. The MIN terminal and the third A/D converter 274 may also be referred to as a third setting input unit.

The control logic circuit 100 calculates the output duty ratio D _OUT based on the input digit value x, the first parameter α, the second parameter β, and the third parameter γ. Then, a control pulse having an operational output duty ratio D _OUT is generated. The control logic circuit 100 synthesizes the output S1 of the Hall comparator 202 with the control pulse and generates a drive signal S5.

Drive segment 209 includes pre-driver 210 and H-bridge circuit 212. The pre-driver 210 drives the H-bridge circuit 212 in accordance with the drive signal S5. Thereby, the output S1 is synchronized with the output S1 of the Hall comparator 202, and the outputs OUT1 and OUT2 are alternately active (commutation control), and the active output is switched (PWM drive) according to the control pulse. In addition, the driving segment 209 can also have the configuration of the driving segment 230 of FIG.

The RNF terminal of the No. 8 pin is connected to the lower terminal of the H-bridge circuit 212. A current detecting resistor R _NF is inserted between the RNF terminal and the external ground. In the resistor R _NF , a detection voltage V _{NF which is} proportional to the current flowing to the fan motor 6 is generated. The detection voltage V _{NF is} input to the current detection terminal (CS) of pin 6. Current clamp comparator 206 compares detection voltage V _NF to a particular voltage V _CL . The voltage V _CL defines the upper limit of the current flowing to the fan motor 6. When the output (current limit signal) S6 of the current clamp comparator 206 is active (high level), the control logic circuit 100 changes the logic value of the drive signal S5 in order to stop energization to the fan motor 6.

The TSD circuit 242 detects an overheated state. The signal output circuit 244 generates an FG (Frequency Generator) signal having a period according to the rotational speed of the fan motor 6, and Output from the FG terminal of pin 1.

The above is the overall configuration of the drive integrated circuit 200. Next, the internal structure will be described.

Figure 13 is a block diagram showing the construction of the driving integrated circuit 200 of Figure 12 . In addition, in FIG. 13, only the structure for generating the drive signal S5 is shown, and other structures are suitably abbreviate|omitted.

The control logic circuit 100 includes a duty calculation unit 108, a digital pulse modulator 110, and an output logic unit 112. The control logic circuit 100 can also be constructed by hardware logic, and can also be configured by a combination of a processor and a software.

The duty calculation unit 108 holds the correction function f(x) and calculates the duty command value y=f(x) using the correction function. Figure 14 is a diagram showing the correction function f(x). The horizontal axis is displayed as x and the vertical axis is displayed as y. Setting the input digit value corresponding to the minimum value of the speed control signal S _PWM (ie, the duty ratio 0%) to x ₀ will correspond to the input of the maximum value of the speed control signal S _PWM (ie, the duty ratio is 100%). The digit value is set to x ₁₀₀ . In the present embodiment, the input digit value x is 6 bits, so x ₀ =0 and x ₁₀₀ = 64.

A straight line of y=ax is shown in FIG. This is set to a=1. The correction function f(x) satisfies f(x ₀ )=ax ₀ , f(x ₁₀₀ )=ax ₁₀₀ , and is convexly curved downward. The bow correction function f(x) can also be derived from a curve derived from logic analysis, or can be obtained by self-fitting to obtain the compression characteristic of FIG. 3(c) and obtained by inversely calculating the compression characteristic, and an approximation can also be used. Those who are. The correction function y=f(x) is based on the first parameter α and the degree of bending can be changed.

The various parameters are described here. The input digit value with the largest difference between ax and f(x) is set to x _c . In Fig. 14, x _c corresponds to the value of the input duty ratio D _IN = 50% (i.e., 32). The first parameter α specifies the difference Δ between ax _c and f(x). Further, the second parameter β defines the slope a of y=ax. Further, the duty calculation unit 108 clamps the duty command value y by setting the third parameter γ to the lower limit. That is, the third parameter γ defines the lowest value of the output duty ratio D _OUT , in other words, the lowest rotational speed of the fan motor 6. An example of γ = 0 is shown in FIG.

15(a) and 15(b) are diagrams showing the parameter dependence of the input/output characteristics of the duty calculation unit 108. Fig. 15 (a) shows the input/output characteristics when the second parameter β is changed. (i)~(iii) are separately displayed The characteristics when a = 1, 0.5, 1.33 are shown. Fig. 15 (b) shows the input/output characteristics when the third parameter γ is changed.

Return to Figure 13. The digital pulse modulator 110 generates a control pulse S4 having an output duty ratio D _OUT according to the duty command value y. The digital pulse modulator 110 can be constructed using a digital counter.

The output circuit 120 drives the fan motor 6 based on at least the control pulse S4. The output circuit 120 includes an output logic unit 112 of the control logic circuit 100, a drive section 209, a Hall comparator 202, and a current clamp comparator 206.

The output logic unit 112 generates a drive signal S5 based on the pulse signal S1 from the Hall comparator 202, the current limit signal S6 from the current clamp comparator 206, and the control pulse S4. The output logic unit 112 may use a known technique.

The above is the configuration of the drive integrated circuit 200. Next, the operation will be described.

Fig. 16(a) is a view showing the relationship between the input duty ratio D _{IN of the} driving integrated circuit 200 and the output duty ratio D _OUT , and Fig. 16 (b) showing the input duty ratio D _IN and the rotational speed of the fan motor 6. The map of the relationship. (i) shows the target characteristics, (ii) shows the characteristics when the output duty ratio is calculated based on y=ax without using the correction function f(x), and (iii) shows the characteristics of the drive integrated circuit 200 of FIG. .

As described above, according to the drive integrated circuit 200 of the third embodiment, the actual rotational characteristic (iii) can be brought close to the target characteristic (i), and the linearity with respect to the rotational speed of the rotational speed control signal S _PWM can be improved.

In particular, in the drive integrated circuit 200 of the third embodiment, the degree of bending of the correction function f(x) can be adjusted in accordance with the first information V _ADJ given to the AJD terminal. Therefore, depending on the type or characteristics of the fan motor 6 to be driven, the shape of the fan, and the environment in which the cooling device 2 is used, it is possible to achieve high linearity under various conditions by changing the correction curve.

Further, the slope of the correction function f(x) can be adjusted based on the second information _VSLOPE given to the SLOPE terminal, and the minimum number of revolutions can be set based on the third information _VMIN given to the MIN terminal.

It will be understood by those skilled in the art that the third embodiment is also exemplified, and various combinations of the components or the respective processing procedures may be variously modified, and such modifications are also within the scope of the invention. Hereinafter, a modification example related to the third embodiment will be described.

(First variation)

Fig. 17 (a) is a block diagram showing a drive integrated circuit 200a of the first modification. In this modification, the first information indicating the first parameter α is input to the ADJ terminal as digital data. The interface circuit 280 receives the digital data input to the ADJ terminal and obtains the first parameter α. The first memory 282 holds the first parameter α. Similarly, the second information indicating the second parameter β and the third information indicating the third parameter γ are also input to the SLOPE terminal and the MIN terminal as digital data. The interface circuit 280 acquires the second parameter β and the third parameter γ from the digital data, and stores them in the second memory 284 and the third memory 286. For example, the interface circuit 280 can also be a receiver of an I ² C bus. In addition, in the case where each digital data is transmitted in multiple time divisions, the ADJ terminal, the SLOPE terminal, and the MIN terminal can be commonly used. Moreover, the memories 282, 284, and 286 may be non-volatile memory or volatile memory.

(2nd variation)

In the embodiment, the rotation speed control signal S _PWM whose pulse width is modulated is input to the PWM terminal, but the present invention is not limited thereto. Fig. 17 (b) is a block diagram of the drive integrated circuit 200b of the second modification. The drive integrated circuit 200b is a _TH terminal that changes the PWM terminal and includes a rotational speed control signal S _IN that receives the analog voltage V _TH . Further, as the input circuit 201, an A/D converter 288 that converts the voltage of the TH terminal into an input digital value x is included.

(3rd variation)

In the embodiment, x _{c of} FIG. 14 is set to a value corresponding to D _IN = 50%, but the present invention is not limited thereto, and may be set to a value corresponding to a range of D _IN = 30 to 66%. . _{Alternatively} , the fourth parameter of x _c can be input from the outside.

(fourth variation)

In the embodiment, the second parameter β and the third parameter γ may be externally set, but one or all of them may be predetermined in the drive integrated circuit 200. In this case, the number of terminals and the number of external resistors can be reduced.

(5th variation)

In the embodiment, the case where the fan motor to be driven is a single-phase drive motor will be described. However, the present invention is not limited thereto, and may be used for driving other two-phase or three-phase motors.

(Sixth variation)

The embodiment shows that the Hall sensor 8 is externally mounted to the integrated circuit 200, but the Hall sensor 8 can also be built in the Hall. Or the present invention omits the Hall sensor 8 and can be used for sensorless drive for detecting rotor position based on back electromotive force.

Claims (15)

A motor driving device characterized in that a PWM (Pulse Width Modulation) driver is applied to a fan motor, and includes: a rotation speed control terminal that receives an analog voltage indicating an analog speed; and a first oscillator terminal In the first platform, a capacitor and a discharge resistor are connected in parallel between the ground and the ground; the charging resistor and the first switch are connected in series to a reference voltage line for stabilizing the voltage and the first oscillator terminal. And a switching circuit that turns off the first switch when the oscillator voltage generated in the first oscillator terminal reaches an upper threshold, and turns on when the oscillator voltage decreases to a lower threshold a first comparator; a PWM comparator that compares a voltage of the rotation speed control terminal with an oscillator voltage to generate a control pulse; an output circuit that drives the fan motor based on at least the control pulse; and a second oscillator terminal; In the first stage, the charging resistor is externally disposed between the second oscillator terminal and the first oscillator terminal, and the first opening relationship is set to 2 between the terminal and the reference oscillator voltage line. The motor driving device of claim 1, wherein the switching circuit includes: a first resistor, a second resistor, and a third resistor, which are sequentially connected in series between the reference voltage line and the ground; and the second switch a third resistor is provided in parallel; and a comparator that compares a voltage between a connection point of the first resistor and the second resistor with the oscillator voltage; The first switch and the second switch are controlled to be turned on and off based on the output of the comparator. The motor driving device of claim 1, further comprising: a first current source that supplies a specific charging current to the oscillator terminal in an energizing state; and a second current source that is in an energizing state The oscillator terminal has a specific discharge current; and at least one of the first current source and the second current source is configured to be controlled to be turned on and off by the switching circuit, and the switching circuit is switchable: (i) a first mode in which the first current source and the second current source are disabled, and the first switch is turned on and off; and (ii) the second mode is turned off In the first switch, the first current source and the second current source are in an energized state, and at least one of the first current source and the second current source is controlled to be turned on or off. The motor driving device of claim 1, further comprising: a first current source that supplies a specific charging current to the oscillator terminal in an energizing state; and a second current source that is in an energizing state The oscillator terminal is configured to input a specific discharge current; and the switching circuit is switchable to: a first mode, wherein the first current source and the second current source are disabled, and the first switch is controlled; In the second mode, the first switch is turned off, and the second current source is turned on and off. The motor driving device of claim 4, wherein the switching circuit includes: a first resistor, a second resistor, and a third resistor, which are sequentially connected in series between the reference voltage line and the ground; and the second switch, The third resistor is arranged in parallel; and a comparator that compares a voltage between a connection point of the first resistor and the second resistor with the oscillator voltage; and (i) in the first mode, controls the first one based on an output of the comparator The switch and the second switch are turned on and off. (ii) In the second mode, the second current source and the second switch are controlled to be turned on and off based on an output of the comparator. A motor driving device according to claim 3, wherein said second mode is selected from a second stage in which said discharge resistor is not connected to said oscillator terminal. The motor driving device of claim 3, further comprising: a selector terminal that receives a selection signal indicating the first mode and the second mode. The motor driving device of claim 1, wherein: the body is bulk formed on a semiconductor substrate. The motor driving device of claim 1, wherein: for the rotation speed control terminal, an input pulse modulation signal including a duty ratio corresponding to a target rotation speed is input via a filter. A cooling device comprising: a fan motor; and a motor driving device as claimed in claim 1 for driving the fan motor. An electronic machine comprising: a processor, and a cooling device such as claim 10 for cooling the processor. A motor-driven integrated circuit, characterized in that it is a PWM (Pulse Width Modulation) driver for a fan motor, and includes: a rotational speed control terminal that receives an analog voltage indicating an analog speed; a first oscillator terminal in which an external capacitor and a discharge resistor are connected in parallel with the ground in the first stage; and a second oscillator terminal in the first platform, the first and the first An external charging resistor is provided between the oscillator terminals; the first switch is disposed between the reference voltage line for stabilizing the voltage and the first oscillator terminal; and the switching circuit is generated by the first oscillator terminal When the oscillator voltage reaches the upper threshold, the first switch is turned off, and when the oscillator voltage is lowered to the lower threshold, the first switch is turned on, and the PWM comparator compares the speed control terminal. a voltage and an oscillator voltage, and generating a control pulse; and an output circuit that drives the fan motor based on at least the control pulse. The motor-driven integrated circuit of claim 12, further comprising: a first current source that supplies a specific charging current to the oscillator terminal in an energizing state; and a second current source that is in an energizing state a specific discharge current is input from the oscillator terminal; and the switching circuit is switchable: (i) a first mode, wherein the first current source and the second current source are disabled, and the control is performed Turning on and off the first switch; and (ii) in the second mode, turning off the first switch, and setting the first current source and the second current source to an energized state, and controlling the second The current source is turned on and off. A cooling device comprising: a fan motor; and a motor drive integrated circuit as claimed in claim 12 or 13 for driving the fan motor. An electronic machine characterized by comprising: A processor, and a cooling device such as claim 14 that cools the processor.