TWI677079B - Chip package and manufacturing method thereof - Google Patents

Abstract

A chip package includes a device chip, a light-guiding silicon substrate, an optical layer, an infrared cut-off filter, and a black photoresist layer. The surface of the device wafer has a light sensing area and a conductive pad. The light-guiding silicon substrate is located on the device chip. The light-guiding silicon substrate covers the light sensing area but does not cover the conductive pad. The light-guiding silicon substrate has a first perforation for light to pass through. The optical layer is located on the light-guiding silicon substrate, and a sidewall of the optical layer is aligned with a sidewall of the light-guiding silicon substrate. An infrared cut filter is located on the optical layer. The black photoresist layer is located on the infrared cut filter and has a second perforation for light to pass through.

Description

Chip package and manufacturing method thereof

This case relates to a chip package and a method for manufacturing the chip package.

Generally speaking, a chip package used to sense light will be provided with an infrared cut-off filter and a black photoresist layer to filter the infrared and visible light outside the light sensing area, respectively, to avoid noise interference.

However, the infrared cut-off filter and the black photoresist layer are in a die level / chip level package. That is to say, after the wafer is cut into wafers, an infrared cut-off filter and a black photoresist layer are additionally provided on each wafer, which not only has a high manufacturing cost, but also makes it difficult to save the installation of infrared cut-off filters and black light. Resistance time.

One aspect of the present invention is a chip package.

According to an embodiment of the present invention, a chip package includes a device chip, a light-guiding silicon substrate, an optical layer, an infrared cut-off filter, and a black photoresist layer. The surface of the device wafer has a light sensing area and a conductive pad. The light-guiding silicon substrate is located at Device on the wafer. The light guide silicon substrate covers the light sensing area but does not cover the conductive pad, and the light guide silicon substrate has a first perforation for light to pass through. The optical layer is located on the light-guiding silicon substrate, and a sidewall of the optical layer is aligned with a sidewall of the light-guiding silicon substrate. An infrared cut filter is located on the optical layer. The black photoresist layer is located on the infrared cut filter and has a second perforation for light to pass through.

In one embodiment of the present invention, the width of the optical layer is substantially the same as the width of the light-guiding silicon substrate.

In an embodiment of the present invention, a side wall of the infrared cut filter and a side wall of the optical layer are separated by a gap.

In one embodiment of the present invention, a width of the infrared cut filter is smaller than a width of the optical layer.

In one embodiment of the present invention, the optical layer has an upper surface facing away from the light-guiding silicon substrate, and a part of the upper surface extends from a side wall of the infrared cut filter.

In one embodiment of the present invention, the side wall of the infrared cut filter, the part of the upper surface of the optical layer, and the side wall of the optical layer are stepped.

In one embodiment of the present invention, the width of the black photoresist layer is substantially the same as the width of the infrared cut filter.

In one embodiment of the present invention, a sidewall of the black photoresist layer is substantially aligned with a sidewall of the infrared cut filter.

In one embodiment of the present invention, the second through hole of the black photoresist layer is substantially aligned with the first through hole of the light guide silicon substrate.

One aspect of the present invention is a method for manufacturing a chip package.

According to an embodiment of the present invention, a method for manufacturing a chip package includes setting a light guiding silicon wafer on a device wafer, wherein the device wafer has a light sensing region and a conductive pad; an optical layer and an infrared cut-off filter are sequentially formed. And a black photoresist layer on a light-guiding silicon wafer; removing a part of the black photoresist layer and a part of the infrared cut-off filter, so that the black photoresist layer and the infrared cut-off filter have a first opening together; removing A part of the optical layer, so that the optical layer has a second opening located below the first opening; removing the light guiding silicon wafer in the second opening to expose the conductive pad; and cutting the device wafer.

In an embodiment of the present invention, the method for manufacturing the chip package further includes removing the portion of the black photoresist layer and the portion of the infrared cut-off filter, and forming a photoresist layer to cover the black photoresist layer and the first opening. Optical layer.

In an embodiment of the present invention, the method for manufacturing the chip package further includes removing the photoresist layer covering the part of the optical layer synchronously when the part of the optical layer is removed, so that a part of the light-guiding silicon wafer is exposed. .

In an embodiment of the present invention, the removing the light-guiding silicon wafer in the second opening includes etching the portion of the light-guiding silicon wafer.

In one embodiment of the present invention, the method for manufacturing the chip package further includes etching the portion of the light-guiding silicon wafer, and then removing the photoresist layer.

In an embodiment of the present invention, the part where the black photoresist layer is removed and the part where the infrared cut-off filter is included include cutting the black photoresist layer and the infrared cut filter.

In an embodiment of the present invention, the part of the optical layer removal includes cutting the optical layer.

In the above embodiment of the present invention, the method for manufacturing a chip package is to sequentially form an optical layer, an infrared cut-off filter, and a black photoresist layer on a light-guiding silicon wafer on a device wafer, and then remove the black light. A part of the resist layer and a part of the infrared cut-off filter, a part of the optical layer and a part of the light-guiding silicon wafer are removed, and then the device wafer is cut to form a chip package, so it has a black photoresist layer and infrared cut-off The chip package of the filter is manufactured in a wafer-level package. The chip package and the manufacturing method thereof can save the cost of the manufacturing process, and can also save the time of traditionally setting an extra wafer-level infrared cut-off filter and a black photoresist layer on the chip package.

100‧‧‧Chip Package

110‧‧‧device chip

110a‧‧‧device wafer

111‧‧‧ surface

112‧‧‧light sensing area

114‧‧‧Conductive pad

116‧‧‧Insulation

120‧‧‧light guide silicon substrate

120a‧‧‧light-guide silicon wafer

121‧‧‧ first perforation

122‧‧‧ sidewall

130‧‧‧Optical layer

132‧‧‧ sidewall

134‧‧‧upper surface

140‧‧‧IR cut-off filter

142‧‧‧ sidewall

150‧‧‧black photoresist layer

151‧‧‧second perforation

152‧‧‧ sidewall

160‧‧‧Photoresistive layer

2-2‧‧‧line segment

d‧‧‧ clearance

L-L‧‧‧line segment

O1‧‧‧First opening

O2‧‧‧Second opening

w1, w2‧‧‧Width

FIG. 1 is a top view of a chip package according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view of the chip package of FIG. 1 along line segment 2-2.

FIG. 3 to FIG. 8 are cross-sectional views illustrating steps of a method for manufacturing a chip package according to an embodiment of the present invention.

In the following, a plurality of embodiments of the present invention will be disclosed graphically. For clear description, many practical details will be described in the following description. It should be understood, however, that these practical details should not be used to limit the invention. That is, in some embodiments of the present invention, these practical details are unnecessary. In addition, in order to simplify the drawings, some conventional structures and components are shown in the drawings. It will be shown in a simple and schematic way.

FIG. 1 is a top view of a chip package 100 according to an embodiment of the present invention. FIG. 2 is a cross-sectional view of the chip package 100 of FIG. 1 along line segment 2-2. Referring to FIG. 1 and FIG. 2 at the same time, the chip package 100 includes a device chip 110, a light-guiding silicon substrate 120, an optical layer 130, an infrared cut-off filter 140, and a black photoresist layer 150. The surface 111 of the device wafer 110 has a light sensing region 112 and a conductive pad 114. The device chip 110 can be used to sense light, such as visible light. The light-guiding silicon substrate 120 is located on the device chip 110. The light-guiding silicon substrate 120 covers the light sensing area 112 but does not cover the conductive pad 114. The light-guiding silicon substrate 120 has a first through hole 121 for light to pass through. The optical layer 130 is located on the light-guiding silicon substrate 120, and the sidewall 132 of the optical layer 130 is substantially aligned with the sidewall 122 of the light-guiding silicon substrate 120. That is, the sidewall 132 of the optical layer 130 is flush with the sidewall 122 of the light-guiding silicon substrate 120. In this embodiment, the material of the optical layer 130 may include polyimide (PI) or acrylic, but it is not intended to limit the present invention. In addition, the infrared cut filter 140 is located on the optical layer 130. The black photoresist layer 150 is located on the infrared cut filter 140 and has a second perforation 151 for light to pass through.

In this embodiment, the material of the light-guiding silicon substrate 120 includes silicon, so the light-guiding silicon substrate 120 can transmit visible light and infrared rays. The second through hole 151 of the black photoresist layer 150 is substantially aligned with the first through hole 121 of the light guide silicon substrate 120. Since the black photoresist layer 150 can filter visible light, visible light can enter through the first perforation 121 of the black photoresist layer 150 and be sensed by the light sensing area 112 after passing through the second perforation 151 of the light guide silicon substrate 120. In addition, the infrared cut-off filter 140 can filter infrared rays, so that infrared rays can be prevented from entering the light guide silicon substrate 120 and Sensed by the light sensing area 112. In this way, the visible light and infrared rays of the noise can be prevented from affecting the sensing of the light sensing area 112, and the accuracy of the chip package 100 to sense light can be improved.

In this embodiment, the width of the optical layer 130 is substantially the same as the width of the light-guiding silicon substrate 120, and both are the width w1. The width of the black photoresist layer 150 is substantially the same as the width of the infrared cut filter 140, and both have a width w2. Therefore, the sidewall 152 of the black photoresist layer 150 is substantially aligned with the sidewall 142 of the infrared cut filter 140. That is, the side wall 152 of the black photoresist layer 150 is flush with the side wall 142 of the infrared cut filter 140. The width w2 of the infrared cut-off filter 140 is smaller than the width w1 of the optical layer 130. Therefore, the sidewall 142 of the infrared cut-off filter 140 is separated from the sidewall 132 of the optical layer 130 by a gap d. In other words, a part of the upper surface 134 of the optical layer 130 facing away from the light-guiding silicon substrate 120 will extend from the side wall 142 of the infrared cut filter 140, as shown in FIG. 2. Through the above design, the side wall 142 of the infrared cut filter 140, the portion of the upper surface 134 of the optical layer 130, and the side wall 132 of the optical layer 130 are stepped.

In addition, in the present embodiment, the surface 111 of the device wafer 110 may further include an insulating layer 116. The insulating layer 116 covers the light sensing region 112 to provide protection. In other embodiments, the conductive pad 114 may be electrically connected to other electronic devices (such as a circuit board) through a wire bonding process.

In this embodiment, the chip package 100 is manufactured with a wafer level package, which can save the cost of the process and also save the traditional setting of a die level / chip level on the chip package. Time of infrared cut-off filter and black photoresist layer.

In the following description, the chip package 100 will be further described. Production method.

FIG. 3 to FIG. 8 are cross-sectional views illustrating steps of a method for manufacturing a chip package according to an embodiment of the present invention. Referring to FIG. 3, first, a light guiding silicon wafer 120 a is provided on the device wafer 110 a. The device wafer 110 a has a light sensing region 112 and a conductive pad 114, and the light guiding silicon wafer 120 a has a first through hole 121. Herein, the device wafer 110 a refers to a semiconductor structure that has not been cut into the device wafer 110 of FIG. 2, and the light guide silicon wafer 120 a refers to a semiconductor structure that has not been cut into the light guide silicon substrate 120 in FIG. 2. Next, an optical layer 130, an infrared cut-off filter 140, and a black photoresist layer 150 may be sequentially formed on the light guide silicon wafer 120a. The black photoresist layer 150 may be patterned to have a second through hole 151.

Referring to FIG. 4, after the black photoresist layer 150 is formed, a part of the black photoresist layer 150 and a part of the infrared cut filter 140 may be removed, so that the black photoresist layer 150 and the infrared cut filter 140 have a first An opening O1. In this embodiment, the black photoresist layer 150 and the infrared cut-off filter 140 may be cut using a cutter to remove the portion of the black photoresist layer 150 and the infrared cut-off filter 140 to form a first opening. O1.

Referring to FIG. 5, after removing the part of the black photoresist layer 150 and the part of the infrared cut filter 140, a photoresist layer 160 may be formed to cover the black photoresist layer 150 and the optical layer 130 in the first opening O1. .

Referring to FIG. 6, a part of the optical layer 130 is removed, so that the optical layer 130 has a second opening O2 located below the first opening O1. In this embodiment, when the portion of the optical layer 130 is removed, the photoresist layer 160 covering the portion of the optical layer 130 is removed simultaneously, so that a part of the light guiding silicon wafer 120a is exposed. Removing the part of the optical layer 130 and removing the part covering the optical layer 130 described above Part of the photoresist layer 160 can be achieved by cutting with a knife.

Referring to FIG. 7, after the second opening O2 of FIG. 6 is formed, the light-guiding silicon wafer 120 a in the second opening O2 may be removed to expose the conductive pad 114. After this step, the light-guiding silicon wafer 120 a will form a plurality of light-guiding silicon substrates 120, and the sidewall 132 of the optical layer 130 and the sidewall 122 of the light-guiding silicon substrate 120 are substantially aligned. In this embodiment, the exposed portion of the light-guiding silicon wafer 120a from the second opening O2 can be etched to remove the light-guiding silicon wafer 120a in the second opening O2. In addition, after the light-guiding silicon wafer 120a in the second opening O2 is removed, the insulating layer 116 in the second opening O2 can be further removed to expose the conductive pad 114.

Then, the photoresist layer 160 can be removed to obtain the structure of FIG. 8. Referring to FIG. 8, the device wafer 110 a may be cut along the line L-L to form the device wafer 110 a into a plurality of device wafers 110 to obtain the chip package 100 of FIG. 1.

The manufacturing method of the above chip package 100 is to sequentially form an optical layer 130, an infrared cut-off filter 140, and a black photoresist layer 150 on a light guiding silicon wafer 120a on a device wafer 110a, and then remove the black photoresist. A part of the layer 150 and a part of the infrared cut filter 140 are removed, and then a part of the optical layer 130 and a part of the light guide silicon wafer 120a are removed. Finally, the device wafer 110a is cut to form the chip package 100, so it has black light. The chip package 100 of the resist layer 150 and the infrared cut filter 140 is manufactured in a wafer-level package. The chip package 100 and the manufacturing method thereof can save the cost of the manufacturing process, and can also save the time of traditionally setting an extra wafer-level infrared cut-off filter and a black photoresist layer on the chip package.

Although the present invention has been disclosed as above in the embodiments, it is not intended to be used. In order to limit the present invention, anyone skilled in the art can make various modifications and retouches without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the scope of the attached patent application. .

Claims (16)

A chip package includes: a device chip having a light sensing region and a conductive pad on one surface; a light guiding silicon substrate on the device chip, the light guiding silicon substrate covering the light sensing region but not Covers the conductive pad, and the light-guiding silicon substrate has a first perforation for light to pass through; an optical layer is located on the light-guiding silicon substrate, and a sidewall of the optical layer is substantially aligned with a sidewall of the light-guiding silicon substrate An infrared cut-off filter located on the optical layer; and a black photoresist layer positioned on the infrared cut-off filter and having a second perforation for light to pass through. The chip package according to claim 1, wherein a width of the optical layer is substantially the same as a width of the light-guiding silicon substrate. The chip package according to claim 1, wherein a sidewall of the infrared cut-off filter is separated from a sidewall of the optical layer by a gap. The chip package according to claim 1, wherein a width of the infrared cut filter is smaller than a width of the optical layer. The chip package according to claim 1, wherein the optical layer has an upper surface facing away from the light-guiding silicon substrate, and a part of the upper surface extends from a side wall of the infrared cut filter. The chip package according to claim 5, wherein the sidewall of the infrared cut filter, the portion of the upper surface and the sidewall of the optical layer are stepped. The chip package according to claim 1, wherein a width of the black photoresist layer is substantially the same as a width of the infrared cut filter. The chip package according to claim 1, wherein a sidewall of the black photoresist layer is substantially aligned with a sidewall of the infrared cut filter. The chip package according to claim 1, wherein the second through hole of the black photoresist layer is substantially aligned with the first through hole of the light guide silicon substrate. A method for manufacturing a chip package includes: setting a light guiding silicon wafer on a device wafer, wherein the device wafer has a light sensing area and a conductive pad; an optical layer and an infrared cutoff are sequentially formed A filter and a black photoresist layer on the light-guiding silicon wafer; removing a part of the black photoresist layer and a part of the infrared cut-off filter, so that the black photoresist layer and the infrared cut-off filter Have a first opening in common; remove a part of the optical layer so that the optical layer has a second opening located below the first opening; remove the light-guiding silicon wafer in the second opening so that the The conductive pad is exposed; and the device wafer is cut. The method for manufacturing a chip package according to claim 10, further comprising: after removing the part of the black photoresist layer and the part of the infrared cut filter, forming a photoresist layer to cover the black photoresist layer And the optical layer in the first opening. The method for manufacturing a chip package according to claim 11, further comprising: when removing the part of the optical layer, synchronously removing the photoresist layer covering the part of the optical layer, so that the light guiding silicon Part of the circle is bare. The method for manufacturing a chip package according to claim 12, wherein removing the light-guiding silicon wafer in the second opening comprises: etching the portion of the light-guiding silicon wafer. The method for manufacturing a chip package according to claim 13, further comprising: after etching the portion of the light-guiding silicon wafer, removing the photoresist layer. The method for manufacturing a chip package according to claim 10, wherein removing the portion of the black photoresist layer and the portion of the infrared cut-off filter includes cutting the black photoresist layer and the infrared cut-off filter. The method of manufacturing a chip package according to claim 10, wherein removing the portion of the optical layer includes cutting the optical layer.