TWI676342B - Half-bridge circuit assembly and switch mode power supply - Google Patents

Half-bridge circuit assembly and switch mode power supply Download PDF

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Publication number
TWI676342B
TWI676342B TW107142680A TW107142680A TWI676342B TW I676342 B TWI676342 B TW I676342B TW 107142680 A TW107142680 A TW 107142680A TW 107142680 A TW107142680 A TW 107142680A TW I676342 B TWI676342 B TW I676342B
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transistor
bridge circuit
driving signal
circuit board
electrically connected
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TW107142680A
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Chinese (zh)
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TW202021250A (en
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胡志國
Chih Kuo Hu
王俊凱
Chun Kai Wang
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致茂電子股份有限公司
Chroma Ate Inc.
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Abstract

一種半橋電路組件,包含一具有一第一電晶體設置區與一第二電晶體設置區之主電路板、一設置於第一電晶體設置區之第一電晶體、一設置於第二電晶體設置區且電性串接第一電晶體之第二電晶體與一橋接電路板。第一電晶體與第二電晶體之間係具有一形成一訊號干擾區之節點。橋接電路板,係自第一電晶體設置區跨越訊號干擾區橋接至第二電晶體設置區。第一電晶體的一控制端係接收一第一驅動訊號。第二電晶體的一控制端係透過橋接電路板接收一與第一驅動訊號反相之第二驅動訊號,藉以避免第二驅動訊號受到訊號干擾區干擾。 A half-bridge circuit assembly includes a main circuit board having a first transistor setting area and a second transistor setting area, a first transistor provided in the first transistor setting area, and a second transistor. The crystal setting area is electrically connected in series with the second transistor of the first transistor and a bridge circuit board. There is a node forming a signal interference region between the first transistor and the second transistor. The bridge circuit board is bridged from the first transistor setting area to the second transistor setting area across the signal interference area. A control terminal of the first transistor receives a first driving signal. A control terminal of the second transistor receives a second driving signal opposite to the first driving signal through the bridge circuit board, so as to prevent the second driving signal from being interfered by the signal interference area.

Description

半橋電路組件及切換式電源供應器 Half-bridge circuit component and switching power supply

本發明係有關於一種電路組件,尤其是指一種利用橋接電路板之半橋電路組件。 The invention relates to a circuit component, in particular to a half-bridge circuit component using a bridge circuit board.

隨著科技的進步,電子裝置也越來越普及,例如電視、電腦主機、電腦螢幕、電冰箱、音響…等。因為大部分電子裝置的內部電子元件大多採用直流電源,故需要一個裝置來將屬於交流電且固定電壓的市電轉換成各種不同大小的直流電壓,並供應給各個內部電子元件,使其運作發揮其功能。而將交流電轉換成直流電的裝置就是電源供應器。 With the advancement of technology, electronic devices are becoming more and more popular, such as televisions, computer hosts, computer screens, refrigerators, stereos, etc. Because most of the internal electronic components of most electronic devices use DC power, a device is required to convert AC power with fixed voltage into various DC voltages of different sizes and supply them to various internal electronic components to make their operations perform their functions. . The device that converts AC power to DC power is a power supply.

一般來說,電源供應器依其電路的不同,可以分為線性電源供應器(Linear Power Supply)與切換式電源供應器(Switch Mode Power Supply;SMPS)。線性電源供應器的優點為電路簡單、耐用、穩定度高、暫態響應快。然而,線性電源供應器具有體積大、重量重、效率低、輸入電壓範圍較窄、保持時間較短等缺點,使線性電源供應器在近年已漸漸被切換式電源供應器所 取代。 Generally speaking, power supplies can be divided into Linear Power Supply and Switch Mode Power Supply (SMPS) according to their circuits. The advantages of linear power supply are simple circuit, durable, high stability and fast transient response. However, linear power supplies have the disadvantages of large size, heavy weight, low efficiency, narrow input voltage range, short holding time, etc., which has made linear power supplies gradually used by switching power supplies in recent years. To replace.

又為了因應各種不同的輸出功率,切換式電源供應器遂發展出以下幾種常見的電路拓撲(Topology),有返馳式(Flyback)、順向式(Forward)、全橋式(Full Bridge)、半橋式(Half Bridge)與推挽式(Push-Pull)等。 In order to respond to various output powers, the switching power supply has developed the following common circuit topologies, including Flyback, Forward, and Full Bridge. , Half Bridge and Push-Pull.

請參閱第一圖與第二圖,第一圖係顯示先前技術之切換式電源供應器之電路示意圖;以及,第二圖係顯示先前技術之切換式電源供應器之立體示意圖。如圖所示,一種切換式電源供應器PA100,包含至少一電路板、一第一電晶體PA12、一第二電晶體PA13、一驅動訊號源PA14、一電感PA15、一電容PA16與一輸入電壓源PA17。在本實施例中,切換式電源供應器PA100包含二電路板PA11與PA11a。 Please refer to the first diagram and the second diagram. The first diagram is a schematic circuit diagram of the switching power supply of the prior art; and the second diagram is a three-dimensional diagram illustrating the switching power supply of the prior art. As shown in the figure, a switching power supply PA100 includes at least one circuit board, a first transistor PA12, a second transistor PA13, a driving signal source PA14, an inductor PA15, a capacitor PA16, and an input voltage. Source PA17. In this embodiment, the switching power supply PA100 includes two circuit boards PA11 and PA11a.

第一電晶體PA12、第二電晶體PA13與驅動訊號源PA14係設置於電路板PA11,電感PA15與電容PA16係設置於電路板PA11a。但不以此為限,在先前技術中,上述元件也可皆設置於同一塊電路板上。輸入電壓源PA17,係藉由電壓連結端PAH2與PAH3電性連接第一電晶體PA12與第二電晶體PA13。 The first transistor PA12, the second transistor PA13, and the driving signal source PA14 are disposed on the circuit board PA11, and the inductor PA15 and the capacitor PA16 are disposed on the circuit board PA11a. However, it is not limited to this. In the prior art, the above-mentioned components may all be provided on the same circuit board. The input voltage source PA17 is electrically connected to the first transistor PA12 and the second transistor PA13 through the voltage connection terminals PAH2 and PAH3.

第一電晶體PA12與第二電晶體PA13將以金屬氧化物半導體場效電晶體(Metal-Oxide-Semiconductor Field Effect Transistor;MOSFET)做說明,但不以此為限。第一電晶體PA12具有一閘極(Gate)PAG12、一汲極(Drain)PAD12與一 源極(Source)PAS12,而第二電晶體PA13具有一閘極(Gate)PAG13、一汲極(Drain)PAD13與一源極(Source)PAS13。第一電晶體PA12與第二電晶體PA13電性連接會形成一半橋式電路,更精確地說,係第一電晶體PA12的源極PAS12與第二電晶體PA13的汲極PAD13電性連接。 The first transistor PA12 and the second transistor PA13 will be described using a metal-oxide semiconductor field effect transistor (MOSFET), but not limited thereto. The first transistor PA12 has a gate PAG12, a drain PAD12, and a The source PAS12, and the second transistor PA13 has a gate PAG13, a drain PAD13, and a source PAS13. The first transistor PA12 and the second transistor PA13 are electrically connected to form a half-bridge circuit. More specifically, the source PAS12 of the first transistor PA12 is electrically connected to the drain PAD13 of the second transistor PA13.

第一電晶體PA12的閘極PAG12會自驅動訊號源PA14接收一第一驅動訊號PAS1,而第二電晶體PA13的閘極PAG13會自驅動訊號源PA14接收一第二驅動訊號PAS2,其中,第一驅動訊號PAS1與第二驅動訊號PAS2互為反向訊號。也就是說,在半橋式電路中,第一電晶體PA12導通時,第二電晶體PA13便斷開;第二電晶體PA13導通時,第一電晶體PA12便斷開,藉以避免第一電晶體PA12與第二電晶體PA13同時導通,而造成電路短路,甚至是第一電晶體PA12與第二電晶體PA13被燒毀等問題。 The gate PAG12 of the first transistor PA12 receives a first driving signal PAS1 from the driving signal source PA14, and the gate PAG13 of the second transistor PA13 receives a second driving signal PAS2 from the driving signal source PA14. A driving signal PAS1 and a second driving signal PAS2 are mutually opposite signals. In other words, in the half-bridge circuit, when the first transistor PA12 is turned on, the second transistor PA13 is turned off; when the second transistor PA13 is turned on, the first transistor PA12 is turned off to avoid the first transistor The crystal PA12 and the second transistor PA13 are turned on at the same time, which causes a short circuit, and even the first transistor PA12 and the second transistor PA13 are burned.

然而,源極PAS12與汲極PAD13之間係藉由一佈線PAL3電性連接,在佈線PAL3上係具有一節點PAN,節點PAN係經由一佈線PAL1與一電感連結端PAH1電性連接電感PA15。電容PA16係電性連接電感PA15,並利用一佈線PAL2電性連接至電壓連結端PAH3,其中,佈線PAL1、佈線PAL2與佈線PAL3可為電線,亦可為印刷電路板上的走線(trace)。因為第一電晶體PA12與第二電晶體PA13不斷切換的關係,節點PAN與經過節點PAN的佈線PAL1、PAL3會形成一訊號干擾源,並以節點PAN與佈線PAL1、PAL3為基礎而向外擴充形成一訊號干 擾區PAIR。在此需說明的是,訊號干擾區並非僅為二維平面,也可能是三維空間,圖式係繪製訊號干擾區形成於電路板PA11的部分,並標示為訊號干擾區PAIR。此外,只要有電流流經的地方或多或少都會產生干擾,因並非訊號干擾區PAIR的主要成因,故不多加贅述。 However, the source PAS12 and the drain PAD13 are electrically connected through a wiring PAL3, and a node PAN is provided on the wiring PAL3. The node PAN is electrically connected to the inductor PA15 through a wiring PAL1 and an inductance connection terminal PAH1. The capacitor PA16 is electrically connected to the inductor PA15 and is electrically connected to the voltage connection terminal PAH3 by a wiring PAL2. Among them, the wiring PAL1, the wiring PAL2, and the wiring PAL3 can be wires or traces on a printed circuit board. . Due to the constantly switching relationship between the first transistor PA12 and the second transistor PA13, the node PAN and the wiring PAL1 and PAL3 passing through the node PAN will form a signal interference source, and expand outward based on the node PAN and the wiring PAL1 and PAL3. Form a signal stem Disturb zone PAIR. It should be noted here that the signal interference area is not only a two-dimensional plane, but may also be a three-dimensional space. The diagram plots the part where the signal interference area is formed on the circuit board PA11 and is labeled as the signal interference area PAIR. In addition, as long as there is a place where current flows, interference will occur more or less, because it is not the main cause of the signal interference area PAIR, so I will not go into details.

在此,驅動訊號源PA14鄰近於第一電晶體PA12,因此傳送的第一驅動訊號PAS1不會經過訊號干擾區PAIR。但是,當驅動訊號源PA14傳送第二驅動訊號PAS2至第二電晶體PA13時,就會經過訊號干擾區PAIR,進而造成第二驅動訊號PAS2受到干擾。甚至有可能使本來應該斷開的第二電晶體PA13導通,使得第一電晶體PA12與第二電晶體PA13同時導通導致電路短路進而燒毀等問題。若驅動訊號源PA14鄰近於第二電晶體PA13,則有可能經過訊號干擾區PAIR被干擾的就是傳送到離驅動訊號源PA14較遠的第一電晶體PA12的第一驅動訊號PAS1。 Here, the driving signal source PA14 is adjacent to the first transistor PA12, so the first driving signal PAS1 transmitted will not pass through the signal interference area PAIR. However, when the driving signal source PA14 transmits the second driving signal PAS2 to the second transistor PA13, it will pass through the signal interference area PAIR, thereby causing the second driving signal PAS2 to be disturbed. It is even possible that the second transistor PA13, which should be turned off, is turned on, so that the first transistor PA12 and the second transistor PA13 are turned on at the same time, which causes a short circuit and burns the circuit. If the driving signal source PA14 is adjacent to the second transistor PA13, it is possible that the first driving signal PAS1 transmitted to the first transistor PA12 far away from the driving signal source PA14 may be interfered through the signal interference area PAIR.

先前技術中的解決辦法為設法將佈線(電線或印刷電路板上的走線)繞開訊號干擾區PAIR,如第二圖所示。然而,此舉卻會使得電路板PA11上的使用密度降低或是增加電路板PA11的面積體積進而增加空間佔用率,不符合現今社會追求重量輕量化或是體積最小化的需求。而且,若電路板PA11上有多組第一電晶體PA12與第二電晶體PA13時,訊號干擾區PAIR也會隨之變多,故涵蓋範圍就會越大。佈線若要完全繞開訊號干擾區,將會使上述使用密度降低與增加空間佔用率的問題 更加明顯。此外,如同前述只要有佈線的地方或多或少都會有干擾,因此,將佈線繞開訊號干擾區PAIR仍有可能會受到電路板PA11上其他佈線的干擾。 The solution in the prior art is to try to route the wiring (wires or traces on the printed circuit board) away from the signal interference area PAIR, as shown in the second figure. However, this will reduce the use density on the circuit board PA11 or increase the area and volume of the circuit board PA11, thereby increasing the space occupancy, which does not meet the needs of today's society to pursue lightweighting or minimizing the volume. Moreover, if there are multiple sets of the first transistor PA12 and the second transistor PA13 on the circuit board PA11, the signal interference area PAIR will also increase accordingly, so the coverage will be larger. If the wiring is to completely bypass the signal interference area, the problems of reducing the use density and increasing the space occupancy mentioned above will be caused. more obvious. In addition, as mentioned above, as long as there is wiring, there will be more or less interference. Therefore, bypassing the wiring around the signal interference area PAIR may still be interfered by other wiring on the circuit board PA11.

有鑒於在先前技術中,第一電晶體與第二電晶體所形成的節點,以及以節點與經過節點的佈線為基礎而向外擴充所形成的訊號干擾區,會造成第一驅動訊號與第二驅動訊號中經過訊號干擾區的一者受到訊號干擾區干擾,有可能造成第一電晶體與第二電晶體同時導通導致電路短路,甚至是燒毀第一電晶體與第二電晶體的問題。而將佈線繞開訊號干擾區,又會造成電路板上的使用密度降低,或是增加電路板的空間佔用率,與現今追求重量輕量化與體積最小化的需求背道而馳。本發明之一主要目的係提供一種半橋電路組件及切換式電源供應器,用以使第一驅動訊號與第二驅動訊號皆不會經過訊號干擾區。 Whereas in the prior art, the node formed by the first transistor and the second transistor, and the signal interference area formed by expanding the node based on the node and the wiring passing through the node, will cause the first driving signal and the One of the two driving signals passing through the signal interference area is interfered by the signal interference area, which may cause the first transistor and the second transistor to be turned on at the same time, resulting in a short circuit, and even the problem of burning the first transistor and the second transistor. Bypassing the wiring away from the signal interference zone, it will cause the use density of the circuit board to decrease, or increase the space occupation rate of the circuit board, which runs counter to the current demand for lightweight and miniaturization. One of the main objects of the present invention is to provide a half-bridge circuit component and a switching power supply, so that neither the first driving signal nor the second driving signal passes through the signal interference area.

本發明為解決先前技術之問題,所採用之必要技術手段為提供一種半橋電路組件,用以接收一第一驅動訊號及與第一驅動訊號反向之一第二驅動訊號,並包含一主電路板、一第一電晶體、一第二電晶體與一橋接電路板。 In order to solve the problems of the prior art, the present invention adopts a necessary technical means to provide a half-bridge circuit assembly for receiving a first driving signal and a second driving signal opposite to the first driving signal, and including a main A circuit board, a first transistor, a second transistor and a bridge circuit board.

主電路板,係具有一第一電晶體設置區與一第二電晶體設置區。第一電晶體,係設置於第一電晶體設置區。第二電晶體,係設置於第二電晶體設置區, 並電性串接第一電晶體,第一電晶體與第二電晶體之間係具有一節點,且以節點與至少一連接節點之佈線為基礎而向外擴充定義出一訊號干擾區。 The main circuit board has a first transistor setting area and a second transistor setting area. The first transistor is disposed in the first transistor installation area. The second transistor is disposed in the second transistor installation area. The first transistor is electrically connected in series, and there is a node between the first transistor and the second transistor, and a signal interference area is defined by expanding outward based on the wiring of the node and at least one connecting node.

橋接電路板,係自第一電晶體設置區跨越訊號干擾區橋接至第二電晶體設置區,其中第一電晶體的一控制端係接收第一驅動訊號,第二電晶體的一控制端係透過橋接電路板接收第二驅動訊號,藉以避免第二驅動訊號經過訊號干擾區而受到干擾。 The bridge circuit board is bridged from the first transistor setting area to the second transistor setting area, wherein a control terminal of the first transistor receives the first driving signal and a control terminal of the second transistor The second driving signal is received through the bridge circuit board, so as to avoid the second driving signal from being interfered by the signal interference area.

在上述必要技術手段的基礎下,本發明所衍生之一附屬技術手段為使半橋電路組件中之第一電晶體,其一源極(Source)係與第二電晶體之一汲極(Drain)電性連接,並形成上述節點。 Based on the above-mentioned necessary technical means, one of the subsidiary technical means derived from the present invention is to make the first transistor in the half-bridge circuit component, a source (source) and a drain (a drain) of a second transistor. ) Are electrically connected and form the aforementioned nodes.

在上述必要技術手段的基礎下,本發明所衍生之一附屬技術手段為使半橋電路組件,更包含一連接器,且連接器係電性連接主電路板與橋接電路板。 Based on the above-mentioned necessary technical means, one subsidiary technical means derived from the present invention is that the half-bridge circuit component further includes a connector, and the connector is electrically connected to the main circuit board and the bridge circuit board.

在上述必要技術手段的基礎下,本發明所衍生之一附屬技術手段為使半橋電路組件,更包含一第三電晶體,第三電晶體係設置於第一電晶體設置區,並電性串接第一電晶體,且第三電晶體的一控制端係接收第一驅動訊號。 Based on the above-mentioned necessary technical means, one of the subsidiary technical means derived from the present invention is that the half-bridge circuit component further includes a third transistor, and the third transistor system is disposed in the first transistor installation area and is The first transistor is connected in series, and a control terminal of the third transistor receives the first driving signal.

在上述必要技術手段的基礎下,本發明所衍生之一附屬技術手段為使半橋電路組件,更包含一第四電晶體,第四電晶體係設置於第二電晶體設置區,並電性串接第二電晶體,且第四電晶體的一控制端係透過橋接電路板接收第二驅動訊號。 Based on the above-mentioned necessary technical means, one of the subsidiary technical means derived from the present invention is that the half-bridge circuit component further includes a fourth transistor, and the fourth transistor system is disposed in the second transistor installation area and is electrically The second transistor is connected in series, and a control terminal of the fourth transistor receives the second driving signal through the bridge circuit board.

在上述必要技術手段的基礎下,本發明所衍生之一附屬技術手段為使半橋電路組件,更包含彼此電性串接的複數個第三電晶體,第三電晶體係設置於第一電晶體設置區,第三電晶體中最靠近第一電晶體的一者之一源極係與第一電晶體之一汲極電性連接,且第三電晶體的複數個控制端係接收第一驅動訊號。 Based on the above-mentioned necessary technical means, one of the subsidiary technical means derived from the present invention is that the half-bridge circuit component further includes a plurality of third transistors electrically connected in series with each other. In the crystal setting area, a source of one of the third transistors closest to the first transistor is electrically connected to a drain of the first transistor, and a plurality of control terminals of the third transistor receive the first Drive signal.

在上述必要技術手段的基礎下,本發明所衍生之一附屬技術手段為使半橋電路組件,更包含複數個第四電晶體,第四電晶體係設置於第二電晶體設置區,第四電晶體中最靠近第二電晶體的一者之一汲極係與第二電晶體之一源極電性連接,且第四電晶體的複數個控制端係透過橋接電路板接收第二驅動訊號。 Based on the above-mentioned necessary technical means, one of the subsidiary technical means derived from the present invention is to make the half-bridge circuit component further include a plurality of fourth transistors, and the fourth transistor system is arranged in the second transistor installation area. One of the transistors closest to the second transistor has a drain connected electrically to a source of the second transistor, and a plurality of control terminals of the fourth transistor receive the second driving signal through the bridge circuit board. .

本發明為解決先前技術之問題,所採用之必要技術手段為另外提供一種切換式電源供應器,包含至少一半橋電路組件與一驅動訊號源。每一半橋電路組件包含一主電路板、一第一電晶體、一第二電晶體與一橋接電路板。 In order to solve the problems of the prior art, the present invention adopts a necessary technical means to additionally provide a switching power supply, which includes at least half of a bridge circuit component and a driving signal source. Each half-bridge circuit assembly includes a main circuit board, a first transistor, a second transistor, and a bridge circuit board.

主電路板,係具有一第一電晶體設置區與一第二電晶體設置區。第一電晶體,係設置於第一電晶體設置區。第二電晶體,係設置於第二電晶體設置區,並電性串接第一電晶體,第一電晶體與第二電晶體之間係具有一節點,且以節點與至少一經過節點之佈線為基礎而向外擴充定義出一訊號干擾區。橋接電路板,係自第一電晶體設置區跨越訊號干擾區橋接至第二電晶體設置區。 The main circuit board has a first transistor setting area and a second transistor setting area. The first transistor is disposed in the first transistor installation area. The second transistor is disposed in the second transistor setting area and is electrically connected in series with the first transistor. There is a node between the first transistor and the second transistor, and the node and at least one passing node Based on the wiring, it expands outward to define a signal interference area. The bridge circuit board is bridged from the first transistor setting area to the second transistor setting area across the signal interference area.

驅動訊號源,係鄰設於半橋電路組件,第一電晶體的一控制端自驅動訊號源接收一第一驅動訊號,第二電晶體的一控制端透過橋接電路板而自驅動訊號源接收與第一驅動訊號反相的一第二驅動訊號。 The driving signal source is adjacent to the half-bridge circuit component. A control terminal of the first transistor receives a first driving signal from the driving signal source, and a control terminal of the second transistor receives from the driving signal source through the bridge circuit board. A second driving signal opposite to the first driving signal.

在上述必要技術手段的基礎下,本發明所衍生之一附屬技術手段為使切換式電源供應器中之第一電晶體,其一源極係與第二電晶體之一汲極電性連接並形成上述節點。 Based on the above-mentioned necessary technical means, a subsidiary technical means derived from the present invention is to make a first transistor in a switching power supply, a source of which is electrically connected to a drain of a second transistor, and The above nodes are formed.

在上述必要技術手段的基礎下,本發明所衍生之一附屬技術手段為使切換式電源供應器,更包含一連接器,且連接器係電性連接主電路板與橋接電路板。 Based on the above-mentioned necessary technical means, one subsidiary technical means derived from the present invention is that the switching power supply further includes a connector, and the connector is electrically connected to the main circuit board and the bridge circuit board.

承上所述,本發明所提供之半橋電路組件,利用橋接電路板自第一電晶體設置區跨越訊號干擾區橋接至第二電晶體設置區,使得第二電晶體的控制端係透過橋接電路板接收第二驅動訊號,避免第二驅動訊號經過訊號干擾區而受到干擾。 As mentioned above, the half-bridge circuit assembly provided by the present invention uses a bridge circuit board to bridge the signal interference area from the first transistor setting area to the second transistor setting area, so that the control terminal of the second transistor is connected through the bridge. The circuit board receives the second driving signal to prevent the second driving signal from being interfered by passing through the signal interference area.

PA100‧‧‧切換式電源供應器 PA100‧‧‧Switching Power Supply

PA11、PA11a‧‧‧電路板 PA11, PA11a‧‧‧Circuit Board

PA12‧‧‧第一電晶體 PA12‧‧‧The first transistor

PA13‧‧‧第二電晶體 PA13‧‧‧Second transistor

PA14‧‧‧驅動訊號源 PA14‧‧‧Drive signal source

PA15‧‧‧電感 PA15‧‧‧Inductance

PA16‧‧‧電容 PA16‧‧‧Capacitor

PA17‧‧‧輸入電壓源 PA17‧‧‧Input voltage source

PAD12、PAD13‧‧‧汲極 PAD12, PAD13 ‧‧‧ Drain

PAG12、PAG13‧‧‧閘極 PAG12, PAG13‧‧‧Gate

PAS12、PAS13‧‧‧源極 PAS12, PAS13‧‧‧Source

PAH1‧‧‧電感連結端 PAH1‧‧‧Inductive connection terminal

PAH2、PAH3‧‧‧電壓連結端 PAH2, PAH3‧‧‧ voltage connection terminal

PAIR‧‧‧訊號干擾區 PAIR‧‧‧Signal interference zone

PAL1、PAL2、PAL3‧‧‧佈線 PAL1, PAL2, PAL3‧‧‧wiring

PAN‧‧‧節點 PAN‧‧‧node

PAS1‧‧‧第一驅動訊號 PAS1‧‧‧First drive signal

PAS2‧‧‧第二驅動訊號 PAS2‧‧‧Second driving signal

100、100a、100b‧‧‧切換式電源供應器 100, 100a, 100b ‧‧‧ Switching Power Supply

1、1a、1b、1c、1d、1e、1f‧‧‧半橋電路組件 1, 1a, 1b, 1c, 1d, 1e, 1f ‧‧‧ half-bridge circuit components

11‧‧‧主電路板 11‧‧‧Main circuit board

12、12b、12c、12d、12e、12f‧‧‧第一電晶體 12, 12b, 12c, 12d, 12e, 12f‧‧‧The first transistor

13、13b、13c、13d、13e、13f‧‧‧第二電晶體 13, 13b, 13c, 13d, 13e, 13f‧‧‧Second transistor

14、14b、14c、14d、14e、14f‧‧‧橋接電路板 14, 14b, 14c, 14d, 14e, 14f‧‧‧bridge circuit boards

15‧‧‧連接器 15‧‧‧ connector

16‧‧‧第三電晶體 16‧‧‧Third transistor

17‧‧‧第四電晶體 17‧‧‧Fourth transistor

2‧‧‧驅動訊號源 2‧‧‧Drive signal source

3‧‧‧電感 3‧‧‧Inductance

4‧‧‧電容 4‧‧‧ capacitor

5‧‧‧輸入電壓源 5‧‧‧ input voltage source

6‧‧‧電路板 6‧‧‧Circuit Board

7‧‧‧驅動訊號連接器 7‧‧‧Drive signal connector

D12、D13、D16、D17‧‧‧汲極 D12, D13, D16, D17‧‧‧ Drain

G12、G13、G16、G17‧‧‧閘極 G12, G13, G16, G17‧‧‧Gate

S12、S13、S16、S17‧‧‧源極 S12, S13, S16, S17‧‧‧Source

H1、H1b‧‧‧電感連結端 H1, H1b‧‧‧Inductive connection terminal

H2、H3、H2b、H3b‧‧‧電壓連結端 H2, H3, H2b, H3b‧‧‧ voltage connection terminals

L1、L2、L3、L1a‧‧‧佈線 L1, L2, L3, L1a‧‧‧Wiring

N‧‧‧節點 N‧‧‧node

R1‧‧‧第一電晶體設置區 R1‧‧‧The first transistor setting area

R2‧‧‧第二電晶體設置區 R2‧‧‧Second transistor setting area

RI、RIa‧‧‧訊號干擾區 RI, RIa‧‧‧Signal interference zone

S1‧‧‧第一驅動訊號 S1‧‧‧First drive signal

S2‧‧‧第二驅動訊號 S2‧‧‧Second driving signal

第一圖係顯示先前技術之切換式電源供應器之電路示意圖;第二圖係顯示先前技術之切換式電源供應器之立體示意圖;第三圖係顯示本發明第一較佳實施例所提供之切換式電源供應器之電路示意圖; 第四圖係顯示本發明第一較佳實施例所提供之切換式電源供應器之立體示意;第五圖係顯示本發明第二實施例所提供之切換式電源供應器之電路示意圖;第六圖係顯示本發明第二實施例所提供之切換式電源供應器之立體示意圖;第七圖係顯示本發明第三實施例所提供之切換式電源供應器之立體示意圖;以及第八圖係顯示本發明第三實施例所提供之切換式電源供應器之另一視角之立體示意圖。 The first diagram is a circuit diagram of a switching power supply of the prior art; the second diagram is a perspective diagram of a switching power supply of the prior art; and the third diagram is a diagram of the first preferred embodiment of the present invention. Circuit diagram of switching power supply; The fourth diagram is a three-dimensional schematic diagram of the switching power supply provided by the first preferred embodiment of the present invention; the fifth diagram is a schematic circuit diagram of the switching power supply provided by the second embodiment of the present invention; The figure is a perspective view showing a switching power supply provided by the second embodiment of the present invention; the seventh figure is a perspective view showing a switching power supply provided by the third embodiment of the present invention; and the eighth view is a view showing Another perspective view of the switchable power supply provided by the third embodiment of the present invention.

請參閱第三圖與第四圖,其中,第三圖係顯示本發明第一較佳實施例所提供之切換式電源供應器之電路示意圖;以及,第四圖係顯示本發明第一較佳實施例所提供之切換式電源供應器之立體示意圖。如圖所示,一種切換式電源供應器100,包含一半橋電路組件1、一驅動訊號源2、一電感3、一電容4、一輸入電壓源5與一電路板6。半橋電路組件1,包含一主電路板11、一第一電晶體12、一第二電晶體13與一橋接電路板14。為了避免圖式線條過多造成本發明的實施方式不明瞭,圖式內的佈線(印刷電路的走線或電線)都僅以線條作為示意,用以表達線條兩端元件的電性連接關係。 Please refer to the third diagram and the fourth diagram, wherein the third diagram is a schematic circuit diagram of the switching power supply provided by the first preferred embodiment of the present invention; and the fourth diagram is the first preferred embodiment of the present invention. The three-dimensional schematic diagram of the switching power supply provided in the embodiment. As shown in the figure, a switching power supply 100 includes a half bridge circuit component 1, a driving signal source 2, an inductor 3, a capacitor 4, an input voltage source 5 and a circuit board 6. The half-bridge circuit assembly 1 includes a main circuit board 11, a first transistor 12, a second transistor 13, and a bridge circuit board 14. In order to avoid that the embodiments of the present invention are unclear due to too many lines in the diagram, the wirings (traces or wires of the printed circuit) in the diagram are only illustrated by lines to express the electrical connection relationship between the two ends of the lines.

主電路板11,具有一第一電晶體設置區R1與一第二電晶體設置區R2。第一電晶體12,係設置連結 於第一電晶體設置區R1,而第二電晶體13,係設置連結於第二電晶體設置區R2且電性串接第一電晶體12。為了避免圖式線條過於凌亂,第一電晶體設置區R1與第二電晶體設置區R2在此僅用箭頭標示,即為供第一電晶體12與第二電晶體13所設置的區域。在本實施例中,第一電晶體12與第二電晶體13係金屬氧化物半導體場效電晶體(Metal-Oxide-Semiconductor Field Effect Transistor;MOSFET),但不以此為限。第一電晶體12與第二電晶體13也可為雙極性接面型電晶體(Bipolar Junction Transistor;BJT)、絕緣柵雙極電晶體(Insulated Gate Bipolar Transistor;IGBT)等功率電晶體。 The main circuit board 11 has a first transistor setting region R1 and a second transistor setting region R2. The first transistor 12 is connected In the first transistor setting region R1, the second transistor 13 is connected to the second transistor setting region R2 and is electrically connected to the first transistor 12 in series. In order to avoid the lines in the figure being too messy, the first transistor setting area R1 and the second transistor setting area R2 are only indicated by arrows here, which are the areas for the first transistor 12 and the second transistor 13 to be arranged. In this embodiment, the first transistor 12 and the second transistor 13 are Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs), but not limited thereto. The first transistor 12 and the second transistor 13 may also be power transistors such as a bipolar junction transistor (BJT) and an insulated gate bipolar transistor (IGBT).

第一電晶體12具有一汲極(Drain)D12、一閘極(Gate)G12與一源極(Source)S12,而第二電晶體13具有一汲極(Drain)D13、一閘極(Gate)G13與一源極(Source)S13。輸入電壓源5經由電壓連結端H2與H3電性連接第一電晶體12的汲極D12與第二電晶體13的源極S13。第一電晶體12的源極S12與第二電晶體13的汲極D13電性串接會形成一半橋式電路,而在第一電晶體12的源極S12與第二電晶體13的汲極D13會具有一節點N。 The first transistor 12 has a drain D12, a gate G12, and a source S12, and the second transistor 13 has a drain D13 and a gate G13 and a source S13. The input voltage source 5 is electrically connected to the drain D12 of the first transistor 12 and the source S13 of the second transistor 13 via the voltage connection terminals H2 and H3. The source S12 of the first transistor 12 and the drain D13 of the second transistor 13 are electrically connected in series to form a half bridge circuit. The source S12 of the first transistor 12 and the drain of the second transistor 13 are connected in series. D13 will have a node N.

驅動訊號源2,係連結於主電路板11,並透過驅動積體電路(Integrated Circuit;IC)(圖未示)傳送出一第一驅動訊號S1與一第二驅動訊號S2,其中,第一驅動訊號S1與第二驅動訊號S2互為反相訊號。第一電晶體12的一控制端,可視為閘極G12,接收第一驅動 訊號S1,而第二電晶體13的一控制端,可視為閘極G13,係接收第二驅動訊號S2。因為第一驅動訊號S1與第二驅動訊號S2互為反相訊號,故第一電晶體12與第二電晶體13僅會有一者導通,另一者為斷開,藉以避免第一電晶體12與第二電晶體13同時導通導致電路短路。因為第一電晶體12與第二電晶體13個別的電阻值很小,故同時導通會使電流過大,甚至是燒毀第一電晶體12、第二電晶體13或主電路板11。 The driving signal source 2 is connected to the main circuit board 11 and transmits a first driving signal S1 and a second driving signal S2 through a driving integrated circuit (IC) (not shown). Among them, the first The driving signal S1 and the second driving signal S2 are mutually inverted signals. A control terminal of the first transistor 12 can be regarded as the gate G12, and receives the first driving The signal S1, and a control terminal of the second transistor 13, can be regarded as the gate G13, which receives the second driving signal S2. Because the first driving signal S1 and the second driving signal S2 are anti-phase signals to each other, only one of the first transistor 12 and the second transistor 13 is turned on, and the other is turned off to avoid the first transistor 12 Simultaneously conducting with the second transistor 13 causes a short circuit. Because the resistance of each of the first transistor 12 and the second transistor 13 is very small, the simultaneous conduction will cause excessive current, and even burn the first transistor 12, the second transistor 13, or the main circuit board 11.

節點N,係位於一電性連接源極S12與汲極D13之一佈線L3上,並利用一佈線L1經由一電感連結端H1電性連接至電感3。因為第一電晶體12與第二電晶體13的導通斷開切換關係,節點N與經過節點N的佈線L1、L3會形成一訊號干擾源,並且以節點N與佈線L1、L3為基礎而向外擴充形成一訊號干擾區RI。更詳細的說明,訊號干擾區並非僅為二維平面,也可能為三維空間,圖式僅繪製訊號干擾區形成於主電路板11的部分,並標示為訊號干擾區RI。此外,訊號干擾區RI的形狀範圍也僅為示意,會依實際施行的電路規格而有所增減,但是皆會以節點N與經過節點N的佈線為基礎而向外擴充。電容4係利用一佈線L2經由電壓連結端H3電性連接至輸入電壓源5,其中,佈線L1、L2與L3可為電線,也可為印刷電路板上的走線。在本實施例中,電感3與電容4係設置於電路板6,但不以此為限,電感3與電容4也可設置於主電路板11上。 The node N is located on a wiring L3 that is electrically connected to the source S12 and the drain D13, and is electrically connected to the inductor 3 through an inductance connection terminal H1 through a wiring L1. Because the on-off switching relationship between the first transistor 12 and the second transistor 13, the node N and the wiring L1, L3 passing through the node N will form a signal interference source, and will be based on the node N and the wiring L1, L3. The external expansion forms a signal interference area RI. In more detail, the signal interference area is not only a two-dimensional plane, but may also be a three-dimensional space. The drawing only draws the portion where the signal interference area is formed on the main circuit board 11 and marks it as the signal interference area RI. In addition, the shape range of the signal interference region RI is only for illustration, and will increase or decrease according to the actual circuit specifications, but both will expand outward based on the node N and the wiring passing through the node N. The capacitor 4 is electrically connected to the input voltage source 5 through a voltage connection terminal H3 through a wiring L2. The wirings L1, L2, and L3 can be wires or traces on a printed circuit board. In this embodiment, the inductor 3 and the capacitor 4 are disposed on the circuit board 6, but not limited thereto, the inductor 3 and the capacitor 4 may also be disposed on the main circuit board 11.

橋接電路板14,係自第一電晶體設置區R1 跨越訊號干擾區RI橋接至第二電晶體設置區R2。在本實施例中,橋接電路板14係利用複數個連接器15(在此僅標示其中一者示意)同時電性連接與連結主電路板11。 Bridge circuit board 14 from the first transistor setting area R1 The signal interference region RI is bridged to the second transistor setting region R2. In this embodiment, the bridge circuit board 14 is electrically connected and connected to the main circuit board 11 by using a plurality of connectors 15 (only one of which is indicated here).

在本實施例中,驅動訊號源2係鄰近第一電晶體12,因此,驅動訊號源2傳送第一驅動訊號S1至第一電晶體12,並不會經過訊號干擾區RI。而驅動訊號源2傳送第二驅動訊號S2至第二電晶體13時,就會經過訊號干擾區RI。因此,驅動訊號源2會藉由橋接電路板14傳送第二驅動訊號S2至第二電晶體13,藉以跨越訊號干擾區RI避免第二驅動訊號S2受到訊號干擾區RI的干擾。此外,橋接電路板14與位於主電路板11上的訊號干擾區RI之間,還有空氣作為阻隔層,相較於先前技術利用在電路板上繞開訊號干擾區PAIR的方式,可以更有效避免第二驅動訊號S2受到訊號干擾區RI的干擾。 In this embodiment, the driving signal source 2 is adjacent to the first transistor 12. Therefore, the driving signal source 2 transmits the first driving signal S1 to the first transistor 12 without passing through the signal interference region RI. When the driving signal source 2 transmits the second driving signal S2 to the second transistor 13, it will pass through the signal interference region RI. Therefore, the driving signal source 2 transmits the second driving signal S2 to the second transistor 13 through the bridge circuit board 14, thereby crossing the signal interference region RI to prevent the second driving signal S2 from being interfered by the signal interference region RI. In addition, the bridge circuit board 14 and the signal interference region RI located on the main circuit board 11 have air as a barrier layer, which is more effective than the previous method of bypassing the signal interference region PAIR on the circuit board. Avoid the second drive signal S2 from being interfered by the signal interference area RI.

傳送第二驅動訊號S2的電路改為設置於橋接電路板14上,可以清出主電路板11上的空間改配置其他電路,增加主電路板11上的空間利用率,也不需要增加主電路板11的面積體積進而提升空間佔用率。 The circuit transmitting the second driving signal S2 is set on the bridge circuit board 14 instead. The space on the main circuit board 11 can be cleared and other circuits can be reconfigured to increase the space utilization rate on the main circuit board 11 without increasing the main circuit. The area volume of the plate 11 further improves the space occupation rate.

接著,請一併參閱第四圖至第六圖,其中,第五圖係顯示本發明第二實施例所提供之切換式電源供應器之電路示意圖;以及,第六圖係顯示本發明第二實施例所提供之切換式電源供應器之立體示意圖。如圖所示,一種切換式電源供應器100a大部分與切換式電源供應器100相同,差別僅在於半橋電路組件1a。另外,相同部份的電感3、電容4與電路板6在本實施例中省略, 可參閱第四圖。 Next, please refer to FIGS. 4 to 6 together, where the fifth diagram is a schematic circuit diagram of the switching power supply provided by the second embodiment of the present invention; and the sixth diagram is the second diagram of the present invention. The three-dimensional schematic diagram of the switching power supply provided in the embodiment. As shown in the figure, a switching power supply 100a is mostly the same as the switching power supply 100, with the difference only in the half-bridge circuit component 1a. In addition, the same parts of the inductor 3, the capacitor 4, and the circuit board 6 are omitted in this embodiment. See the fourth figure.

半橋電路組件1a包含與第一實施例相同的主電路板11、第一電晶體12、第二電晶體13、橋接電路板14,以及一第三電晶體16與一第四電晶體17。第三電晶體16與第四電晶體17同樣為MOSFET,因此各自具有一源極(S16、S17)、一汲極(D16、D17)與一閘極(G16、G17)。第三電晶體16與第四電晶體17也可為BJT、IGBT等電晶體。 The half-bridge circuit assembly 1 a includes a main circuit board 11, a first transistor 12, a second transistor 13, a bridge circuit board 14, and a third transistor 16 and a fourth transistor 17 which are the same as those in the first embodiment. The third transistor 16 and the fourth transistor 17 are also MOSFETs, and therefore each has a source (S16, S17), a drain (D16, D17), and a gate (G16, G17). The third transistor 16 and the fourth transistor 17 may be transistors such as BJT and IGBT.

第三電晶體16的源極S16係電性串接第一電晶體12的汲極D12,第四電晶體17的汲極D17係電性串接第二電晶體13的源極S13。第三電晶體16的閘極G16係與第一電晶體12一同接收第一驅動訊號S1,第四電晶體17的閘極G17係與第二電晶體13一同接收第二驅動訊號S2。因此,第三電晶體16與第一電晶體12會一同導通或一同斷開,不會產生如第一電晶體12與第二電晶體13相對的導通斷開切換關係,故第三電晶體16與第一電晶體12之間不會產生訊號干擾區。同理,第四電晶體17與第二電晶體13的關係亦同。 The source S16 of the third transistor 16 is electrically connected in series with the drain D12 of the first transistor 12, and the drain D17 of the fourth transistor 17 is electrically connected in series with the source S13 of the second transistor 13. The gate G16 of the third transistor 16 receives the first driving signal S1 together with the first transistor 12, and the gate G17 of the fourth transistor 17 receives the second driving signal S2 together with the second transistor 13. Therefore, the third transistor 16 and the first transistor 12 are turned on or disconnected together, and there is no switching relationship between the first transistor 12 and the second transistor 13 on and off, so the third transistor 16 There will be no signal interference area with the first transistor 12. Similarly, the relationship between the fourth transistor 17 and the second transistor 13 is the same.

第一電晶體12與第二電晶體13電性連接仍會形成節點N,節點N與經過節點N的佈線,在此僅顯示出佈線L1a,仍會形成訊號干擾源,進而向外擴充產生訊號干擾區RIa,因為與第一實施例相同,故不多加贅述。而橋接電路板14仍會跨越訊號干擾區RIa。 The first transistor 12 and the second transistor 13 are electrically connected to form a node N. The node N and the wiring passing through the node N are shown here. Only the wiring L1a is shown, and a signal interference source will still be formed. Since the interference region RIa is the same as the first embodiment, it will not be described in detail. The bridge circuit board 14 still crosses the signal interference area RRa.

在本實施例中,因為電晶體的數量相較於第一實施例增多,故電晶體個別的耐壓要求可以降低。 舉例來說,輸入電壓源5為1000V,在第一實施例中,第一電晶體12導通且第二電晶體13斷開的情況下,第一電晶體12的跨壓為1000V;而在第一電晶體12斷開且第二電晶體13導通的情況下,第二電晶體13的跨壓為1000V。 In this embodiment, because the number of transistors is increased compared to the first embodiment, the individual withstand voltage requirements of the transistors can be reduced. For example, the input voltage source 5 is 1000V. In the first embodiment, when the first transistor 12 is on and the second transistor 13 is off, the voltage across the first transistor 12 is 1000V; When one transistor 12 is turned off and the second transistor 13 is turned on, the voltage across the second transistor 13 is 1000V.

而在本實施例中,第一電晶體12與第三電晶體16導通且第二電晶體13與第四電晶體17斷開的情況下,第一電晶體12與第三電晶體16各自的跨壓降為500V;第一電晶體12與第三電晶體16斷開且第二電晶體13與第四電晶體17導通的情況下,第二電晶體13與第四電晶體17各自的跨壓降為500V。第三電晶體16與第四電晶體17的數量越多,各自的跨壓也會下降越多,對電晶體個別的耐壓要求也就隨之降低。 In this embodiment, when the first transistor 12 and the third transistor 16 are turned on and the second transistor 13 and the fourth transistor 17 are turned off, each of the first transistor 12 and the third transistor 16 is The voltage drop across is 500V; when the first transistor 12 and the third transistor 16 are disconnected and the second transistor 13 and the fourth transistor 17 are on, the respective voltages of the second transistor 13 and the fourth transistor 17 are different. The voltage drop is 500V. The greater the number of the third transistor 16 and the fourth transistor 17, the more the respective trans-voltage will decrease, and the individual withstand voltage requirements of the transistor will be reduced accordingly.

在本發明其他實施例中,第三電晶體與第四電晶體的數量可各自為複數個,而電性串接方式為:最接近第一電晶體(第二電晶體)的第三電晶體(第四電晶體),係利用第三電晶體(第四電晶體)的源極電性串接第一電晶體(第二電晶體)的汲極,其餘彼此相鄰的第三電晶體(第四電晶體),係利用源極電性串接相鄰者的汲極。而輸入電壓源係電性連接最接近的第三電晶體的汲極與最接近的第四電晶體的源極。而所有第三電晶體(第四電晶體)都是接收與第一電晶體(第二電晶體)相同的第一驅動訊號(第二驅動訊號)。 In other embodiments of the present invention, the number of the third transistor and the fourth transistor may be plural, and the electrical series connection method is: a third transistor closest to the first transistor (second transistor) (Fourth transistor): The source of the third transistor (fourth transistor) is electrically connected in series with the drain of the first transistor (second transistor), and the rest of the third transistors adjacent to each other ( The fourth transistor) is a drain electrode that is electrically connected in series with a neighboring electrode. The input voltage source is electrically connected to the drain of the third transistor closest to the source of the fourth transistor. All third transistors (fourth transistors) receive the same first driving signal (second driving signal) as the first transistor (second transistor).

最後,請一併參閱第三圖、第四圖、第七圖與第八圖,其中,第七圖係顯示本發明第三實施例所提供之切換式電源供應器之立體示意圖;以及,第八圖 係顯示本發明第三實施例所提供之切換式電源供應器之另一視角之立體示意圖。如圖所示,一種切換式電源供應器100b,包含複數個半橋電路組件1、1b、1c、1d、1e與1f、電壓連結端H2b、H3b、電感連結端H1b與驅動訊號連接器7。 Finally, please refer to the third, fourth, seventh, and eighth drawings together, where the seventh drawing is a three-dimensional schematic diagram of the switching power supply provided by the third embodiment of the present invention; and, Eight Figures It is a schematic perspective view showing another perspective of the switching power supply provided by the third embodiment of the present invention. As shown in the figure, a switching power supply 100b includes a plurality of half-bridge circuit components 1, 1b, 1c, 1d, 1e, and 1f, voltage connection terminals H2b, H3b, inductance connection terminals H1b, and a drive signal connector 7.

半橋電路組件1與第一實施例相同,包含主電路板11、第一電晶體12、第二電晶體13與橋接電路板14(皆標示於第三圖)。半橋電路組件1b、1c、1d、1e、1f大致與半橋電路組件1相同,包含第一電晶體12b、12c、12d、12e、12f、第二電晶體13b、13c、13d、13e、13f與橋接電路板14b、14c、14d、14e、14f,只是皆與半橋電路組件1共用主電路板11。 The half-bridge circuit assembly 1 is the same as the first embodiment, and includes a main circuit board 11, a first transistor 12, a second transistor 13, and a bridge circuit board 14 (all labeled in the third figure). The half-bridge circuit components 1b, 1c, 1d, 1e, and 1f are substantially the same as the half-bridge circuit component 1 and include a first transistor 12b, 12c, 12d, 12e, 12f, and a second transistor 13b, 13c, 13d, 13e, 13f. The main circuit board 11 is shared with the half-bridge circuit assembly 1 with the bridge circuit boards 14 b, 14 c, 14 d, 14 e, and 14 f.

電壓連結端H2b與H3b、電感連結端H1b係與第一實施例中之電壓連結端H2與H3、電感連結端H1相同,仍會電性連接輸入電壓源、電容與電感,故不多加贅述,但是圖式並未繪示出輸入電壓源、電容與電感。驅動訊號連接器7係電性連接驅動訊號器(如驅動訊號源2),用以接收與傳送第一驅動訊號S1與第二驅動訊號S2。 The voltage connection terminals H2b and H3b and the inductance connection terminal H1b are the same as the voltage connection terminals H2 and H3 and the inductance connection terminal H1 in the first embodiment, and they will still be electrically connected to the input voltage source, capacitance and inductance, so I will not go into details. However, the figure does not show the input voltage source, capacitor, and inductor. The driving signal connector 7 is electrically connected to the driving signal device (such as the driving signal source 2) for receiving and transmitting the first driving signal S1 and the second driving signal S2.

切換式電源供應器大部分都包含複數組彼此電性串接的第一電晶體與第二電晶體,而一組彼此電性串接的第一電晶體與第二電晶體,就會形成一個節點與一訊號干擾區,其中,訊號干擾區係以節點與經過節點的佈線為基礎而向外擴充所定義的。複數組就會形成複數個節點與複數個訊號干擾區。 Most of the switching power supplies include a first transistor and a second transistor which are electrically connected in series to each other in a complex array, and a group of the first transistor and the second transistor which are electrically connected in series to each other will form one The node and a signal interference area, wherein the signal interference area is defined based on the node and the wiring passing through the node and is expanded outward. The complex array will form a plurality of nodes and a plurality of signal interference areas.

如第七圖與第八圖所示,半橋電路組件1、1b、1c、1d、1e與1f就會有六組對接的第一電晶體與第二電晶體,就會形成六個節點(如第三圖與第四圖中之節點N),並隨之形成六個訊號干擾區(如第四圖中之訊號干擾區RI)。若按照先前技術的解決辦法,當訊號干擾區越多時,佈線就要繞更遠,電路板上的使用率就會更低,或是電路板的面積體積就會增加更多。 As shown in the seventh and eighth figures, the half-bridge circuit components 1, 1b, 1c, 1d, 1e, and 1f will have six sets of the first transistor and the second transistor connected, and six nodes will be formed ( As shown in the third and fourth nodes (N), six signal interference regions (such as the signal interference region RI in the fourth graph) are formed. If the solution according to the prior art is adopted, when the signal interference area is more, the wiring will be routed further, the utilization rate of the circuit board will be lower, or the area and volume of the circuit board will increase more.

而在本實施例中,每組半橋電路組件各自利用其橋接電路板14b、14c、14d、14e、14f跨過訊號干擾區(如第四圖中之訊號干擾區RI),不僅可以增加主電路板11的使用密度,更可以利用橋接電路板與主電路板11之間的空氣作為阻隔層,避免第二驅動訊號受到訊號干擾區的干擾,以解決先前技術中形成訊號干擾區所衍生出的種種問題。 In this embodiment, each group of half-bridge circuit components respectively uses their bridge circuit boards 14b, 14c, 14d, 14e, 14f to cross the signal interference area (such as the signal interference area RI in the fourth figure), which can not only increase the main The use density of the circuit board 11 can also use the air between the bridge circuit board and the main circuit board 11 as a barrier layer to prevent the second driving signal from being interfered by the signal interference area, so as to solve the problem caused by the formation of the signal interference area in the prior art. Problems.

在本實施例中,第一電晶體12、12b、12c、12d、12e、12f係設置於鄰近驅動訊號連接器7之同一側,第二電晶體13、13b、13c、13d、13e、13f係相對於第一電晶體12、12b、12c、12d、12e、12f,而設置於遠離驅動訊號連接器7之另一側,但不以此為限。 In this embodiment, the first transistors 12, 12b, 12c, 12d, 12e, and 12f are disposed on the same side adjacent to the driving signal connector 7, and the second transistors 13, 13b, 13c, 13d, 13e, and 13f are Relative to the first transistors 12, 12b, 12c, 12d, 12e, and 12f, it is disposed on the other side far from the driving signal connector 7, but it is not limited thereto.

第一電晶體與第二電晶體也可交錯地排列。以本實施例中的元件符號舉例說明,第一電晶體12、12c、12e與第二電晶體13b、13d、13f係設置於鄰近驅動訊號連接器7之同一側,且依序排列為第一電晶體12、第二電晶體13b、第一電晶體12c、第二電晶體13d、第一電晶體12e與第二電晶體13f;同理,遠離驅動訊號連接器7 之另一側依序排列為第二電晶體13、第一電晶體12b、第二電晶體13c、第一電晶體12d、第二電晶體13e與第一電晶體12f。 The first transistor and the second transistor may be arranged alternately. Taking the component symbols in this embodiment as an example, the first transistors 12, 12c, 12e and the second transistors 13b, 13d, 13f are disposed on the same side adjacent to the driving signal connector 7, and are sequentially arranged as the first Transistor 12, second transistor 13b, first transistor 12c, second transistor 13d, first transistor 12e and second transistor 13f; similarly, stay away from the drive signal connector 7 The other side is sequentially arranged as the second transistor 13, the first transistor 12b, the second transistor 13c, the first transistor 12d, the second transistor 13e, and the first transistor 12f.

一般來說,半橋式電路中的電晶體又可分為高側(High Side)電晶體與低側(Low Side)電晶體。在本實施例,第一電晶體12、12b、12c、12d、12e、12f為高側電晶體,第二電晶體13、13b、13c、13d、13e、13f為低側電晶體。因為高側電晶體與低側電晶體的功率損耗不同,故高側電晶體與低側電晶體所產生出的熱能也不同。而將各組半橋式電路中的高側電晶體與低側電晶體交錯地排列,不讓各組半橋式電路中的高側電晶體都位於同一側,可以有效分散半橋式電路所產生的熱能,避免因為高側電晶體都位於同一側,使得該側的溫度遠高於低側電晶體所位於的另一側。 Generally speaking, transistors in a half-bridge circuit can be divided into high-side transistors and low-side transistors. In this embodiment, the first transistors 12, 12b, 12c, 12d, 12e, and 12f are high-side transistors, and the second transistors 13, 13b, 13c, 13d, 13e, and 13f are low-side transistors. Because the power losses of the high-side transistor and the low-side transistor are different, the thermal energy generated by the high-side transistor and the low-side transistor are also different. The high-side transistors and the low-side transistors in each group of half-bridge circuits are staggered to prevent the high-side transistors in each group of half-bridge circuits from being located on the same side, which can effectively disperse the half-bridge circuits. The thermal energy generated is avoided because the high-side transistors are all on the same side, so that the temperature on this side is much higher than the other side on which the low-side transistors are located.

應注意的是,上述的第一電晶體12、12b、12c、12d、12e、12f與第二電晶體13、13b、13c、13d、13e、13f的排列僅為例示,並不以上述的排列為限。 It should be noted that the arrangement of the above-mentioned first transistors 12, 12b, 12c, 12d, 12e, 12f and the second transistors 13, 13b, 13c, 13d, 13e, 13f is only an example, and the above-mentioned arrangement is not used. Limited.

綜上所述,本發明所提供之切換式電源供應器,利用半橋電路組件中之橋接電路板跨越訊號干擾區,同時利用橋接電路板與主電路板之間的空氣作為阻隔,避免驅動訊號受到訊號干擾區的干擾,以解決先前技術中訊號干擾區所衍生出的種種問題;此外,本發明之半橋電路組件並不限於應用在切換式電源供應器中,凡是有使用到本發明之半橋電路組件皆屬於本發明保護之範疇。 In summary, the switchable power supply provided by the present invention uses the bridge circuit board in the half-bridge circuit assembly to cross the signal interference area, and uses the air between the bridge circuit board and the main circuit board as a barrier to avoid driving signals. It is interfered by the signal interference area to solve various problems arising from the signal interference area in the prior art. In addition, the half-bridge circuit component of the present invention is not limited to being used in a switching power supply. The half-bridge circuit components all belong to the protection scope of the present invention.

藉由以上較佳具體實施例之詳述,係希望能更加清楚描述本發明之特徵與精神,而並非以上述所揭露的較佳具體實施例來對本發明之範疇加以限制。相反地,其目的是希望能涵蓋各種改變及具相等性的安排於本發明所欲申請之專利範圍的範疇內。 With the above detailed description of the preferred embodiments, it is hoped that the features and spirit of the present invention can be more clearly described, and the scope of the present invention is not limited by the preferred embodiments disclosed above. On the contrary, the intention is to cover various changes and equivalent arrangements within the scope of the patents to be applied for in the present invention.

Claims (10)

一種半橋電路組件,用以接收一第一驅動訊號及與該第一驅動訊號反相的一第二驅動訊號,該半橋電路包含:一主電路板,係具有一第一電晶體設置區與一第二電晶體設置區;一第一電晶體,係設置於該第一電晶體設置區;一第二電晶體,係設置於該第二電晶體設置區,並電性串接該第一電晶體,該第一電晶體與該第二電晶體之間係具有一節點,且以該節點與至少一連接該節點之佈線為基礎而向外擴充定義出一訊號干擾區;以及一橋接電路板,係自該第一電晶體設置區跨越該訊號干擾區橋接至該第二電晶體設置區,其中該第一電晶體的一控制端係接收該第一驅動訊號,該第二電晶體的一控制端係透過該橋接電路板接收該第二驅動訊號。A half-bridge circuit component is used for receiving a first driving signal and a second driving signal opposite to the first driving signal. The half-bridge circuit includes a main circuit board and a first transistor setting area. And a second transistor setting area; a first transistor being set in the first transistor setting area; a second transistor being set in the second transistor setting area and electrically connected in series with the first transistor A transistor having a node between the first transistor and the second transistor, and extending outwardly to define a signal interference region based on the node and at least one wiring connecting the node; and a bridge The circuit board is bridged from the first transistor setting area to the second transistor setting area across the signal interference area, wherein a control terminal of the first transistor receives the first driving signal and the second transistor A control terminal receives the second driving signal through the bridge circuit board. 如申請專利範圍第1項所述之半橋電路組件,其中該第一電晶體之一源極(Source)係與該第二電晶體之一汲極(Drain)電性連接並形成該節點。The half-bridge circuit component according to item 1 of the scope of the patent application, wherein a source of the first transistor is electrically connected to a drain of the second transistor to form the node. 如申請專利範圍第1項所述之半橋電路組件,更包含一連接器,且該連接器係電性連接該主電路板與該橋接電路板。The half-bridge circuit component described in item 1 of the scope of the patent application further includes a connector, and the connector is electrically connected to the main circuit board and the bridge circuit board. 如申請專利範圍第1項所述之半橋電路組件,更包含一第三電晶體,該第三電晶體係設置於該第一電晶體設置區,並電性串接該第一電晶體,且該第三電晶體的一控制端係接收該第一驅動訊號。The half-bridge circuit component described in item 1 of the scope of patent application, further includes a third transistor, the third transistor system is disposed in the first transistor installation area, and the first transistor is electrically connected in series, A control terminal of the third transistor receives the first driving signal. 如申請專利範圍第1項所述之半橋電路組件,更包含一第四電晶體,該第四電晶體係設置於該第二電晶體設置區,並電性串接該第二電晶體,且該第四電晶體的一控制端係透過該橋接電路板接收該第二驅動訊號。The half-bridge circuit component described in item 1 of the scope of the patent application further includes a fourth transistor, the fourth transistor system is disposed in the second transistor installation area, and the second transistor is electrically connected in series. A control terminal of the fourth transistor receives the second driving signal through the bridge circuit board. 如申請專利範圍第1項所述之半橋電路組件,更包含彼此電性串接的複數個第三電晶體,該些第三電晶體係設置於該第一電晶體設置區,該些第三電晶體中最靠近該第一電晶體的一者之一源極係與該第一電晶體之一汲極電性連接,且該些第三電晶體的複數控制端係接收該第一驅動訊號。The half-bridge circuit component described in item 1 of the scope of the patent application, further includes a plurality of third transistors electrically connected in series with each other. The third transistor systems are disposed in the first transistor installation area. A source of one of the three transistors closest to the first transistor is electrically connected to a drain of the first transistor, and a plurality of control terminals of the third transistors receive the first driver. Signal. 如申請專利範圍第1項所述之半橋電路組件,更包含彼此電性串接的複數個第四電晶體,該些第四電晶體係設置於該第二電晶體設置區,該些第四電晶體中最靠近該第二電晶體的一者之一汲極係與該第二電晶體之一源極電性連接,且該些第四電晶體的複數控制端係透過該橋接電路板接收該第二驅動訊號。The half-bridge circuit component described in item 1 of the scope of the patent application further includes a plurality of fourth transistors electrically connected in series with each other. The fourth transistor systems are disposed in the second transistor installation area. One of the four transistors closest to the second transistor has a drain connected electrically to a source of the second transistor, and a plurality of control terminals of the fourth transistors pass through the bridge circuit board. Receiving the second driving signal. 一種切換式電源供應器,包含:至少一半橋電路組件,每一該至少一半橋電路組件包含:一主電路板,係具有一第一電晶體設置區與一第二電晶體設置區;一第一電晶體,係設置於該第一電晶體設置區;一第二電晶體,係設置於該第二電晶體設置區,並電性串接該第一電晶體,該第一電晶體與該第二電晶體之間係具有一節點,且以該節點與至少一連接該節點之佈線為基礎而向外擴充定義出一訊號干擾區;以及一橋接電路板,係自該第一電晶體設置區跨越該訊號干擾區橋接至該第二電晶體設置區;以及一驅動訊號源,係鄰設於該至少一半橋電路組件,且該第一電晶體的一控制端自該驅動訊號源接收一第一驅動訊號,該第二電晶體的一控制端透過該橋接電路板而自該驅動訊號源接收與該第一驅動訊號反相的一第二驅動訊號。A switching power supply includes at least half of a bridge circuit component, and each of the at least half of the bridge circuit component includes: a main circuit board having a first transistor setting area and a second transistor setting area; a first A transistor is disposed in the first transistor setting area; a second transistor is disposed in the second transistor setting area, and the first transistor is electrically connected in series, and the first transistor is connected to the first transistor There is a node between the second transistors, and a signal interference area is defined based on the node and at least one wiring connected to the node, and a bridge circuit board is provided from the first transistor. And a driving signal source is adjacent to the at least half of the bridge circuit component, and a control terminal of the first transistor receives a signal from the driving signal source. A first driving signal, and a control terminal of the second transistor receives a second driving signal from the driving signal source which is opposite to the first driving signal through the bridge circuit board. 如申請專利範圍第8項所述之切換式電源供應器,其中該第一電晶體之一源極(Source)係與該第二電晶體之一汲極(Drain)電性連接並形成該節點。The switching power supply according to item 8 of the scope of patent application, wherein a source of the first transistor is electrically connected to a drain of the second transistor and forms the node. . 如申請專利範圍第8項所述之切換式電源供應器,更包含一連接器,且該連接器係電性連接該主電路板與該橋接電路板。The switching power supply as described in item 8 of the scope of patent application, further includes a connector, and the connector is electrically connected to the main circuit board and the bridge circuit board.
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TW200950613A (en) * 2008-05-26 2009-12-01 Inventec Corp Signal connecting component
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