TWI672826B - Light-emitting device - Google Patents

Abstract

a light emitting device includes a first semiconductor layer; a plurality of semiconductor pillars are separated from each other and located on the first semiconductor layer, the plurality of semiconductor pillars each include a second semiconductor layer and an active layer; and a first electrode covers the plurality of semiconductor pillars a portion; and a second electrode covering another portion of the plurality of semiconductor pillars, wherein the plurality of semiconductor pillars under the coverage area of one of the first electrodes comprise a first pitch to be separated from each other, and are disposed on the first electrode The plurality of semiconductor pillars outside the region include a second pitch to be separated from each other, and the first pitch is greater than the second pitch.

Description

Light-emitting element

The present invention relates to a light-emitting element, and more particularly to a light-emitting element that emits ultraviolet light, comprising a first semiconductor layer and a plurality of semiconductor pillars on the first semiconductor layer.

Light-Emitting Diode (LED) is a solid-state semiconductor light-emitting device, which has the advantages of low power consumption, low heat energy, long working life, shock resistance, small volume, fast response speed and good photoelectric characteristics, for example Stable light emission wavelength. Therefore, the light-emitting diodes are widely used in household appliances, equipment indicator lights, and optoelectronic products.

a light emitting device includes a first semiconductor layer; a plurality of semiconductor pillars are separated from each other and located on the first semiconductor layer, the plurality of semiconductor pillars each include a second semiconductor layer and an active layer; and a first electrode covers the plurality of semiconductor pillars a portion; and a second electrode covering another portion of the plurality of semiconductor pillars, wherein the plurality of semiconductor pillars under the coverage area of one of the first electrodes comprise a first pitch to be separated from each other, and are disposed on the first electrode The plurality of semiconductor pillars outside the region include a second pitch to be separated from each other, and the first pitch is greater than the second pitch.

a light emitting device includes a first semiconductor layer; a plurality of semiconductor pillars are separated from each other and located on the first semiconductor layer, the plurality of semiconductor pillars each include a second semiconductor layer and an active layer; and a first electrode covers the plurality of semiconductor pillars a portion; a second electrode covering another portion of the plurality of semiconductor pillars; and a semiconductor platform including the first semiconductor layer, the active layer, and/or the second semiconductor layer under the first electrode, wherein the first electrode is located A plurality of semiconductor pillars outside a coverage area include a pitch to be separated from each other, and the semiconductor platform includes a width greater than a distance between the plurality of semiconductor pillars.

A light-emitting element comprises a first semiconductor layer; a plurality of semiconductor columns are separated from each other and located on the first semiconductor layer, the plurality of semiconductor columns each comprise a second semiconductor layer and an active layer; and the first contact layer comprises a first contact And a first extension portion, the first contact portion includes an area larger than one of the plurality of semiconductor pillars, the first extension portion extends from the first contact portion and surrounds the plurality of semiconductor pillars; and the first electrode covers the plurality of semiconductor pillars a portion of the semiconductor pillar; and a second electrode covering another portion of the plurality of semiconductor pillars, wherein the first contact portion is located below the first electrode or the second electrode, and the first extension portion is located at the first electrode or the second electrode Below the electrode.

a light emitting device comprising a first semiconductor layer comprising a first upper surface; an active layer comprising a surface on the first semiconductor layer and exposing the first upper surface of the first semiconductor layer; and a second semiconductor layer on the active layer And exposing the surface of the active layer, wherein the light-emitting element emits a UV light.

In order to make the description of the present invention more detailed and complete, reference is made to the description of the following embodiments and the accompanying drawings. However, the examples shown below are intended to exemplify the light-emitting elements of the present invention, and the present invention is not limited to the following examples. Further, the dimensions, materials, shapes, relative arrangements, and the like of the components described in the present specification are not limited to the description, and the scope of the present invention is not limited thereto, and is merely illustrative. Further, the size, positional relationship, and the like of the members shown in the drawings may be exaggerated for clarity of explanation. Further, in the following description, in order to omit the detailed description, the same or similar members are denoted by the same names and symbols.

Fig. 1 is a top view of a light-emitting element 1 disclosed in an embodiment of the present invention. Fig. 2 is a cross-sectional view taken along line A-A' of Fig. 1.

As shown in FIGS. 1 and 2, a light-emitting element 1 includes a substrate 11; and a semiconductor stack is disposed on the substrate 11, wherein the semiconductor stack includes a first semiconductor layer 111, and the plurality of semiconductor pillars 12 are separated from each other. And located on the first semiconductor layer 111. The plurality of semiconductor pillars 12 each include a second semiconductor layer 122 and an active layer 123. In one embodiment of the present invention, the semiconductor pillar 12 further includes a portion of the first semiconductor layer 111, and the active layer 123 is located between the first semiconductor layer 111 and the second semiconductor layer 122.

In an embodiment of the invention, the substrate 11 is a growth substrate, including a gallium arsenide (GaAs) wafer for growing aluminum gallium indium phosphide (AlGaInP), or for growing gallium nitride (GaN), nitrogen. Indium gallium (InGaN) or aluminum gallium nitride (AlGaN) sapphire (Al ₂ O ₃ ) wafers, gallium nitride (GaN) wafers or tantalum carbide (SiC) wafers.

In one embodiment of the invention, by metalorganic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), hydride vapor deposition (HVPE), physical vapor deposition (PVD) or ions The electroplating method forms a plurality of layers of semiconductor material having a photoelectric property composed of a semiconductor material on the substrate 11, wherein the physical weather deposition method includes a sputtering method or an Evoaporation method. The semiconductor material layer is patterned by lithography and etching, and a portion of the semiconductor material layer is removed to form a plurality of semiconductor pillars 12 including the first semiconductor layer 111 and the active layer 123 and the second semiconductor layer 122. Semiconductor stack. The first semiconductor layer 111 and the second semiconductor layer 122 may be cladding layers, which have different conductivity types, electrical properties, polarities, or doped elements to provide electrons or holes, for example The first semiconductor layer 111 is an n-type semiconductor, and the second semiconductor layer 122 is a p-type semiconductor. The active layer 123 is formed between the first semiconductor layer 111 and the second semiconductor layer 122. The electrons and the holes are combined in the active layer 123 under a current drive to convert electrical energy into light energy to emit a light. The wavelength of the light emitted by the light-emitting element 1 is adjusted by changing the physical and chemical composition of one or more layers in the semiconductor stack. The material of the semiconductor stack comprises a III-V semiconductor material, such as Al _x In _y Ga _(1-xy) N or Al _x In _y Ga _(1-xy) P, where 0 ≦ x, y ≦ 1; (x+ y) ≦1. According to the material of the active layer 123, when the semiconductor laminate is AlInGaP series material, red light with a wavelength between 610 nm and 650 nm and green light with a wavelength between 530 nm and 570 nm can be emitted as a semiconductor. When the laminated material is InGaN series, it can emit blue light with wavelength between 450 nm and 490 nm, or when the semiconductor laminate is AlGaN series or AlInGaN series materials, it can emit wavelengths between 400 nm and 250 nm. Between the ultraviolet light. The active layer 123 may be a single heterostructure (SH), a double heterostructure (DH), a double-side double heterostructure (DDH), or a multi-quantum well structure. MQW). The material of the active layer 123 may be a neutral, p-type or n-type semiconductor.

In an embodiment of the invention, a buffer layer (not shown) is further formed between the semiconductor stack and the substrate 11 for improving the epitaxial quality of the semiconductor stack. In an embodiment, aluminum nitride (AlN) may be used as a buffer layer. In one embodiment, the way to form aluminum nitride (AlN) is PVD, the target of which is composed of aluminum nitride. In another embodiment, a target composed of aluminum in a PVD manner is used to react with an aluminum target to form aluminum nitride in a nitrogen source environment.

In an embodiment of the invention, the substrate 11 comprises a sapphire (Al ₂ O ₃ ) substrate, and the first semiconductor layer 111 comprises an aluminum gallium nitride (AlGaN) layer. In order to reduce epitaxial defects caused by lattice difference between the aluminum gallium nitride layer and the sapphire substrate, aluminum nitride (AlN) is used as a buffer layer between the aluminum gallium nitride layer and the sapphire substrate, wherein nitriding The aluminum buffer layer comprises a thickness greater than 300 nm, preferably greater than 1000 nm, and more than 2500 nm to fill the epitaxial defects. The aluminum nitride buffer layer contains carbon (C), hydrogen (H), and/or oxygen (O) having a doping concentration lower than 2E+17. The aluminum nitride buffer layer contains a percentage of aluminum (Al) composition greater than a percentage of aluminum (Al) composition contained in the aluminum gallium nitride first semiconductor layer 111.

As shown in the upper view of FIG. 1 and the cross-sectional view taken along line A-A' of FIG. 2, after a plurality of semiconductor layers are formed on the substrate 11, patterning is performed by lithography and etching. The semiconductor layer removes a portion of the semiconductor layer to form a semiconductor structure including the first semiconductor layer 111 and a plurality of semiconductor pillars 12 separated from each other, wherein the plurality of semiconductor pillars 12 each include a second semiconductor layer 122 and an active layer 123.

In one embodiment of the invention, the plurality of semiconductor pillars 12 are separated from each other to expose the surface S1 of the first semiconductor layer 111. The substrate 11 includes a first sidewall 11s. The first semiconductor layer 111 includes a second sidewall 111s. Each of the plurality of semiconductor pillars 12 includes a third sidewall 12s. As shown in FIG. 2, the first sidewall 11s of the substrate 11 is flush with the second sidewall 111s of the first semiconductor layer 111, and the third sidewall 12s of the semiconductor pillar 12 has a slope with the surface S1 of the first semiconductor layer 111. Angle or right angle.

In an embodiment of the invention, the oblique angle between the third sidewall 12s of the semiconductor pillar 12 and the surface S1 of the first semiconductor layer 111 includes an angle between 10 degrees and 80 degrees, preferably less than 60 degrees. More preferably less than 40 degrees.

In an embodiment of the invention (not shown), the first sidewall 11s of the substrate 11 is spaced apart from the second sidewall 111s of the first semiconductor layer 111 to expose a surface S2 of the substrate 11. The second sidewall 111s of the first semiconductor layer 111 has an obtuse or straight angle between the surface S2 of the substrate 11.

In an embodiment of the present invention, the oblique angle between the second sidewall 111s of the first semiconductor layer 111 and the surface S2 of the substrate 11 includes an angle between 10 degrees and 80 degrees, preferably less than 60 degrees. More preferably less than 40 degrees. The surface S1 of the first semiconductor layer 111 and the surface S2 of the substrate 11 have a height greater than 4000 Å, preferably greater than 6000 Å, and more preferably greater than 8000 Å.

In an embodiment of the invention, the surface S2 of the substrate 11 is a flat surface, wherein the flat surface comprises a roughness mean square roughness (Rq) of less than 8 nm, preferably less than 5 nm, more preferably Less than 2 nm.

In an embodiment of the present invention, the surface S2 of the substrate 11 includes a patterned surface (not shown), wherein the patterned surface includes a plurality of recesses extending from the surface S2 of the substrate 11 to the inside of the substrate 11 or a plurality of The convex portion extends from the surface S2 of the substrate 11 toward the surface S1 of the first semiconductor layer 111. Viewed from the top view of the self-illuminating element 1, the plurality of recesses or protrusions each comprise a circle, an ellipse, a rectangle, a polygon, or any other shape. Viewed from the top view of the self-illuminating element 1, the plurality of recesses or the plurality of protrusions each include a bottom flush with the surface S2 of the substrate 11, and a top opposite the bottom, wherein the top portion may be a flat surface or a sharp point. The depth and height between the top and the bottom are between 0.1 μm and 2 μm, preferably between 0.2 μm and 0.9 μm, and more preferably between 0.5 μm and 0.7 μm. The bottom portion comprises a width or diameter of between 0.05 μm and 1 μm, preferably between 0.2 μm and 0.8 μm, more preferably between 0.3 μm and 0.5 μm.

In one embodiment of the present invention, the semiconductor pillars 12 each include a circular shape, an elliptical shape, a rectangular shape, a polygonal shape, or an arbitrary shape as viewed from above in the light-emitting element 1 shown in FIG. 1.

In an embodiment of the invention, reducing the diameter or width of the semiconductor pillar 12 reduces the forward voltage ( _Vf ) of the light-emitting element 1 and enhances the brightness of the light-emitting element 1. The semiconductor pillar 12 comprises a diameter or a width of more than 4 μm and/or less than 80 μm, preferably less than 50 μm, more preferably less than 20 μm, as viewed from above.

In one embodiment of the invention, the semiconductor pillars 12 can be arranged in a plurality of columns, and the semiconductor pillars 12 in any two adjacent columns or in each adjacent two columns can be aligned or offset from each other.

In one embodiment of the present invention, the semiconductor pillars 12 may be arranged in a first column and a second column, and the first shortest distance between the two adjacent semiconductor pillars 12 on the same column is located on the first column. The semiconductor pillar 12 includes a second shortest distance between its adjacent semiconductor pillars 12 on the second column, wherein the first shortest distance is greater than or less than the second shortest distance. When an external current is injected into the light-emitting element 1, the light field distribution of the light-emitting element 1 can be made uniform by the dispersed arrangement of the plurality of semiconductor pillars 12, and the forward voltage of the light-emitting element 1 can be lowered.

In one embodiment of the present invention, the plurality of semiconductor pillars 12 may be arranged in a first column, a second column and a third column, the semiconductor pillars 12 on the first column and the semiconductor pillars 12 on the second column. A first shortest distance is included between the semiconductor pillars 12 on the second column and the second shortest distance between the semiconductor pillars 12 on the third column, wherein the first shortest distance is less than the second shortest distance. When an external current is injected into the light-emitting element 1, the light field distribution of the light-emitting element 1 can be made uniform by the dispersed arrangement of the plurality of semiconductor pillars 12, and the forward voltage of the light-emitting element 1 can be lowered.

A first contact layer 131 is formed on the surface S1 of the first semiconductor layer 111 by physical vapor deposition or chemical vapor deposition. The material of the first contact layer 131 comprises a metal material such as chromium (Cr), titanium (Ti), tungsten (W), gold (Au), aluminum (Al), indium (In), tin (Sn), nickel (Ni). a metal such as platinum (Pt) or rhodium (Rh) or an alloy of the above materials.

In an embodiment of the invention, the light emitted by the light-emitting element 1 comprises a wavelength greater than 370 nm, and the material of the first contact layer 131 comprises a metal having high reflectivity, such as silver (Ag), aluminum (Al), platinum ( Pt) or 铑 (Rh). In order to increase the reflectivity of the first contact layer 131, the metal layer comprising silver (Ag), aluminum (Al), platinum (Pt) or rhodium (Rh) has a thickness greater than 400 angstroms, preferably greater than 800 angstroms, more preferably greater than 1200 angstroms.

In an embodiment of the invention, the light emitted by the light-emitting element 1 comprises a wavelength less than 370 nm, and the material of the first contact layer 131 does not contain silver (Ag).

In one embodiment of the present invention, one side of the first contact layer 131 in contact with the surface S1 of the first semiconductor layer 111 includes chromium (Cr) or titanium (Ti) to increase the first contact layer 131 and the first semiconductor. The bonding strength of the layer 111. In order to reduce light loss, the thickness of the chromium (Cr) or titanium (Ti) layer is less than 1000 angstroms, preferably less than 800 angstroms, more preferably less than 500 angstroms. Also, in order to maintain sufficient joint strength, the chromium (Cr) and/or titanium (Ti) layer comprises a thickness greater than 10 angstroms, preferably greater than 50 angstroms, and more preferably greater than 100 angstroms.

In an embodiment of the invention, the first semiconductor layer 111 comprises Al _x Ga _(1-x) N, wherein 0.3 < x < 0.8, preferably 0.35 < x < 0.7, more preferably 0.4 < x < 0.6. In order to make the first contact layer 131 form an ohmic contact with the surface S1 of the first semiconductor layer 111 and maintain sufficient bonding strength, the first contact layer 131 contains titanium (Ti) and aluminum (Al), wherein titanium (Ti) / aluminum ( Al) has a ratio between 0.1 and 0.2.

In one embodiment of the present invention, the first contact layer 131 includes a first contact portion P1 and a first extension portion E1. The first contact portion P1 includes a projected area on the first semiconductor layer 111, which is larger than a projected area of one of the plurality of semiconductor pillars 12 on the first semiconductor layer 111, wherein the projected area is perpendicular to the substrate 11 The projected area of one of the surfaces S2 in the normal direction. As shown in FIG. 1, the first extension E1 extends from the first contact portion P1 and surrounds the plurality of semiconductor pillars 12.

In one embodiment of the present invention, the first contact layer 131 includes a plurality of first contact portions P1 and a plurality of first extension portions E1, wherein the plurality of first extension portions E1 extend from the plurality of first contact portions P1 and The plurality of first contact portions P1 are connected to each other, and the plurality of first contact portions P1 are connected by a plurality of first extension portions E1.

As shown in FIG. 2, in an embodiment of the present invention, the first contact portion P1 of the first contact layer 131 includes a width greater than a width of the first extension portion E1.

A second contact layer 132 is formed on the second semiconductor layer 122 of the semiconductor pillar 12 by physical vapor deposition or chemical vapor deposition. The material of the second contact layer 132 comprises a metal material such as chromium (Cr), titanium (Ti), tungsten (W), gold (Au), aluminum (Al), indium (In), tin (Sn), nickel (Ni). a metal such as platinum (Pt) or rhodium (Rh) or an alloy of the above materials.

In an embodiment of the invention, the light emitted by the light-emitting element 1 comprises a wavelength greater than 370 nm, and the material of the second contact layer 132 comprises a metal having high reflectivity, such as silver (Ag), aluminum (Al), platinum ( Pt) or 铑 (Rh). In order to increase the reflectance of the second contact layer 132, the metal layer comprising silver (Ag), aluminum (Al), platinum (Pt) or rhodium (Rh) has a thickness greater than 400 angstroms, preferably greater than 800 angstroms, more preferably greater than 1200 angstroms.

In an embodiment of the invention, the light emitted by the light-emitting element 1 comprises a wavelength less than 370 nm, and the material of the second contact layer 132 does not contain silver (Ag).

In one embodiment of the invention, a plurality of second contact layers 132 are formed on the second semiconductor layer 122 of the plurality of semiconductor pillars 12, respectively, and the plurality of second contact layers 132 are separated from each other.

In an embodiment of the invention, the second semiconductor layer 122 comprises gallium nitride (GaN), aluminum gallium nitride (AlGaN) or boron nitride (BN), and the second semiconductor layer 122 comprises a doping element, for example Magnesium (Mg) to form a p-type semiconductor, wherein the doping element has a concentration greater than 9E+18, preferably greater than 4E+19, more preferably greater than 1E+20. The second contact layer 132 includes a transparent conductive material that is transparent to light emitted by the active layer 123 and that can form an ohmic contact with the second semiconductor layer 122. The transparent conductive material comprises a non-metallic material such as graphene, a metal or a metal oxide such as indium tin oxide (ITO), or indium zinc oxide (IZO). Since the second contact layer 132 is formed on substantially the entire surface of the second semiconductor layer 122 and is in contact with the second semiconductor layer 122, the current is uniformly diffused to the entirety of the second semiconductor layer 122 by the second contact layer 132.

In an embodiment of the invention, the second contact layer 132 comprises graphene, and the second contact layer 132 further comprises a thin metal layer or a thin metal oxide layer, such as nickel oxide (NiO) or cobalt oxide (Co ₃ ). O ₄ ) or copper oxide (Cu ₂ O) is located between the second semiconductor layer 122 and the graphene to form an ohmic contact with the second semiconductor layer 122. The thin metal layer or thin metal oxide layer comprises a thickness between 0.1 and 50 nm, preferably between 0.1 and 20 nm, more preferably between 0.1 and 10 nm.

In an embodiment of the invention, the thickness of the second contact layer 132 may range from 0.1 nm to 100 nm. If the thickness of the second contact layer 132 is less than 0.1 nm, the ohmic contact with the second semiconductor layer 122 cannot be effectively formed because the thickness is too thin. Further, if the thickness of the second contact layer 132 is larger than 100 nm, the thickness of the second contact layer 132 is too thick to partially absorb the light emitted from the active layer 123, resulting in a problem that the luminance of the light-emitting element 1 is reduced.

In an embodiment of the invention, the positions of the first contact layer 131 and the second contact layer 132 formed on the semiconductor stack are misplaced and do not overlap each other.

A first insulating layer 14 is deposited on the first contact layer 131 and the second contact layer 132 by physical vapor deposition or chemical vapor deposition. Forming a portion of the insulating material layer by lithography, etching to form a first insulating layer 14, and forming a first opening 1401 of the first insulating layer 14 on the first contact layer 131 to expose the first contact layer 131 and A second opening 1402 of the first insulating layer 14 is formed on the second contact layer 132 to expose the second contact layer 132.

In an embodiment of the invention, the first contact layer 131 includes a plurality of first contact portions P1 and a plurality of first extension portions E1. The first insulating layer 14 includes a plurality of first openings 1401 respectively located on the plurality of first contacts P1, wherein the plurality of first extensions E1 are covered by the first insulating layer 14.

In an embodiment of the invention, the first insulating layer 14 includes a plurality of second openings 1402 to be respectively located on the plurality of semiconductor pillars 12. In other words, the plurality of second openings 1402 comprise a number equal to the number of one of the plurality of semiconductor pillars 12.

In an embodiment of the invention, the plurality of second openings 1402 of the first insulating layer 14 comprise a number greater than the number of the plurality of first openings 1401.

In an embodiment of the invention, the second opening 1402 of the first insulating layer 14 includes a width smaller than a width of the first opening 1401.

In one embodiment of the present invention, the first insulating layer 14 covers the third sidewall 12s of the plurality of semiconductor pillars 12, covers the surface S1 of the first semiconductor layer 111, covers the second sidewall 111s of the first semiconductor layer 111, and / or cover the surface S2 of the substrate 11.

In an embodiment of the present invention, in addition to protecting the semiconductor structure, the first insulating layer 14 may be alternately stacked by forming two or more materials having different refractive indices to form a Bragg mirror (DBR) structure. Reflecting light of a specific wavelength. The first insulating layer 14 is formed of a non-conductive material, and includes an organic material such as Su8, benzocyclobutene (BCB), perfluorocyclobutane (PFCB), epoxy resin (Epoxy), and acrylic resin (Acrylic Resin). ), cycloolefin polymer (COC), polymethyl methacrylate (PMMA), polyethylene terephthalate (PET), polycarbonate (PC), polyetherimide (Polyetherimide) or fluorocarbon Fluorocarbon Polymer, or an inorganic material such as Silicone or Glass, or a dielectric material such as alumina (Al ₂ O ₃ ), tantalum nitride (SiN _x ), or antimony oxide ( SiO _x ), titanium oxide (TiO _x ) or magnesium fluoride (MgF _x ).

A first electrode contact layer 151 and a second electrode contact layer 152 are respectively formed in the first opening 1401 and the second opening 1402 of the first insulating layer 14 by physical vapor deposition or chemical vapor deposition. And extending over a part of the surface of the first insulating layer 14. The first electrode contact layer 151 is connected to the first contact portion P1 of the first contact layer 131 by the first opening 1401 of the first insulating layer 14. The second electrode contact layer 152 is connected to the plurality of second contact layers 132 by the second opening 1402 of the first insulating layer 14 .

In one embodiment of the present invention, the second electrode contact layer 152 covers a portion of the plurality of semiconductor pillars 12 and the first contact layer 131, wherein the second electrode contact layer 152 is in contact with the first layer by the first insulating layer 14. Layer 131 is electrically isolated.

In one embodiment of the present invention, the first contact layer 131 includes a first contact portion P1 having a width W1 greater than a width W2 of the semiconductor pillar 12, and a width W1 of the first contact portion P1 of the first contact layer 131 is greater than One of the electrode contact layers 151 has a width W3, and the width W3 of the first electrode contact layer 151 is larger than the width W2 of the semiconductor pillar 12.

In an embodiment of the invention, the first electrode contact layer 151 covers a portion of the first contact layer 131, and the second electrode contact layer 152 covers all of the second contact layer 132.

In an embodiment of the invention, the first electrode contact layer 151 covers a portion of the first contact layer 131, and the second electrode contact layer 152 covers a portion of the second contact layer 132.

In an embodiment of the invention, the first electrode contact layer 151 covers all of the first contact layer 131, and the second electrode contact layer 152 covers a portion of the second contact layer 132.

In an embodiment of the invention, the first electrode contact layer 151 and the second electrode contact layer 152 are separated from each other by a distance. On the upper view of the light-emitting element 1, the second electrode contact layer 152 surrounds a plurality of sidewalls of the first electrode contact layer 151.

In an embodiment of the present invention, the second electrode contact layer 152 includes an area larger than that of the first electrode contact layer 151 in the upper view of the light emitting element 1.

In an embodiment of the present invention, when an external current is injected into the light emitting element 1, current is conducted to the first semiconductor layer 111 and the second semiconductor layer 122 by the first electrode contact layer 151 and the second electrode contact layer 152.

As shown in FIG. 1, the first electrode contact layer 151 is adjacent to one side of the substrate 11, for example, to the left or right of the center line of the substrate 11.

In an embodiment of the invention, the material of the first electrode contact layer 151 and the second electrode contact layer 152 comprises a metal material such as chromium (Cr), titanium (Ti), tungsten (W), gold (Au), aluminum. A metal such as (Al), indium (In), tin (Sn), nickel (Ni), platinum (Pt), or rhodium (Rh) or an alloy of the above materials.

In an embodiment of the invention, the light emitted by the light-emitting element 1 comprises a wavelength less than 370 nm, and the material of the first electrode contact layer 151 and the second electrode contact layer 152 does not contain silver (Ag). The material of the first electrode contact layer 151 and the second electrode contact layer 152 contains a metal having high reflectance for ultraviolet light, such as aluminum (Al), platinum (Pt) or rhodium (Rh). In order to increase the reflectance of the first electrode contact layer 151 and the second electrode contact layer 152 with respect to ultraviolet light, the layer comprising aluminum (Al), platinum (Pt) or rhodium (Rh) comprises a thickness greater than 4000 angstroms, preferably greater than 8000. Preferably, it is greater than 10,000 angstroms.

In one embodiment of the present invention, one side of the first electrode contact layer 151 in contact with the first contact layer 131 includes chromium (Cr) or titanium (Ti) to increase the first electrode contact layer 151 and the first contact layer. The joint strength of 131. One side of the second electrode contact layer 152 in contact with the second contact layer 132 contains chromium (Cr) or titanium (Ti) to increase the bonding strength of the second electrode contact layer 152 and the second contact layer 132. In order to reduce the light loss caused by chromium (Cr) or titanium (Ti) to ultraviolet light, the layer comprising chromium (Cr) or titanium (Ti) has a thickness of less than 1000 angstroms, preferably less than 800 angstroms, more preferably less than 500 angstroms. Also, in order to maintain sufficient joint strength, the layer comprising chromium (Cr) and/or titanium (Ti) has a thickness greater than 10 angstroms, preferably greater than 50 angstroms, and more preferably greater than 100 angstroms.

A second insulating layer 16 is formed on the first electrode contact layer 151 and the second electrode contact layer 152 by physical vapor deposition or chemical vapor deposition. Then, the insulating material layer is patterned by lithography and etching to form the second insulating layer 16, and the first opening 1601 and the second opening 1602 of the second insulating layer 16 are formed to expose the first electrode contact layer 151 and the first Two electrode contact layer 152.

In one embodiment of the present invention, the second insulating layer 16 includes one or a plurality of first openings 1601 and one or more second openings 1602, wherein the number of the plurality of first openings 1601 and the plurality of second openings 1602 The numbers can be the same or different.

In one embodiment of the present invention, the plurality of first openings 1601 of the second insulating layer 16 are respectively located on the plurality of first electrode contact layers 151, wherein the number of the plurality of first openings 1601 and the plurality of first electrode contact layers The number of 151 is the same.

In the upper view of FIG. 1, the first opening 1601 and the second opening 1602 of the second insulating layer 16 are respectively located on two sides of the center line of the substrate 11. For example, the first opening 1601 of the second insulating layer 16 is located on the right side of the center line of the substrate 11, and the second opening 1602 of the second insulating layer 16 is located on the left side of the center line of the substrate 11.

In an embodiment of the invention, the first opening 1601 of the second insulating layer 16 includes a width smaller than a width of the first opening 1401 of the first insulating layer 14.

In one embodiment of the present invention, the first opening 1601 of the second insulating layer 16 overlaps with the first opening 1401 of the first insulating layer 14, and the first opening 1601 of the second insulating layer 16 and the first insulating layer The first opening 1401 of the 14 is located on the first contact layer 131.

In an embodiment of the invention, the second opening 1602 of the second insulating layer 16 and the second opening 1402 of the first insulating layer 14 are misaligned. Specifically, the second opening 1402 of the first insulating layer 14 is located on the second contact layer 132, and the second opening 1602 of the second insulating layer 16 is located on the first contact layer 131.

In an embodiment of the invention, when the second insulating layer 16 is a laminated structure, the laminated structure comprises two or more layers, and two materials having different refractive indexes are alternately stacked to form a Bragg mirror (DBR). a structure that selectively reflects light of a particular wavelength. The second insulating layer 16 is formed of a non-conductive material, and includes an organic material such as Su8, benzocyclobutene (BCB), perfluorocyclobutane (PFCB), epoxy resin (Epoxy), and acrylic resin (Acrylic Resin). ), cycloolefin polymer (COC), polymethyl methacrylate (PMMA), polyethylene terephthalate (PET), polycarbonate (PC), polyetherimide (Polyetherimide) or fluorocarbon Fluorocarbon Polymer, or an inorganic material such as Silicone or Glass, or a dielectric material such as alumina (Al ₂ O ₃ ), tantalum nitride (SiN _x ), or antimony oxide ( SiO _x ), titanium oxide (TiO _x ) or magnesium fluoride (MgF _x ).

A first electrode 171 and a second electrode 172 are formed on the second insulating layer 16 by electroplating, physical vapor deposition or chemical vapor deposition. In the upper view of FIG. 1, the first electrode 171 is adjacent to one side of the substrate 11, for example, to the right of the center line of the substrate 11, and the second electrode 172 is adjacent to the other side of the substrate 11, for example, to the left of the center line of the substrate 11. The first electrode 171 covers the first opening 1601 of the second insulating layer 16 to be in contact with the first electrode contact layer 151 and is electrically connected to the first semiconductor layer 111 through the first contact layer 131. The second electrode 172 covers the second opening 1602 of the second insulating layer 16 , contacts the second electrode contact layer 152 , and transmits the second contact layer 132 to form an electrical connection with the second semiconductor layer 122 .

In one embodiment of the present invention, the plurality of semiconductor pillars 12 located under the coverage area of the first electrode 171 include a first pitch D1 to be separated from each other, and the plurality of semiconductor pillars 12 outside the coverage area of the first electrode 171. A second spacing D2 is included to be separated from each other, and the first spacing D1 is greater than the second spacing D2.

In an embodiment of the invention, the light emitting element 1 further comprises a semiconductor platform. The semiconductor platform includes a first semiconductor layer, an active layer, and a second semiconductor layer, and is located under the first electrode 171, wherein the plurality of semiconductor pillars 12 outside the coverage area of the first electrode 171 include a second pitch D2 to be separated from each other. And the second semiconductor layer of the semiconductor platform includes a second pitch D2 having a width greater than a plurality of semiconductor pillars.

In one embodiment of the present invention, the first contact portion P1 of the first contact layer 131 is located below the first electrode 171 and/or the second electrode 172, and the first extension portion E1 of the first contact layer 131 is located at the first The electrode 171 and the second electrode 172 are below.

In an embodiment of the invention, the first electrode 171 comprises a size equal to or different from one of the second electrodes 172, and the size may be a width or an area.

In an embodiment of the present invention, the shape of the first electrode 171 is the same as or similar to the shape of the second electrode 172 in the upper view of the light-emitting element 1. For example, the shapes of the first electrode 171 and the second electrode 172 are rectangular. As shown in Figure 1.

In an embodiment of the invention, the material of the first electrode 171 and the second electrode 172 comprises a metal material, such as chromium (Cr), titanium (Ti), tungsten (W), aluminum (Al), indium (In), A metal such as tin (Sn), nickel (Ni), or platinum (Pt) or an alloy of the above materials. The first electrode 171 and the second electrode 172 may have a single layer or a stacked structure. When the first electrode 171 and the second electrode 172 are in a stacked structure, the first electrode 171 includes a first upper bonding pad and a first lower bonding pad, and the second electrode 172 includes a second upper bonding pad and a first electrode Two lower layer solder pads. The upper pad and the lower pad have different functions, respectively.

In one embodiment of the invention, the function of the upper pad is primarily for soldering and forming leads. By the upper pad, the light-emitting element 1 can be mounted on the package substrate in the form of a flip chip, using solder or by eutectic bonding such as AuSn material. The metal material of the upper pad includes a highly ductile material such as tin (Sn), nickel (Ni), cobalt (Co), iron (Fe), titanium (Ti), copper (Cu), gold (Au), tungsten. (W), zirconium (Zr), molybdenum (Mo), tantalum (Ta), aluminum (Al), silver (Ag), platinum (Pt), palladium (Pd), rhodium (Rh), rhodium (Ir), rhodium A metal such as (Ru) or bismuth (Os) or an alloy of the above materials. The upper pad may be a single layer or a laminated structure of the above materials. In an embodiment of the invention, the material of the upper pad comprises nickel (Ni) and/or gold (Au), and the upper pad is a single layer or a stacked structure.

In an embodiment of the present invention, the function of the underlying pad forms a stable interface with the first electrode contact layer 151 and the second electrode contact layer 152, for example, the first lower pad and the first electrode contact layer 151 are improved. The interface bonding strength or the interface bonding strength of the second lower pad and the second electrode contact layer 152 is increased. Another function of the underlying pad is to prevent tin (Sn) in the solder or AuSn eutectic from diffusing into the reflective structure, damaging the reflectivity of the reflective structure. Therefore, the underlying pad includes a metal material other than gold (Au) or copper (Cu), such as nickel (Ni), cobalt (Co), iron (Fe), titanium (Ti), tungsten (W), zirconium (Zr). , molybdenum (Mo), tantalum (Ta), aluminum (Al), silver (Ag), platinum (Pt), palladium (Pd), rhodium (Rh), iridium (Ir), ruthenium (Ru), osmium (Os) A metal or an alloy of the above materials. The underlying pads can be a single layer or a stacked structure of the above materials. In an embodiment of the invention, the underlying pad comprises a stacked structure of titanium (Ti) / aluminum (Al) or a laminated structure of chromium (Cr) / aluminum (Al).

In one embodiment of the invention, to prevent diffusion of tin (Sn) in the solder or AuSn eutectic into the reflective structure, the reflectivity of the reflective structure is destroyed. Therefore, one side of the first electrode contact layer 151 contacting the first electrode 171 includes a metal material selected from the group consisting of titanium (Ti) and platinum (Pt). The side of the second electrode contact layer 152 that is in contact with the second electrode 172 comprises a metal material selected from the group consisting of titanium (Ti) and platinum (Pt).

Fig. 3A is a partial cross-sectional view showing a light-emitting element 2A disclosed in an embodiment of the present invention. Fig. 3B is a partial top view of the light-emitting element 2A disclosed in an embodiment of the present invention. Since the light-emitting element 2A and the light-emitting element 1 have substantially the same structure, the light-emitting element 2A and the light-emitting element 1 have the same configuration, and the description thereof will be omitted as appropriate or will not be described again.

As shown in FIGS. 3A and 3B, the light-emitting element 2A is a structural change example of the semiconductor pillar 12 shown in the light-emitting element 1 of FIG. In one embodiment of the invention, the semiconductor stack includes a first semiconductor layer 221, an active layer 223, and a semiconductor pillar 22 on the active layer 223. The active layer 223 includes one or more well layers and one or more barrier layers alternately arranged with each other, wherein the well layer comprises Al _x Ga _1-x N and 0.2 < x < 0.4, and the barrier layer comprises Al _y Ga _{1- y} N and 0.4 < y < 0.7. The semiconductor pillar 12 shown in the light-emitting element 1 of Fig. 2 can be changed to the semiconductor pillars 22 shown in Figs. 3A and 3B, each of which includes a second semiconductor layer 222. In one embodiment of the invention, the semiconductor pillar 22 further includes a portion of the active layer 223, the active layer 223 is located between the first semiconductor layer 221 and the second semiconductor layer 222, and the active layer 223 emits a UV light.

In one embodiment of the present invention, the substrate 11 includes a first sidewall 11s, the first semiconductor layer 221 includes a second sidewall 221s, the second semiconductor layer 222 includes a third sidewall 222s, and the active layer 223 includes a sidewall 223s. As shown in FIG. 3A, the third sidewall 222s of the second semiconductor layer 222 is spaced apart from the sidewall 223s of the active layer 223 to expose the top surface S3 of the active layer 223, wherein the exposed surface S3 of the active layer 223 can be A well layer or a barrier layer, the well layer comprising Al _x Ga _1-x N and 0.2 < x < 0.4, and the barrier layer comprising Al _y Ga _1-y N and 0.4 < y < 0.7. The third sidewall 222s of the second semiconductor layer 222 has an obtuse or straight angle between the surface S3 of the active layer 223.

In an embodiment of the present invention, the second semiconductor layer 222 includes a circular shape, an elliptical shape, a rectangular shape, a polygonal shape, or an arbitrary shape, as viewed from the upper side of the light-emitting element 2A shown in FIG. 3B. The second semiconductor layer 222 is surrounded by the active layer 223, and a part of the surface S3 of the active layer 223 is exposed outside the coverage area of the second semiconductor layer 222. A portion of the surface S3 of the active layer 223 is not covered by the second semiconductor layer 222, wherein the exposed surface S3 of the active layer 223 may be a well layer or a barrier layer, and the well layer includes Al _x Ga _1-x N and 0.2< x < 0.4, and the barrier layer contains Al _y Ga _1-y N and 0.4 < y < 0.7.

In one embodiment of the present invention, the active layer 223 is surrounded by the first semiconductor layer 221, and a portion of the surface S1 of the first semiconductor layer 221 is exposed outside the coverage area of the active layer 223, wherein the first semiconductor layer 221 includes AlGaN. A portion of the surface S1 of the first semiconductor layer 221 is not covered by the active layer 223.

Fig. 4A is a partial cross-sectional view showing a light-emitting element 2B disclosed in an embodiment of the present invention. Fig. 4B is a partial top view of the light-emitting element 2B disclosed in an embodiment of the present invention. Since the light-emitting element 2B and the light-emitting element 1 have substantially the same structure, the light-emitting element 2B and the light-emitting element 1 have the same configuration, and the description thereof will be omitted as appropriate or will not be described again.

As shown in FIGS. 4A and 4B, the light-emitting element 2B is a structurally modified embodiment of the semiconductor pillar 12 shown in the light-emitting element 1 of FIG. In one embodiment of the invention, the semiconductor stack includes a first semiconductor layer 321, an active layer 323, and a plurality of semiconductor pillars 32 on the first semiconductor layer 321. The semiconductor pillars 32 each include a second semiconductor layer 322, and the active layer 323 emits a UV light.

In one embodiment of the invention, the semiconductor pillar 32 further includes a portion of the active layer 323. The active layer 323 is between the first semiconductor layer 321 and the second semiconductor layer 322, and the active layer 323 emits a UV light.

In an embodiment of the present invention, the second semiconductor layer 322 is circular, elliptical, rectangular, polygonal, or arbitrarily viewed from the top view of the light-emitting element 2B shown in FIG. 4B. The second semiconductor layer 322 is surrounded by the active layer 323, and a part of the surface S3 of the active layer 323 is exposed outside the coverage area of the second semiconductor layer 322. A portion of the surface S3 of the active layer 323 is not covered by the second semiconductor layer 322. The active layer 323 is surrounded by the first semiconductor layer 321 , and a part of the surface S1 of the first semiconductor layer 321 is exposed outside the coverage area of the active layer 323 , and a part of the surface S1 of the first semiconductor layer 321 is not affected by the active layer 323 . Covering, wherein the first semiconductor layer 221 comprises AlGaN.

Fig. 5 is a schematic view of a light-emitting device 3 according to an embodiment of the present invention. The light-emitting element 1, the light-emitting element 2A, or the light-emitting element 2B in the foregoing embodiment is mounted on the first spacer 511 and the second spacer 512 of the package substrate 51 in the form of flip chip. The first spacer 511 and the second spacer 512 are electrically insulated by an insulating portion 53 including an insulating material. The flip chip mounting is performed such that the side of the growth substrate facing the pad forming surface for forming the electrode faces upward, and the growth substrate side is the main light extraction surface. In order to increase the light extraction efficiency of the light-emitting device 3, a reflection structure 54 may be provided around the light-emitting element 1, the light-emitting element 2A, or the light-emitting element 2B.

Figure 6 is a schematic view of a light-emitting device 4 in accordance with an embodiment of the present invention. The light-emitting device 4 includes a lamp cover 602, a mirror 604, a light-emitting module 610, a lamp holder 612, a heat sink 614, a connecting portion 616, and an electrical connection member 618. The light-emitting module 610 includes a carrying portion 606, and a plurality of light-emitting units 608 are located on the carrying portion 606. The plurality of light-emitting units 608 can be the light-emitting element 1, the light-emitting element 2A, the light-emitting element 2B, or the light-emitting device in the foregoing embodiments. 3.

The examples of the invention are intended to be illustrative only and not to limit the scope of the invention. Any changes or modifications of the present invention to those skilled in the art will be made without departing from the spirit and scope of the invention.

1,2A, 2B‧‧‧Lighting elements

3,4‧‧‧Lighting device

11‧‧‧Substrate

111,221,321‧‧‧First semiconductor layer

122,222,322‧‧‧second semiconductor layer

123,223,323‧‧‧active layer

12,22,32‧‧‧Semiconductor column

S1‧‧‧ surface of the first semiconductor layer

S2‧‧‧ surface of the substrate

S3‧‧‧ Surface of the active layer

11s‧‧‧First side wall 11

111s, 221s‧‧‧ second side wall

131‧‧‧First contact layer

P1‧‧‧First Contact

14‧‧‧First insulation

1402‧‧‧Second opening of the first insulation layer

12s, 222s‧‧‧ third side wall

132‧‧‧Second contact layer

E1‧‧‧First Extension

1401‧‧‧The first opening of the first insulating layer

151‧‧‧First electrode contact layer

152‧‧‧Second electrode contact layer

16‧‧‧Second insulation

1601‧‧‧The first opening of the second insulation layer

1602‧‧‧Second opening of the second insulation layer

171‧‧‧First electrode

172‧‧‧second electrode

51‧‧‧Package substrate

511‧‧‧First gasket

512‧‧‧second gasket

53‧‧‧Insulation

54‧‧‧Reflective structure

602‧‧‧shade

604‧‧‧Mirror

606‧‧‧Loading Department

608‧‧‧Lighting unit

610‧‧‧Lighting Module

612‧‧‧ lamp holder

614‧‧‧ Heat sink

616‧‧‧Connecting Department

618‧‧‧Electrical connection elements

Fig. 1 is a top view of a light-emitting element 1 disclosed in an embodiment of the present invention.

Fig. 2 is a cross-sectional view showing a light-emitting element 1 disclosed in an embodiment of the present invention.

Fig. 3A is a partial cross-sectional view showing a light-emitting element 2A disclosed in an embodiment of the present invention.

Fig. 3B is a partial top view of the light-emitting element 2A disclosed in an embodiment of the present invention.

Fig. 4A is a partial cross-sectional view showing a light-emitting element 2B disclosed in an embodiment of the present invention.

Fig. 4B is a partial top view of the light-emitting element 2B disclosed in an embodiment of the present invention.

Fig. 5 is a schematic view of a light-emitting device 3 according to an embodiment of the present invention.

Figure 6 is a schematic view of a light-emitting device 4 in accordance with an embodiment of the present invention.

Claims (10)

a light-emitting element comprising: a first semiconductor layer; a plurality of semiconductor pillars separated from each other and located on the first semiconductor layer, the plurality of semiconductor pillars each comprising a second semiconductor layer and an active layer; a first contact layer Located on the first semiconductor layer; a second contact layer is disposed on the second semiconductor layer of each of the plurality of semiconductor pillars, wherein positions of the first contact layer and the second contact layer are misplaced, and the first a contact layer surrounding the second contact layer; a first electrode covering a portion of the plurality of semiconductor pillars; and a second electrode covering another portion of the plurality of semiconductor pillars, wherein one of the first electrodes is located The plurality of semiconductor pillars under the coverage area include a first pitch separated from each other, and the plurality of semiconductor pillars outside the coverage area of the first electrode include a second pitch to be separated from each other, and one of the first pitches The width is greater than one of the widths of the second spacing. a light-emitting element comprising: a first semiconductor layer; a plurality of semiconductor pillars separated from each other and located on the first semiconductor layer, the plurality of semiconductor pillars each comprising a second semiconductor layer and an active layer; a first electrode covering a portion of the plurality of semiconductor pillars; a second electrode covering another portion of the plurality of semiconductor pillars; and a semiconductor platform including the first semiconductor layer and the second semiconductor layer under the first electrode, wherein The plurality of semiconductor pillars located outside of the coverage area of the first electrode comprise a pitch spaced apart from each other, the semiconductor platform comprising a width greater than a width of the pitch. A light-emitting element comprising: a first semiconductor layer; a plurality of semiconductor pillars are separated from each other and located on the first semiconductor layer, the plurality of semiconductor pillars comprise a second semiconductor layer and an active layer; a first contact layer is located on the first semiconductor layer a first contact portion and a first extension portion, the first contact portion includes an area larger than one of the plurality of semiconductor pillars, the first extension portion surrounding the plurality of semiconductor pillars; a second a contact layer is disposed on the second semiconductor layer of each of the plurality of semiconductor pillars; a first electrode covers a portion of the plurality of semiconductor pillars; and a second electrode covers another portion of the plurality of semiconductor pillars, wherein The first contact portion is located below the first electrode or the second electrode. The illuminating device of claim 1, wherein the second semiconductor layer of each of the plurality of semiconductor pillars comprises a third sidewall and the active layer of each of the plurality of semiconductor pillars. One of the side walls is spaced apart to expose a surface of the active layer, wherein the light emitting element emits a UV light. The illuminating device of claim 2, further comprising a first contact layer on the first semiconductor layer and a second contact layer on the second semiconductor layer of each of the plurality of semiconductor pillars, wherein The positions of the first contact layer and the second contact layer are misaligned, and the first contact layer surrounds the second contact layer. The illuminating element of claim 1, wherein the first opening of one of the first insulating layer and the first opening of the second insulating layer are located at the first contact layer. Upper one A second opening of one of the first insulating layers is located on the second contact layer, and a second opening of one of the second insulating layers is located on the first contact layer. The illuminating device of claim 1, wherein the first electrode contact layer is located between the first contact layer and the first electrode, and the second electrode contact layer is located. Between the second contact layer and the second electrode, wherein the first electrode contact layer is surrounded by the second electrode contact layer. The illuminating element of claim 7, wherein the first electrode contact layer covers a portion of the first contact layer, and the second electrode contact layer covers all of the second contact layer. The light-emitting element of claim 1, wherein the first contact layer comprises a width greater than a width of the semiconductor pillar. The light-emitting element of claim 1, wherein the first electrode contact layer comprises a width greater than a width of the semiconductor pillar.