TWI670472B - Zero-crossing detection circuit and sensing device - Google Patents

Abstract

The present invention provides a zero-crossing detection circuit that can detect zero-crossing with high precision without being affected by noise. The present invention includes a first comparison circuit, a second comparison circuit having a hysteresis function, and a logic circuit, and is configured to include a unit in which the first comparison circuit outputs zeros of the first input signal and the second input signal. The second comparison circuit outputs a comparison result between the first input signal and the second input signal, and the logic circuit determines whether to reflect the zero-crossing detection result to the output based on the zero-crossing detection result and the comparison result.

Description

Zero-crossing detection circuit and sensing device

The present invention relates to a zero-cross detection circuit and a sensing device, and more particularly to a zero-crossing detection circuit that can accurately detect a zero-crossing point based on a signal from a sensing element.

Conventionally, various sensing devices are loaded on an electronic device and are effectively utilized. As an example, an example in which a magnetic force sensing device is used to detect the position of a movable member of a brushless motor can be cited. The brushless motor includes a cylindrical stator and a cylindrical rotor that is disposed to face each other on the inner circumference or the outer circumference of the stator. The rotor freely rotates relative to the stator about the rotation axis. A magnet for excitation is disposed in the rotor in the circumferential direction, and a coil is wound around the stator core of the stator, and an interaction between a magnetic field generated by a current flowing to the coil and a magnetic field formed by the magnet for excitation is used. The rotor rotates.

In order to control the rotation of the rotor, it is necessary to detect the rotational position of the rotor. As a means of position detection, a magnetic sensing element is generally used. The position at which the S pole and the N pole of the magnet are switched, that is, the position where the zero crosses, is detected by the magnetic sensing element, thereby detecting the rotational position of the rotor. In the zero-crossing detection, various methods for making hysteresis characteristics have been studied in order to prevent chattering in the vicinity of zero-crossing. However, due to the hysteresis, the original zero-crossing position and the zero-crossing detection position detected by the sensing signal are deviated. Problems such as reduced efficiency, uneven rotation, or vibration of the motor. Therefore, there is a need for a zero-crossing detection circuit that does not produce chattering near zero crossings and that does not have hysteresis characteristics.

A circuit diagram of an example of a conventional zero-crossing detection circuit is shown in FIG. The conventional zero-crossing detection circuit includes an operational amplifier 50 that inputs the detected signal S to the inverting input terminal and outputs it as a zero-crossing detection signal fa; and compares the signal forming circuit 51 to form a comparison signal h and Provided to the non-inverting input terminal of the operational amplifier 50, wherein the comparison signal h is positively and negatively opposite to the detected signal S after the zero-crossing detection by the zero-crossing detection signal fa, and The order changes in the order and becomes zero after the specified time. The comparison signal forming circuit 51 includes a resistor R10, a resistor R11 and a capacitor Ca, and is set to a time constant T=(R10+R11). Ca.

The operation of the conventional zero-crossing detection circuit configured as described above is shown in FIG. When the detected signal S is supplied to the inverting input terminal of the operational amplifier 50, the operational amplifier 50 compares the detected signal S with the comparison signal h, and outputs a zero-crossing detection signal fa as a result of the comparison. At time t1, the detected signal S is the positive side level, the comparison signal h is the negative side level, and the operational amplifier 50 outputs the low level zero crossing detection signal fa. After a certain time from the state, the comparison signal h follows the time constant T and changes to a zero level. If the detected signal S is zero-crossed at time t2, the voltage of the inverting input terminal of the operational amplifier 50 is self-regulated. The level on the positive side becomes the zero level, which in turn changes to the negative side level. Thereby, the zero-crossing detection signal fa output from the amplifier 50 is inverted to a high level at time t2. this At this time, the capacitor Ca is given a high level zero crossing detection signal fa, that is, +Vdd, so that a voltage c of +2 Vdd appears at the other end of the capacitor Ca. This voltage c is divided by the resistor R10 and the resistor R11, and supplied as a comparison signal h to the non-inverting input terminal of the operational amplifier 50. Therefore, immediately after the time t2, the detected signal S which changes to the negative side level is compared with the comparison signal h which becomes the positive side level by the operational amplifier 50. Thereby, even if the noise ns is added to the detected signal S near the zero crossing and the zero crossing is forcibly performed, by comparing the signal forming circuit 51, the level of the comparison signal h is relative to the detected signal. Since S is operated in a positive or negative opposite manner, the zero-crossing detection signal fa outputted from the operational amplifier 50 is not inverted by the noise ns, and erroneous detection of zero-crossing does not occur. Thereafter, the comparison signal h follows the time constant T and its level slowly decreases, reaching the zero level before the next zero crossing time t3. When the detected signal S is zero-crossed again at time t3, the zero-crossing detection signal fa output from the operational amplifier 50 is inverted to become a low level. At this time, the low-level zero-crossing detection signal fa, that is, the voltage -Vdd is given to the capacitor Ca, so that a voltage c of -2 Vdd appears at the other end of the capacitor Ca. This voltage c is divided by the resistor R10 and the resistor R11, and supplied as a comparison signal h to the non-inverting input terminal of the operational amplifier 50. The above action is performed whenever a change in the positive and negative levels of the detected signal occurs to output a zero-crossing detection signal fa. Therefore, a zero-crossing detection signal in which erroneous detection, that is, chattering, does not occur even if zero crossing due to noise occurs occurs.

[Prior Art Literature] [Patent Literature]

[Patent Document 1] Japanese Patent Laid-Open Publication No. SHO 63-75670

However, in the conventional zero-crossing detection circuit, as described above, the effect of zero-crossing caused by noise is eliminated only during the time period determined by the time constant T defined by the resistance and the capacitance, so that there is The following problem is that, when the detection signal S is repeatedly zero-crossed in a time shorter than the time determined by the time constant T, the zero-crossing point of the detected signal S cannot be detected. Therefore, for example, in the use of the brushless motor, the requirement for high-speed rotation cannot be coped with, and there is a problem that the rotational speed of the brushless motor is limited by the zero-crossing detection circuit. Further, if the values of the resistor and the capacitor are selected such that the time constant T becomes shorter, there is a problem that noise cannot be eliminated. Therefore, for example, in the brushless motor, there is a problem that the zero-crossing detection circuit performs erroneous output due to noise, and accurate rotation control cannot be achieved.

In order to solve such a problem, the zero crossover detecting circuit of the present invention has the following configuration.

The zero-crossing detection circuit of the present invention includes a first comparison circuit having a first input signal and a second input signal, a second comparison circuit having a first input signal and a second input signal and having a hysteresis function, and a logic circuit And the configuration is as follows: in the unit, the first comparison circuit outputs a zero-crossing detection result of the first input signal and the second input signal, and the second comparison circuit outputs the first input signal and the second input signal. Comparing the results, the logic circuit is based on the zero crossing detection result and The output is determined by comparing the results.

According to the zero-crossing detecting circuit of the present invention, it is possible to accurately detect that the input signal is switched from positive to negative, and from negative to positive zero-crossing point, and the effect of zero-crossing caused by noise can be eliminated. And the zero-crossing detection circuit can be realized with a relatively small circuit scale and a simple configuration. It can be applied not only to the brushless motors listed, but also widely used for zero crossing point detection of normal signals such as sensing outputs.

1a, 1b, 1c‧‧‧Horse components

2a, 2b, 2c‧‧‧Differential Amplifying Circuit / Differential Amplifier

10, 11, 12, 13, 14, 15‧‧‧ comparison circuits

20‧‧‧Logical circuits

30‧‧‧Latch circuit

40‧‧‧hysteresis generating circuit

50‧‧‧Operational Amplifier

51‧‧‧Comparative signal forming circuit

Aa, Ab, Ac, Cb, Cc, Ba, Da, Bb, Db, Bc, Dc‧‧‧ terminals

c, Vdd‧‧‧ voltage

C‧‧‧clock terminal

Ca‧‧‧Capacitor/Capacitor

CK1, CK2, CK3‧‧‧ clock signal

D‧‧‧ data input terminal

Fa‧‧‧ zero crossing detection signal

h‧‧‧Comparative signal

HC‧‧‧Control terminal/hysteresis control terminal

Hi‧‧‧ high standard

Lo‧‧‧low standard

LT1, LT2, LT3‧‧‧ latches

Ns‧‧‧ noise

N1, N2‧‧‧ input terminals

N2’‧‧‧ connection point

Out, out0, out1, out2, out3, out4, out5‧‧‧ output terminals

Q‧‧‧ data output terminal

R10, R11‧‧‧ resistance

S‧‧‧Detected signal

t‧‧‧Time passes

T1, t2, t3‧‧‧ moments

Vn1, Vn2‧‧‧ input voltage

Vn2-Vn1‧‧‧ input voltage difference

Vout‧‧‧ output voltage / voltage

Vout0, Vout1, Vout4, Vout5‧‧‧ output voltage

Vout2‧‧‧Compare circuit 12 output voltage

Vout3‧‧‧Compare circuit 13 output voltage

Vth1, Vth2, Vn2'‧‧‧ voltage

Fig. 1 is a circuit diagram of a zero-crossing detecting circuit of the first embodiment.

Fig. 2 is a view showing the operation of each element of the zero-crossing detecting circuit of the first embodiment;

Fig. 3 is a view showing the operation of the zero-crossing detecting circuit of the first embodiment;

Fig. 4 is a view showing another example of the zero-crossing detecting circuit of the first embodiment.

Fig. 5 is a view showing the operation of each element of another example of the zero-crossing detecting circuit of the first embodiment.

Fig. 6 is a circuit diagram of a zero-crossing detecting circuit of the second embodiment.

Fig. 7 is a circuit diagram of a zero-crossing detecting circuit of the third embodiment.

Fig. 8 is a circuit diagram showing a first application example in which the zero-crossing detection circuit of the first embodiment is applied to a magnetic force sensing device.

Fig. 9 is a view showing the zero crossover detecting circuit of the first embodiment applied to a magnetic sensing device A circuit diagram of a second application example.

Fig. 10 is a circuit diagram showing a third application example in which the zero-crossing detecting circuit of the second embodiment is applied to a magnetic force sensing device.

Fig. 11 is a circuit diagram showing a fourth application example in which the zero-crossing detecting circuit of the third embodiment is applied to a magnetic force sensing device.

Figure 12 is a circuit diagram of a conventional zero crossover detection circuit.

Fig. 13 is a view showing the operation of a conventional zero-crossing detecting circuit.

The zero-crossing detection circuit of the present invention can be widely utilized as a zero-crossing detection circuit in a semiconductor circuit. Hereinafter, the zero-crossing detecting circuit of the present invention will be described with reference to the drawings.

<First embodiment>

Fig. 1 is a circuit diagram of a zero-crossing detecting circuit of the first embodiment. The zero-crossing detection circuit of the first embodiment includes a comparison circuit 10, a comparison circuit 11, and a logic circuit 20.

The comparison circuit 10 has two input terminals and one output terminal, and specifically has an inverting input terminal, a non-inverting input terminal, and an output terminal out0. Further, the comparison circuit 11 has two input terminals and one output terminal, and specifically has an inverting input terminal, a non-inverting input terminal, and an output terminal out1. The inverting input terminal of the comparison circuit 10 and the inverting input terminal of the comparison circuit 11 are commonly connected by the input terminal N1. The non-inverting input terminal of the comparison circuit 10 and the non-inverting input terminal of the comparison circuit 11 are commonly connected by the input terminal N2. For input terminal N1 and input Sub-N2 supplies the first input signal and the second input signal, respectively. The output terminal out0 of the comparison circuit 10 and the output terminal out1 of the comparison circuit 11 are connected to the logic circuit 20. The logic circuit 20 takes the signal of the output terminal out0 and the signal of the output terminal out1 as inputs, and outputs a logical calculation result from the output terminal out. In the following description, the respective voltages of the input terminal N1, the input terminal N2, the output terminal out0, the output terminal out1, and the output terminal out are set as the input voltage Vn1, the input voltage Vn2, the output voltage Vout0, the output voltage Vout1, and the output voltage. Vout.

Next, the operation of the zero-crossing detecting circuit of the first embodiment will be described with reference to Figs. 2 and 3 .

First, the operation of the comparison circuit 10 will be described. The comparison circuit 10 operates in such a manner that when the voltage supplied to the non-inverting input terminal is higher than the voltage supplied to the inverting input terminal, the high level is output from the output terminal out0, and conversely, when supplied to the non-inverting input When the voltage of the terminal is lower than the voltage supplied to the inverting input terminal, the low level is output from the output terminal out0. The details of this operation are shown in (a) of Fig. 2 . Here, the horizontal axis represents the input voltage difference between the input voltage Vn1 and the input voltage Vn2, and the vertical axis represents the respective output voltages. As shown in (a) of FIG. 2, the output voltage Vout0 outputs a high level when the input voltage Vn2 is higher than the input voltage Vn1, that is, when Vn2-Vn1>0. Conversely, when the input voltage Vn2 is lower than the input voltage Vn1, that is, when Vn2-Vn1 < 0, the low level is output. The transition of the output voltage Vout0 from the high level to the low level is performed at Vn2-Vn1=0. Further, the transition of the output voltage Vout0 from the low level to the high level is performed similarly at Vn2-Vn1=0.

In addition, when the input voltage difference Vn2-Vn1 changes in time, The operation of the comparison circuit 10 is shown in (a) of FIG. 3 and (b) of FIG. Here, the horizontal axis represents time passage, and the vertical axis represents input voltage difference or output voltage. (a) of FIG. 3 shows a case where the input voltage difference Vn2-Vn1 changes according to time. The input voltage difference Vn2-Vn1 can take various values as a function of time. In particular, it will become zero crossover when Vn2-Vn1=0. (b) of FIG. 3 shows a case where the output voltage Vout0 changes with time variation of the input voltage difference Vn2-Vn1. As shown in (b) of FIG. 3, the output voltage Vout0 outputs a high level when Vn2-Vn1>0, and outputs a low level when Vn2-Vn1<0. When Vn2-Vn1=0, that is, Vn1=Vn2, the output voltage Vout0 performs zero-crossing detection.

Next, the operation of the comparison circuit 11 will be described. The comparison circuit 11 operates in such a manner that when the voltage supplied to the non-inverting input terminal is higher than the sum of the voltage supplied to the inverting input terminal and the voltage Vth1, the high level is output from the output terminal out1, and conversely, when supplied When the voltage to the non-inverting input terminal is lower than the sum of the voltage supplied to the inverting input terminal and the voltage Vth2, the low level is output from the output terminal out1. The details of this operation are shown in (b) of FIG. 2 . As shown in (b) of FIG. 2, the output voltage Vout1 outputs a high level when the input voltage Vn2 is higher than the sum of the input voltage Vn1 and the voltage Vth1, that is, Vn2-Vn1>Vth1, and the input voltage Vn2 is lower than the input voltage Vn1 and The sum of the voltage Vth2, that is, Vn2-Vn1 < Vth2, outputs a low level. Here, the voltage Vth1 is a positive value and represents a hysteresis value on the positive side, and the voltage Vth2 is a negative value and represents a hysteresis value on the negative side. The transition of the output voltage Vout1 from the high level to the low level is performed at Vn2-Vn1=Vth2. In addition, the transition of the output voltage Vout1 from the low level to the high level is performed at Vn2-Vn1=Vth1. When Vn2-Vn1 is between Vth1 and Vth2, a high level or a low level is output according to the immediately preceding state. which is, The comparison circuit 11 operates as a comparison circuit having a hysteresis width |Vth1|+|Vth2|.

In addition, the operation of the comparison circuit 11 when the input voltage difference Vn2-Vn1 changes temporally is shown in (a) of FIG. 3 and (c) of FIG. (c) of FIG. 3 shows a case where the output voltage Vout1 changes with time variation of the input voltage difference Vn2-Vn1 shown in (a) of FIG. When it is time t1, that is, Vn2-Vn1>Vth1, the output voltage Vout1 outputs a high level, and maintains a high level after the lapse of the subsequent time, and becomes Vn2-Vn1<Vth2 as Vn2-Vn1 decreases. The output from the high level to the low level is maintained at a low level after the elapse of time. As Vn2-Vn1 increases, when Vn2-Vn1>Vth1, the low level shifts to a high level.

Next, the operation of the logic circuit 20 will be described. The logic circuit 20 operates in such a manner as to determine the logic of the output voltage Vout based on the logic state of the output voltage Vout0 and the output voltage Vout1. In more detail, when Vout1 is at a high level, logic circuit 20 shifts Vout from a high level to a low level by shifting Vout0 from a high level to a low level. If Vout is originally low, Vout does not change. Vout does not change due to the transition of Vout0 from a low level to a high level. In addition, when Vout1 is low, Vout transitions from a low level to a high level by Vout0 moving from a low level to a high level. If Vout is originally at a high level, Vout does not change. Vout does not change due to the transition of Vout0 from a high level to a low level. The above operation will be described using FIG. 3.

As described above, (a) of FIG. 3, (b) of FIG. 3, and (c) of FIG. 3 indicate input voltage difference Vn2-Vn1, output voltage Vout0, and output voltage Vout1, respectively. Time changes. (d) of FIG. 3 shows a temporal change of the output voltage Vout.

In (a) to (d) of FIG. 3, when the time is t1, the output voltage Vout0 and the output voltage Vout1 are at a high level. Thereafter, the time passes and Vn2-Vn1 decreases, and Vout0 shifts from a high level to a low level when zero crossing is performed. At this time, Vout1 is at a high level, and therefore the logic circuit 20 outputs a detection of Vout0 from a high level to a low level zero crossing to Vout. Thereafter, if Vn2-Vn1 < Vth2 is passed after the passage of time, Vout1 shifts from a high level to a low level. Thereafter, the time passes and Vn2-Vn1 increases, and Vout0 migrates from a low level to a high level when zero crossing is performed. At this time, Vout1 is at a low level, so the logic circuit 20 outputs a detection of Vout0 from a low level to a high level zero crossing to Vout. Thereafter, if Vn2-Vn1>Vth1 is reached after the elapse of time, Vout1 shifts from a low level to a high level. Further, thereafter, when the time elapses and the time t2 is reached, the same state as the time t1 is obtained.

When it is time t2, the output voltage Vout0 and the output voltage Vout1 are at a high level. Thereafter, the time passes and Vn2-Vn1 decreases, and Vout0 shifts from a high level to a low level when zero crossing is performed. At this time, Vout1 is at a high level, and therefore the logic circuit 20 outputs a detection of Vout0 from a high level to a low level zero crossing to Vout. Thereafter, after the time elapses, Vn2-Vn1 performs two zero crossings due to the noise ns, and the output voltage Vout0 migrates from the low level to the high level and then migrates to the low level. At this time, since Vout1 is at the high level, the logic circuit 20 operates so as not to output the transition from the low level to the high level of Vout0. Therefore, zero-crossing detection caused by noise does not occur at the output terminal out. Further, when Vn2-Vn1 < Vth2 is passed as time elapses, Vout1 shifts from a high level to a low level. Thereafter, the time passes and Vn2-Vn1 increases. Large, and Vout0 migrates from a low level to a high level when zero crossing occurs. At this time, Vout1 is at a low level, so the logic circuit 20 outputs a detection of Vout0 from a low level to a high level zero crossing to Vout. Thereafter, after the time elapses, Vn2-Vn1 performs two zero crossings due to the noise ns, and the output voltage Vout0 migrates to a high level after moving from the high level to the low level. At this time, since Vout1 is at a low level, the operation is performed such that the transition from the high level to the low level of Vout0 is not outputted to Vout. Therefore, zero-crossing detection caused by noise does not occur at the output terminal out. Thereafter, if Vn2-Vn1>Vth1 is reached after the elapse of time, Vout1 shifts from a low level to a high level. Further, thereafter, when the time elapses and the time t3 is reached, the same state as the time t1 and the time t2 is obtained.

The operation of the zero-crossing detection circuit of the first embodiment has been described above, and the following cases are shown: zero-crossing detection can be performed and the influence of zero-crossing caused by noise can be eliminated, and The simple circuit configuration achieves high-precision zero-crossing detection results. When the zero-crossing detection circuit of this embodiment is used in a brushless motor, it is possible to cope with the demand for high-speed rotation. There is no known erroneous output caused by noise in order to cope with the problem of high speed, and accurate rotation control can be realized.

In the present description, the voltage Vth1 and the voltage Vth2 are used as the hysteresis voltage of the comparison circuit 11. However, as shown in the circuit diagram of FIG. 4 and the operation diagram of FIG. 5, the comparison circuit 11 may be divided into the comparison circuit 12 and The comparison circuit 13 determines whether Vn2-Vn1 is greater than or less than the voltage Vth1 by the comparison circuit 12, and the comparison circuit 13 determines whether Vn2-Vn1 is greater than or less than the voltage Vth2. Here, Figure 5 (a) shows the operation of the comparison circuit 10, (b) of FIG. 5 shows the operation of the comparison circuit 12, (c) of FIG. 5 shows the operation of the comparison circuit 13, and (d) of FIG. 5 shows the operation of the logic circuit 20.

<Second embodiment>

Fig. 6 is a circuit diagram of a zero-crossing detecting circuit of the second embodiment. The difference from the first embodiment shown in FIG. 1 is that the comparison circuit 10 and the comparison circuit 11 are removed, the comparison circuit 14 is added, and the latch circuit 30 is added between the comparison circuit 14 and the logic circuit 20. The added elements are configured and connected as described below. Further, the following connections are different from the first embodiment due to the removed elements.

The comparison circuit 14 has two input terminals, one output terminal, and one control terminal HC. Specifically, it has an inverting input terminal, a non-inverting input terminal, an output terminal out4, and a hysteresis control terminal HC. The inverting input terminal of the comparison circuit 14 is connected to the input terminal N1, and the non-inverting input terminal of the comparison circuit 14 is connected to the input terminal N2. The hysteresis control terminal HC of the comparison circuit 14 adjusts the hysteresis voltage of the comparison circuit 14 in accordance with the control signal input to the hysteresis control terminal. The control circuit of the hysteresis control terminal HC is not shown. The output terminal out4 of the comparison circuit 14 is connected to the latch circuit 30. The latch circuit 30 includes a latch LT1, a latch LT2, and a latch LT3. The output terminal out4 is connected to the data input terminal D of the latch LT1, the latch LT2, and the latch LT3. The data output terminals Q of the latch LT1, the latch LT2, and the latch LT3 are the output terminal out0, the output terminal out2, and the output terminal out3, respectively, and are connected to the logic circuit in the same manner as the first embodiment shown in FIG. 20. The latch LT1, the latch LT2, and the latch LT3 are provided with the clock terminal C, respectively according to the time pulse signal. The signal CK1, the clock signal CK2, and the clock signal CK3 latch the data input to the data input terminal D and output it to the data output terminal Q. The control circuit of the clock signal CK1, the clock signal CK2, and the clock signal CK3 is not shown. Other connections and configurations are the same as in the first embodiment. In the following description, the voltage of the output terminal out4 is set to the output voltage Vout4.

Next, the operation of the zero-crossing detection circuit of the second embodiment will be described.

The comparison circuit 14 operates to perform the operations of the comparison circuit 10 and the comparison circuit 11 of the first embodiment in a time-division manner based on the control signal input to the hysteresis control terminal HC. In other words, when the comparison circuit 14 is controlled such that the voltage Vth1 and the voltage Vth2 become zero, the comparison circuit 14 operates in the same manner as the comparison circuit 10, and if the voltage Vth1 and the voltage Vth2 are not zero, the comparison circuit is controlled. 14 operates in the same manner as the comparison circuit 12 or the comparison circuit 13. Since the comparison circuit for performing such an operation is a well-known technique, description is abbreviate|omitted. If the comparison circuit 14 is controlled in the same manner as the comparison circuit 10, the output voltage Vout4 of the comparison circuit 14 is latched by the latch LT1 according to the clock signal CK1, and the output voltage Vout0 becomes the same as that of FIG. (a) The same output voltage as Vout0 shown in (b) of Fig. 3 . If the comparison circuit 14 is controlled in the same manner as the comparison circuit 12 and the comparison circuit 13, the comparison circuit 14 is latched by the clock signal CK2 and the clock signal CK3 by the latch LT2 and the latch LT3. When the output voltage Vout4 is reached, the output voltage Vout1 becomes the same output voltage as Vout1 shown in (b) of FIG. 5, (c) of FIG. 5, and (c) of FIG. The action of the logic circuit 20 and the first In the same embodiment, the output voltage Vout can perform zero-crossing detection and eliminate the effects of zero-crossing caused by noise.

In the second embodiment, since the comparison circuit 14 operates in a time-division manner, the operation speed is slower than that of the first embodiment, but there is an advantage that the circuit scale is reduced by reducing the number of comparison circuits.

The operation of the zero-crossing detection circuit of the second embodiment has been described above, and similarly to the first embodiment, it is possible to perform zero-crossing detection and eliminate zero caused by noise. With the influence of crossover, high-precision zero-crossing detection results can be obtained with a simple circuit configuration.

<Third embodiment>

Fig. 7 is a circuit diagram of a zero-crossing detecting circuit of the third embodiment. The difference from the second embodiment shown in FIG. 6 is that the comparison circuit 15 is added to the comparison circuit 14, and the hysteresis generation circuit 40 is added between the input terminal N2 and the non-inverting input terminal of the comparison circuit 15. . The added elements are configured and connected as follows. Further, the following connections are different from the second embodiment due to the removed elements.

The comparison circuit 15 has two input terminals and one output terminal, and specifically has an inverting input terminal, a non-inverting input terminal, and an output terminal out5. The inverting input terminal of the comparison circuit 15 is connected to the input terminal N1, and the non-inverting input terminal of the comparison circuit 15 is connected to the output terminal of the hysteresis generating circuit 40. An input terminal N2 is connected to an input terminal of the hysteresis generating circuit 40. The output terminal out5 of the comparison circuit 15 is connected to the latch circuit 30. The hysteresis generating circuit 40 includes a hysteresis control terminal HC, and adjusts the hysteresis voltage in accordance with the control signal. The hysteresis control terminal HC control circuit is not shown Show. Other connections and configurations are the same as in the second embodiment. In the following description, the connection point between the non-inverting input terminal of the comparison circuit 15 and the output terminal of the hysteresis generating circuit 40 is N2', the voltage of the connection point N2' is Vn2', and the output terminal out5 is The voltage is set to the output voltage Vout5.

Next, the operation of the zero-crossing detection circuit of the third embodiment will be described.

The comparison circuit 15 operates in the same manner as the comparison circuit 10 of the first embodiment. That is, the comparison circuit 15 operates in such a manner that when the voltage supplied to the non-inverting input terminal is higher than the voltage supplied to the inverting input terminal, the high level is output from the output terminal out5, and conversely, when supplied to the non-reverse When the voltage of the phase input terminal is lower than the voltage supplied to the inverting input terminal, the low level is output from the output terminal out5. The hysteresis generating circuit 40 operates in accordance with the control state of the hysteresis control terminal HC, after directly outputting the input voltage, or adding the voltage Vth1 which is a positive value, or outputting it, or adding the voltage Vth2 which is a negative value. Switch between outputs. In other words, the output voltage of the hysteresis generating circuit 40 is controlled such that Vn2' = Vn2, or Vn2' = Vn2 + Vth1, or Vn2' = Vn2 + Vth2. The hysteresis generating circuit that performs such an operation is known in the art and can be realized, for example, by a resistor, a constant current source, and a switching element.

In a state where the output voltage of the hysteresis generating circuit 40 is controlled to be Vn2'=Vn2, the comparison circuit 15 applies the voltage Vn2'=Vn2 input to the non-inverting input terminal and the voltage Vn1 input to the inverting input terminal. Compare. Therefore, the same operation as that of the comparison circuit 10 of the first embodiment is performed. If in the control state When the output voltage Vout5 of the comparison circuit 15 is latched by the latch LT1 according to the clock signal CK1, the output voltage Vout0 becomes the same output as Vout0 shown in (a) of FIG. 5 and (b) of FIG. Voltage.

Further, in a state where the output voltage of the hysteresis generating circuit 40 is controlled so as to be Vn2'=Vn2+Vth1, the comparison circuit 15 applies the voltage Vn2'=Vn2+Vth1 input to the non-inverting input terminal and the input to the opposite. The voltage Vn1 of the phase input terminal is compared, and in a state where the output voltage of the hysteresis generating circuit 40 is controlled such that Vn2'=Vn2+Vth2, the comparison circuit 15 applies the voltage Vn2' input to the non-inverting input terminal. Vn2+Vth2 is compared with the voltage Vn1 input to the inverting input terminal. Therefore, the same operations as those of the comparison circuit 12 and the comparison circuit 13 of the first embodiment are performed. If, in the control state, the output voltage Vout5 of the comparison circuit 15 is latched by the latch signal CK2 and the clock signal CK3 by the latch LT2 and the latch LT3, the output voltage Vout1 becomes the (b) of FIG. The same output voltage as Vout1 shown in (c) of FIG. 5 and (c) of FIG. The operation of the logic circuit 20 is the same as that of the first embodiment and the second embodiment, and the output voltage Vout can perform zero-crossing detection and can eliminate the influence of zero-crossing caused by noise.

In the third embodiment, the hysteresis generating circuit 40 is switched and operated. As in the second embodiment, the operating speed is slower than in the first embodiment, but the circuit scale is reduced by reducing the number of comparison circuits. Small advantage.

The operation of the zero-crossing detection circuit of the third embodiment has been described above, and similarly to the first embodiment and the second embodiment, it is possible to perform zero-crossing detection and eliminate Zero crossover caused by noise The high-accuracy zero-crossing detection result can be obtained with a simple circuit configuration.

In the present description, for convenience of explanation, the voltage is supplied by the hysteresis generating circuit 40 on the input terminal N2 side, but the voltage may be supplied on the input terminal N1 side in a similar manner, and may be added in the same manner. Both the input terminal N1 and the input terminal N2 are added to the voltage.

In the description of the second embodiment and the third embodiment, the latch circuit is shown as a circuit that holds the output voltage of the comparison circuit. However, the configuration is not necessarily limited to the configuration of the operation of reading the data. Composition.

In the description of the first embodiment, the second embodiment, and the third embodiment, the operation of selecting whether or not to output the output voltage Vout0 to the voltage Vout according to the logic state of the high or low level of the output voltage Vout1 has been described. However, the operation is not limited thereto, and the operation of controlling the output voltage Vout at the timing of changing the output voltage Vout0 according to the logic state of the output voltage Vout1 may be employed. In addition, when the output voltage Vout1 is at a high level, the transition from the high level to the low level of Vout0 is outputted to Vout once, and when the output voltage Vout1 is at the low level, Vout only outputs the transition from the low level to the high level of Vout0. Further, for convenience of explanation, the high level and the low level of each output voltage are clearly described in terms of the operating state, but the high level and the low level may be reversed, and the combination of the high level and the low level may be different. In the present description, the voltage Vth1 and the voltage Vth2 are used as the hysteresis voltage of the comparison circuit. However, the configuration is not necessarily limited to the configuration as long as the operation of the comparison circuit described in the present specification is performed. As an example, instead of having a hysteresis voltage inside the comparison circuit, the base may be The quasi-voltage is supplied to the comparison circuit to adjust the inverse phase of the output voltage Vout1. Further, although the voltage Vth1 and the voltage Vth2 are described as constant voltages that do not change in time as shown in FIG. 3(a), for example, the size of the noise changes depending on the surrounding environment such as the power supply voltage or the temperature. In the case of the voltage Vth1 or the voltage Vth2, the voltage Vth1 or the voltage Vth2 may be variably controlled without a constant voltage. Further, the hysteresis width of the comparison circuit 10 is described on the premise that it is zero unless otherwise specified. However, in an actual circuit, the hysteresis width is not necessarily zero due to the presence of a non-ideal component, and sometimes Has a small value. Also in this case, the effects of the present invention are not impaired. Further, in the real circuit, in order to eliminate noise caused by fluctuations in the power supply voltage or the like, the comparison circuit 10 can have a hysteresis function of a very small amplitude, or a temporary hysteresis function can be provided, or can be compared by comparison. The output of circuit 10 is sampled multiple times to set up a filter in digital form. In addition, in the description, for convenience of explanation, the voltage is specifically described as an input signal, but it is obvious that the input signal can also be a current.

<Application Example of Zero Crossover Detection Circuit of the Present Invention>

8 is a circuit diagram showing a first application example in which the zero-crossing detection circuit according to the first embodiment of the present invention is applied to a magnetic force sensing device. The signal of the Hall element 1a as the magnetoelectric conversion element is input from the terminal Ba and the terminal Da to the differential amplifier 2a, the differential amplifier 2a amplifies it, and the output of the differential amplifier 2a is connected to the zero crossing of the present invention. The input terminal N1 and the input terminal N2 of the detection circuit are detected. Here, the voltages of the terminal Ba and the terminal Da are VBa and VDa, the signal voltage of the Hall element 1a is VDa-VBa, and the amplification factor of the differential amplifier 2a is G.

The magnitude and sign of the signal voltages VDa-VBa of the Hall element 1a vary according to the direction of the current flowing to the Hall element 1a and the direction of the applied magnetic field and according to the Fleming's left-hand rule. Assuming that the sign of the signal voltage VDa-VBa is positive when a magnetic field is applied in the direction from the near to the front in the depth direction of the paper surface, the signal voltage VDa- is applied in the case where the magnetic field is applied in the direction from the depth to the front of the paper surface. The sign of VBa is negative. In addition, the larger the applied magnetic field, the larger the magnitude of the signal voltages VDa-VBa. Further, in the ideal case where the offset voltage of the Hall element 1a is zero, the signal voltage VDa-VBa when the magnetic field applied to the Hall element 1a is zero is zero. The signal voltage of the Hall element 1a is amplified by the differential amplifier 2a to become Vn2-Vn1=G×(VDa-VBa). . . (1). Therefore, Vn2-Vn1 takes a positive or negative value or zero depending on the magnetic field applied to the Hall element 1a. In other words, according to the operation of the zero-crossing detection circuit of the first embodiment of the present invention, the zero-crossing point of the magnetic field applied to the hall element 1a can be detected with high accuracy without malfunction due to noise. In other words, in the application for detecting the relative positional relationship between the sensing device and the magnet on which the zero-crossing detecting circuit according to the first embodiment of the present invention is mounted, it is possible to accurately detect the change in the relative position and apply it to the sensing device. The magnetic field is switched from the S pole to the N pole point or from the N pole to the S pole. Therefore, the application example of the present invention is suitably used in a brushless motor or an encoder that requires high-precision detection of the rotational position of the rotor. It is possible to cope with the demand for high-speed rotation, and it is possible to achieve accurate rotation control by causing an erroneous output caused by noise in order to cope with the problem of speeding up.

FIG. 9 is a circuit diagram showing a second application example in which the zero-crossing detection circuit according to the first embodiment of the present invention is applied to the magnetic force sensing device. The configuration of the connection between the Hall element 1b and the differential amplifier circuit 2b is the same as the configuration of the connection between the Hall element 1a and the differential amplifier circuit 2a of the first application example. The configuration of the connection between the Hall element 1c and the differential amplifier circuit 2c is also the same as the configuration of the connection between the Hall element 1a and the differential amplifier circuit 2a of the first application example. The differential amplifier circuit 2a is a differential output, and the differential amplifier circuit 2b and the differential amplifier circuit 2c are single-ended outputs. The signal of the Hall element 1b as the magnetoelectric conversion element is input from the terminal Bb and the terminal Db to the differential amplifier 2b, the differential amplifier 2b amplifies it, and the output of the differential amplifier 2b is connected to the zero-crossing detecting circuit of the present invention. Input terminal N1. Further, a signal of the hall element 1c as a magnetoelectric conversion element is input from the terminal Bc and the terminal Dc to the differential amplifier 2c, the differential amplifier 2c amplifies it, and the output of the differential amplifier 2c is connected to the zero crossing of the present invention. The input terminal N2 of the detection circuit. Here, the respective voltages of the terminal Bb, the terminal Db, the terminal Bc, and the terminal Dc are VBb, VDb, VBc, and VDc, and the signal voltages of the Hall element 1b and the Hall element 1c are respectively set to VDb-VBb and VDc. -VBc, the amplification factors of the differential amplifier 2b and the differential amplifier 2c are both set to G. Thus, the input voltage Vn1 supplied to the input terminal N1 and the input voltage Vn2 supplied to the input terminal N2 are as follows.

Vn1=G×(VDb-VBb). . . (2)

Vn2=G×(VDc-VBc). . . (3) The following formula is obtained according to the formula (2) and the formula (3).

Vn2-Vn1=G×{(VDc-VBc)-(VDb-VBb)}. . . (4) Therefore, Vn2-Vn1 takes a positive value or a negative value or zero depending on the magnetic field applied to the Hall element 1b and the Hall element 1c. In other words, the zero crossing detection circuit of the first embodiment of the present invention can detect the zero crossing of the difference between the magnetic field applied to the Hall element 1b and the Hall element 1c with high accuracy without malfunction due to noise. point. That is, zero-crossing detection can be output when the signals of the two sensing elements are equal, and it can be discerned which of the two sensing elements has a large signal and is output. This application example is suitably used, for example, in a configuration in which a magnetic sensing device is disposed between a magnet that generates a bias magnetic field and a gear including a metal such as iron or a magnet, and the rotation of the gear is detected by the magnetic sensing device.

In the present description, the differential amplifier circuit 2b and the differential amplifier circuit 2c are single-ended outputs for convenience of explanation, but may be differential outputs in order to improve noise resistance. Further, the case where there are two Hall elements has been described, but there may be more than two. For example, the difference signal 1 of the two Hall elements and the difference signal 2 of the two Hall elements different from the difference signal 1 may be generated, and the zero crossing of the difference signal 1 and the differential signal 2 may be detected.

FIG. 10 is a circuit diagram showing a third application example in which the zero-crossing detection circuit according to the second embodiment of the present invention is applied to a magnetic force sensing device. The configuration of the connection between the Hall element 1a and the differential amplifier circuit 2a is the same as the configuration of the connection between the Hall element 1a and the differential amplifier circuit 2a of the first application example. The signal of the Hall element 1a as the magnetoelectric conversion element is input from the terminal Ba and the terminal Da to the differential amplifier 2a, the differential amplifier 2a amplifies it, and the output of the differential amplifier 2a is connected to the zero cross check of the present invention. The input terminal N1 and the input terminal N2 of the measuring circuit. Similarly to the case of the first application example, Vn2-Vn1 takes a positive value or a negative value or zero depending on the magnetic field applied to the hall element 1a. In other words, according to the operation of the zero-crossing detecting circuit of the second embodiment of the present invention, the zero-crossing point of the magnetic field applied to the hall element 1a can be detected with high accuracy without malfunction due to noise.

Fig. 11 is a circuit diagram showing a fourth application example in which the zero-crossing detecting circuit according to the third embodiment of the present invention is applied to a magnetic force sensing device. The third embodiment differs from the third embodiment in FIG. 10 in that a third embodiment is applied instead of the second embodiment. Specifically, the comparison circuit 15 is added and the input terminal N2 and the comparison circuit 15 are added. A hysteresis generating circuit 40 is added between the non-inverting input terminals. The hysteresis control terminal HC of the hysteresis generating circuit 40 is omitted. The other connections and configurations are the same as those in the third application example.

The signal of the Hall element 1a as the magnetoelectric conversion element is input from the terminal Ba and the terminal Da to the differential amplifier 2a, the differential amplifier 2a amplifies it, and the output of the differential amplifier 2a is connected to the zero-crossing detecting circuit of the present invention. Input terminal N1, input terminal N2. Similarly to the case of the first application example and the second application example, Vn2-Vn1 takes a positive value or a negative value or zero depending on the magnetic field applied to the hall element 1a. In other words, according to the operation of the zero-crossing detection circuit of the third embodiment of the present invention, the zero-crossing point of the magnetic field applied to the hall element 1a can be detected with high accuracy without malfunction due to noise.

In the present description, the hysteresis generating circuit 40 is connected between the differential amplifier 2a and the comparison circuit 15 for convenience of explanation, but the hysteresis generating circuit 40 may be connected. On the side closer to the source of the signal. Specifically, the hysteresis generating circuit 40 can be connected between the Hall element 1a and the differential amplifier 2a. Usually, the Hall element has a resistance component, so that no resistance is required in the hysteresis generating circuit 40. Therefore, as an example, the hysteresis generating circuit 40 may include only a constant current source and a switching element, thereby contributing to miniaturization and reducing the temperature by interlocking the value of the constant current with the resistance value of the Hall element. The characteristics caused by the characteristic offset.

An example in which the zero crossover detecting circuit of the present invention is applied to a magnetic sensing device is shown in Figs. 8 to 11 . In the description, a specific example is shown for the sake of explanation, but it is not necessarily limited to the configuration or the sensing element, and can be applied to a wide range of semiconductor circuits and sensing circuits. The same applies to the case of the zero-crossing detection circuit of the first embodiment, the second embodiment, and the third embodiment. As an example, it may be combined with a spinning current circuit that cancels a bias voltage that is a non-ideal component of a Hall element as a magnetoelectric conversion element, or may be a non-ideal component that eliminates a differential amplifier or a comparison circuit. A combination of a chopping action of a voltage or a circuit of an auto zero action. Here, in combination with a rotating current circuit or a circuit for a chopper operation or an auto-zero operation, etc., the signal processing of discrete time is performed instead of the signal processing of continuous time, and therefore, the comparison circuit 10 to the comparison circuit 15 are It is not preferable that the respective outputs are output from the output terminal out by calculation by the combinational circuit. As described in the second embodiment or the third embodiment, it is preferably combined with a sequential circuit such as a latch circuit. In addition, in addition to the magnetoelectric conversion element, it can also be used as a zero-crossing detection circuit of the sensing element such as a temperature sensing element, an acceleration sensing element, and a pressure sensing element.

Claims (4)

A zero-crossing detecting circuit, comprising: a comparing circuit, having a first input signal, a second input signal, and a hysteresis control signal, wherein the threshold value can be switched to a zero value, a positive value or by a hysteresis control signal a negative value, when the threshold value is zero, a first comparison result is output, and when the threshold value is a positive value or a negative value, a second comparison result is output; the latch circuit is input with each of the comparison circuits An output signal of the limit value; and a logic circuit having an output signal input to the latch circuit, the logic circuit determining whether to compare the first comparison result based on the second comparison result of the output of the latch circuit Reflected in the output. A zero-crossing detecting circuit, comprising: a comparing circuit, having a first input signal and a second input signal passing through a hysteresis generating circuit, wherein the hysteresis generating circuit can switch the threshold of the comparing circuit a zero, positive or negative value; a latch circuit having an output signal having respective threshold values of the comparison circuit; and a logic circuit having an output signal input to the latch circuit, the comparison circuit being Outputting a first comparison result when the threshold value is zero, and outputting a second comparison result when the threshold value is a positive value or a negative value, and the logic circuit determines whether the first one is to be based on the second comparison result The result of the comparison is reflected in the output. A sensing device, comprising: a sensing element that outputs a signal according to an intensity of an applied physical quantity, and the zero-crossing detecting circuit according to claim 1 or 2, Zero crossing detection of the signal output by the measuring component. The sensing device of claim 3, wherein the first input signal is an output signal of the first sensing element, and the second input signal is an output signal of the second sensing element.