TWI660576B - Doherty power amplifier combiner with tunable impedance termination circuit - Google Patents

Abstract

The invention discloses a Douhe power amplifier combiner with an adjustable impedance termination circuit. A signal combiner may include a balanced-unbalanced transformer circuit having a first coil and a second coil. The first coil may be implemented between a first port and a second port. The second coil may be implemented between a third port and a fourth port. The first port and the third port can be coupled by a first capacitor. The second port and the fourth port can be coupled by a second capacitor. The first port can be configured to receive a first signal. The fourth port can be configured to receive a second signal. The second port may be configured to generate a combination of the first signal and the second signal. The signal combiner may include a terminating circuit coupling the third port to a ground. The termination circuit may include an adjustable impedance circuit.

Description

Doherty power amplifier combiner with adjustable impedance terminal circuit Cross-reference to related applications

This application claims the priority of U.S. Provisional Application No. 62 / 036,854, entitled TUNABLE WIDE-BAND HYBRID-BASED DOHERTY COMBINER WITH WIDE-BAND HARMONIC REJECTION, filed on August 13, 2014, the entire contents of which are incorporated by reference The way is explicitly incorporated into this article.

The present invention relates generally to radio frequency (RF) signal combiners.

Multi-Mode / Multi-Band (MMMB) Power Amplifier Modules (PAMs) for 4G LTE (Long Term Evolution) applications preferably operate in back-off conditions to meet high peak pairing while maintaining high power added efficiency (PAE) Average power ratio (PAPR) specifications. Compared to envelope tracking PAM for enhanced efficiency in back-off conditions, Douglas PAM can meet the high linearity under back-off conditions with significantly reduced system complexity and reduced calibration and digital pre-distortion (DPD) specifications effectiveness. However, the bandwidth of a typical Doherty power amplifier architecture is limited due to the narrow-band nature of existing Doherty power combiners.

According to some embodiments, the present invention relates to a signal combiner including a balanced-unbalanced transformer circuit having a first coil and a second coil. The first coil is implemented between a first port and a second port. Implementing this between a third port and a fourth port The second coil. The first port and the third port are coupled by a first capacitor. The second port and the fourth port are coupled by a second capacitor. The first port is configured to receive a first signal. The fourth port is configured to receive a second signal. The second port is configured to generate a combination of the first signal and the second signal. The signal combiner further includes a terminating circuit coupling the third port to a ground. The termination circuit includes an adjustable impedance element.

In some embodiments, the signal combiner may further include a controller configured to receive a band selection signal and tune the adjustable impedance circuit based on the band selection signal. In some embodiments, the controller may be further configured to tune at least one of the first capacitor or the second capacitor.

In some embodiments, the first port may be configured to receive a carrier amplified signal from a Doherty power amplifier (PA) and the fourth port may be configured to receive a peak amplified signal from the Doherty PA. In some embodiments, the adjustable impedance circuit includes a plurality of capacitors. Each of the plurality of capacitors may have a capacitance approximately equal to two times pi times one of the respective operating frequency of the Douch PA and one of the inverse of a characteristic impedance coupled to a load of the Douch PA. In some embodiments, the signal combiner may include a controller configured to receive a frequency band selection signal indicative of an operating frequency and tune the adjustable impedance circuit to have an approximately equal to two times π times by The operating frequency is multiplied by a reciprocal of a capacitance coupled to a characteristic impedance of a load coupled to the Duch PA. In some embodiments, the controller may be further configured to tune the first capacitor and the second capacitor to have a capacitance approximately equal to one-half of the capacitance of the adjustable impedance circuit.

In some embodiments, the first port may be configured to receive a peak amplified signal from a Doherty power amplifier (PA) and the fourth port may be configured to receive a carrier amplified signal from the Doherty PA. In some embodiments, the adjustable impedance circuit may include a plurality of inductors. Each of the plurality of inductors may have an inductance approximately equal to a characteristic impedance of a load coupled to the Duch PA divided by two times π times the respective operating frequency of one of the Duch PAs. In some embodiments, the signal combiner may include a controller configured to connect to Receive a frequency band selection signal indicating an operating frequency and tune the adjustable impedance circuit to have an inductance approximately equal to a characteristic impedance of a load coupled to the Douhe PA divided by two times π times the operating frequency.

In some embodiments, the adjustable impedance matching circuit may include a plurality of impedance elements connected in parallel, and each of the plurality of impedance elements includes an impedance and a switch connected in series.

In some embodiments, the termination circuit may further include a harmonic suppression circuit configured to reduce the intensity of one or more harmonics at the second port. In some embodiments, the harmonic suppression circuit may include a plurality of resonance elements connected in series, and each of the plurality of resonance elements includes an inductor and a capacitor connected in parallel. In some embodiments, each of the plurality of resonant elements may have a resonant frequency approximately equal to a multiple of an operating frequency of the signal combiner. In some embodiments, each of the plurality of resonant elements may have a resonant frequency that is approximately equal to twice the respective operating frequency of one of the signal combiners. In some embodiments, the harmonic suppression circuit is implemented between the third port and the adjustable impedance circuit.

In some embodiments, the invention relates to a power amplifier module including a package substrate configured to receive one of a plurality of components. The power amplifier module includes a signal combiner implemented on the package substrate. The signal combiner includes a balanced-unbalanced transformer circuit having a first coil and a second coil. The first coil is implemented between a first port and a second port. The second coil is implemented between a third port and a fourth port. The first port and the third port are coupled by a first capacitor. The second port and the fourth port are coupled by a second capacitor. The first port is configured to receive a first signal. The fourth port is configured to receive a second signal. The second port is configured to generate a combination of the first signal and the second signal. The signal combiner further includes a terminating circuit coupling the third port to a ground. The termination circuit includes an adjustable impedance circuit.

In some embodiments, the PA module may further include an implementation on the package substrate. A controller configured to receive a band selection signal and tune the adjustable impedance circuit based on the band selection signal.

In some embodiments, the invention relates to a wireless device including a transceiver configured to generate a radio frequency (RF) signal. The wireless device includes a power amplifier (PA) module in communication with the transceiver. The PA module includes an input circuit configured to receive the RF signal and split the RF signal into a first part and a second part. The PA module further includes a Doherty PA having a carrier amplification path coupled to the input circuit to receive the first part and a peak amplification path to the input circuit to receive the second part. The PA module further includes an output circuit coupled to the Doher amplifier circuit. The output circuit includes a balanced-unbalanced transformer circuit having a first coil and a second coil. The first coil is implemented between a first port and a second port. The second coil is implemented between a third port and a fourth port. The first port and the third port are coupled by a first capacitor. The second port and the fourth port are coupled by a second capacitor. The first port is configured to receive a first signal through the carrier amplification path. The fourth port is configured to receive a second signal through the peak amplification path. The second port is configured to generate a combination of the first signal and the second signal as an amplified RF signal. The PA module further includes a terminating circuit coupled to the third port to a ground. The termination circuit includes an adjustable impedance circuit. The wireless device further includes an antenna for communicating with the PA module. The antenna is configured to facilitate transmission of the amplified RF signal.

In some embodiments, the wireless device may further include a controller configured to receive a frequency band selection signal and tune the adjustable impedance circuit based on the frequency band selection signal.

This invention relates to U.S. Patent Application No. 14 / 797,261, entitled CIRCUITS, DEVICES AND METHODS RELATED TO COMBINERS FOR DOHERTY POWER AMPLIFIERS, filed on July 13, 2015, and the entire contents of that case are incorporated herein by reference. in.

100‧‧‧ Power Amplifier (PA)

100a‧‧‧ Power Amplifier (PA)

100b‧‧‧Power Amplifier (PA)

100c‧‧‧Power Amplifier (PA)

100d‧‧‧Power Amplifier (PA)

102‧‧‧ pre-driver amplifier

104‧‧‧Divider

110‧‧‧Carrier amplification path

112‧‧‧ Attenuator

114‧‧‧Magnification

116‧‧‧Driver level

118‧‧‧ bias circuit

120‧‧‧ output stage

122‧‧‧ bias circuit

130‧‧‧peak amplification path

132‧‧‧phase shift circuit

134‧‧‧magnification

136‧‧‧Driver level

138‧‧‧ bias circuit

140‧‧‧output stage

142‧‧‧ bias circuit

144‧‧‧Combiner

221‧‧‧Transformer

222‧‧‧First capacitor

223‧‧‧Second capacitor

231‧‧‧Port I

232‧‧‧Second Port

233‧‧‧Third Port

234‧‧‧Fourth Port

251‧‧‧balanced-unbalanced transformer

254‧‧‧Signal combiner

300‧‧‧Signal combiner

301‧‧‧first coil

302‧‧‧Second Coil

311‧‧‧First port

312‧‧‧Second Port

313‧‧‧Third Port

314‧‧‧Fourth Port

321‧‧‧first capacitor

322‧‧‧Second capacitor

323‧‧‧Third capacitor

331‧‧‧first input port

332‧‧‧Second Input Port

333‧‧‧Output port

400‧‧‧Signal combiner

401‧‧‧first coil

402‧‧‧Second Coil

411‧‧‧First Port

412‧‧‧Second Port

413‧‧‧Third Port

414‧‧‧Fourth Port

421‧‧‧First capacitor

422‧‧‧Second capacitor

423‧‧‧Inductor

431‧‧‧First input port

432‧‧‧second input port

433‧‧‧Output port

500‧‧‧Signal combiner

501‧‧‧first coil

502‧‧‧Second Coil

511‧‧‧First Port

512‧‧‧Second Port

513‧‧‧Third Port

514‧‧‧Fourth Port

520‧‧‧controller

521‧‧‧First capacitor

522‧‧‧Second capacitor

523‧‧‧Adjustable impedance circuit

531‧‧‧first input port

532‧‧‧second input port

533‧‧‧Output port

610a‧‧‧Impedance

610b‧‧‧Impedance

610c‧‧‧Impedance

610d‧‧‧Impedance

612a‧‧‧Switch

612b‧‧‧Switch

612c‧‧‧Switch

612d‧‧‧Switch

623‧‧‧Adjustable impedance circuit

700‧‧‧Signal combiner

724‧‧‧Harmonic suppression circuit

810a‧‧‧Capacitor

810b‧‧‧Capacitor

810c‧‧‧Capacitor

810d‧‧‧Capacitor

812a‧‧‧Inductor

812b‧‧‧Inductor

812c‧‧‧Inductor

812d‧‧‧Inductor

900‧‧‧Module / Dotted Box

902‧‧‧ package substrate

904‧‧‧FE-PMIC component

906‧‧‧Power Amplifier Assembly

907‧‧‧Combiner

908‧‧‧ matching components

910‧‧‧Multiplexer Assembly

912‧‧‧Antenna Switch Module (ASM)

914‧‧‧SMT device

1000‧‧‧ wireless device

1002‧‧‧user interface

1004‧‧‧Memory

1006‧‧‧Power Management Module

1008‧‧‧Baseband Subsystem

1010‧‧‧ Transceiver

1012a‧‧‧Duplexer

1012b‧‧‧Duplexer

1012c‧‧‧Duplexer

1012d‧‧‧Duplexer

1014‧‧‧Antenna switch

1016‧‧‧ Antenna

1020a‧‧‧matching circuit

1020b‧‧‧matching circuit

1020c‧‧‧matching circuit

1020d‧‧‧matching circuit

RF_IN‧‧‧Input port

RF_OUT‧‧‧Output port

FIG. 1 shows an exemplary architecture of a power amplifier (PA) in which a Duch combiner having one or more features as described herein can be implemented.

2A and 2B show an example of a hybrid circuit that can be used as a Dohert combiner.

FIG. 3 shows that in some embodiments, a signal combiner includes a termination circuit having a capacitor.

FIG. 4 shows that in some embodiments, a signal combiner includes a termination circuit having an inductor.

FIG. 5 shows that in some embodiments, a signal combiner includes a termination circuit having an adjustable impedance circuit.

FIG. 6 shows that in some embodiments, an adjustable impedance circuit may include a plurality of impedance elements connected in parallel.

FIG. 7 shows that in some embodiments, a signal combiner includes a termination circuit having a harmonic suppression circuit.

FIG. 8 shows that in some embodiments, a harmonic suppression circuit may include a plurality of resonant elements connected in series.

FIG. 9 depicts a module having one or more features as described herein.

FIG. 10 depicts a wireless device having one or more of the features described herein.

The headings, if any, provided herein are for convenience only and do not necessarily affect the scope or meaning of the invention.

In this article, a circuit is described that addresses the problem of maintaining high PAE under the linear requirements of the 4G LTE standard for a MMMB PAM by proposing one of the wideband tunable hybrid-based combiners for a Doherty power amplifier architecture , Systems and methods. Load modulation using Douhe power amplifiers is another method to maintain high efficiency under power back-off conditions. here In the method, two parallel PAMs (a carrier amplifier and a peak amplifier) are used. The peak amplifier modulates the load seen by the carrier amplifier, and therefore allows the carrier amplifier to maintain high efficiency, saturated operation (even at the fallback). This load modulation can be achieved using an impedance matching network with an impedance matched to a specific frequency. Therefore, for one MMMB PAM without an adjustable impedance circuit, several Duch PAMs (each of which requires two amplifiers) can be used to cover several frequency bands, which can make the implementation expensive and / or impractical .

FIG. 1 shows an exemplary architecture of a power amplifier (PA) 100 in which a Duch combiner having one or more features as described herein can be implemented. The architecture shown is a Duch PA architecture. Although various examples are described in the context of this Doherty PA architecture, it will be understood that one or more features of the present invention may also be implemented in other types of PA systems.

The exemplary PA 100 is shown to include an input port (RF_IN) for receiving an RF signal to be amplified. The input RF signal may be partially amplified by a pre-driver amplifier 102 before being divided into a carrier amplification path 110 and a peak amplification path 130. This division can be achieved by a divider 104.

In FIG. 1, the carrier amplification path 110 is shown to include an attenuator 112 and an amplification stage collectively designated 114. The amplifier stage 114 is shown to include a driver stage 116 and an output stage 120. The driver stage 116 is shown biased with a bias circuit 118 and the output stage 120 is shown biased with a bias circuit 122. In some embodiments, there may be more or fewer amplification stages. In the various examples described herein, the amplification stage 114 is sometimes described as an amplifier; however, it will be understood that such an amplifier may include one or more stages.

In FIG. 1, the peak amplification path 130 is shown to include a phase shift circuit 132 and an amplification stage collectively designated as 134. The amplifier stage 134 is shown to include a driver stage 136 and an output stage 140. The driver stage 136 is shown biased with a bias circuit 138, and the output stage 140 is shown biased with a bias circuit 142. In some embodiments, there may be more or fewer amplification stages. In the various examples described herein, the amplification stage 134 is sometimes described as an amplification However, it will be understood that such an amplifier may include one or more stages.

FIG. 1 further shows that the carrier amplification path 110 and the peak amplification path 130 can be combined by a combiner 144 to generate an amplified RF signal at an output port (RF_OUT). In this document, examples regarding the combiner 144 are described in more detail. For example, the combiner 144 may be implemented as one of the combiners of FIG. 3, FIG. 4, FIG. 5, or FIG. 7.

2A and 2B show an example of a hybrid circuit that can be used as a Dohert combiner. This hybrid circuit can be configured to be particularly suitable for applications such as RFIC (radio frequency integrated circuit), MMIC (monolithic microwave integrated circuit) and other RF modules. FIG. 2A shows a schematic representation of such a hybrid circuit, and FIG. 2B shows an exemplary layout of the hybrid circuit.

The hybrid circuit of FIGS. 2A and 2B may be implemented as a half-lumped 90-degree mixture based on a balun transformer. Due to the compact nature of the balun used, this design can be easily implemented on insulating / semi-insulating substrates such as silicon, GaAs, and IPD (Integrated Passive Device) substrates (eg, glass or silicon).

Therefore, in FIG. 2A, a signal combiner 244 is shown to include a first port 231, a second port 232, a third port 233, and a fourth port 234. A first capacitor 222 is coupled to the first port 231 and the second port 232. A second capacitor 223 is coupled to the third port 233 and the fourth port 234. The signal combiner 244 also includes a transformer 221 having four ports coupled to the four ports 231 to 234 of the signal combiner 244, respectively. In FIG. 2B, a substantially similar signal combiner 254 is illustrated to include a balanced-unbalanced transformer 251 having a first coil and a second coil.

In the example of FIG. 2A and FIG. 2B, a specific terminal may be provided at the isolated port (for example, the third port 231) to achieve the Duch effect. Examples of terminals are described in more detail herein.

In some embodiments, it can be shown that this particular terminal can be implemented as a capacitor (eg, a capacitor) whose reactance is equal in magnitude to the characteristic impedance of the system. Therefore, this capacitor can be expressed as C = 1 / (2πfZ ₀ ), where f is the operating frequency of the Douhe PA and Z ₀ is a characteristic impedance coupled to a load of the Douhe PA.

FIG. 3 shows that in some embodiments, a signal combiner 300 includes a termination circuit having a capacitor 323. The signal combiner 300 includes: a first input port 331 that can be configured to receive a carrier amplified signal of a Douhe PA; a second input port 332 that can be configured to receive one of a Douhe PA A peak amplified signal; and an output port 333 that outputs a combination of signals received at the first input port 331 and the second input port 432. The signal combiner 300 includes a transformer (for example, a balanced-unbalanced transformer) having a first coil 301 and a second coil 302. The first coil 301 is implemented between a first port 311 and a second port 312. A second coil 302 is implemented between a third port 313 and a fourth port 314. The first port 311 and the third port 313 are coupled by a first capacitor 321 and the second port 312 and the fourth port 314 are coupled by a second capacitor 322. The third port 313 is coupled to the ground through a termination circuit. The termination circuit includes a third capacitor 323 in FIG. 3. In some embodiments, the capacitances of the first capacitor 321 and the second capacitor 322 are equal. In some embodiments, the capacitance of the third capacitor 323 is twice the capacitance of the first capacitor 321 and / or the second capacitor 322.

In some embodiments, the capacitance of the third capacitor 323 is approximately equal to two times π times one of the operating frequency of the Douhe PA times one of the inverse of a characteristic impedance of a load coupled to the Douhe PA (eg, C = 1 / (2πfZ ₀ ), where f is the operating frequency of Duch PA and Z ₀ is a characteristic impedance coupled to a load of Duch PA.

It can be shown that an alternative configuration with an inductance terminal of L = Z ₀ / (2πf) can provide the Duch combiner functionality in a similar way. In this case, the port positions of the carrier and the peak amplifier are interchangeable.

FIG. 4 shows that in some embodiments, a signal combiner 400 includes a termination circuit having an inductor 423. The signal combiner 400 of FIG. 4 includes: a first input port 431 which can be configured to receive a carrier amplified signal of a Douhe PA; a second input port 432 which can be configured to receive a Douhe A peak amplified signal of PA; and an output port 433 that outputs a combination of signals received at the first input port 431 and the second input port 432. Signal group The coupler 400 includes a transformer (for example, a balanced-unbalanced transformer) having a first coil 401 and a second coil 402. A first coil 401 is implemented between a first port 411 and a second port 412. A second coil 402 is implemented between a third port 413 and a fourth port 414. The first port 411 and the third port 413 are coupled by a first capacitor 421 and the second port 412 and the fourth port 414 are coupled by a second capacitor 422. The third port 413 is coupled to the ground through a termination circuit. The termination circuit includes an inductor 423 in FIG. 4.

In some embodiments, the inductance of the inductor 423 is approximately equal to a characteristic impedance of a load coupled to the Douhe PA divided by two times π times one of the Douhe PA operating frequencies (e.g., two times π times Double PA) One operating frequency of the Hertz PA is multiplied by one of the inverse of one of the characteristic impedances coupled to one of the loads of the Doherty PA) (for example, L = Z ₀ / (2πf), where f is the operating frequency of the Doherty PA and Z ₀ is coupled One of the characteristic impedances of a load to Duch PA.

A signal combiner can be used for multiple modes or multiple operating frequencies as part of a multi-mode / multi-band (MMMB) power amplifier module (PAM). Therefore, in some implementations, unlike a single capacitor or a single inductor (as shown in Figures 3 and 4), an adjustable impedance circuit can be used and tuned to various frequencies and / or configurations Various impedances.

FIG. 5 shows that in some embodiments, a signal combiner 500 includes a termination circuit having an adjustable impedance circuit 523. The signal combiner 500 of FIG. 5 includes: a first input port 531 that can be configured to receive a carrier amplified signal of a Doherty PA (or in an alternative embodiment, a peak amplified signal of a Doherty PA) ); A second input port 532, which can be configured to receive a peak amplified signal of a Douhe PA (or in an alternative embodiment, a carrier amplified signal of a Douhe PA); and an output port 533, which A combination of signals received at the first input port 531 and the second input port 532 is output. The signal combiner 500 includes a transformer (for example, a balanced-unbalanced transformer) having a first coil 501 and a second coil 502. The first coil 501 is implemented between a first port 511 and a second port 512. A second coil 502 is implemented between a third port 513 and a fourth port 514. The first capacitor 521 is coupled to the first capacitor A port 511 and a third port 513 are coupled to the second port 512 and the fourth port 514 through a second capacitor 522. The third port 513 is coupled to the ground through a termination circuit. The termination circuit includes an adjustable impedance circuit 523 in FIG. 5.

The signal combiner 500 is controlled by a controller 520 configured to receive a band selection signal indicating a current operating frequency of one of the indication systems (of which the signal combiner 500 is a part). The controller 520 is further configured to tune the adjustable impedance circuit 523 based on the band selection signal. In some implementations, the controller 520 is further configured to tune at least one of the first capacitor 521 or the second capacitor 522.

In some implementations, the first port 511 is configured to receive a carrier amplification signal from a Douhe PA (eg, via the first input port 531), and the fourth port 514 is configured to receive a carrier signal from the Douhe PA. The peak amplified signal (eg, via the second input port 532). Therefore, the controller 520 can be configured to tune the adjustable impedance circuit 523 to have a load approximately equal to two times π times the operating frequency (as indicated by the band selection signal) multiplied by one of the loads coupled to the Duch PA. One of the characteristic impedances is one of the penultimate capacitors. The controller 520 may further tune the first capacitor 521 and / or the second capacitor 522 to have a capacitance approximately equal to one and a half of the capacitance of the adjustable impedance circuit 523.

In some embodiments, the first port 511 is configured to receive a peak amplified signal from a Doherty PA (eg, via the first input port 531), and the fourth port 514 is configured to receive a peaked signal from the Doherty PA. The carrier amplifies the signal (for example, via the second input port 532). Therefore, the controller 520 can be configured to tune the adjustable impedance circuit 523 to have a characteristic impedance approximately equal to one of the loads coupled to the Douhe PA divided by two times π times the operating frequency (e.g., by a band selection signal (Indicated)).

FIG. 6 shows that in some embodiments, an adjustable impedance circuit 623 may include a plurality of impedance elements connected in parallel. Each of the impedance elements connected in parallel includes an impedance 610a to 610d and a switch 612a to 612d connected in series. The impedances 610a to 610d may include one or more resistors, capacitors, and / or inductors. Switches 612a to 612d can be controlled by a controller (For example, the controller 520 of FIG. 5) is controlled to be an open state or a closed state to tune the adjustable impedance circuit 623 to have a specific impedance.

In some implementations, the adjustable impedance circuit 623 is a portion of a system configured to operate one of the Douch PAs at one or more operating frequencies. Therefore, the impedances 610a to 610d may include a plurality of capacitors, each of the plurality of capacitors having a characteristic that is approximately equal to one of two times π times one of a Douhe PA and an operating frequency of one of the loads coupled to the Douhe PA One of the reciprocals of the impedance. The impedances 610a to 610d may alternatively (or additionally) include a plurality of inductors, each of the plurality of inductors having a characteristic impedance approximately equal to one of the loads coupled to one of the Duch PAs divided by two times pi times du One of the Hertz PAs operates at one frequency and one of the inductors.

FIG. 7 shows that in some embodiments, a signal combiner 700 includes a termination circuit having a harmonic suppression circuit 724. The signal combiner 700 of FIG. 7 is substantially similar to the signal combiner 500 of FIG. 5, except that the signal combiner 700 of FIG. 7 includes a harmonic suppression circuit 724 implemented between the third port 513 and the adjustable impedance circuit 523. .

The harmonic suppression circuit 724 is configured to reduce the intensity of one or more harmonics at the second port 512 (and therefore the output port 533). When the first input port 531 is configured to receive a carrier amplified signal and the second input port 532 is configured to receive a peak amplified signal, the carrier amplified signal and the peak amplified signal may include undesired harmonics of the amplified RF signal. wave. The harmonic suppression circuit 724 is configured to reduce the intensity of these harmonics at the output port 533.

FIG. 8 shows that in some embodiments, a harmonic suppression circuit 823 may include a plurality of resonant elements connected in series. Each of the resonance elements includes an inductor 812a to 812d and a capacitor 810a to 810d connected in parallel. Each of the plurality of resonance elements may have a resonance frequency approximately equal to a multiple of an operating frequency (one of a group of operating frequencies) of the system (a part of the harmonic suppression circuit 823). For example, in some implementations, each of the plurality of resonant elements has a resonant frequency approximately equal to twice the respective operating frequency of one of the signal combiners. Therefore, if the system containing the harmonic suppression circuit 823 is configured to When one or more of a first frequency, a second frequency, and a third frequency are operated, the resonant element may have respective resonant frequencies that are twice the first frequency, twice the second frequency, and twice the third frequency. .

FIG. 9 shows that in some embodiments, some or all configurations may be implemented in whole or in part in a module (eg, the configurations shown in FIGS. 1, 2A, 2B, and 3 to 8). This module may be, for example, a front-end module (FEM). In the example of FIG. 9, a module 900 may include a package substrate 902, and several components may be mounted on the package substrate 902. For example, a FE-PMIC component 904, a power amplifier assembly 906 (which may include a combiner 907 with an adjustable impedance circuit), and / or may be installed and / or implemented on and / or within the package substrate 902, a The matching component 908 and a multiplexer assembly 910. Other components such as several SMT devices 914 and an antenna switch module (ASM) 912 can also be mounted on the package substrate 902. Although all the various components are depicted as being laid out on a package substrate 902, it will be understood that some components may be implemented over other components.

In some embodiments, a device and / or a circuit having one or more of the features described herein may be included in an RF electronic device such as a wireless device. Such a device and / or a circuit may be implemented directly in a wireless device in a modular form or some combination thereof as described herein. In some embodiments, the wireless device may include, for example, a cellular phone, a smart phone, a handheld wireless device with or without phone functionality, a wireless tablet, and the like.

FIG. 10 depicts an exemplary wireless device 1000 having one or more advantageous features described herein. In the context of a module having one or more features as described herein, such a module can generally be depicted by a dashed box 900, and the module can be implemented, for example, as a front-end module Group (FEM).

10, power amplifiers (PA) 100a to 100d may receive their respective RF signals from a transceiver 1010, which is configured and operated in a known manner to generate RF signals to be amplified and transmitted and process the received signals . Transceiver 1010 is shown with a baseband System 1008 interacts, and baseband subsystem 1008 is configured to provide conversion between data and / or voice signals suitable for a user and RF signals suitable for transceiver 1010. The transceiver 1010 may also communicate with a power management component 1006, which is configured to manage power for operation of the wireless device 1000. This power management can also control the operation of the baseband subsystem 1008 and the module 900.

The baseband subsystem 1008 is shown connected to a user interface 1002 to facilitate various inputs and outputs of voice and / or data provided to and received from the user. The baseband subsystem 1008 may also be connected to a memory 1004, which is configured to store data and / or instructions to facilitate the operation of the wireless device and / or provide storage of information for the user.

In the exemplary wireless device 1000, the outputs of the PAs 100a to 100d are shown matched (via respective matching circuits 1020a to 1020d) and routed to their respective duplexers 1012a to 1012d. These amplified and filtered signals can be routed through an antenna switch 1014 to an antenna 1016 (or multiple antennas) for transmission. In some embodiments, the duplexers 1012a to 1012d may allow a common antenna (eg, 1016) to perform transmission and reception operations simultaneously. In FIG. 10, the received signal is routed to the "Rx" path (not shown). The "Rx" path may include, for example, a low noise amplifier (LNA).

Several other wireless device configurations may utilize one or more of the features described herein. For example, a wireless device need not be a multi-band device. In another example, a wireless device may include additional antennas (such as diversity antennas) and additional connectivity features (such as Wi-Fi, Bluetooth, and GPS).

Unless the context clearly requires otherwise, the words "comprise", "comprising", and the like shall be interpreted as an inclusive meaning, rather than an exclusive or exhaustive meaning, throughout the description and patent application. ; That is, the meaning of "including but not limited to." The term "coupled" as commonly used herein refers to two or more elements that can be directly connected or connected through one or more intermediate elements. In addition, when the words "in this text", "above", "below" and similar input words are used in this application, they shall mean this One of the applications as a whole rather than any specific part of the application. Where the context permits, words using the singular or plural number in the above description may also include the plural or singular number respectively. Reference to the word "or" in a list of two or more items covers all of the following interpretations of the word: any item in the list, all items in the list, and any combination of items in the list.

The above implementations of the embodiments of the invention are not intended to be exhaustive or to limit the invention to the precise forms disclosed above. As those skilled in the relevant art will appreciate, although specific embodiments and examples of the invention are described above for illustrative purposes only, various equivalent modifications may be within the scope of the invention. For example, although programs or blocks are presented in a given order, alternative embodiments may implement a routine with steps or a system with blocks in a different order, and may delete, move, add, subdivide, combine And / or modify some programs or blocks. Each of these programs or blocks can be implemented in a variety of different ways. Moreover, although programs or blocks are sometimes shown as being performed sequentially, such programs or blocks may alternatively be performed in parallel or at different times.

The teachings of the invention provided herein can be applied to other systems (it need not be the systems described above). The elements and actions of the various embodiments described above may be combined to provide further embodiments.

Although some embodiments of the invention have been described, these embodiments are presented by way of example only and are not intended to limit the scope of the invention. Indeed, the novel methods and systems described herein may be embodied in various other forms; moreover, various omissions, substitutions, and changes may be made in the forms of the methods and systems described herein without departing from the spirit of the invention. The scope of the accompanying patent application and equivalents are intended to cover such forms or modifications as would fall within the scope and spirit of the invention.

Claims (19)

A signal combiner includes: a balanced-unbalanced transformer circuit having a first coil and a second coil, the first coil is implemented between a first port and a second port, and a third The second coil is implemented between a port and a fourth port, the first port and the third port are coupled by a first capacitor, and the second port and the fourth port are coupled by a second capacitor, The first port is configured to receive a first signal, the fourth port is configured to receive a second signal, and the second port is configured to generate a combination of the first signal and the second signal; And a terminal circuit, which couples the third port to a ground, the terminal circuit includes an adjustable impedance circuit, and a harmonic suppression circuit, the harmonic suppression circuit is configured to reduce the The strength of one or more harmonics. The signal combiner of claim 1, further comprising a controller configured to receive a frequency band selection signal and tune the adjustable impedance circuit based on the frequency band selection signal. The signal combiner of claim 2, wherein the controller is further configured to tune at least one of the first capacitor or the second capacitor. The signal combiner of claim 1, wherein the first port is configured to receive a carrier amplified signal from a Doherty power amplifier, and the fourth port is configured to receive a peak amplified signal from the Doherty power amplifier. . The signal combiner of claim 4, wherein the adjustable impedance circuit includes a plurality of capacitors, each of the plurality of capacitors having a frequency equal to approximately two times pi times one of the Douhe power amplifiers and the respective operating frequency times the coupled To the Douhe power amplifier, a load, a characteristic impedance, a penultimate capacitance. The signal combiner of claim 4, further comprising a controller configured to receive a frequency band selection signal indicative of an operating frequency, and tuning the adjustable impedance circuit to have a value approximately equal to two times π times by The operating frequency is multiplied by a reciprocal capacitance of a characteristic impedance of a load coupled to the Douhe power amplifier. The signal combiner of claim 6, wherein the controller is further configured to tune the first capacitor and the second capacitor to have a capacitance approximately equal to one and a half of the capacitance of the adjustable impedance circuit. The signal combiner of claim 1, wherein the first port is configured to receive a peak amplified signal from a Doherty power amplifier, and the fourth port is configured to receive a carrier amplified signal from the Doherty power amplifier. . The signal combiner of claim 8, wherein the adjustable impedance circuit includes a plurality of inductors, each of the plurality of inductors has a characteristic impedance approximately equal to one of the loads coupled to the Douhe power amplifier divided by two Multiply π by one of the inductances of the respective operating frequency of the Douhe power amplifier. The signal combiner of claim 8, further comprising a controller configured to receive a frequency band selection signal indicative of an operating frequency, and tune the adjustable impedance circuit to have a value approximately equal to that coupled to the Duch A characteristic impedance of a load of a power amplifier divided by two times π times an inductance of the operating frequency. For example, the signal combiner of claim 1, wherein the adjustable impedance matching circuit includes a plurality of impedance elements connected in parallel, and each of the plurality of impedance elements includes an impedance and a switch connected in series. The signal combiner of claim 1, wherein the harmonic suppression circuit includes a plurality of resonance elements connected in series, and each of the plurality of resonance elements includes an inductor and a capacitor connected in parallel. The signal combiner of claim 12, wherein each of the plurality of resonance elements has a resonance frequency approximately equal to a multiple of an operating frequency of the signal combiner. The signal combiner of claim 13, wherein each of the plurality of resonance elements has a resonance frequency that is approximately equal to twice the respective operating frequency of one of the signal combiners. The signal combiner of claim 1, wherein the harmonic suppression circuit is implemented between the third port and the adjustable impedance circuit. A power amplifier module includes: a package substrate configured to receive a plurality of components; and a signal combiner implemented on the package substrate. The signal combiner includes a first coil and a One of the second coils is a balanced-unbalanced transformer circuit. The first coil is implemented between a first port and a second port, and the second coil is implemented between a third port and a fourth port. A first capacitor is coupled to the first port and the third port, and a second capacitor is coupled to the second port and the fourth port. The first port is configured to receive a first signal. The four ports are configured to receive a second signal, the second port is configured to generate a combination of the first signal and one of the second signal, and the signal combiner further includes coupling the third port to a grounded A terminal circuit includes an adjustable impedance circuit and a harmonic suppression circuit. The harmonic suppression circuit is configured to reduce the intensity of one or more harmonics at the second port. The power amplifier module of claim 16 further includes a controller implemented on the package substrate. The controller is configured to receive a frequency band selection signal and tune the adjustable impedance circuit based on the frequency band selection signal. A wireless device includes: a transceiver configured to generate a radio frequency signal; and a power amplifier module that communicates with the transceiver. The power amplifier module includes an input circuit that is configured. In order to receive the RF signal and split the RF signal into a first part and a second part, the power amplifier module further includes a Douhe power amplifier, the Douhe power amplifier is coupled to the input circuit to receive the first A part of a carrier amplification path and a peak amplification path coupled to the input circuit to receive the second part of a peak amplification path. The power amplifier module further includes an output circuit coupled to the Doher amplifier circuit. The output circuit includes A balanced-unbalanced transformer circuit of a first coil and a second coil, the first coil is implemented between a first port and a second port, and the first coil is implemented between a third port and a fourth port The second coil is coupled to the first port and the third port by a first capacitor, and the second port is coupled to the fourth port by a second capacitor. The first port is configured to receive a first signal through the carrier amplification path, the fourth port is configured to receive a second signal through the peak amplification path, and the second port is configured to generate the first signal A signal is combined with one of the second signals as an amplified RF signal. The power amplifier module further includes a terminating circuit coupled to the third port to a ground. The terminating circuit includes an adjustable impedance circuit, and a A harmonic suppression circuit configured to reduce the intensity of one or more harmonics at the second port; and an antenna configured to communicate with the power amplifier module, the antenna configured to Facilitates transmission of the amplified RF signal. The wireless device of claim 18, further comprising a controller configured to receive a band selection signal and tune the adjustable impedance circuit based on the band selection signal.