TWI660075B - Method for manufacturing polysilicon layer, heterojunction solar cell and manufacturing method thereof - Google Patents

Abstract

A method for manufacturing a polycrystalline silicon layer includes the following steps. Provide a substrate. A microcrystalline silicon seed layer is formed on the substrate, wherein the microcrystalline silicon seed layer includes a plurality of microcrystalline silicon seeds. An amorphous silicon layer is formed on the microcrystalline silicon seed layer. The amorphous silicon layer is melted, and the molten amorphous silicon layer is recrystallized on the microcrystalline silicon seed to form a polycrystalline silicon layer.

Description

Manufacturing method of polycrystalline silicon layer, heterojunction solar cell and manufacturing method thereof

The invention relates to a method for manufacturing a semiconductor layer, a solar cell structure and a method for manufacturing the same, and more particularly to a method for manufacturing a polycrystalline silicon layer, a heterojunction solar cell, and a method for manufacturing the same.

At present, because the grain size of low-temperature polycrystalline silicon cannot be greatly improved, in order to form a better low-temperature polycrystalline silicon structure, Sequential Lateral Solidification (SLS), Phase Shift Mask, and non-crystalline silicon have been developed. Crystal silicon planarization (floating α-Si layer) and other processes. However, the use of these methods requires additional equipment, which increases the equipment cost of the process, and it is not easy to integrate into the existing process.

The invention provides a method for manufacturing a polycrystalline silicon layer, which can reduce equipment investment costs and is easy to integrate with existing processes.

The invention provides a heterojunction solar cell and a manufacturing method thereof, which can have better photoelectric conversion efficiency.

The invention provides a method for manufacturing a polycrystalline silicon layer, which includes the following steps. Provide a substrate. A microcrystalline silicon seed layer is formed on the substrate, wherein the microcrystalline silicon seed layer includes a plurality of microcrystalline silicon seeds. An amorphous silicon layer is formed on the microcrystalline silicon seed layer. The amorphous silicon layer is melted, and the molten amorphous silicon layer is recrystallized on the microcrystalline silicon seed to form a polycrystalline silicon layer.

According to an embodiment of the present invention, in the method for manufacturing a polycrystalline silicon layer, the substrate is, for example, a semiconductor substrate, a glass substrate, a plastic substrate, or a stainless steel substrate.

According to an embodiment of the present invention, in the method for manufacturing a polycrystalline silicon layer, a method for forming a microcrystalline silicon seed layer is, for example, a plasma enhanced chemical vapor deposition (PECVD) method with multi-point electromagnetic wave feeding.

According to an embodiment of the present invention, in the method for manufacturing a polycrystalline silicon layer, a method for forming an amorphous silicon layer is, for example, a plasma enhanced chemical vapor deposition method.

According to an embodiment of the present invention, in the method for manufacturing a polycrystalline silicon layer, a method of melting an amorphous silicon layer is, for example, an annealing process.

According to an embodiment of the present invention, in the method for manufacturing a polycrystalline silicon layer, the annealing process is, for example, a laser annealing process.

The invention provides a heterojunction solar cell, which includes a first doped substrate, a first intrinsic semiconductor layer, at least one polycrystalline silicon layer, a second doped semiconductor layer, a first doped semiconductor layer, and a first transparent electrode. Film, second transparent electrode film, first electrode and second electrode. The first doped substrate has a first surface and a second surface opposite to each other. A first intrinsic type semiconductor layer is disposed on the first surface. The polycrystalline silicon layer is disposed on the first intrinsic semiconductor layer. The second doped semiconductor layer is disposed on the polycrystalline silicon layer. The first doped semiconductor layer is disposed on the second surface. The first transparent electrode film is disposed on the second doped semiconductor layer. The second transparent electrode film is disposed on the first doped semiconductor layer. The first electrode is disposed on the first transparent electrode film. The second electrode is disposed on the second transparent electrode film.

According to an embodiment of the present invention, in the heterojunction solar cell, the polycrystalline silicon layer may be a first doped polycrystalline silicon layer, a second doped polycrystalline silicon layer, or a combination thereof.

According to an embodiment of the present invention, the heterojunction solar cell further includes a second intrinsic semiconductor layer. The second intrinsic semiconductor layer is disposed between the first doped substrate and the first doped semiconductor layer.

The invention provides a method for manufacturing a heterojunction solar cell, which includes the following steps. A first doped substrate is provided. The first doped substrate has a first surface and a second surface opposite to each other. A first intrinsic semiconductor layer is formed on the first surface. Forming at least one polycrystalline silicon layer on the first intrinsic semiconductor layer. A second doped semiconductor layer is formed on the polycrystalline silicon layer. A first doped semiconductor layer is formed on the second surface. A first transparent electrode film is formed on the second doped semiconductor layer. A second transparent electrode film is formed on the first doped semiconductor layer. A first electrode is formed on the first transparent electrode film. A second electrode is formed on the second transparent electrode film.

According to an embodiment of the present invention, in the method for manufacturing a heterojunction solar cell, the polycrystalline silicon layer may be a first doped polycrystalline silicon layer, a second doped polycrystalline silicon layer, or a combination thereof.

According to an embodiment of the present invention, in the method for manufacturing a heterojunction solar cell, a method for forming a polycrystalline silicon layer includes the following steps. A microcrystalline silicon seed layer is formed. The microcrystalline silicon seed layer includes a plurality of microcrystalline silicon seeds. An amorphous silicon layer is formed on the microcrystalline silicon seed layer. The amorphous silicon layer is melted, and the molten amorphous silicon layer is recrystallized on the microcrystalline silicon seed to form a polycrystalline silicon layer.

According to an embodiment of the present invention, in the method for manufacturing a heterojunction solar cell, the method further includes forming a second intrinsic semiconductor layer between the first doped substrate and the first doped semiconductor layer.

Based on the above, in the method for manufacturing a polycrystalline silicon layer proposed by the present invention, after the amorphous silicon layer is melted, a temperature gradient is generated between the molten amorphous silicon layer and the microcrystalline silicon seed, so that the molten amorphous silicon layer The silicon layer is recrystallized from the lower temperature microcrystalline silicon seed crystal, thereby forming a polycrystalline silicon layer at a lower process temperature. In addition, since the molten amorphous silicon layer has sufficient time for directional crystallization, a polycrystalline silicon layer having a better crystalline structure can be formed, so that the polycrystalline silicon layer can have better electrical properties and stability. In addition, since the method for manufacturing a polycrystalline silicon layer provided by the present invention can produce a polycrystalline silicon layer having a better crystalline structure without adding additional equipment, equipment investment costs can be reduced, and integration with existing processes is easy.

On the other hand, in the heterojunction solar cell and the manufacturing method thereof proposed by the present invention, since the polycrystalline silicon layer provided between the first intrinsic semiconductor layer and the second doped semiconductor layer can be used as a light absorption layer, Can effectively increase the open circuit voltage (Voc) and short circuit current (Jsc), and then improve the photoelectric conversion efficiency of the solar cell with heterojunction.

In order to make the above features and advantages of the present invention more comprehensible, embodiments are hereinafter described in detail with reference to the accompanying drawings.

FIG. 1 is a manufacturing flowchart of a polycrystalline silicon layer according to an embodiment of the present invention. 2A to 2B are cross-sectional views of a manufacturing process of a polycrystalline silicon layer according to an embodiment of the present invention.

Referring to FIG. 1 and FIG. 2A, step S100 is performed to provide a substrate 100. The substrate 100 is, for example, a semiconductor substrate, a glass substrate, a plastic substrate, or a stainless steel substrate. In addition, according to product requirements, a desired film layer may be formed on the substrate 100.

Next, step S102 is performed to form a microcrystalline silicon seed layer 102 on the substrate 100, where the microcrystalline silicon seed layer 102 includes a plurality of microcrystalline silicon seeds 102a. In addition, the microcrystalline silicon seed layer 102 may further include an amorphous silicon material 102b. The amorphous silicon material 102b covers the microcrystalline silicon seed 102a. The method for forming the microcrystalline silicon seed layer 102 is, for example, a plasma enhanced chemical vapor deposition method in which multiple points of electromagnetic waves are fed, thereby forming a regular microcrystalline silicon seed layer 102a.

Then, step S104 is performed to form an amorphous silicon layer 104 on the microcrystalline silicon seed layer 102. A method for forming the amorphous silicon layer 104 is, for example, a chemical vapor deposition method, such as a plasma enhanced chemical vapor deposition method.

Referring to FIG. 1 and FIG. 2B, step S106 is performed to melt the amorphous silicon layer 104, and the molten amorphous silicon layer 104 is recrystallized on the microcrystalline silicon seed 102a to form a polycrystalline silicon layer 106. In step S106, the amorphous silicon material 102b can also be melted and recrystallized on the microcrystalline silicon seed 102a at the same time according to the actual process conditions and desired characteristics to form a polycrystalline silicon layer 106. Thereby, the polycrystalline silicon layer 106 can be formed at a lower process temperature, so the polycrystalline silicon layer 106 can be a low-temperature polycrystalline silicon layer. A method for melting the amorphous silicon layer 104 is, for example, an annealing process, such as a laser annealing process. The laser beam used in the laser annealing process is, for example, an excimer laser beam, such as a xenon chloride (XeCl) laser beam or krypton fluoride (KrF).

Based on the above embodiment, it can be known that after the amorphous silicon layer 104 is melted, a temperature gradient occurs between the molten amorphous silicon layer 104 and the microcrystalline silicon seed 102a, so that the molten amorphous silicon layer 104 has a lower temperature The microcrystalline silicon seed 102a is recrystallized, thereby forming a polycrystalline silicon layer 106 at a lower process temperature. In addition, since the molten amorphous silicon layer 104 has sufficient time for directional crystallization, a polycrystalline silicon layer 106 having a better crystalline structure can be formed, so that the polycrystalline silicon layer 106 can have better electrical properties and stability. In addition, since the above-mentioned manufacturing method of the polycrystalline silicon layer 106 can produce a polycrystalline silicon layer 106 with a better crystalline structure without adding additional equipment, equipment investment costs can be reduced, and integration with existing processes is easy.

FIG. 3 is a perspective view of a heterojunction solar cell according to an embodiment of the present invention.

Hereinafter, a method for manufacturing a heterojunction solar cell 200 according to this embodiment will be described with reference to FIG. 3.

A first doped substrate 202 is provided. The first doped substrate 202 has a first surface S1 and a second surface S2 opposite to each other. The first doped type and the second doped type are different doped types, and may be one of the N-type and the P-type, respectively. In this embodiment, the first doped type is described using an N-type as an example, and the second doped type is described using a P-type as an example, but the present invention is not limited thereto. In another embodiment, the first doped type may be a P-type, and the second doped type may be an N-type. The substrate 110 is, for example, a semiconductor substrate such as a silicon substrate. In this embodiment, the substrate 110 is described using an N-type single crystal silicon substrate as an example.

A first intrinsic semiconductor layer 204 is formed on the first surface S1. The material of the first intrinsic type semiconductor layer 204 is, for example, amorphous silicon. The method for forming the first intrinsic semiconductor layer 204 is, for example, a chemical vapor deposition method, such as a plasma enhanced chemical vapor deposition method.

At least one polycrystalline silicon layer 206 is formed on the first intrinsic semiconductor layer 204. The polycrystalline silicon layer 206 can be used as a light absorbing layer, so the photoelectric conversion efficiency of the hetero junction solar cell 200 can be effectively improved. The polycrystalline silicon layer 206 may have a single-layer structure or a multi-layer structure. The polycrystalline silicon layer 206 may be a first doped polycrystalline silicon layer (eg, an N-type doped polycrystalline silicon layer), a second doped polycrystalline silicon layer (eg, a P-type doped polycrystalline silicon layer), or a combination thereof. In this embodiment, the polycrystalline silicon layer 206 is described by taking a single-layer structure of a second doped polycrystalline silicon layer (eg, a P-type doped polycrystalline silicon layer) as an example. In other embodiments, when the polycrystalline silicon layer 206 is a multilayer structure, the polycrystalline silicon layer 206 may be a first doped polycrystalline silicon layer (eg, an N-type doped polycrystalline silicon layer) and a second doped polycrystalline silicon layer arranged alternately. Layers (eg, P-type doped polycrystalline silicon layers), and battery cells connected in series are formed in the heterojunction solar cell 200.

In addition, the polycrystalline silicon layer 206 may be a low-temperature polycrystalline silicon layer. The method for forming the polycrystalline silicon layer 206 may be the method for forming the polycrystalline silicon layer 106 described in FIG. 1, FIG. 2A, and FIG. 2B, and the description is not repeated here. In addition, in the case where the polycrystalline silicon layer 206 has a multilayer structure, steps S102 (forming a microcrystalline silicon seed layer), step S104 (forming an amorphous silicon layer), and step S106 (making an amorphous silicon layer) in FIG. Melt and recrystallize on the microcrystalline silicon seed to form a polycrystalline silicon layer). In the method for forming the polycrystalline silicon layer 206, the doping type of the polycrystalline silicon layer 206 can be determined by adjusting the deposition gas.

A second doped semiconductor layer 208 is formed on the polycrystalline silicon layer 206. The material of the second doped semiconductor layer 208 is, for example, amorphous silicon. In this embodiment, the second doped semiconductor layer 208 is described by taking a P-type amorphous silicon layer as an example. A method for forming the second doped semiconductor layer 208 is, for example, a chemical vapor deposition method, such as a plasma enhanced chemical vapor deposition method.

A second intrinsic type semiconductor layer 210 may be selectively formed on the second surface S2. The material of the second intrinsic type semiconductor layer 210 is, for example, amorphous silicon. The method for forming the second intrinsic type semiconductor layer 210 is, for example, a chemical vapor deposition method, such as a plasma enhanced chemical vapor deposition method.

A first doped semiconductor layer 212 is formed on the second intrinsic semiconductor layer 210. The material of the first doped semiconductor layer 212 is, for example, amorphous silicon. In this embodiment, the first doped semiconductor layer 212 is described using an N-type amorphous silicon layer as an example. The method for forming the first doped semiconductor layer 212 is, for example, a chemical vapor deposition method, such as a plasma enhanced chemical vapor deposition method.

A first transparent electrode film 214 may be formed on the second doped semiconductor layer 208, and a second transparent electrode film 216 may be formed on the first doped semiconductor layer 212. The first transparent electrode film 214 and the second transparent electrode film 216 can be used to improve the current collection efficiency. The material of the first transparent electrode film 214 and the second transparent electrode film 216 may be a transparent conductive oxide (TCO), such as a metal oxide such as indium tin oxide (ITO). A method of forming the first transparent electrode film 214 and the second transparent electrode film 216 is, for example, a sputtering method or a vapor deposition method.

A first electrode 218 may be formed on the first transparent electrode film 214, and a second electrode 220 may be formed on the second transparent electrode film 216. The first electrode 218 and the second electrode 220 can be used to extract power generated by the heterojunction solar cell 200. The material of the first electrode 218 and the second electrode 220 is, for example, a metal such as aluminum, copper, gold, or silver. In this embodiment, the first electrode 218 and the second electrode 220 are described by taking a grid electrode as an example, but the present invention is not limited thereto. In another embodiment, when the first surface S1 is a light incident surface, the second electrode 220 may also be an entire electrode structure covering the second transparent electrode film 216.

Hereinafter, the structure of the heterojunction solar cell 200 according to this embodiment will be described with reference to FIG. 3.

3, a heterojunction solar cell 200 includes a first doped substrate 202, a first intrinsic semiconductor layer 204, at least one polycrystalline silicon layer 206, a second doped semiconductor layer 208, and a first doped semiconductor layer. 212, and may further include at least one of a second intrinsic type semiconductor layer 210, a first transparent electrode film 214, a second transparent electrode film 216, a first electrode 218, and a second electrode 220. The first doped substrate 202 has a first surface S1 and a first surface S2 opposite to each other. The first intrinsic type semiconductor layer 204 is disposed on the first surface S1. The polycrystalline silicon layer 206 is disposed on the first intrinsic semiconductor layer 204. The second doped semiconductor layer 208 is disposed on the polycrystalline silicon layer 206. The first doped semiconductor layer 212 is disposed on the first surface S2. The second intrinsic semiconductor layer 210 is disposed between the first doped substrate 202 and the first doped semiconductor layer 212. The first transparent electrode film 214 is disposed on the second doped semiconductor layer 208. The second transparent electrode film 216 is disposed on the first doped semiconductor layer 212. The first electrode 218 is disposed on the first transparent electrode film 214. The second electrode 220 is disposed on the second transparent electrode film 216.

In addition, the materials, forms, forming methods, and effects of the components in the heterojunction solar cell 200 have been described in detail in the above embodiments, and are not repeated here.

Based on the above embodiments, it can be known that in the heterojunction solar cell 200 and the manufacturing method thereof, since the polycrystalline silicon layer 206 provided between the first intrinsic semiconductor layer 204 and the second doped semiconductor layer 208 can serve as a light absorption layer, Therefore, the open-circuit voltage and the short-circuit current can be effectively improved, and the photoelectric conversion efficiency of the heterojunction solar cell 200 can be improved.

In summary, the method for manufacturing the polycrystalline silicon layer in the above embodiment can form a polycrystalline silicon layer having a better crystal structure at a lower process temperature, so that the polycrystalline silicon layer can have better electrical properties and stability. In addition, the method for manufacturing a polycrystalline silicon layer in the above embodiment can produce a polycrystalline silicon layer with a better crystal structure without adding additional equipment, so the equipment investment cost can be reduced, and it can be easily integrated with existing processes.

On the other hand, in the heterojunction solar cell and the manufacturing method thereof in the above embodiments, the polycrystalline silicon layer can be used as a light absorption layer to effectively improve the photoelectric conversion efficiency of the heterojunction solar cell.

Although the present invention has been disclosed as above with the examples, it is not intended to limit the present invention. Any person with ordinary knowledge in the technical field can make some modifications and retouching without departing from the spirit and scope of the present invention. The protection scope of the present invention shall be determined by the scope of the attached patent application.

100‧‧‧ substrate

102‧‧‧Microcrystalline silicon seed layer

102a‧‧‧Microcrystalline silicon seed

102b‧‧‧Amorphous silicon material

104‧‧‧amorphous silicon layer

106‧‧‧Polycrystalline silicon layer

200‧‧‧heterojunction solar cell

202‧‧‧First doped substrate

204‧‧‧The first essential semiconductor layer

206‧‧‧polycrystalline silicon layer

208‧‧‧Second doped semiconductor layer

210‧‧‧Second Intrinsic Semiconductor Layer

212‧‧‧first doped semiconductor layer

214‧‧‧The first transparent electrode film

216‧‧‧Second transparent electrode film

218‧‧‧First electrode

220‧‧‧Second electrode

S1‧‧‧First surface

S2‧‧‧Second surface

S100, S102, S104, S106 ‧‧‧ steps

FIG. 1 is a manufacturing flowchart of a polycrystalline silicon layer according to an embodiment of the present invention. 2A to 2B are cross-sectional views of a manufacturing process of a polycrystalline silicon layer according to an embodiment of the present invention. FIG. 3 is a perspective view of a heterojunction solar cell according to an embodiment of the present invention.

Claims (11)

A method for manufacturing a polycrystalline silicon layer includes: providing a substrate; and forming a microcrystalline silicon seed layer on the substrate, wherein the microcrystalline silicon seed layer includes a plurality of microcrystalline silicon seeds, wherein the microcrystalline silicon crystal A method for forming a seed layer includes a plasma enhanced chemical vapor deposition method in which multiple points of electromagnetic waves are fed; forming an amorphous silicon layer on the microcrystalline silicon seed layer; and melting and melting the amorphous silicon layer. The amorphous silicon layer is recrystallized on the plurality of microcrystalline silicon seeds to form a polycrystalline silicon layer. The method for manufacturing a polycrystalline silicon layer according to item 1 of the scope of patent application, wherein the substrate includes a semiconductor substrate, a glass substrate, a plastic substrate, or a stainless steel substrate. The method for manufacturing a polycrystalline silicon layer according to item 1 of the scope of patent application, wherein the method for forming the amorphous silicon layer includes a plasma enhanced chemical vapor deposition method. The method for manufacturing a polycrystalline silicon layer according to item 1 of the scope of patent application, wherein the method of melting the amorphous silicon layer includes performing an annealing process. The method for manufacturing a polycrystalline silicon layer according to item 4 of the scope of patent application, wherein the annealing process includes a laser annealing process. A heterojunction solar cell includes: a first doped substrate having a first surface and a second surface opposite to each other; a first intrinsic semiconductor layer disposed on the first surface; and at least one polycrystalline silicon layer disposed on On the first intrinsic type semiconductor layer, wherein the at least one polycrystalline silicon layer is made by the method for manufacturing a polycrystalline silicon layer according to any one of claims 1 to 5 of a patent application scope; a second doped type A semiconductor layer is disposed on the at least one polycrystalline silicon layer; a first doped semiconductor layer is disposed on the second surface; a first transparent electrode film is disposed on the second doped semiconductor layer; Two transparent electrode films are disposed on the first doped semiconductor layer; a first electrode is disposed on the first transparent electrode film; and a second electrode is disposed on the second transparent electrode film. The heterojunction solar cell according to item 6 of the application, wherein the at least one polycrystalline silicon layer includes a first doped polycrystalline silicon layer, a second doped polycrystalline silicon layer, or a combination thereof. The heterojunction solar cell according to item 6 of the patent application scope further includes a second intrinsic semiconductor layer, which is disposed between the first doped substrate and the first doped semiconductor layer. A method for manufacturing a heterojunction solar cell includes: providing a first doped substrate, wherein the first doped substrate has a first surface and a second surface opposite to each other; and a first surface is formed on the first surface. Intrinsic semiconductor layer; forming at least one polycrystalline silicon layer on the first intrinsic semiconductor layer, wherein the method for forming the at least one polycrystalline silicon layer includes forming a microcrystalline silicon seed layer, wherein the microcrystalline silicon seed layer Including a plurality of microcrystalline silicon seed crystals; forming an amorphous silicon layer on the microcrystalline silicon seed layer; and melting the amorphous silicon layer, and the molten amorphous silicon layer is Recrystallize on the crystalline silicon seed to form a polycrystalline silicon layer; form a second doped semiconductor layer on the at least one polycrystalline silicon layer; form a first doped semiconductor layer on the second surface; Forming a first transparent electrode film on the two doped semiconductor layer; forming a second transparent electrode film on the first doped semiconductor layer; forming a first electrode on the first transparent electrode film; and On the second transparent electrode film A second electrode. The method for manufacturing a heterojunction solar cell according to item 9 of the scope of the patent application, wherein the at least one polycrystalline silicon layer includes a first doped polycrystalline silicon layer, a second doped polycrystalline silicon layer, or a combination thereof. The method for manufacturing a heterojunction solar cell according to item 9 of the scope of the patent application, further comprising forming a second intrinsic semiconductor layer between the first doped substrate and the first doped semiconductor layer.