TWI656582B - Semiconductor device mounting method and mounting device - Google Patents

Semiconductor device mounting method and mounting device Download PDF

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Publication number
TWI656582B
TWI656582B TW104100526A TW104100526A TWI656582B TW I656582 B TWI656582 B TW I656582B TW 104100526 A TW104100526 A TW 104100526A TW 104100526 A TW104100526 A TW 104100526A TW I656582 B TWI656582 B TW I656582B
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Taiwan
Prior art keywords
substrate
heat conduction
thermosetting resin
semiconductor device
conduction delay
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TW104100526A
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Chinese (zh)
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TW201532161A (en
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朝日昇
宮本芳範
竹上敏史
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日商東麗工程股份有限公司
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Publication of TW201532161A publication Critical patent/TW201532161A/en
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Publication of TWI656582B publication Critical patent/TWI656582B/en

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    • H01L24/10Bump connectors ; Manufacturing methods related thereto
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Abstract

利用加熱器將保持台加熱成熱硬化性樹脂的硬化溫度以上。於該保持台上隔著熱傳導延遲用板將藉由熱硬化性樹脂暫壓接有半導體裝置的基板載置保持。之後,一邊藉由壓接頭加壓正被加熱的半導體裝置,一邊使凸塊與基板的電極接觸,並且藉由使熱硬化性樹脂硬化而將半導體裝置正式壓接於基板。 The holding stage is heated by a heater to be higher than the hardening temperature of the thermosetting resin. The substrate on which the semiconductor device is temporarily pressed by the thermosetting resin is placed and held on the holding table via the heat conduction delay plate. Thereafter, while pressing the semiconductor device being heated by the press joint, the bump is brought into contact with the electrode of the substrate, and the thermosetting resin is cured to form the semiconductor device to be pressed against the substrate.

Description

半導體裝置的安裝方法及安裝裝置 Semiconductor device mounting method and mounting device

本發明係有關一種在撓性基板、玻璃環氧基板、玻璃基板、陶瓷基板、矽中介層、矽基板等之電路基板上接著、直接電氣接合或按疊層狀態安裝IC、LSI等半導體裝置之半導體裝置的安裝方法及安裝裝置。 In the present invention, a semiconductor device such as an IC or an LSI is mounted on a circuit board such as a flexible substrate, a glass epoxy substrate, a glass substrate, a ceramic substrate, a ruthenium interposer, or a tantalum substrate, followed by direct electrical bonding or in a stacked state. A method of mounting a semiconductor device and a mounting device.

伴隨著半導體裝置的小型化與高密度化,在將半導體晶片安裝於電路基板的方法方面,倒裝式晶片安裝、甚至是基於貫通晶片的貫通電極之3次元疊層的3次元疊層安裝係迅速擴大。在用以確保半導體晶片的接合部分之連接可靠性的方法方面,一般係採用在將形成於半導體晶片上的凸塊與電路基板的電極墊接合後,將液狀密封接著劑注入半導體晶片與電路基板之間隙使之硬化方法。 With the miniaturization and high density of semiconductor devices, in the method of mounting a semiconductor wafer on a circuit board, flip-chip mounting, or even a three-dimensional stacked mounting system based on a three-dimensional stack of through-wafer through electrodes Rapidly expanded. In the method for ensuring the connection reliability of the joint portion of the semiconductor wafer, generally, after the bump formed on the semiconductor wafer is bonded to the electrode pad of the circuit substrate, the liquid sealing adhesive is injected into the semiconductor wafer and the circuit. The gap between the substrates is used to harden the method.

又,近年,提案一種將預先形成有接著劑之帶有凸塊的半導體晶片、基板倒裝連接而同時進行電氣接合與樹脂密封之方法。例如,在從下模被賦予朝上的彈推力而自該下模疏離的基板保持板上隔著絕緣接著劑而載置暫時安裝著半導體裝置之基板,使內建加熱器的上模與該基板近接對向。於此狀態下藉由來自於上模的輻射熱將基板預熱後,使該上模下降而將半導體裝置一邊按壓及加熱一邊使之固定於基板(參照專利文獻1)。 Moreover, in recent years, a method of flip-chip bonding a semiconductor wafer with bumps in which an adhesive is formed in advance, and electrically bonding and resin-sealing is proposed. For example, a substrate on which a semiconductor device is temporarily mounted is placed on a substrate holding plate that is separated from the lower mold by an upward elastic force, and an upper mold of the built-in heater is placed thereon. The substrate is in close proximity. In this state, the substrate is preheated by the radiant heat from the upper mold, and the upper mold is lowered to press and heat the semiconductor device to fix the substrate (see Patent Document 1).

先行技術文獻 Advanced technical literature

專利文獻1 特開2011-159847號公報 Patent Document 1 JP-A-2011-159847

然而,在將半導體裝置推入於被以自下模疏離狀態保持的基板上的絕緣接著劑之情況,由於來自於上模的熱會先傳導,故因絕緣接著劑的種類而異,在基板到達下模並被支持的狀態下被開始加壓前,該絕緣接著劑會硬化。其結果,發生所謂絕緣接著劑在凸塊到達基板的電極前硬化而無法確保電氣連接之問題。 However, in the case where the semiconductor device is pushed into the insulating adhesive on the substrate held in the state of being separated from the lower mold, since the heat from the upper mold is first conducted, the type of the insulating adhesive varies depending on the type of the insulating adhesive. The insulating adhesive hardens before it is pressurized in the state where it reaches the lower mold and is supported. As a result, the so-called insulating adhesive hardens before the bump reaches the electrode of the substrate, and the problem of electrical connection cannot be ensured.

又,在使上模下降速度加快之情況,產生所謂半導體裝置破裂,或絕緣接著劑自基板突出之問題。再者,在安裝具有與基板電極連接用的銲料之半導體裝置的情況,基於下模之加熱的時序變慢而難以使銲料充分熔融。為解決此問題,當升高加熱溫度時安裝時間內的峰值溫度比設置溫度還上昇,亦會產生所謂使基板翹曲或裝置的使用構件之耐久性劣化的問題。 Further, in the case where the upper mold lowering speed is increased, there is a problem that the semiconductor device is broken or the insulating adhesive is protruded from the substrate. Further, in the case of mounting a semiconductor device having solder for connection to a substrate electrode, the timing of heating by the lower mold becomes slow, and it is difficult to sufficiently melt the solder. In order to solve this problem, when the heating temperature is raised, the peak temperature during the mounting time rises more than the set temperature, and there is also a problem that the substrate is warped or the durability of the member of the apparatus is deteriorated.

本發明係有鑒於此種事態而作成者,主要目的在於提供一種可短時間且精度佳地將半導體裝置安裝於基板上之半導體裝置的安裝方法及安裝裝置。 The present invention has been made in view of such a situation, and a main object thereof is to provide a mounting method and mounting apparatus for a semiconductor device in which a semiconductor device can be mounted on a substrate in a short time and with high precision.

又,本發明為達成此種目的,採取如次之構成。 Further, in order to achieve such a purpose, the present invention adopts a secondary configuration.

亦即,一種安裝方法,係隔著熱硬化性樹脂將具有凸塊的半導體裝置安裝於基板的安裝方法,其特徵為:在保持台與前述半導體裝置之間介設有熱傳導延遲用板之狀態下,藉由第1加熱器用熱硬化性樹脂的硬化溫度以上的溫度一邊加熱前述保持台,一邊藉由按壓構件加壓該半導體裝置使凸塊與基板的電極連接並使熱硬化性樹脂硬化而正式壓接於基板。 In other words, a mounting method is a method of mounting a semiconductor device having bumps on a substrate via a thermosetting resin, and is characterized in that a state of a heat conduction delay plate is interposed between the holding stage and the semiconductor device. When the holding stage is heated by a temperature higher than the curing temperature of the thermosetting resin for the first heater, the semiconductor device is pressed by the pressing member to connect the bump to the electrode of the substrate, and the thermosetting resin is cured. Formally crimped to the substrate.

依據此方法,藉由使熱傳導延遲用板介設在保持台與基板之間,可使從保持台傳導到基板的熱延遲。因此,可抑制在將熱傳導延遲用板及基板載置保持於保持台後並藉由按壓構件加壓半導體裝置之前讓熱硬化性樹脂硬化的情形。其結果,可在將半導體裝置的凸塊與基板的電極確實連接之後,使熱硬化性樹脂硬化並正式壓接(固定)於基板。 According to this method, the heat conducted from the holding stage to the substrate can be delayed by interposing the heat conduction delay plate between the holding stage and the substrate. Therefore, it is possible to prevent the thermosetting resin from being cured before the heat conduction delay plate and the substrate are placed on the holding stage and the semiconductor device is pressed by the pressing member. As a result, after the bump of the semiconductor device and the electrode of the substrate are reliably connected, the thermosetting resin can be cured and finally pressed (fixed) to the substrate.

又,藉由將保持台設在熱硬化性樹脂的硬化溫度以上,可考慮基於熱傳導延遲用板的熱傳導而使傳導到基板的溫度配合物性的硬化溫度、或調整延遲時間。 In addition, by setting the holding stage to a temperature higher than the curing temperature of the thermosetting resin, it is conceivable to adjust the temperature at which the temperature of the substrate is transferred to the substrate, or the adjustment delay time, based on the heat conduction of the heat conduction delay plate.

此外,上述方法中,熱傳導延遲用板亦可如以下介設在保持台與基板之間。 Further, in the above method, the heat conduction delay plate may be interposed between the holding stage and the substrate as follows.

例如,將熱傳導延遲用板搬運至藉由第1加熱器加熱的保持台上之後,將藉未硬化狀態的前述熱硬化性樹脂而暫壓接有半導體裝置的基板搬運至熱傳導延遲用板上。 For example, after the heat conduction delay plate is conveyed to the holding table heated by the first heater, the substrate on which the semiconductor device is temporarily pressed by the thermosetting resin in an unhardened state is transported to the heat conduction delay plate.

在其他實施形態方面,將藉未硬化狀態的前 述熱硬化性樹脂而暫壓接有半導體裝置的基板與熱傳導延遲用板重疊地搬運亦可。 In other embodiments, the pre-hardened state will be borrowed. The substrate to which the semiconductor device is temporarily pressed and the thermoconductive resin may be superimposed and transferred to the heat conduction delay plate.

此外,基板與熱傳導延遲用板之重疊,例如可以是僅重疊。或者,亦可為將基板與熱傳導延遲用板藉由雙面黏著帶或接著劑等預先貼合狀態。 Further, the overlap of the substrate and the heat conduction delay plate may be, for example, only overlap. Alternatively, the substrate and the heat conduction delay plate may be bonded to each other in advance by a double-sided adhesive tape or an adhesive.

本方法中,以藉由具備第2加熱器的按壓構件將半導體裝置加壓及加熱較佳。 In the method, it is preferable to pressurize and heat the semiconductor device by a pressing member including the second heater.

上述方法中,在凸塊設有銲料的情況,正式壓接過程係以在熱硬化性樹脂硬化前使凸塊的銲料熔融接著於基板的電極之方式進行溫度設定較佳。 In the above method, when the bump is provided with solder, the final pressure bonding process is preferably performed such that the solder of the bump is fused to the electrode of the substrate before the thermosetting resin is cured.

依據此方法,可使基板的電極與凸塊確實地電氣連接。 According to this method, the electrodes of the substrate can be reliably electrically connected to the bumps.

又,上述方法中,係以從保持台搬出正式壓接處理後的基板後並將新處理對象的基板載置於熱傳導延遲用板之前冷卻前述熱傳導延遲用板較佳。 In the above method, it is preferable to cool the heat conduction delay plate before the substrate after the final pressure bonding process is carried out from the holding table and the substrate to be processed is placed on the heat conduction delay plate.

於進行熱傳導延遲用板之再利用的情況,可避免將新處理對象的基板載置於前述熱傳導延遲用板時,因前次處理時積存在熱傳導延遲用板上的餘熱而使熱硬化性樹脂硬化。 When the heat transfer delay plate is reused, it is possible to prevent the substrate of the new process from being placed on the heat conduction delay plate, and the heat-curable resin is accumulated by the heat remaining on the heat conduction delay plate in the previous process. hardening.

又,本發明為達成此種目的,採取如次之構成。 Further, in order to achieve such a purpose, the present invention adopts a secondary configuration.

亦即,一種安裝裝置,係隔著熱硬化性樹脂將具有凸塊的半導體裝置安裝於基板的安裝裝置,其特徵為具備:保持台;第1加熱器,加熱前述保持台;搬運機構,將熱傳導延遲用板搬運至前述保持台後,將藉 未硬化狀態的前述熱硬化性樹脂而暫壓接有半導體裝置的基板搬運至該熱傳導延遲用板上;壓接機構,藉由按壓構件對在前述保持台上按熱傳導延遲用板及基板的順序被載置保持之該基板上的半導體裝置進行按壓;及控制部,藉由前述第1加熱器將保持台的溫度控制在熱硬化性樹脂的硬化溫度以上。 That is, a mounting device is a mounting device for mounting a semiconductor device having bumps on a substrate via a thermosetting resin, and is characterized in that: a holding device is provided; a first heater is used to heat the holding table; and a transport mechanism is provided After the heat conduction delay plate is transported to the aforementioned holding table, it will be borrowed The substrate of the semiconductor device is temporarily transferred to the heat conduction delay plate in the uncured state of the thermosetting resin, and the pressure bonding mechanism is used to press the heat conduction delay plate and the substrate on the holding table by the pressing member. The semiconductor device on the substrate placed and held is pressed; and the control unit controls the temperature of the holding stage to be higher than the curing temperature of the thermosetting resin by the first heater.

依據此構成,藉由搬運機構使熱傳導延遲用板被載置保持於處在加熱狀態的保持台上,而前述熱傳導延遲用板上載置保持有基板。因此,從保持台朝向基板之熱傳導係因為熱傳導延遲用板而被延遲。亦即,該構成可適當地實施上述方法。 According to this configuration, the heat conduction delay plate is placed and held on the holding table in the heated state by the transport mechanism, and the substrate is placed on the heat conduction delay plate. Therefore, the heat conduction from the holding stage toward the substrate is delayed due to the heat conduction delay plate. That is, this configuration can appropriately implement the above method.

在其他實施形態方面,係隔著熱硬化性樹脂將具有凸塊的半導體裝置安裝於基板的安裝裝置,其特徵為具備:保持台;第1加熱器,加熱前述保持台;搬運機構,將藉未硬化狀態的前述熱硬化性樹脂而暫壓接有半導體裝置的基板與熱傳導延遲用板重疊地搬運;壓接機構,藉由按壓構件對被載置保持於前述保持台上的基板之半導體裝置進行按壓;及控制部,藉由前述第1加熱器將保持台的溫度控制在熱硬化性樹脂的硬化溫度以上。 In another embodiment, a mounting device for mounting a semiconductor device having bumps on a substrate via a thermosetting resin is provided with: a holding stage; a first heater that heats the holding stage; and a transport mechanism that borrows The substrate in which the semiconductor device is temporarily pressed and the heat conduction delay plate are superposed on the thermosetting resin in an unhardened state, and the pressure bonding mechanism is a semiconductor device on which the substrate held by the holding stage is placed by the pressing member. The control unit controls the temperature of the holding stage to be equal to or higher than the curing temperature of the thermosetting resin by the first heater.

依據此構成,由於是在保持台與基板之間介設有熱傳導延遲用板之狀態下被保持於保持台,故從保持台朝基板之熱傳導係因為熱傳導延遲用板而被延遲。亦即,該構成可適當地實施上述方法。 According to this configuration, since the heat conduction delay plate is held between the holding stage and the substrate, the heat conduction from the holding stage to the substrate is delayed by the heat conduction delay plate. That is, this configuration can appropriately implement the above method.

又,由於能將基板與熱傳導延遲用板一體地搬運,故在基板是半導體晶圓的情況,可補強被薄化之該半導體晶圓。因此,可抑制在搬運過程基板撓曲使該基板上的半導體裝置破損之情形。又,比起將熱傳導延遲用板與基板個別地搬運係更可縮短處理時間。 Moreover, since the substrate can be integrally transported with the heat conduction delay plate, when the substrate is a semiconductor wafer, the semiconductor wafer can be reinforced. Therefore, it is possible to suppress the semiconductor device on the substrate from being damaged by the deflection of the substrate during transportation. Moreover, the processing time can be shortened compared to the case where the heat conduction delay plate and the substrate are individually transported.

上述各構成中,按壓構件係具備第2加熱器,以控制部係藉由第2加熱器將按壓構件的溫度控制在熱硬化性樹脂的硬化溫度以上者較佳。 In each of the above-described configurations, the pressing member is provided with the second heater, and the control unit preferably controls the temperature of the pressing member to be higher than the curing temperature of the thermosetting resin by the second heater.

依據此構成,可在隔著熱傳導延遲用板而藉由保持台與按壓構件將基板夾入的狀態下進行加壓及加熱。因此,可短時間調整朝基板上的熱硬化性樹脂之熱傳導的延遲時間。 According to this configuration, pressurization and heating can be performed in a state in which the substrate is sandwiched between the holding stage and the pressing member via the heat conduction delay plate. Therefore, the delay time of heat conduction to the thermosetting resin on the substrate can be adjusted in a short time.

再者,上述構成中,以具備將加熱後的熱傳導延遲用板冷卻之冷卻器者較佳。 Further, in the above configuration, it is preferable to include a cooler that cools the heat conduction delay plate after heating.

依據此構成,於進行熱傳導延遲用板之再利用的情況,可除去積存在該熱傳導延遲用板上的餘熱。因此,可避免在基板上加壓半導體裝置之前因餘熱導致熱硬化性樹脂之硬化。 According to this configuration, when the heat conduction delay plate is reused, the residual heat accumulated on the heat conduction delay plate can be removed. Therefore, it is possible to avoid hardening of the thermosetting resin due to residual heat before pressing the semiconductor device on the substrate.

依據本發明之半導體裝置的安裝方法及安裝裝置,可抑制在對被載置保持於經加熱的保持台上之基板上的半導體裝置進行加壓之前發生熱硬化性樹脂硬化之情形。亦即,可在將基板與凸塊確實電氣連接之狀態使熱硬化性樹脂高速硬化並固定於基板。 According to the mounting method and mounting apparatus of the semiconductor device of the present invention, it is possible to suppress the curing of the thermosetting resin before the semiconductor device placed on the substrate held on the heated holding stage is pressurized. In other words, the thermosetting resin can be hardened and fixed to the substrate at a high speed in a state where the substrate and the bump are reliably electrically connected.

1‧‧‧搬運機構 1‧‧‧Transportation agency

2‧‧‧正式壓接裝置 2‧‧‧Formal crimping device

3‧‧‧可動台 3‧‧‧ movable platform

4‧‧‧搬運臂 4‧‧‧Transport arm

5‧‧‧導軌 5‧‧‧rails

6‧‧‧保持框 6‧‧‧ Keep box

7‧‧‧卡扣爪 7‧‧‧Knocking claws

8‧‧‧可動台 8‧‧‧ movable platform

9‧‧‧按壓機構 9‧‧‧ Pressing mechanism

10‧‧‧保持台 10‧‧‧ Keeping the table

11‧‧‧加熱器 11‧‧‧heater

13‧‧‧缸體 13‧‧‧Cylinder

14‧‧‧壓接頭 14‧‧‧Crimping joint

15‧‧‧加熱器 15‧‧‧heater

20‧‧‧控制部 20‧‧‧Control Department

21‧‧‧操作部 21‧‧‧Operation Department

W‧‧‧基板 W‧‧‧Substrate

C‧‧‧半導體裝置 C‧‧‧Semiconductor device

G‧‧‧熱硬化性樹脂 G‧‧‧ thermosetting resin

P‧‧‧熱傳導延遲用板 P‧‧‧heat conduction delay board

圖1係顯示構成安裝裝置之正式壓接裝置的概略整體構成之立體圖。 Fig. 1 is a perspective view showing a schematic overall configuration of a final pressure bonding device constituting a mounting device.

圖2係搬運機構的平面圖。 Figure 2 is a plan view of the transport mechanism.

圖3係搬運機構的前視圖。 Figure 3 is a front elevational view of the handling mechanism.

圖4係顯示實施例裝置的一輪動作之流程。 Figure 4 is a flow chart showing one round of the operation of the embodiment apparatus.

圖5係顯示熱傳導延遲用板及基板的搬運動作之前視圖。 Fig. 5 is a front view showing the conveyance operation of the heat conduction delay plate and the substrate.

圖6係顯示將半導體裝置正式壓接於顯示基板的動作圖。 Fig. 6 is a view showing the operation of the semiconductor device being officially crimped to the display substrate.

圖7係顯示將半導體裝置正式壓接於基板的動作圖。 Fig. 7 is a view showing an operation of pressing a semiconductor device to a substrate.

圖8係顯示將半導體裝置正式壓接於基板時的溫度分佈圖。 Fig. 8 is a view showing the temperature distribution when the semiconductor device is formally crimped to the substrate.

圖9係變形例裝置的立體圖。 Fig. 9 is a perspective view of a modification device.

圖10係變形例之帶有熱傳導延遲用板的基板之部分剖面圖。 Fig. 10 is a partial cross-sectional view showing a substrate with a heat conduction delay plate according to a modification.

圖11係顯示將變形例之帶有熱傳導延遲用板的基板正式壓接的動作圖。 Fig. 11 is a view showing an operation of integrally pressing a substrate with a heat conduction delay plate according to a modification.

以下,參照圖面並說明本發明的一實施例。 Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

本實施例中,係以使用作為熱硬化性樹脂之NCP(非導電性接著膠;Non-Conductive Paste)、NCF(非導電性接著劑薄膜;Non-Conductive Film)等將半導體裝 置安裝於基板之情況為例作說明。又,關於本發明的安裝方法,熱硬化性樹脂係NCF(非導電性接著劑薄膜)者較佳。 In this embodiment, a semiconductor is mounted using NCP (Non-Conductive Paste), NCF (Non-Conductive Film), or the like as a thermosetting resin. The case of mounting on a substrate is described as an example. Moreover, in the mounting method of the present invention, a thermosetting resin-based NCF (non-conductive adhesive film) is preferred.

此外,本發明中的「半導體裝置」方面,例如為具有IC晶片、半導體晶片、光元件、表面安裝零件、晶片、晶圓、TCP(Tape Carrier Package;帶狀承載封裝件)、FPC(Flexible Printed Circuit;可撓性印刷電路)等凸塊者。又,此等半導體裝置無關乎種類或大小,顯示與基板接合之側的全部的形態。例如使用朝向平面顯示面板的屬晶片接合的COG(Chip On Glass;晶片玻璃板接合)、TCP,及屬FPC之接合的OLB(Outer Lead Bonding;外引腳接合)等。 Further, the "semiconductor device" in the present invention includes, for example, an IC chip, a semiconductor wafer, an optical element, a surface mount component, a wafer, a wafer, a TCP (Tape Carrier Package), and an FPC (Flexible Printed). A bump such as a circuit; a flexible printed circuit. Moreover, these semiconductor devices display all the forms on the side joined to the substrate regardless of the type or size. For example, COG (Chip On Glass), TCP, and OLB (Outer Lead Bonding) which are bonded to the FPC, which are oriented toward the flat display panel, are used.

又,本發明中的「基板」係指例如使用撓性基板、玻璃環氧基板、玻璃基板、陶瓷基板、矽中介層、矽基板等。 Moreover, the "substrate" in the present invention means, for example, a flexible substrate, a glass epoxy substrate, a glass substrate, a ceramic substrate, a tantalum interposer, a tantalum substrate, or the like.

首先,針對本實施例所使用的裝置,參照圖面作具體說明。圖1係顯示構成本發明的安裝裝置之正式壓接裝置的概略構成之立體圖,圖2係顯示安裝裝置的要部構成之平面圖,圖3係顯示安裝裝置的要部構成之前視圖。 First, the apparatus used in the present embodiment will be specifically described with reference to the drawings. Fig. 1 is a perspective view showing a schematic configuration of a main crimping apparatus constituting the mounting device of the present invention, Fig. 2 is a plan view showing a configuration of a main part of the mounting device, and Fig. 3 is a front view showing a configuration of a main part of the mounting device.

如圖1及圖2所示,本發明中的安裝裝置係由搬運機構1及正式壓接裝置2所構成。以下,針對各構成作詳述。 As shown in FIGS. 1 and 2, the mounting device in the present invention is composed of a transport mechanism 1 and a final pressure bonding device 2. Hereinafter, each configuration will be described in detail.

搬運機構1備有可動台3及搬運臂4。可動 台3係建構成沿著導軌5在水平軸方向移動。 The transport mechanism 1 is provided with a movable table 3 and a transport arm 4. Movable The stage 3 is constructed to move in the horizontal axis direction along the guide rail 5.

搬運臂4係建構成基端側被連結於可動台3的昇降驅動機構,且在上下(Z)方向及繞Z軸(θ)方向分別移動自如。又,搬運臂4在前端備有保持框6。如圖2及圖3所示,保持框6係呈馬蹄形,在角部備有複數個卡扣爪7,用以卡扣熱傳導延遲用板及基板W。 The transport arm 4 is configured to be a lifting drive mechanism that is coupled to the movable table 3 at the proximal end side, and is movable in the vertical (Z) direction and the Z-axis (θ) direction. Further, the transport arm 4 is provided with a holding frame 6 at the front end. As shown in FIGS. 2 and 3, the holding frame 6 has a horseshoe shape, and a plurality of locking claws 7 are provided at the corner portions for engaging the heat conduction delay plate and the substrate W.

正式壓接裝置2係由可動台8及按壓機構9等所構成。 The final pressure bonding device 2 is composed of a movable table 8, a pressing mechanism 9, and the like.

可動台8具備將基板W吸附保持之保持台10。保持台10係建構成在水平2軸(X,Y)方向、上下(Z)方向及繞Z軸(θ)方向分別移動自如。此外,保持台10的外形係設定成收納於保持框6的內側之尺寸。又,保持台10係內部埋設有加熱器11。此外,加熱器11係相當於本發明的第1加熱器。 The movable table 8 is provided with a holding table 10 that sucks and holds the substrate W. The holding base 10 is configured to be movable in the horizontal 2 axis (X, Y) direction, the up and down (Z) direction, and the Z axis (θ) direction, respectively. Moreover, the outer shape of the holding base 10 is set to the size accommodated in the inside of the holding frame 6. Further, a heater 11 is embedded in the holding stage 10 inside. Further, the heater 11 corresponds to the first heater of the present invention.

按壓機構9係由缸體13及壓接頭14等所構成。亦即,建構成壓接頭14的上方連結著缸體13,壓接頭14上下地移動。壓接頭14係下凸狀且沿著在基板W的端緣側排列配置之複數個半導體裝置C的排列方向延伸。亦即建構成藉由凸部前端將複數個半導體裝置C同時加壓。又,在壓接頭14埋設有加熱器15。此外,壓接頭14相當於本發明的按壓構件,加熱器15相當於第2加熱器。 The pressing mechanism 9 is composed of a cylinder 13 and a press fitting 14 or the like. That is, the cylinder 13 is coupled to the upper side of the pressure fitting 14 and the pressure joint 14 is moved up and down. The crimping joint 14 is convexly curved and extends in the direction in which the plurality of semiconductor devices C are arranged side by side on the edge side of the substrate W. That is, the plurality of semiconductor devices C are simultaneously pressurized by the front end of the convex portion. Further, a heater 15 is embedded in the pressure joint 14. Further, the pressure joint 14 corresponds to the pressing member of the present invention, and the heater 15 corresponds to the second heater.

控制部20係以壓接頭14的加熱器15及保持台10的加熱器11的溫度維持和使熱硬化性樹脂G硬化 的溫度同等或其以上的溫度之方式控制著各加熱器11、15的溫度。 The control unit 20 maintains the temperature of the heater 15 of the press fitting 14 and the heater 11 of the holding stage 10 and hardens the thermosetting resin G. The temperature of each of the heaters 11, 15 is controlled such that the temperature is equal to or higher than the temperature.

其次針對使用上述實施例裝置將半導體裝置C正式壓接於該基板W的一輪之動作,一邊參照圖4所示之流程及圖5至圖8一邊作說明。此外,本實施例中,對於被以在前工程之暫壓接工程中藉NCF使複數個半導體裝置C預先暫壓接於基板W之狀態進行搬運者,係以使熱硬化性樹脂完全硬化而進行正式壓接的情況為例作說明。 Next, a description will be given of a flow in which the semiconductor device C is formally pressed against the substrate W by using the apparatus of the above-described embodiment, with reference to the flow shown in FIG. 4 and FIGS. 5 to 8. In the present embodiment, the plurality of semiconductor devices C are temporarily attached to the substrate W by the NCF in the temporary pressure bonding process of the prior art, and the thermosetting resin is completely cured. The case of performing formal crimping is described as an example.

首先,對操作部21進行操作以設定保持台10及壓接頭14所具備的兩加熱器11、15之溫度。此處,兩加熱器11、15的溫度係設定成熱傳導延遲用板P與基板W的界面及壓接頭14與半導體裝置C的界面之溫度比熱硬化性樹脂G的硬化溫度還高。亦即,設定成在被保持台10所吸附保持之基板W到達壓接頭14下側的安裝位置之時點,經由半導體裝置C及熱傳導延遲用板P而傳導至熱硬化性樹脂G的熱會成為硬化溫度(步驟S1)。 First, the operation unit 21 is operated to set the temperatures of the two heaters 11 and 15 provided in the holding table 10 and the pressure fitting 14. Here, the temperatures of the two heaters 11 and 15 are set such that the interface between the heat conduction delay plate P and the substrate W and the interface between the pressure contact 14 and the semiconductor device C are higher than the curing temperature of the thermosetting resin G. In other words, when the substrate W sucked and held by the holding stage 10 reaches the mounting position on the lower side of the crimping joint 14, the heat transmitted to the thermosetting resin G via the semiconductor device C and the heat conduction delay plate P becomes Hardening temperature (step S1).

又,本實施例中,熱傳導延遲用板P係使用不鏽鋼。此處,熱傳導延遲用板P係被設定成例如,熱傳導率(W/m‧K)L與熱傳導延遲用板的厚度(mm)T之關係,亦即L/T成為1以上且20以下。此外,熱傳導延遲用板P不限定為不鏽鋼,只要是不因壓接頭14之按壓而變形的材質即可,亦可為金屬、陶瓷、碳及多孔質材等。 Further, in the present embodiment, the heat conduction delay plate P is made of stainless steel. Here, the heat conduction delay plate P is set to have, for example, a relationship between the thermal conductivity (W/m‧K) L and the thickness (mm) T of the heat conduction delay plate, that is, L/T is 1 or more and 20 or less. In addition, the heat conduction delay plate P is not limited to stainless steel, and may be a material that is not deformed by the pressing of the pressure joint 14, and may be metal, ceramic, carbon, or porous material.

當初期設定完了時讓裝置作動(步驟S2)。在 正式壓接裝置側,控制部20開啟加熱器11、15以使初期設定的溫度成為一定的方式開始溫度控制。 When the initial setting is completed, the device is activated (step S2). in On the side of the final pressure bonding device, the control unit 20 turns on the heaters 11 and 15 to start temperature control so that the initially set temperature becomes constant.

如圖5所示,藉由配備在暫壓接工程側之未圖示的搬運機器人使熱傳導延遲用板P載置於搬運機構1的保持框6,之後在該熱傳導延遲用板P上載置基板W(步驟S3)。 As shown in FIG. 5, the heat conduction delay plate P is placed on the holding frame 6 of the transport mechanism 1 by a transport robot (not shown) provided on the side of the temporary pressure welding project, and then the substrate is placed on the heat conduction delay plate P. W (step S3).

熱傳導延遲用板P與基板W在重疊的狀態被搬往正式壓接裝置2。使此熱傳導延遲用板P面下而基板W係如圖5的二點鏈線所示,被移載於保持台10。熱傳導延遲用板P係形成有複數個貫通孔,藉由貫通孔而被吸附保持於保持台10(步驟S4)。又,保持台10係藉由未圖示的驅動機構而移往前方(圖1的Y方向)之壓接頭14下方的預先決定的安裝位置。 The heat conduction delay plate P and the substrate W are moved to the final pressure bonding device 2 in a state of being overlapped. The heat conduction delay plate P is placed face down, and the substrate W is transferred to the holding stage 10 as shown by the two-dot chain line of FIG. The heat conduction delay plate P is formed with a plurality of through holes, and is held by the through holes to be held by the holding stage 10 (step S4). Further, the holding table 10 is moved to a predetermined mounting position below the press fitting 14 in the front (Y direction in Fig. 1) by a drive mechanism (not shown).

從熱傳導延遲用板P及基板W被吸附保持於保持台10的時點藉由加熱器11開始加熱(步驟S5)。 When the heat conduction delay plate P and the substrate W are adsorbed and held by the holding stage 10, heating is started by the heater 11 (step S5).

當保持台10到達安裝位置時,如圖6所示,壓接頭14依缸體13之作動而下降,複數個半導體裝置C被同時地夾入。此時,半導體裝置C係被加熱的壓接頭14一邊加熱一邊按壓(步驟S6)。 When the holding table 10 reaches the mounting position, as shown in Fig. 6, the press fitting 14 is lowered by the operation of the cylinder 13, and a plurality of semiconductor devices C are simultaneously sandwiched. At this time, the semiconductor device C is pressed while being heated (step S6).

亦即,壓接頭14下降到既定高度時,由於熱硬化性樹脂G處在未硬化狀態,故如圖7所示,半導體裝置C的凸塊B是依壓接頭14之加壓而被推入熱硬化性樹脂G。亦即,在半導體裝置C的凸塊B到達基板W的電極後,熱硬化性樹脂硬化。 That is, when the press fitting 14 is lowered to a predetermined height, since the thermosetting resin G is in an uncured state, as shown in FIG. 7, the bump B of the semiconductor device C is pushed in accordance with the pressurization of the press fitting 14. Thermosetting resin G. That is, after the bump B of the semiconductor device C reaches the electrode of the substrate W, the thermosetting resin is cured.

當對半導體裝置C加壓及加熱迄至熱硬化性 樹脂G完全硬化的既定時間時(步驟S7),使壓接頭14返回上方的待機位置且解除加壓,並藉由搬運機構1將熱傳導延遲用板P與基板W搬出(步驟S8)。 When the semiconductor device C is pressurized and heated up to the thermal hardening property When the resin G is completely cured for a predetermined period of time (step S7), the pressure joint 14 is returned to the upper standby position and the pressure is released, and the heat conduction delay plate P and the substrate W are carried out by the transport mechanism 1 (step S8).

將熱傳導延遲用板P與基板W搬運到既定位置後,係交付於其他搬運機器人或收納於自動倉儲。 After the heat conduction delay plate P and the substrate W are transported to a predetermined position, they are delivered to another transfer robot or stored in an automatic storage.

以上結束在1片基板2上的半導體裝置之安裝。之後,針對既定片數的基板反覆相同動作。 This completes the mounting of the semiconductor device on the one substrate 2. Thereafter, the substrate is repeatedly operated in the same manner for a predetermined number of sheets.

依據此構成,由於是將熱傳導延遲用板P載置於被維持在熱硬化性樹脂G的硬化溫度以上之保持台上之後再將已暫壓接有半導體裝置C的基板W吸附保持,故在壓接頭14下降迄至加壓,没有熱硬化性樹脂G被硬化的情形。亦即,本實施例中,如圖8的實線所示,從在保持台10上載置保持熱傳導延遲用板P與基板W之時點T1到使此壓接頭14抵接半導體裝置C並開始加壓的時點T2(例如,本實施例中設定成銲料熔融溫度之時點)為止的溫度梯度是比無介設熱傳導延遲用板P之以一點鏈線所示的習知方法的溫度梯度還小,可保持在比熱硬化性樹脂G的硬化溫度還低的溫度。換言之,因為迄至利用壓接頭14開始加壓半導體裝置C為止的溫度間隔比習知方法還大,故在壓接頭14下降到既定高度且使半導體裝置C的凸塊B到達基板W的電極之前,可將熱硬化性樹脂G保持在未硬化狀態。其結果,可使基板W的電極與凸塊B確實電氣連接。 According to this configuration, the heat conduction delay plate P is placed on the holding table that is maintained at the curing temperature of the thermosetting resin G or higher, and then the substrate W to which the semiconductor device C has been temporarily pressed is adsorbed and held. The press fitting 14 is lowered until it is pressurized, and the thermosetting resin G is not cured. In other words, in the present embodiment, as shown by the solid line in FIG. 8, the point T1 at which the heat conduction delay plate P and the substrate W are held is held on the holding table 10, and the crimping joint 14 is brought into contact with the semiconductor device C and the addition is started. The temperature gradient from the time point T2 of pressure (for example, the point at which the solder melting temperature is set in the present embodiment) is smaller than the temperature gradient of the conventional method shown by the one-point chain line of the non-intermediate heat conduction delay plate P. It can be maintained at a temperature lower than the hardening temperature of the thermosetting resin G. In other words, since the temperature interval until the start of pressing the semiconductor device C by the crimping joint 14 is larger than the conventional method, before the crimping joint 14 is lowered to a predetermined height and the bump B of the semiconductor device C reaches the electrode of the substrate W, The thermosetting resin G can be maintained in an uncured state. As a result, the electrode of the substrate W and the bump B can be surely electrically connected.

此外,熱硬化性樹脂G的硬化溫度係可藉由DSC(differential scanning calorimetry;示差掃描熱分析) 測定。 In addition, the curing temperature of the thermosetting resin G can be determined by DSC (differential scanning calorimetry) Determination.

本發明不限於上述實施例,亦可如以下變形實施。 The present invention is not limited to the above embodiment, and may be embodied as the following modifications.

(1)上述實施例裝置的壓接頭14亦可利用於將1個半導體裝置C正式壓接的單一型或,如圖9所示,具備複數個該單一型之複合型。 (1) The crimping joint 14 of the apparatus of the above embodiment may be used in a single type in which one semiconductor device C is integrally crimped, or as shown in Fig. 9, and has a plurality of composite types of the single type.

(2)上述實施例裝置中,雖將保持台10與壓接頭14所具備之各加熱器11、15的溫度設定成相同,但例如亦可如以下那樣進行溫度設定。例如,亦能以從利用壓接頭14開始加壓半導體裝置C的時點到經由該半導體裝置C傳熱至熱硬化性樹脂G的時間、與經由基板W及熱傳導延遲用板P傳熱至熱硬化性樹脂G的時間成為相同時序之方式,適宜地設定變更各加熱器11、15的溫度。 (2) In the apparatus of the above embodiment, the temperatures of the heaters 11 and 15 provided in the holding base 10 and the press fitting 14 are set to be the same. For example, the temperature setting may be performed as follows. For example, it is also possible to transfer heat from the time when the semiconductor device C is pressed by the crimping joint 14 to the time when the semiconductor device C is transferred to the thermosetting resin G, and the heat transfer to the thermal conduction via the substrate W and the heat conduction delay plate P. The time of the resin G is the same timing, and the temperature of each of the heaters 11 and 15 is appropriately set.

又,溫度傳導時間不僅是加熱器11、15之上述溫度設定,亦能以熱傳導延遲用板P的厚度作調整。依據此方法,可抑制因基板W與半導體裝置C的熱傳導之差所產生之基板W的翹曲。 Further, the temperature conduction time can be adjusted not only by the above-described temperature setting of the heaters 11, 15 but also by the thickness of the heat conduction delay plate P. According to this method, warpage of the substrate W due to the difference in heat conduction between the substrate W and the semiconductor device C can be suppressed.

(3)在半導體裝置的凸塊B是形成銲在銲料球或銅電極柱的構成之情況,只要以依加壓而被推入於熱硬化性樹脂G的凸塊是與基板W的電極接觸,且從接觸狀態到銲料熔融接著為止的時間,熱硬化性樹脂G成為未硬化狀態之方式進行溫度控制即可。 (3) In the case where the bump B of the semiconductor device is formed by soldering a solder ball or a copper electrode post, the bump which is pushed into the thermosetting resin G by pressurization is in contact with the electrode of the substrate W. In addition, the temperature of the thermosetting resin G in an unhardened state may be controlled from the contact state to the time when the solder is melted.

(4)上述實施例裝置中,係建構成保持台10 能依可動台8而移動,但亦可為被固定之構成。在此情況,只要是在要藉由保持框6搬運熱傳導延遲用板P與基板W的時點保持對準即可。又,熱傳導延遲用板P亦可為固定於保持框6或構成一體。因此,本發明中,由於只要在保持台6上按熱傳導延遲用板P、基板W的順序重疊地保持即可,故各個搬運之時序亦可同時,熱傳導延遲用板P亦可比基板W還先載置於保持台10。 (4) In the apparatus of the above embodiment, the structure is constructed to hold the stage 10 It can move according to the movable table 8, but it can also be fixed. In this case, it suffices that the heat conduction delay plate P and the substrate W are to be held in alignment by the holding frame 6. Further, the heat conduction delay plate P may be fixed to the holding frame 6 or integrated. Therefore, in the present invention, it is only necessary to hold the heat conduction delay plate P and the substrate W in the order of the holding table 6, so that the timing of each conveyance can be simultaneously, and the heat conduction delay plate P can also be earlier than the substrate W. It is placed on the holding table 10.

(5)上述實施例裝置中,係使用1片基板W,但亦可使用複數片基板W相連之切割前的基板W。在此情況,只要在與切割前的基板W對應之尺寸的熱傳導延遲用板上載置該複數片份的基板W,使之依基板單位在壓接頭的下方一邊變位一邊正式壓接即可。 (5) In the apparatus of the above embodiment, one substrate W is used, but a substrate W before cutting which is connected to a plurality of substrates W may be used. In this case, the substrate W of the plurality of sheets may be placed on the heat conduction delay plate having a size corresponding to the substrate W before the cutting, and the substrate W may be positively pressed while being displaced by the substrate unit under the pressure joint.

(6)上述實施例中,是將熱傳導延遲用板P與基板W同時載置於保持台10,但亦可個別地搬運及載置。在此情況,於保持台10載置熱傳導延遲用板P後載置基板W。 (6) In the above embodiment, the heat conduction delay plate P and the substrate W are simultaneously placed on the holding table 10, but they may be individually transported and placed. In this case, the substrate W is placed after the heat conduction delay plate P is placed on the holding stage 10.

(7)上述實施例中,於進行熱傳導延遲用板P之再利用的情況,從正式壓接處理後將新基板W載置於熱傳導延遲用板P上之前將熱傳導延遲用板P藉由冷卻器冷卻亦可。冷卻器方面,例如亦可為利用噴嘴噴吹空氣之構成。 (7) In the above embodiment, when the heat conduction delay plate P is reused, the heat conduction delay plate P is cooled by placing the new substrate W on the heat conduction delay plate P after the final pressure bonding process. Cooling is also possible. As for the cooler, for example, it is also possible to use a nozzle to blow air.

(8)上述實施例中,如圖10及圖11所示,熱傳導延遲用板P亦可藉由黏著劑預先貼附於基板W。熱傳導延遲用板P的尺寸亦可與基板W同形狀且相同大小 或基板以上的大小。在此情況,熱傳導延遲用板方面,例如適宜地選擇由玻璃、不鏽鋼或聚醯亞胺等所成形者。 (8) In the above embodiment, as shown in Figs. 10 and 11, the heat conduction delay plate P may be attached to the substrate W in advance by an adhesive. The heat conduction delay plate P may have the same shape and the same size as the substrate W. Or the size above the substrate. In this case, for the heat conduction delay plate, for example, a shape formed by glass, stainless steel, or polyimide may be suitably selected.

依據此構成,在基板W是經背面研磨而薄化之半導體晶圓的情況,可補強剛性降低之基板W。亦即,可抑制基板W在搬運時該基板W撓曲使半導體裝置C破損。又,相較於上述實施例之處理係可減低朝保持台10進行搬運之次數。亦即,在圖4所示之步驟S3,僅將帶有熱傳導延遲用板的基板W搬運載置至保持台10一次即可。又,在步驟S8,於正式壓接後僅將帶有熱傳導延遲用板的基板W自保持台10搬出一次即可。因此,該實施形態可使處理速度提升。此外,帶有該熱傳導延遲用板的基板W之搬運係可利用上述搬運機構1,或藉由具有呈馬蹄形的機械腕(end effector)的搬運機器人一邊吸附熱傳導延遲用板P一邊搬運亦可。 According to this configuration, in the case where the substrate W is a semiconductor wafer which is thinned by back surface polishing, the substrate W having reduced rigidity can be reinforced. In other words, it is possible to suppress the substrate W from being bent during transportation of the substrate W to damage the semiconductor device C. Further, the number of times of carrying the holding table 10 can be reduced as compared with the processing of the above embodiment. That is, in step S3 shown in FIG. 4, only the substrate W with the heat conduction delay plate is transported and placed on the holding table 10 once. Moreover, in step S8, only the substrate W with the heat conduction delay plate may be carried out once from the holding stage 10 after the final pressure bonding. Therefore, this embodiment can increase the processing speed. In addition, the conveyance mechanism of the substrate W with the heat conduction delay plate may be conveyed by the conveyance mechanism 1 or by a conveyance robot having a horseshoe-shaped end effector while adsorbing the heat conduction delay plate P.

又,本實施形態中,亦可作成將基板W與熱傳導延遲用板P單單是重疊的狀態下進行搬運。 Further, in the present embodiment, the substrate W and the heat conduction delay plate P may be transported in a single state.

此外,本實施形態中,亦可將從保持台10搬出的基板W及熱傳導延遲用板P冷卻。例如,亦可在搬運過程或既定位置對熱傳導延遲用板P噴吹空氣。 Further, in the present embodiment, the substrate W and the heat conduction delay plate P carried out from the holding table 10 may be cooled. For example, air may be blown to the heat conduction delay plate P during the conveyance process or at a predetermined position.

[產業上可利用性] [Industrial availability]

如以上所述,本發明係適合於進行使半導體裝置與基板的電極一邊精度佳地電氣連接一邊使熱硬化性樹脂硬化。 As described above, the present invention is suitable for curing the thermosetting resin while electrically connecting the semiconductor device and the electrode of the substrate with high precision.

Claims (16)

一種安裝方法,係隔著熱硬化性樹脂將具有凸塊的半導體裝置安裝於基板的安裝方法,其特徵為,在保持台與前述半導體裝置之間介設有延遲來自前述保持台的熱之傳導的熱傳導延遲用板之狀態下,藉由第1加熱器以前述熱硬化性樹脂的硬化溫度以上的溫度一邊加熱前述保持台,一邊藉由按壓構件加壓前述半導體裝置,使前述凸塊與前述基板的電極連接並使熱硬化性樹脂硬化而正式壓接於前述基板。 A mounting method for mounting a semiconductor device having bumps on a substrate via a thermosetting resin, characterized in that a heat conduction from the holding stage is delayed between the holding stage and the semiconductor device In the state of the heat conduction delay plate, the first heater heats the holding stage at a temperature equal to or higher than the curing temperature of the thermosetting resin, and the semiconductor device is pressed by the pressing member to make the bump and the aforementioned The electrode connection of the substrate is performed to cure the thermosetting resin, and is finally pressure-bonded to the substrate. 如請求項1之安裝方法,其中具備:第1搬運過程,將前述熱傳導延遲用板搬運至藉由前述第1加熱器加熱的前述保持台上;及第2搬運過程,將藉未硬化狀態的前述熱硬化性樹脂暫壓接有前述半導體裝置的前述基板搬運至前述熱傳導延遲用板上。 The mounting method of claim 1, comprising: a first conveyance process of transporting the heat conduction delay plate to the holding table heated by the first heater; and a second conveyance process of borrowing an unhardened state The thermosetting resin temporarily transfers the substrate to which the semiconductor device is attached to the heat conduction delay plate. 如請求項1或2之安裝方法,其中,藉由具備第2加熱器的前述按壓構件將前述半導體裝置加壓及加熱。 The mounting method according to claim 1 or 2, wherein the semiconductor device is pressurized and heated by the pressing member including the second heater. 如請求項3之安裝方法,其中,將前述按壓構件的設定溫度設為前述熱硬化性樹脂的硬化溫度以上而加熱前述熱硬化性樹脂。 The mounting method of claim 3, wherein the setting temperature of the pressing member is equal to or higher than a curing temperature of the thermosetting resin to heat the thermosetting resin. 如請求項1之安裝方法,其中,前述凸塊設有銲料,前述正式壓接過程係在前述熱硬化性樹脂硬化前使前述凸塊的銲料熔融接著於前述基板的電極。 The mounting method of claim 1, wherein the bump is provided with solder, and the final pressure bonding process fuses the solder of the bump to an electrode of the substrate before the thermosetting resin is cured. 如請求項1之安裝方法,其中,從前述保持台搬出前述正式壓接處理後的前述基板後,並在將新處理對象的前述基板載置於前述熱傳導延遲用板之前,冷卻前述熱傳導延遲用板。 The mounting method of claim 1, wherein the substrate after the final pressure bonding process is carried out from the holding table, and the heat conduction delay is cooled before the substrate to be processed is placed on the heat conduction delay plate. board. 如請求項1之安裝方法,其中,前述熱硬化性樹脂係非導電性接著劑薄膜。 The method of claim 1, wherein the thermosetting resin is a non-conductive adhesive film. 如請求項1之安裝方法,其中,具備搬運過程,將藉未硬化狀態的前述熱硬化性樹脂暫壓接有前述半導體裝置的前述基板與前述熱傳導延遲用板重疊地搬運。 The mounting method of claim 1, wherein the substrate is provided with the thermosetting resin in an unhardened state, and the substrate on which the semiconductor device is temporarily attached is superposed on the heat conduction delay plate. 如請求項8之安裝方法,其中,藉由具備第2加熱器的前述按壓構件將前述半導體裝置加壓及加熱。 The mounting method of claim 8, wherein the semiconductor device is pressurized and heated by the pressing member including the second heater. 如請求項9之安裝方法,其中,將前述按壓構件的設定溫度設為前述熱硬化性樹脂的硬化溫度以上而加熱前述熱硬化性樹脂。 The mounting method of claim 9, wherein the setting temperature of the pressing member is equal to or higher than a curing temperature of the thermosetting resin to heat the thermosetting resin. 一種安裝裝置,係隔著熱硬化性樹脂將具有凸塊的半導體裝置安裝於基板的安裝裝置,其特徵為具備:保持台;第1加熱器,加熱前述保持台;搬運機構,將延遲來自前述保持台的熱之傳導的熱傳導延遲用板搬運至前述保持台後,將藉未硬化狀態的前述熱硬化性樹脂暫壓接有半導體裝置的基板搬運至前述熱傳導延遲用板上;壓接機構,藉由按壓構件對按前述熱傳導延遲用 板及基板的順序被載置保持在前述保持台上之該基板上的半導體裝置進行按壓;及控制部,藉由前述第1加熱器將前述保持台的溫度控制在熱硬化性樹脂的硬化溫度以上。 A mounting device for mounting a semiconductor device having bumps on a substrate via a thermosetting resin, comprising: a holding table; a first heater for heating the holding table; and a transport mechanism having a delay from the foregoing After the heat conduction delay plate for holding the heat conduction of the stage is transported to the holding stage, the substrate on which the semiconductor device is temporarily pressed by the thermosetting resin in an unhardened state is transported to the heat conduction delay plate; and the pressure bonding mechanism By pressing the member pair for the aforementioned heat conduction delay The order of the board and the substrate is pressed by the semiconductor device mounted on the substrate on the holding stage; and the control unit controls the temperature of the holding stage to the curing temperature of the thermosetting resin by the first heater the above. 如請求項11之安裝裝置,其中前述按壓構件具備第2加熱器,前述控制部係藉由第2加熱器將按壓構件的溫度控制在熱硬化性樹脂的硬化溫度以上。 The mounting device according to claim 11, wherein the pressing member includes a second heater, and the control unit controls the temperature of the pressing member to be higher than a curing temperature of the thermosetting resin by the second heater. 如請求項11或12之安裝裝置,其中具備將加熱後的前述熱傳導延遲用板冷卻之冷卻器。 The mounting device of claim 11 or 12, further comprising a cooler for cooling the heated heat conduction delay plate. 一種安裝裝置,係隔著熱硬化性樹脂將具有凸塊的半導體裝置安裝於基板的安裝裝置,其特徵為具備:保持台;第1加熱器,加熱前述保持台;搬運機構,將藉未硬化狀態的前述熱硬化性樹脂暫壓接有半導體裝置的前述基板與延遲來自前述保持台的熱之傳導的熱傳導延遲用板重疊地搬運;壓接機構,藉由按壓構件對被載置保持於前述保持台上的前述基板之前述半導體裝置進行按壓;及控制部,藉由前述第1加熱器將前述保持台的溫度控制在前述熱硬化性樹脂的硬化溫度以上。 A mounting device for mounting a semiconductor device having bumps on a substrate via a thermosetting resin, comprising: a holding table; a first heater for heating the holding table; and a transport mechanism for hardening In the state in which the thermosetting resin is temporarily pressed, the substrate to which the semiconductor device is attached is superposed on the heat conduction delay plate for delaying heat conduction from the holding stage, and the pressure bonding mechanism is placed and held by the pressing member. The semiconductor device holding the substrate on the stage is pressed; and the control unit controls the temperature of the holding stage to be higher than the curing temperature of the thermosetting resin by the first heater. 如請求項14之安裝裝置,其中前述按壓構件具備第2加熱器,前述控制部係藉由第2加熱器將前述按壓構件的 溫度控制在前述熱硬化性樹脂的硬化溫度以上。 The mounting device of claim 14, wherein the pressing member includes a second heater, and the control unit connects the pressing member by a second heater The temperature is controlled to be higher than the curing temperature of the thermosetting resin. 如請求項14或15之安裝裝置,其中具備將加熱後的前述熱傳導延遲用板冷卻之冷卻器。 The mounting device of claim 14 or 15, comprising a cooler for cooling the heated heat conduction delay plate.
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003249532A (en) * 2002-02-26 2003-09-05 Seiko Epson Corp Mounting structure, its manufacturing method, its manufacturing device, and electronic apparatus
TW200739773A (en) * 2006-02-23 2007-10-16 Sony Chem & Inf Device Corp Mounting method
JP2010010628A (en) * 2008-06-30 2010-01-14 Nikon Corp Bonding apparatus and bonding method
JP2010245195A (en) * 2009-04-02 2010-10-28 Nec Corp Apparatus for manufacturing semiconductor device, and method for manufacturing semiconductor device
TW201205700A (en) * 2010-01-22 2012-02-01 Sony Chemical & Inf Device Heating device and production method for mounted body

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008294396A (en) * 2007-04-23 2008-12-04 Hitachi Chem Co Ltd Connecting method, connection device, and connection structure obtained by using same connecting method
JP2010114208A (en) * 2008-11-05 2010-05-20 Nikon Corp Cooling apparatus and joining system
JP5401709B2 (en) 2010-02-02 2014-01-29 アピックヤマダ株式会社 Bonding apparatus and bonding method for semiconductor device
JP5892682B2 (en) * 2011-04-27 2016-03-23 アピックヤマダ株式会社 Joining method

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003249532A (en) * 2002-02-26 2003-09-05 Seiko Epson Corp Mounting structure, its manufacturing method, its manufacturing device, and electronic apparatus
TW200739773A (en) * 2006-02-23 2007-10-16 Sony Chem & Inf Device Corp Mounting method
JP2010010628A (en) * 2008-06-30 2010-01-14 Nikon Corp Bonding apparatus and bonding method
JP2010245195A (en) * 2009-04-02 2010-10-28 Nec Corp Apparatus for manufacturing semiconductor device, and method for manufacturing semiconductor device
TW201205700A (en) * 2010-01-22 2012-02-01 Sony Chemical & Inf Device Heating device and production method for mounted body

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