TWI653760B - Semiconductor device - Google Patents

Abstract

A semiconductor device includes an active layer, a source electrode, a drain electrode, a gate electrode, a first insulating layer, a second insulating layer, a first source pad, and a first drain pad. The source electrode, the drain electrode and the gate electrode are placed on the active layer. The first insulating layer is disposed on the source electrode, the drain electrode, and the gate electrode. The second insulating layer is disposed on the first insulating layer. The first source pad is electrically connected to the source electrode and includes a first lower source branch and a first source body. The first lower source branch is interposed between the first insulating layer and the second insulating layer. The first source body is disposed on the second insulation layer. The first drain pad is electrically connected to the drain electrode and includes a first lower drain branch and a first drain body. The first lower drain branch is interposed between the first insulating layer and the second insulating layer. The first drain body is disposed on the second insulating layer.

Description

Semiconductor device

The present invention relates to a semiconductor device.

A nitride semiconductor has a high breakdown electric field and a high electron saturation speed. Therefore, a nitride semiconductor is expected as a semiconductor material for fabricating a semiconductor device having a high breakdown voltage and a low on-resistance. Many semiconductor devices using nitride-related semiconductors have heterostructures. Heterostructures are composed of nitride semiconductors with different energy gaps, and two-dimensional electron gas layers are generated at the interface. Semiconductor devices with heterostructures can achieve low on-resistance. Such a semiconductor device is called a High Electron Mobility Transistor (HEMT).

One aspect of this disclosure provides a semiconductor device including an active layer, at least one source electrode, at least one drain electrode, at least one gate electrode, a first insulating layer, a second insulating layer, a first source pad, and a first A drain pad. The active layer has an active area. The source electrode and the drain electrode are disposed on the active region of the active layer, and are arranged along the first direction. The gate electrode is placed on the active area of the active layer and between the source electrode and the drain electrode. The first insulating layer is disposed on the source electrode, the drain electrode, and the gate electrode. The second insulating layer is disposed on the first insulating layer. The first source pad is electrically connected to the source electrode and includes at least a first lower source branch and a first source body. The first lower source branch extends along the second direction, is placed between the first insulating layer and the second insulating layer, and is placed on the source electrode. The second direction is different from the first direction. The first source body is disposed on the active regions of the second insulating layer and the active layer, and extends along the first direction. The first drain pad is electrically connected to the drain electrode and includes at least a first lower drain branch and a first drain body. The first lower drain branch extends along the second direction, is disposed between the first insulating layer and the second insulating layer, and is disposed on the drain electrode. The first drain body is disposed on the active region of the second insulating layer and the active layer and extends along the first direction.

In one or more embodiments, the first source pad further includes a first upper source branch, is placed on the second insulating layer and the first lower source branch, and protrudes from the first source body.

In one or more embodiments, the first drain pad further includes a first upper drain branch, is placed on the second insulating layer and the first lower drain branch, and protrudes from the first drain body.

In one or more embodiments, the number of the first lower source branches is plural, and the first lower source branches are separated from each other.

In one or more embodiments, the number of the first lower drain branches is plural, and the first lower drain branches are separated from each other.

In one or more embodiments, a space is formed between the source electrode and the first drain body of the first drain pad, and the first lower source branch is placed outside the space.

In one or more embodiments, the total thickness of the first insulating layer and the second insulating layer is greater than 4 microns.

In one or more embodiments, there are a plurality of first source pads, and the first source pads are disposed on the active regions of the first insulating layer and the active layer.

In one or more embodiments, the first drain body is plural, and the first drain pads are disposed on the active regions of the first insulating layer and the active layer and alternate with the first source pads along the second direction. arrangement.

In one or more embodiments, the orthographic projection of the first source pad on the active layer forms a source pad region, and the orthographic projection of the drain electrode on the active layer forms a drain region. The source pad region overlaps at least a part of the drain region, and the area of the overlapping region of the source pad region and the drain region is less than or equal to 40% of the area of the drain region.

In one or more embodiments, the semiconductor device further includes a third insulating layer disposed between the first insulating layer and the active layer. The source electrode includes a lower source portion and an upper source portion. The lower source portion is interposed between the third insulation layer and the active layer. The upper source portion is interposed between the first insulating layer and the third insulating layer. The lower source portion is electrically connected to the upper source portion.

In one or more embodiments, the drain electrode includes a lower drain portion and an upper drain portion. The lower drain portion is interposed between the third insulating layer and the active layer. The upper drain portion is interposed between the first insulating layer and the third insulating layer. The lower drain portion is electrically connected to the upper drain portion.

In one or more embodiments, the semiconductor device further includes a fourth insulating layer, a second source pad, and a second drain pad. The fourth insulating layer is disposed on the first source pad and the first drain pad. The second source pad is disposed on the fourth insulation layer and is electrically connected to the first source pad. The second drain pad is disposed on the fourth insulation layer and is electrically connected to the first drain pad.

In one or more embodiments, the second source pad includes a second source body and at least one second source branch. The second source branch protrudes from the second source body and is placed on the first source body of the first source pad.

In one or more embodiments, the second source pad further includes a third source branch, which protrudes from the second source branch and is placed on the first source branch.

In one or more embodiments, the semiconductor device further includes a through structure disposed between the third source branch and the first source branch, and electrically connecting the third source branch and the first source branch.

In one or more embodiments, the semiconductor device further includes a fourth insulating layer, a plurality of second source pads, and a plurality of second drain pads. The fourth insulating layer is disposed on the first source pad and the first drain pad. The second source pad is disposed on the fourth insulation layer and is electrically connected to the first source pad. The second drain pad is disposed on the fourth insulation layer and is electrically connected to the first source pad. The second source pads and the second drain pads are alternately arranged along the first direction.

In one or more embodiments, the semiconductor device further includes a gate layer disposed between the gate electrode and the active layer.

In one or more embodiments, the semiconductor device further includes a protective layer disposed between the first insulating layer and the active layer. At least part of the protective layer is placed between the gate electrode and the gate layer.

In the following, a plurality of embodiments of the present invention will be disclosed graphically. For the sake of clarity, many practical details will be described in the following description. It should be understood, however, that these practical details should not be used to limit the invention. That is, in some embodiments of the present invention, these practical details are unnecessary. In addition, in order to simplify the drawings, some conventional structures and components will be shown in the drawings in a simple and schematic manner.

FIG. 1 is a top view of a semiconductor device according to an embodiment of the present invention, and FIG. 2A is a cross-sectional view taken along line A-A of FIG. 1. The semiconductor device includes an active layer 110, at least one source electrode 120, at least one drain electrode 130, at least one gate electrode 140, a first insulating layer 150, at least one first source pad 160, and at least one first drain pad. 170. For the sake of clarity, the gate electrode 140 and the first insulating layer 150 are shown in FIG. 2A and omitted in FIG. 1. The active layer 110 has an active region 112. The source electrode 120 and the drain electrode 130 are disposed on the active region 112 of the active layer 110 and are arranged along the first direction D1. The gate electrode 140 is disposed on the active region 112 of the active layer 110 and is between the source electrode 120 and the drain electrode 130. The semiconductor device of FIG. 1 includes a plurality of source electrodes 120 and a plurality of drain electrodes 130, and a plurality of gate electrodes 140 are respectively disposed between the source electrodes 120 and the drain electrodes 130. The first insulating layer 150 is disposed on the source electrode 120, the drain electrode 130 and the gate electrode 140. The first source pad 160 is disposed on the first insulating layer 150 and the active region 112 of the active layer 110. The first source pad 160 includes a first source body 162 and at least one first source branch 164. The first source body 162 is disposed on the active region 112, the source electrode 120, and the drain electrode 130, and extends along the first direction D1. The first source branch 164 is electrically connected to the first source body 162 and is disposed on the source electrode 120. The first drain pad 170 is disposed on the first insulating layer 150 and the active region 112 of the active layer 110. The first drain pad 170 includes a first drain body 172 and at least one first drain branch 174. The first drain body 172 is disposed on the active region 112, the source electrode 120 and the drain electrode 130, and extends along the first direction D1. The first drain branch 174 is electrically connected to the first drain body 172 and is disposed on the drain electrode 130. In this embodiment, the first source branch 164 and the first drain branch 174 are disposed between the first source body 162 and the first drain body 172. In addition, the semiconductor device may include a gate pad (not shown) to connect the gate electrode 140.

Fig. 2B is a sectional view taken along line B-B in Fig. 1. In FIGS. 1, 2A, and 2B, the semiconductor device further includes a second insulating layer 180 disposed on the first insulating layer 150. The first source body 162 is disposed on the second insulating layer 180, and the first source branch 164 includes a lower source branch 164b and an upper source branch 164t. The lower source branch 164b is placed between the first insulating layer 150 and the second insulating layer 180, and the upper source branch 164t is placed on the lower source branch 164b and the second insulating layer 180 and protrudes from the first source body 162 . In other words, the first source body 162 and the upper source branches 164t have the same layer structure. In some embodiments, the first source body 162 and the upper source branch 164t are integrally formed. The upper source branch 164t extends along a second direction D2, where the second direction D2 is different from the first direction D1. That is, the upper source branch 164t and the first source body 162 extend in different directions. Therefore, the first source body 162 and the upper source branch 164t form an interdigitated structure. In some embodiments, the second direction D2 is substantially perpendicular to the first direction D1, but the disclosure is not limited thereto. In addition, the upper source branch 164t may be a strip shape, a wave shape, a sawtooth shape, an irregular shape, or a combination thereof.

In FIG. 1, a plurality of lower source branches 164b are separated from each other. That is, the second insulating layer 180 is further disposed between the lower source branches 164b. The lower source branch 164b may have the same or similar shape as the upper source branch 164t. That is, the lower source branch 164b may be elongated, wavy, jagged, irregular, or a combination thereof.

In FIG. 2A, the semiconductor device further includes at least one through structure 166 disposed in the second insulating layer 180 between the lower source branch 164b and the upper source branch 164t. The through structure 166 connects the lower source branch 164b and the upper source branch 164t. Therefore, the lower source branch 164 b can be electrically connected to the upper source branch 164 t through the through structure 166. In addition, the semiconductor device further includes at least one through structure 168 disposed in the first insulating layer 150 between the lower source branch 164 b and the source electrode 120. The through structure 168 connects the lower source branch 164 b and the source electrode 120. Therefore, the lower source branch 164 b can be electrically connected to the source electrode 120 through the through structure 168.

Fig. 2C is a sectional view taken along line C-C in Fig. 1. Please refer to Fig. 1, Fig. 2A and Fig. 2C. The first drain body 172 is disposed on the second insulating layer 180, and the first drain branch 174 includes a lower drain branch 174b and an upper drain branch 174t. The lower drain branch 174b is disposed between the first insulating layer 150 and the second insulating layer 180, and the upper drain branch 174t is disposed on the lower drain branch 174b and the second insulating layer 180, and protrudes from the first drain body 172 . In other words, the first drain body 172 and the plurality of upper drain branches 174t are in the same layer structure. In some embodiments, the first drain body 172 is integrally formed with the upper drain branch 174t. The upper drain branch 174t extends along the second direction D2. That is, the upper drain branch 174t and the first drain body 172 extend in different directions. Therefore, the first drain body 172 and the upper drain branch 174t form an interdigitated structure. In addition, the upper drain branch 174t may be long, wavy, jagged, irregular, or a combination thereof. In addition, the upper drain branches 174t and the upper source branches 164t are alternately arranged along the first direction D1.

In FIG. 1, a plurality of lower drain branches 174b are separated from each other. That is, the second insulating layer 180 is further disposed between the lower drain branches 174b. The lower drain branch 174b may have the same or similar shape as the upper drain branch 174t. That is, the lower drain branch 174b may be elongated, wavy, jagged, irregular, or a combination thereof. In addition, the lower drain branches 174b and the lower source branches 164b are alternately arranged along the first direction D1.

In FIG. 2A, the semiconductor device further includes at least one through structure 176 disposed in the second insulating layer 180 between the lower drain branch 174b and the upper drain branch 174t. The through structure 176 connects the lower drain branch 174b and the upper drain branch 174t. Therefore, the lower drain branch 174 b may be electrically connected to the upper drain branch 174 t through the structure 176. In addition, the semiconductor device further includes at least one through structure 178 disposed in the first insulating layer 150 between the lower drain branch 174 b and the drain electrode 130. The through structure 178 connects the lower drain branch 174 b and the drain electrode 130. Therefore, the lower drain branch 174 b may be electrically connected to the drain electrode 130 through the through structure 178.

In FIG. 2A, the semiconductor device further includes a third insulating layer 155 disposed between the first insulating layer 150 and the active layer 110. The source electrode 120 includes a lower source portion 122, an upper source portion 124 and at least one through structure 126. The lower source portion 122 is interposed between the third insulating layer 155 and the active layer 110. The upper source portion 124 is interposed between the first insulating layer 150 and the third insulating layer 155. The through structure 126 is disposed between the lower source portion 122 and the upper source portion 124. The through structure 126 is connected between the lower source portion 122 and the upper source portion 124. Therefore, the lower source portion 122 can be electrically connected to the upper source portion 124 through the through structure 126. In some embodiments, the upper source portion 124 is further disposed on the gate electrode 140. The lower source portion 122 of the source electrode 120 is directly connected to the active layer 110 and may be an ohmic electrode, which has a large unit resistance. Therefore, the upper source portion 124 has a unit resistance smaller than the unit resistance of the lower source portion 122 and is placed on the lower source portion 122. In this way, by electrically connecting the upper source portion 124 to the lower source portion 122, the resistance value of the entire source electrode 120 can be reduced.

In addition, the drain electrode 130 includes a lower drain portion 132, an upper drain portion 134 and at least one through structure 136. The lower drain electrode portion 132 is interposed between the third insulating layer 155 and the active layer 110. The upper drain portion 134 is interposed between the first insulating layer 150 and the third insulating layer 155. The through structure 136 is interposed between the lower drain portion 132 and the upper drain portion 134. The through structure 136 is connected between the lower drain portion 132 and the upper drain portion 134. Therefore, the lower drain portion 132 can be electrically connected to the upper drain portion 134 through the through structure 136. The lower drain portion 132 of the drain electrode 130 is directly connected to the active layer 110 and may be an ohmic electrode, which has a large unit resistance. Therefore, the upper drain portion 134 has a unit resistance smaller than the unit resistance of the lower drain portion 132 and is placed on the lower drain portion 132. In this way, by electrically connecting the upper drain portion 134 to the lower drain portion 132, the resistance value of the entire drain electrode 130 can be reduced.

Please refer to Figures 2A and 2B. A space S1 is formed between the drain electrode 130 and the first source body 162 of the first source pad 160. The first drain branch 174 is disposed outside the space S1. That is, the first drain branch 174 is not disposed between the drain electrode 130 and the first source body 162. As such, the distance between the first source body 162 and the drain electrode 130 (see FIG. 2B) is greater than the distance between the lower drain branch 174b and the drain electrode 130 (see FIG. 2A). In some embodiments, the total thickness T of the first insulating layer 150 and the second insulating layer 180 is greater than 4 micrometers. Such a structure reduces the capacitance between the first source body 162 and the drain electrode 130, and the semiconductor device of this embodiment can increase its breakdown voltage. In addition, since the first drain branch 174 includes an upper drain branch 174t and a lower drain branch 174b, the resistance of the drain can be reduced.

Please refer to FIG. 2A and FIG. 2C. A space S2 is formed between the source electrode 120 and the first drain body 172 of the first drain pad 170. The first source branch 164 is placed outside the space S2. That is, the first source branch 164 is not disposed between the source electrode 120 and the first drain body 172. As such, the distance between the first drain body 172 and the source electrode 120 (see FIG. 2C) is greater than the distance between the lower source branch 164b and the source electrode 120 (see FIG. 2A). In some embodiments, the total thickness T of the first insulating layer 150 and the second insulating layer 180 is greater than 4 micrometers. Such a structure reduces the capacitance between the first drain body 172 and the source electrode 120, and the semiconductor device of this embodiment can increase its breakdown voltage. In addition, since the first source branch 164 includes an upper source branch 164t and a lower source branch 164b, the resistance of the source can be reduced.

Please refer to Figure 1 and Figure 2B. The orthographic projection of the first source pad 160 on the active layer 110 forms a source pad region 161, and the orthographic projection of the drain electrode 130 on the active layer 110 forms a drain region 131. The source pad region 161 overlaps at least part of the drain region 131, and the area of the overlapping region O1 of the source pad region 161 and the drain region 131 is less than or equal to 40% of the area of the drain region 131.

Please refer to Figure 1 and Figure 2C. Similarly, the orthographic projection of the first drain pad 170 on the active layer 110 forms the drain pad region 171, and the orthographic projection of the source electrode 120 on the active layer 110 forms the source region 121. The drain pad region 171 overlaps at least part of the source region 121, and the area of the overlap region O2 of the drain pad region 171 and the source region 121 is less than or equal to 40% of the area of the source region 121.

Please refer to Figure 1 and Figure 2A. The active layer 110 further includes an insulating region 114 that surrounds the active region 112 to avoid the generation of a leakage current, so the breakdown voltage can be increased. In FIG. 1, the first source pad 160 and the first drain pad 170 are completely located in the active region 112. In other words, the semiconductor device of this embodiment can be cut along the insulating region 114. In this way, most of the active regions 112 can be used, and it is not necessary to add a region for accommodating the drain pad and the source pad in the additional inactive region, so the size of the semiconductor device can be effectively reduced, or the same size Next, a semiconductor device capable of withstanding a higher breakdown voltage or a larger on-current is produced.

Please refer to Figure 2A. In one or more embodiments, the active layer 110 includes a plurality of different nitride-based semiconductor layers to generate a two-dimensional electron gas (2DEG) at a heterojunction as a conductive channel. For example, a stacked channel layer 116 and a barrier layer 118 may be used, wherein the barrier layer 118 is located on the channel layer 116. In some embodiments, the material of the channel layer 116 may be gallium nitride (GaN), and the material of the barrier layer 118 may be aluminum gallium nitride (AlGaN), but the disclosure is not limited thereto. In this structure, a two-dimensional electron gas may exist at the interface between the channel layer 116 and the barrier layer 118. Therefore, when the semiconductor device is in an on state, a conduction current between the source electrode 120 and the drain electrode 130 may flow along an interface between the channel layer 116 and the barrier layer 118. On the other hand, the active layer 110 can be optionally placed on a substrate 105. The material of the substrate 105 is, for example, a silicon substrate or a sapphire substrate, and the disclosure is not limited thereto. In one embodiment, the semiconductor device may further include a buffer layer (not shown) disposed between the active layer 110 and the substrate 105.

In this embodiment, the semiconductor device may further include a protective layer 190 disposed on the active layer 110. The protective layer 190 has at least one source opening 192 and at least one drain opening 194 therein. At least a portion of the source electrode 120 and at least a portion of the drain electrode 130 are placed in the source opening 192 and the drain opening 194, respectively. For example, in FIG. 2A, the source electrode 120 and the drain electrode 130 are respectively disposed in the source opening 192 and the drain opening 194 to electrically connect the active layer 110. In some embodiments, the semiconductor device further includes a gate dielectric layer 195 disposed at least between the gate electrode 140 and the protective layer 190.

FIG. 2D is a cross-sectional view of a semiconductor device according to another embodiment of the present invention. The cross-sectional position in FIG. 2D is the same as that in FIG. 2A. The semiconductor device in FIG. 2D is different from the semiconductor device in FIG. 2A in the structure of the gate electrode 140. In FIG. 2D, the semiconductor device further includes a gate layer 145 disposed between the gate electrode 140 and the active layer 110. At least part of the protective layer 190 is interposed between the gate electrode 140 and the gate layer 145. The gate layer 145 may include a P-type doped material. In this way, the semiconductor device in FIG. 2D is an enhanced transistor, and the semiconductor device in FIG. 2A is an empty transistor. As for the other structural details of the semiconductor device of FIG. 2D, since it is similar to the semiconductor device of FIG. 2A, it will not be described again.

FIG. 3A is a top view of a semiconductor device according to another embodiment of the present invention. 3A is different from the semiconductor device in FIG. 1 in the structures of the first source pad 160 and the first drain pad 170. In FIG. 3A, the semiconductor device includes a plurality of first source pads 160 and a plurality of first drain pads 170 and is disposed on the active region 112 of the active layer 110. The first source pads 160 and the first drain pads 170 are alternately arranged along the second direction D2. In addition, the upper source branch 164t and the first source body 162 form a cross-shaped structure, and the upper drain branch 174t and the first drain body 172 form a cross-shaped structure. As for the other structural details of the semiconductor device of FIG. 3A, since it is similar to the semiconductor device of FIG. 1, it will not be described again.

FIG. 3B is a top view of a semiconductor device according to another embodiment of the present invention. 3B is different from the semiconductor device in FIG. 3A in the structures of the first source pad 160 and the first drain pad 170. In FIG. 3B, the upper source branch 164t of one first source pad 160 and the first source body 162 form a finger-shaped structure, and the upper source branch 164t of the other first source pad 160 and the first source pad 160 A source body 162 forms a cross-shaped structure. Similarly, the upper drain branch 174t of one first drain pad 170 and the first drain body 172 form a finger-shaped structure, and the upper drain branch 174t of the other first drain pad 170 and the first drain The body 172 forms a cross-shaped structure. In FIGS. 3A and 3B, the upper source branch 164t (upper drain branch 174t) and the lower source branch 164b (lower drain branch 174b) have substantially the same shape, and the upper source branch 164t (upper drain) The pole branch 174t) completely covers the lower source branch 164b (the lower drain branch 174b). In other embodiments, the upper source branch 164t (upper drain branch 174t) and the lower source branch 164b (lower drain branch 174b) have different shapes. For example, the lower source branch 164b (lower drain branch 174b) extends from one side of the upper source branch 164t (upper drain branch 174t), that is, the upper source branch 164t (upper drain branch 174t) covers Part of the lower source branch 164b (lower drain branch 174b). As for the other structural details of the semiconductor device of FIG. 3B, since it is similar to the semiconductor device of FIG. 3A, it will not be described again.

FIG. 4 is a top view of a semiconductor device according to another embodiment of the present invention. FIG. 5A is a cross-sectional view along line AA in FIG. 4, FIG. 5B is a cross-sectional view along line BB in FIG. The figure is a sectional view taken along line CC of FIG. 4. The difference between the semiconductor device in FIG. 4 and FIG. 1 is the structure of the first source pad 160 and the first drain pad 170. In FIG. 5A, the first source branch 164 and the first drain branch 174 are placed between the first insulating layer 150 and the second insulating layer 180. In FIG. 5B, the first source body 162 is placed at the first The second insulating layer 180 is disposed on the second insulating layer 180. In FIG. 5C, the first drain body 172 is disposed on the second insulating layer 180. In FIG. 4, the first source branches 164 are spatially separated from each other, and the first drain branches 174 are spatially separated from each other. The first source branches 164 and the first drain branches 174 are alternately arranged along the first direction D1.

Please refer to Figures 5A and 5B. A space S1 is formed between the drain electrode 130 and the first source body 162 of the first source pad 160. The first drain branch 174 is disposed outside the space S1. That is, the first drain branch 174 is not disposed between the drain electrode 130 and the first source body 162. As such, the distance between the first source body 162 and the drain electrode 130 (see FIG. 5B) is greater than the distance between the first drain branch 174 and the drain electrode 130 (see FIG. 5A). In some embodiments, the total thickness T of the first insulating layer 150 and the second insulating layer 180 is greater than 4 micrometers. Such a structure reduces the capacitance between the first source body 162 and the drain electrode 130, so the semiconductor device of this embodiment can increase its breakdown voltage.

Please refer to Figures 5A and 5C. A space S2 is formed between the source electrode 120 and the first drain body 172 of the first drain pad 170. The first source branch 164 is placed outside the space S2. That is, the first source branch 164 is not disposed between the source electrode 120 and the first drain body 172. As such, the distance between the first drain body 172 and the source electrode 120 (see FIG. 5C) is greater than the distance between the lower source branch 164b and the source electrode 120 (see FIG. 5A). In some embodiments, the total thickness T of the first insulating layer 150 and the second insulating layer 180 is greater than 4 micrometers. Such a structure reduces the capacitance between the first drain body 172 and the source electrode 120, and the semiconductor device of this embodiment can increase its breakdown voltage. As for the other structural details of the semiconductor device of FIGS. 4-5C, since it is similar to the semiconductor device of FIGS. 1-2C, it will not be described again.

FIG. 6 is a top view of a semiconductor device according to another embodiment of the present invention. The semiconductor device of FIGS. 6 and 4 is different in the structures of the first source pad 160 and the first drain pad 170. In FIG. 6, the semiconductor device includes a plurality of first source pads 160 and a plurality of first drain pads 170. The first source pads 160 and the first drain pads 170 are alternately arranged along the second direction D2. In addition, the first source branch 164 and the first source body 162 form a cross-shaped or interdigitated structure, and the first drain branch 174 and the first drain body 172 form a cross-shaped or interdigitated structure. The other structural details of the semiconductor device of FIG. 6 are similar to those of the semiconductor device of FIG. 4 and will not be described again.

FIG. 7 is a top view of a semiconductor device according to another embodiment of the present invention. FIG. 8A is a cross-sectional view along line 8A-8A in FIG. 7, and FIG. 8B is a cross-section along line 8B-8B in FIG. 7. Illustration. 7-8B is different from the semiconductor device in FIGS. 1-2C in that the second source pad 210 and the second drain pad 220 are different. In FIGS. 7 to 8B, the semiconductor device further includes a fourth insulating layer 205, a second source pad 210, and a second drain pad 220. The fourth insulating layer 205 is disposed on the first source pad 160 and the first drain pad 170. The second source pad 210 is disposed on the fourth insulating layer 205 and is electrically connected to the first source pad 160. For example, the semiconductor device further includes at least one through structure 202 disposed in the fourth insulating layer 205 between the first source pad 160 and the second source pad 210. The through structure 202 connects the first source pad 160 and the second source pad 210. In this way, the second source pad 210 can be electrically connected to the first source pad 160 through the through structure 202. In addition, the second drain pad 220 is disposed on the fourth insulating layer 205 and is electrically connected to the first drain pad 170. For example, the semiconductor device further includes at least one through structure 204 disposed in the fourth insulating layer 205 between the first drain pad 170 and the second drain pad 220. The through structure 204 connects the first drain pad 170 and the second drain pad 220. In this way, the second drain pad 220 can be electrically connected to the first drain pad 170 through the through structure 204. As for the other structural details of the semiconductor device of FIGS. 7-8B, since it is similar to the semiconductor device of FIGS. 1-2C, it will not be described again. It should be noted that even though the semiconductor device in FIG. 7 is taken as an example in FIG. 7, the second source pad 210 and the second drain pad 220 in FIG. 7 can be applied to the above-mentioned semiconductor device according to actual needs (for example, 3, 4 and 6).

FIG. 9 is a top view of a semiconductor device according to another embodiment of the present invention. 9 and 7-8B are different in the number of the second source pads 210 and the second drain pads 220. In FIG. 9, the semiconductor device includes a plurality of second source pads 210 and a plurality of second drain pads 220. The second source pads 210 and the second drain pads 220 are alternately arranged along the first direction D1. The other structural details of the semiconductor device of FIG. 9 are similar to those of the semiconductor device of FIGS. 7-8B, and therefore will not be described again.

FIG. 10 is a top view of a semiconductor device according to another embodiment of the present invention. 10 and 7-8B are different in the structure of the second source pad 210 and the second drain pad 220. In FIG. 10, the second source pad 210 includes a second source body 212 and at least one second source branch 214. The second source branch 214 protrudes from the second source body 212 and is placed on the first source body 162 of the first source pad 160. The second source body 212 extends along the second direction D2, and the second source branch 214 extends along the first direction D1.

In some embodiments, some penetrating structures 202 are disposed between the second source body 212 and the first source pad 160, and other penetrating structures 202 are disposed between the second source branch 214 and the first source pad 160. Between the first source bodies 162. Therefore, the resistance of the source can be further reduced.

The second drain pad 220 includes a second drain body 222 and at least one second drain branch 224. The second drain branch 224 protrudes from the second drain body 222 and is placed on the first drain body 172 of the first drain pad 170. The second drain body 222 extends along the second direction D2, and the second drain branch 224 extends along the first direction D1.

In some embodiments, some penetrating structures 204 are disposed between the second drain body 222 and the first drain pad 170, and other penetrating structures 204 are disposed between the second drain branch 224 and the first drain pad 170 Between the first drain body 172. Therefore, the resistance of the drain can be further reduced. As for the other structural details of the semiconductor device of FIG. 10, since it is similar to the semiconductor device of FIG. 7-8B, it will not be described again. It should be noted that even though the semiconductor device of FIG. 1 is taken as an example in FIG. 10, the second source pad 210 and the second drain pad 220 of FIG. 10 may be applied to the above-mentioned semiconductor device according to actual needs (for example, 3, 4 and 6).

FIG. 11 is a top view of a semiconductor device according to another embodiment of the present invention. The difference between the semiconductor device in FIG. 11 and FIG. 10 is the structure of the second source pad 210 and the second drain pad 220. In FIG. 11, the second source pad 210 further includes at least one third source branch 216. The third source branch 216 protrudes from the second source branch 214 and is placed on the first source branch 164 of the first source pad 160. The third source branch 216 extends along the second direction D2.

In some embodiments, some through structures 202 are placed between the second source body 212 and the first source pad 160, and some through structures 202 are placed between the second source branch 214 and the first source pad 160. And some other through structures 202 are placed between the third source branch 216 and the first source branch 164 of the first source pad 160. Therefore, the resistance of the source can be further reduced.

The second drain pad 220 further includes at least one third drain branch 226. The third drain branch 226 protrudes from the second drain branch 224 and is placed on the first drain branch 174 of the first drain pad 170. The third drain branch 226 extends along the second direction D2.

In some embodiments, some through structures 204 are placed between the second drain body 222 and the first drain pad 170, and some through structures 204 are placed between the second drain branch 224 and the first of the first drain pad 170 Between the drain bodies 172 and other through structures 204 are disposed between the third drain branch 226 and the first drain branch 174 of the first drain pad 170. Therefore, the resistance of the drain can be further reduced. As for the other structural details of the semiconductor device of FIG. 11, since it is similar to the semiconductor device of FIG. 10, it will not be described again. It should be noted that even though the semiconductor device of FIG. 11 is taken as an example in FIG. 11, the second source pad 210 and the second drain pad 220 of FIG. 11 can be applied to the above-mentioned semiconductor device according to actual needs (for example, 3, 4 and 6).

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention. Any person skilled in the art can make various modifications and retouches without departing from the spirit and scope of the present invention. Therefore, the protection of the present invention The scope shall be determined by the scope of the attached patent application.

105‧‧‧ substrate

110‧‧‧Active layer

112‧‧‧Active Zone

114‧‧‧Insulated area

116‧‧‧Channel layer

118‧‧‧ barrier layer

120‧‧‧Source electrode

121‧‧‧Source area

122‧‧‧ lower source

124‧‧‧ Upper Source Department

126, 136, 166, 168, 176, 178, 202, 204‧‧‧ through structure

130‧‧‧ Drain electrode

131‧‧‧ Drain region

132‧‧‧ lower drain

134‧‧‧ Upper Drain

140‧‧‧Gate electrode

145‧‧‧Gate layer

150‧‧‧first insulating layer

155‧‧‧third insulating layer

160‧‧‧First Source Pad

161‧‧‧Source pad area

162‧‧‧The first source body

164‧‧‧First source branch

164b‧‧‧ under source branch

164t‧‧‧up source branch

170‧‧‧First Drain Pad

171‧‧‧ Drain Pad Area

172‧‧‧The first drain body

174‧‧‧First Drain Branch

174b‧‧‧Lower Drain Branch

174t‧‧‧Upper Drain Branch

180‧‧‧Second insulation layer

190‧‧‧protective layer

192‧‧‧Source opening

194‧‧‧ Drain opening

195‧‧‧Gate dielectric layer

205‧‧‧Fourth insulation layer

210‧‧‧Second Source Pad

212‧‧‧Second source body

214‧‧‧Second Source Branch

216‧‧‧Third source branch

220‧‧‧Second Drain Pad

222‧‧‧Second Drain Body

224‧‧‧Second Drain Branch

226‧‧‧Third Drain Branch

A-A, B-B, C-C, 8A-8A, 8B-8B‧‧‧

D1‧‧‧ first direction

D2‧‧‧ Second direction

O1, O2‧‧‧ overlapping area

S1, S2‧‧‧‧space

T‧‧‧thickness

FIG. 1 is a top view of a semiconductor device according to an embodiment of the present invention. Fig. 2A is a sectional view taken along line A-A of Fig. 1. Fig. 2B is a sectional view taken along line B-B in Fig. 1. Fig. 2C is a sectional view taken along line C-C in Fig. 1. FIG. 2D is a cross-sectional view of a semiconductor device according to another embodiment of the present invention. FIG. 3A is a top view of a semiconductor device according to another embodiment of the present invention. FIG. 3B is a top view of a semiconductor device according to another embodiment of the present invention. FIG. 4 is a top view of a semiconductor device according to another embodiment of the present invention. Fig. 5A is a sectional view taken along line A-A of Fig. 4. Fig. 5B is a sectional view taken along line B-B in Fig. 4. Fig. 5C is a sectional view taken along line C-C in Fig. 4. FIG. 6 is a top view of a semiconductor device according to another embodiment of the present invention. FIG. 7 is a top view of a semiconductor device according to another embodiment of the present invention. FIG. 8A is a cross-sectional view taken along line 8A-8A of FIG. 7. FIG. 8B is a sectional view taken along line 8B-8B of FIG. 7. FIG. 9 is a top view of a semiconductor device according to another embodiment of the present invention. FIG. 10 is a top view of a semiconductor device according to another embodiment of the present invention. FIG. 11 is a top view of a semiconductor device according to another embodiment of the present invention.

Claims (18)

A semiconductor device includes: an active layer having an active region; at least one source electrode and at least one drain electrode are placed on the active region of the active layer and arranged along a first direction; at least one gate electrode An electrode is disposed on the active region of the active layer and is disposed between the source electrode and the drain electrode; a first insulating layer is disposed on the source electrode, the drain electrode, and the gate electrode A third insulating layer is placed on the first insulating layer; a third insulating layer is placed between the first insulating layer and the active layer, wherein the source electrode includes: a lower source portion; Between the third insulation layer and the active layer; and an upper source portion is disposed between the first insulation layer and the third insulation layer, wherein the lower source portion is electrically connected to the upper source portion A first source pad electrically connected to the source electrode, the first source pad comprising: at least a first lower source branch, extending along a second direction, placed between the first insulating layer and Between the second insulating layer and placed on the source electrode, wherein the second direction is different from the first side A first source body disposed on the active region of the second insulating layer and the active layer and extending along the first direction; and a first drain pad electrically connected to the drain electrode The first drain pad includes: at least one first lower drain branch extending along the second direction, placed between the first insulating layer and the second insulating layer, and placed on the drain electrode And a first drain body disposed on the active region of the second insulating layer and the active layer and extending along the first direction. The semiconductor device according to claim 1, wherein the first source pad further includes a first upper source branch, which is placed on the second insulating layer and the first lower source branch, and from the first source body protruding. The semiconductor device according to claim 2, wherein the first drain pad further includes a first upper drain branch, which is placed on the second insulating layer and the first lower drain branch, and from the first drain body. protruding. The semiconductor device according to claim 1, wherein the number of the first lower source branches is plural, and the first lower source branches are separated from each other. The semiconductor device according to claim 4, wherein the number of the first lower drain branches is plural, and the first lower drain branches are separated from each other. The semiconductor device according to claim 1, wherein a space is formed between the source electrode and the first drain body of the first drain pad, and the first lower source branch is placed outside the space. The semiconductor device according to claim 1, wherein a total thickness of the first insulating layer and the second insulating layer is greater than 4 micrometers. The semiconductor device according to claim 1, wherein the first source pads are plural, and the first source pads are disposed on the active regions of the first insulating layer and the active layer. The semiconductor device according to claim 8, wherein the first drain body is a plurality of, the first drain pads are placed on the active region of the first insulating layer and the active layer, and the first source electrodes The pads are alternately arranged along the second direction. The semiconductor device according to claim 1, wherein the first source pad forms a source pad region on the orthographic projection of the active layer, and the drain electrode forms a drain region on the orthographic projection of the active layer, and the source electrode The pad region overlaps at least part of the drain region, and the area of the overlapping region of the source pad region and the drain region is less than or equal to 40% of the area of the drain region. The semiconductor device according to claim 1, wherein the drain electrode comprises: a lower drain portion disposed between the third insulating layer and the active layer; and an upper drain portion disposed between the first insulating layer and the active layer. Between the third insulating layers, the lower drain portion is electrically connected to the upper drain portion. The semiconductor device according to claim 1, further comprising: a fourth insulating layer placed on the first source pad and the first drain pad; a second source pad placed on the fourth insulating layer, and It is electrically connected to the first source pad; and a second drain pad is placed on the fourth insulation layer and is electrically connected to the first drain pad. The semiconductor device according to claim 12, wherein the second source pad includes: a second source body; and at least one second source branch protruding from the second source body and placed on the first source pad On the first source electrode body. The semiconductor device as claimed in claim 13, wherein the second source pad further comprises: a third source branch protruding from the second source branch and placed on the first source branch. For example, the semiconductor device of claim 14 further includes a through structure disposed between the third source branch and the first source branch, and electrically connecting the third source branch and the first source branch. The semiconductor device according to claim 1, further comprising: a fourth insulating layer disposed on the first source pad and the first drain pad; a plurality of second source pads disposed on the fourth insulating layer; The first source pads are electrically connected; and a plurality of second drain pads are disposed on the fourth insulation layer and are electrically connected to the first source pads, wherein the second source pads and the first source pads are electrically connected to the first source pads; The two drain pads are alternately arranged along the first direction. For example, the semiconductor device of claim 1 further includes a gate layer disposed between the gate electrode and the active layer. The semiconductor device according to claim 17, further comprising a protective layer disposed between the first insulating layer and the active layer, wherein at least part of the protective layer is disposed between the gate electrode and the gate layer.