TWI650628B - Voltage regulator - Google Patents

Abstract

A voltage stabilizing device comprises an output circuit, a feedback circuit, a voltage control circuit and a current control circuit. The output circuit receives an input voltage and generates an output voltage proportional to the input voltage and an output current, and the output circuit receives a voltage control signal for adjusting the output voltage. A feedback circuit detects the output voltage to generate a feedback voltage that is proportional to the output voltage. The voltage control circuit is electrically connected to the output circuit and the feedback circuit, and receives the feedback voltage, and compares the feedback voltage with the reference voltage to generate the voltage control signal. When the feedback voltage is greater than the reference voltage, the voltage control signal is used to control The output circuit reduces the output voltage. The current control circuit samples the output current, and determines whether the output current is greater than a preset value to adjust the output current. When the output current is greater than the preset value, the output current is limited to the preset value. .

Description

Voltage regulator

The invention relates to a low dropout regulator (LDO), in particular to a voltage regulator with voltage control and current control.

In the prior art, the power supply voltage may generally vary over a wide range. For example, a lithium ion battery in a portable device can supply 4.2 volts when fully charged, and can only provide 2.3 volts after discharging. The range of change is large. Since the transient current is high when the voltage is supplied, the output current has a surge current. Therefore, how to effectively stabilize the output voltage and output current is the future research direction.

Accordingly, it is an object of the present invention to provide an effective voltage stabilizing device for stabilizing output voltage and output current.

Therefore, the voltage stabilizing device of the present invention comprises an output circuit, a feedback circuit, a voltage control circuit and a current control circuit.

The output circuit receives an input voltage and generates an output voltage proportional to the input voltage and an output current, and the output circuit receives a voltage control signal for adjusting the output voltage.

A feedback circuit is electrically coupled to the output circuit to detect the output voltage to generate a feedback voltage proportional to the output voltage.

The voltage control circuit is electrically connected to the output circuit and the feedback circuit, and receives the feedback voltage, and compares the feedback voltage with a reference voltage to generate the voltage control signal. When the feedback voltage is greater than the reference voltage, the voltage control signal Used to control the output circuit to reduce the output voltage.

The current control circuit is electrically connected to the output circuit to sample the output current, and determines whether the output current is greater than a predetermined value to adjust the output current. When the output current is greater than the preset value, the current control circuit The output current is limited to the preset value.

The effect of the invention is that when the output current is less than the preset value, the voltage control circuit adjusts the magnitude of the output voltage, and when the output current is greater than the preset value, the current control circuit controls the magnitude of the output current.

2‧‧‧Output circuit

21‧‧‧Power level unit

22‧‧‧Voltage clamp unit

3‧‧‧Feedback circuit

4‧‧‧Voltage control circuit

5‧‧‧ Current Control Circuit

M1‧‧‧first transistor

M2‧‧‧second transistor

M3‧‧‧ third transistor

M4‧‧‧ fourth transistor

M5‧‧‧ fifth transistor

M6‧‧‧ sixth transistor

M7‧‧‧ seventh transistor

M8‧‧‧ eighth transistor

M9‧‧‧ ninth transistor

M10‧‧‧10th transistor

M11‧‧‧ eleventh crystal

M12‧‧‧12th transistor

M13‧‧‧ thirteenth crystal

M14‧‧‧fourteenth transistor

OP1‧‧‧First Operational Amplifier

OP2‧‧‧Second operational amplifier

Iref‧‧‧current source

Cout‧‧‧ output capacitor

Rout‧‧‧ output resistor

Vdd‧‧‧Power supply voltage

Vin‧‧‧Input voltage

Vout‧‧‧ output voltage

Iout‧‧‧Output current

C1‧‧‧First resistance

R1‧‧‧first capacitor

Rf1‧‧‧ first feedback resistor

Rf2‧‧‧second feedback resistor

Rm‧‧‧Variable resistor

R2‧‧‧second resistance

Other features and effects of the present invention will be apparent from the embodiments of the drawings, in which: 1 is a circuit diagram of a first embodiment of the present invention; and FIG. 2 is a circuit diagram of a second embodiment of the present invention.

Before the present invention is described in detail, it should be noted that in the following description, similar elements are denoted by the same reference numerals.

<First Embodiment>

Referring to FIG. 1, a first embodiment of a voltage stabilizing device of the present invention is adapted to receive a power supply voltage Vdd and modulate an input voltage Vin to generate a stable negative voltage Vout, wherein |Vin|>|Vout|, The voltage stabilizing device comprises an output circuit 2, a feedback circuit 3, a voltage control circuit 4 and a current control circuit 5.

The output circuit 2 receives an input voltage Vin and generates an output voltage Vout proportional to the input voltage and an output current Iout, and the output circuit 2 receives a voltage control signal for adjusting the output voltage Vout.

The output circuit 2 includes a power stage unit 21, an output capacitor Cout, and an output resistor Rout. The power stage unit 21 has a first transistor M1, a second transistor M2, and a third transistor M3.

The first transistor M1 has a first end electrically connected to the voltage control circuit 4 for receiving the voltage control signal, a second end receiving the input voltage Vin, and an electric Connect the control end of the first end. The second transistor M2 has a first end for providing the output voltage Vout and the output current Iout, a second end for receiving the input voltage Vin, and a control end electrically connected to the first end of the first transistor M1. The third transistor M3 has a first end electrically connected to the current control circuit 5, a second end receiving the input voltage Vin, and a control end electrically connected to the first end of the first transistor M1. The output capacitor Cout is electrically connected between the first end of the second transistor M2 and the ground GND, and the output resistor Rout is connected in parallel to the output capacitor Cout. The first to third transistors M1 M M3 are N-type MOS field-effect transistors (NMOS), and the first ends of the first to third transistors M1 M M3 are drained, and the second end is a source The control terminal is a gate.

The feedback circuit 3 is electrically connected to the output circuit 2 to detect the output voltage Vout to generate a feedback voltage Vfb proportional to the output voltage Vout.

The voltage control circuit 4 is electrically connected to the output circuit 2 and the feedback circuit 3, and receives the feedback voltage Vfb, and compares the feedback voltage Vfb with a first reference voltage Vref1 to generate the voltage control signal when the feedback voltage Vfb is greater than The voltage control signal is used to control the output circuit 2 to lower the output voltage Vout. The voltage control circuit 4 includes a first operational amplifier OP1 and a fourth transistor M4.

The first operational amplifier OP1 has a non-inverting input terminal (+) receiving a first reference voltage Vref1, an inverting input terminal (-) electrically connected to the feedback circuit 3 to receive the feedback voltage Vfb, and an output terminal. . The fourth transistor M4 has A first end of the first transistor M1 of the output circuit 2 is electrically connected to provide a first end of the voltage control signal, a second end, and a control end electrically connected to the output end of the first operational amplifier OP1. The fourth transistor M4 is a P-type MOS field-effect transistor (PMOS), and the first terminal of the fourth transistor M4 is a drain, the second terminal is a source, and the control terminal is a gate. The voltage control signal is a drain voltage of the fourth transistor M4.

The current control circuit 5 is electrically connected to the output circuit 2 to sample the output current Iout, and determines whether the output current Iout is greater than a preset value, thereby adjusting the output current Iout, when the output current Iout is greater than the preset value. The current control circuit 5 limits the output current Iout to the preset value. That is, when the output current Iout is less than a predetermined value, the control of the output circuit 2 lies in the voltage control circuit 4, and the voltage control circuit 4 adjusts the output according to the feedback voltage Vfb and the reference voltage Vref. The output voltage Vout of the circuit 2; when the output current Iout is greater than the preset value, the control of the output circuit 2 lies in the current control circuit 5, and the current control circuit 5 starts to operate, so that the voltage regulator device is equivalent to a constant current power source. The output current Iout is limited to the preset value.

The current control circuit 5 includes a fifth transistor M5, a sixth transistor M6, a seventh transistor M7, an eighth transistor M8, a current source Iref, and a first resistor R1 and a series connected in series. A capacitor C1.

The first resistor R1 and the first capacitor C1 are electrically connected between the first end and the second end of the eighth transistor M8. The fifth transistor M5 has a first end electrically connected to the second end of the fourth transistor M4, a second end receiving a power supply voltage Vdd, and a control end. The sixth transistor M6 has a first end electrically connected to the first end of the third transistor M3, a second end receiving a power supply voltage Vdd, and a control end electrically connected to the second end of the sixth transistor M6. . The seventh transistor M7 has a first end electrically connected to the first end of the second transistor M2, a second end receiving the power supply voltage Vdd, and a control end electrically connected to the second end of the sixth transistor M6. . The eighth transistor M8 has a first end electrically connected to the control end of the fifth transistor M5, a second end receiving the power supply voltage Vdd, and a control end electrically connected to the second end of the sixth transistor M6. The current source Iref is electrically connected between the control terminal of the fifth transistor M5 and the ground to provide a reference current. The fifth to eighth transistors M5-M8 are P-type MOS field-effect transistors (PMOS), and the first ends of the fifth to eighth transistors M5-M8 are drain electrodes, and the second terminal is a source The control terminal is a gate.

The relationship between the current mirror mapping current is as follows: the output current Iout flowing through the second transistor M2 has a first proportional relationship with the current Is flowing through the sixth transistor M6, that is, Is:Iout=1:K1; The Ifb of the eighth transistor M8 has a second proportional relationship with the current Is flowing through the sixth transistor M6, that is, Ifb: Is = 1: K2. When Ifb < Iref, the gate voltage of the fifth transistor M5 is pulled down to 0, so that the fifth transistor M5 is fully turned on. When Ifb=Iref, the current control circuit 5 obtains control of the output circuit 2. right. That is, when Iout/(K1*K2)>Iref, Iout>Iref×K1×K2, the voltage regulator enters the current limiting state. At this time, Iout is constant to Iref×K1×K2, where the preset value=Iref×K1×K2.

The feedback circuit 3 includes a second operational amplifier OP2, a ninth transistor M9, a first feedback resistor Rf1 and a second feedback resistor Rf2, a variable resistor Rm, and a second resistor R2.

The second operational amplifier OP2 has a non-inverting input terminal (+) receiving a second reference voltage Vref2, an inverting input terminal (-), and an output terminal. The ninth transistor M9 has a first end receiving the power supply voltage Vdd, a second end, and a control end electrically connected to the output end of the second operational amplifier OP2. a first feedback resistor Rf1 and a second feedback resistor Rf2 connected in series, the first feedback resistor Rf1 and the second feedback resistor Rf2 are electrically connected to the second end and the second end of the ninth transistor M9 Between the first ends of the transistors M2, and a common terminal of the first feedback resistor Rf1 and the second feedback resistor Rf2 are electrically connected to the inverting input terminal of the first operational amplifier OP1. The variable resistor Rm has a first end electrically connected to the second end of the ninth transistor, and a second end electrically connected to the inverting input end of the second operational amplifier OP2. The second resistor R2 has a first end electrically connected to the inverting input end of the second operational amplifier OP2, and a grounded second end. The ninth transistor M9 is an N-type gold oxide half field effect transistor (NMOS), and the first end of the ninth transistor M9 is a drain, the second end is a source, and the control end is a gate.

The source voltage of the ninth transistor M9 is If , Vddr=(1+Km1)×Vref2, according to the resistance partial pressure relationship between the first feedback resistor Rf1 and the second feedback resistor Rf2 .

In the initial state, the input voltage Vin is a negative value, the output voltage Vout is 0, and Ifb < Iref. At this time, the first transistor M1 is turned on, and the output voltage Vout is started to be pulled down, so that the output voltage Vout is lowered to approach Vin. During the power-on process, the first transistor M1 generates a large current, and the current of the sixth transistor M6 and the eighth transistor M8 is greater than Iref due to current mirror mapping (when the control of the output circuit is controlled by the current control circuit) When the gate voltage of the fifth transistor M5 rises, the impedance of the fifth transistor M5 becomes large, and the current flowing through the fourth transistor M4 becomes small. As the output voltage Vout gradually decreases, the gate voltage of the fourth transistor M4 gradually rises, and the current flowing through the fourth transistor M4 and the first transistor M1 becomes smaller, so the sixth transistor M6 and the eighth transistor The current on M8 is less than Iref, resulting in a lower gate voltage of the fifth transistor M5. As the gate voltage of the fifth transistor M5 drops, until the fifth transistor M5 is fully turned on, the control of the output circuit 2 is changed from the current control circuit 5 to the voltage control circuit 4.

When the output circuit is controlled by the voltage control circuit 4, if the output voltage Vout is more negative (the absolute value is larger) than the first reference voltage Vref1, the gate voltage of the fourth transistor M4 rises, causing the fifth power to flow. The current on the crystal M5, the fourth transistor M4, and the first transistor M1 becomes smaller, thereby causing the gate voltage of the second transistor M2 to decrease, and the load will be output voltage due to the weak pull-down capability of the second transistor M2. Vout is pulled up from a negative value to GND, causing the output voltage Vout to rise (the absolute value becomes smaller).

Due to the action of the voltage control circuit 4, the final feedback voltage Vfb is equal to the first reference voltage Vref1. by With Vfb=Vref1, you can get .

Thereby getting ,make , then you can push Vout = (1 + Km2). Vref1-Km2. Vddr, and Vddr=(1+Km1)×Vref2, can be derived from Vout=(1+Km2). Vref1-Km2. (1+Km1). Vref2.

From the above formula Vout = (1 + Km2). Vref1-Km2. (1+Km1). Vref2 knows that when the proportional coefficient Km2 is fixed, the output voltage Vout can be level-modulated by adjusting the proportional coefficient Km1, and the output voltage Vout can be fine-tuned by adjusting the first reference voltage Vref1 to improve the output accuracy.

When Ifb = Iref, the gate voltage of the fifth transistor M5 is controlled, and the control of the output circuit 2 is changed to the current control circuit 5. At this time, the current control circuit 5 adjusts the output current Iout of the voltage stabilizing circuit. That is, when Iout>Im, Im=Iref×K1×K2, the voltage regulator enters the current limiting state, and the output current Iout=Iref×K1×K2.

<Second embodiment>

Referring to FIG. 2, a second embodiment of the voltage stabilizing device of the present invention differs from the first embodiment in that the output circuit 2 further includes a voltage clamping unit 22, and the voltage The clamp unit 22 is electrically connected between the current control circuit 5 and the voltage control circuit 4 and the power stage unit 21.

The voltage clamping unit 22 has a tenth transistor M10, an eleventh transistor M11, a twelfth transistor M12, a thirteenth transistor M13, and a fourteenth transistor M14.

The tenth transistor M10 has a first end electrically connected to the first end of the first transistor M1, a second end electrically connected to the voltage control circuit 4, and a grounded control end. The eleventh transistor M11 has a first end electrically connected to the current control circuit 5, a second end, and a control end electrically connected to the control end of the tenth transistor M10. The twelfth transistor M12 has a first end, a second end electrically connected to the current control circuit 5, and a control end electrically connected to the control end of the tenth transistor M10. The thirteenth transistor M13 has a first end electrically connected to the second end of the eleventh transistor M11, a second end electrically connected to the first end of the third transistor M3, and an electrical connection of the tenth The control end of the first end of the second transistor M12. The fourteenth transistor M14 has a first end electrically connected to the second end of the twelfth transistor M12, a second end electrically connected to the first end of the second transistor M2, and an electrical connection of the tenth The control end of the first end of the second transistor M12. When VDD=5V and Vin=-5V, only 5V MOS is needed, and a total voltage of 10V from VDD to Vin can be realized, avoiding the use of high-voltage transistors and reducing production costs.

The voltage control circuit 4 includes a first operational amplifier OP1 and a fourth transistor M4. The first operational amplifier OP1 has a non-inverting input terminal receiving a first reference voltage Vref1, an inverting input terminal electrically connected to the feedback circuit 3 to receive the feedback voltage Vfb, and an output terminal. The fourth transistor M4 has a first end electrically connected to the tenth transistor M10 to provide a first end of the voltage control signal, a second end, and a control end electrically connected to the output end of the first operational amplifier OP1. .

The current control circuit 5 includes a fifth transistor M5, a sixth transistor M6, a seventh transistor M7, an eighth transistor M8, a current source Iref, and a first resistor R1 and a series connected in series. A capacitor C1.

The fifth transistor M5 has a first end electrically connected to the second end of the fourth transistor M4, a second end receiving a power supply voltage Vdd, and a control end. The sixth transistor M6 has a first end electrically connected to the first end of the eleventh transistor M11, a second end receiving a power supply voltage Vdd, and a second end electrically connected to the sixth transistor M6. end. The seventh transistor M7 has a first end electrically connected to the second end of the twelfth transistor M12, a second end receiving the power supply voltage Vdd, and a control end electrically connected to the second end of the sixth transistor M6. . The eighth transistor M8 has a first end electrically connected to the control end of the fifth transistor M5, a second end receiving the power supply voltage Vdd, and a control end electrically connected to the second end of the sixth transistor M6. The current source Iref is electrically connected between the control terminal of the fifth transistor M5 and the ground to provide a reference current.

In summary, the voltage stabilizing device of the present invention has the following advantages: 1. When the output current Iout is less than a preset value (Iref×K1×K2), the voltage control circuit 4 adjusts the magnitude of the output voltage Vout, when the output current Iout is greater than When the preset value is used, the current control circuit 5 controls the magnitude of the output current Iout; secondly, the voltage control circuit 4 and the current control circuit 5 are combined in a manner that the fifth transistor M5 is connected in series with the fourth transistor M4 to avoid current control. The circuit 5 directly affects the output terminal of the operational amplifier OP1 in the voltage control circuit 4, so that the switching between the voltage control circuit 4 and the current control circuit 5 is smoother. 3. The voltage clamping unit 22 is laminated with a low voltage process transistor. Withstand high voltage and cross pressure, not only can reduce production costs, but also isolate the negative power supply and improve the power supply rejection ratio (PSRR) of the power supply. Therefore, the object of the present invention can be achieved.

However, the above is only the embodiment of the present invention, and the scope of the invention is not limited thereto, and all the equivalent equivalent changes and modifications according to the scope of the patent application and the patent specification of the present invention are still The scope of the invention is covered.

Claims (8)

A voltage stabilizing device comprising: an output circuit receiving an input voltage and generating an output voltage proportional to the input voltage and an output current, and the output circuit receiving a voltage control signal for adjusting the output voltage; a feedback circuit And electrically connecting the output circuit to detect the output voltage to generate a feedback voltage proportional to the output voltage; a voltage control circuit electrically connecting the output circuit and the feedback circuit, and receiving the feedback voltage, and comparing the feedback voltage And a reference voltage for generating the voltage control signal, when the feedback voltage is greater than the reference voltage, the voltage control signal is used to control the output circuit to reduce the output voltage; and a current control circuit electrically connecting the output circuit for sampling The output current is determined whether the output current is greater than a predetermined value to adjust the output current. When the output current is greater than the preset value, the current control circuit limits the output current to the preset value. The output circuit includes a power stage unit having: a first transistor having an electrical connection The voltage control circuit receives a first end of the voltage control signal, a second end receiving the input voltage, and a control end electrically connected to the first end; a second transistor having a supply voltage and a a first end of the output current, a second end receiving the input voltage, and a control end electrically connected to the first end of the first transistor; A third transistor has a first end electrically connected to the current control circuit, a second end receiving the input voltage, and a control end electrically connected to the first end of the first transistor. The voltage regulator device of claim 1, wherein the voltage control circuit comprises: a first operational amplifier having a non-inverting input receiving a first reference voltage, and an electrical connection connecting the feedback circuit to receive the feedback An inverting input terminal of the voltage, and an output terminal; and a fourth transistor having a first end electrically connected to the first transistor of the output circuit to provide a first end and a second end of the voltage control signal And a control terminal electrically connected to the output of the first operational amplifier. The voltage regulator device of claim 2, wherein the current control circuit comprises: a fifth transistor having a first end electrically connected to the second end of the fourth transistor, and a second receiving a power supply voltage And a control terminal; a sixth transistor having a first end electrically connected to the first end of the third transistor, a second end receiving a power supply voltage, and a first electrically connected to the sixth transistor a second end control terminal; a seventh transistor having a first end electrically connected to the first end of the second transistor, a second end receiving the power supply voltage, and a second electrically connected to the sixth transistor a control terminal of the terminal; an eighth transistor having a first end electrically connected to the control end of the fifth transistor, a second end receiving the power supply voltage, and a control end electrically connected to the second end of the sixth transistor ;and A current source electrically connected between the control terminal of the fifth transistor and the ground to provide a reference current. The voltage regulator device of claim 3, wherein the current control circuit further comprises a first resistor and a first capacitor connected in series, the first resistor and the first capacitor being electrically connected to the eighth transistor Between one end and the second end. The voltage stabilizing device of claim 3, wherein the feedback circuit comprises: a second operational amplifier having a non-inverting input terminal receiving a second reference voltage, an inverting input terminal, and an output terminal; a ninth transistor having a first end receiving a power supply voltage, a second end, and a control end electrically connected to an output end of the second operational amplifier; a first feedback resistor and a second return in series The first feedback resistor and the second feedback resistor are electrically connected between the second end of the ninth transistor and the first end of the second transistor, and the first feedback resistor and the a common terminal of the second feedback resistor is electrically connected to the inverting input end of the first operational amplifier; a variable resistor having a first end electrically connected to the second end of the ninth transistor, and an electrical connection a second end of the inverting input of the second operational amplifier; and a second resistor having a first end electrically coupled to the inverting input of the second operational amplifier and a grounded second end. The voltage stabilization device of claim 1, wherein the output circuit comprises a voltage clamping unit, the voltage clamping unit having: a tenth transistor having a first end electrically connected to the first end of the first transistor, a second end electrically connected to the voltage control circuit, and a grounded control end; an eleventh transistor, a first end, a second end electrically connected to the current control circuit, and a control end electrically connected to the control end of the tenth transistor; a twelfth transistor having a first end and an electrical connection a second end of the current control circuit, and a control end electrically connected to the control end of the tenth transistor; a thirteenth transistor having a first end electrically connected to the second end of the eleventh transistor, an electric a second end connected to the first end of the third transistor, and a control end electrically connected to the first end of the twelfth transistor; and a fourteenth transistor having an electrical connection to the twelfth a first end of the second end of the crystal, a second end electrically connected to the first end of the second transistor, and a control end electrically connected to the first end of the twelfth transistor. The voltage regulator device of claim 6, wherein the voltage control circuit comprises: a first operational amplifier having a non-inverting input receiving a first reference voltage, and an electrical connection to the feedback circuit to receive the feedback An inverting input terminal of the voltage, and an output terminal; and a fourth transistor having a first end electrically connected to the second end of the tenth transistor to provide the voltage control signal, a second end, and a first end The control terminal of the output of the first operational amplifier is electrically connected. The voltage stabilization device of claim 7, wherein the current control circuit comprises: a fifth transistor having a first end electrically connected to the second end of the fourth transistor, a second end receiving a power supply voltage, and a control end; a sixth transistor having an electrical connection to the tenth a first end of the first end of the transistor, a second end receiving a power supply voltage, and a control end electrically connected to the second end of the sixth transistor; a seventh transistor having an electrical connection to the tenth a first end of the second end of the second transistor, a second end receiving the power supply voltage, and a control end electrically connected to the second end of the sixth transistor; an eighth transistor having an electrical connection to the fifth a first end of the control end of the crystal, a second end receiving the power supply voltage, and a control end electrically connected to the second end of the sixth transistor; and a current source electrically connected to the control end and the ground of the fifth transistor To provide a reference current.