TWI639885B - Method for forming aligned mask, semiconductor device and method for forming a set of aligned mask - Google Patents
Method for forming aligned mask, semiconductor device and method for forming a set of aligned mask Download PDFInfo
- Publication number
- TWI639885B TWI639885B TW106143410A TW106143410A TWI639885B TW I639885 B TWI639885 B TW I639885B TW 106143410 A TW106143410 A TW 106143410A TW 106143410 A TW106143410 A TW 106143410A TW I639885 B TWI639885 B TW I639885B
- Authority
- TW
- Taiwan
- Prior art keywords
- etch
- mask
- reference mark
- trim
- distance
- Prior art date
Links
Landscapes
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
Abstract
一種形成對準罩幕的方法包括:在基底上蝕刻參考標記,以區分蝕刻區的邊界;使用曝光設定值在基底上形成蝕刻罩幕,所述蝕刻罩幕具有邊界;以及量測參考標記與所述邊界之間的距離。當所量測的距離超過目標距離的容限時,則自基底移除蝕刻罩幕,改變曝光設定值,使用改變後的所述曝光設定值形成下一蝕刻罩幕,並重複所述量測。可在一組層階中的頂部層階上蝕刻一組參考標記,以區分各蝕刻區的邊界。可執行蝕刻-修整製程以在所述一組層階中形成台階,其中所述蝕刻-修整製程至少包括使用第一參考標記及第二參考標記的第一蝕刻-修整循環及第二蝕刻-修整循環。A method of forming an alignment mask includes: etching a reference mark on a substrate to distinguish a boundary of an etched region; forming an etch mask on the substrate using an exposure setting value, the etch mask having a boundary; and measuring a reference mark and The distance between the boundaries. When the measured distance exceeds the tolerance of the target distance, the etching mask is removed from the substrate, the exposure setting is changed, the next exposure mask is formed using the changed exposure setting, and the measurement is repeated. A set of reference marks can be etched on the top level of a set of levels to distinguish the boundaries of each etched area. An etch-finishing process can be performed to form a step in the set of levels, wherein the etch-trimming process includes at least a first etch-trim cycle and a second etch-trim using a first reference mark and a second reference mark cycle.
Description
本發明技術大體而言是有關於高密度積體電路(integrated circuit,IC)裝置,且更具體而言是有關於形成具有大尺寸的罩幕的方法。The present technology is generally related to high density integrated circuit (IC) devices, and more particularly to methods of forming a mask having a large size.
在記憶體裝置的製造過程中,形成具有大尺寸的蝕刻罩幕可能具有挑戰性。此乃因蝕刻罩幕在兩個相對的邊界之間的尺寸可能過大而使得每次僅可在線(inline)監控所述兩個相對的邊界中的一者(例如使用在線掃描電子顯微鏡(scanning electronic microscope,SEM))。換言之,蝕刻罩幕的大尺寸圖案可能使得所述蝕刻罩幕的兩個相對的邊界無法同時輕易地監控。因此,難以在線直接量測大的蝕刻罩幕在兩個相對的邊界之間的尺寸及接續相應地調整所述蝕刻罩幕之大小。當必須量測此種大尺寸時,製造商可能需要自製造生產線取出晶圓及使用專門的非在線量測設備。Forming an etched mask having a large size can be challenging during the fabrication of the memory device. This is because the size of the etch mask between the two opposing boundaries may be so large that only one of the two opposing boundaries can be monitored inline at a time (eg using an online scanning electron microscope) Microscope, SEM)). In other words, the large size pattern of the etched mask may make the two opposing boundaries of the etch mask impossible to monitor at the same time. Therefore, it is difficult to directly measure the size and continuity of the large etching mask between two opposite boundaries on the line to adjust the size of the etching mask accordingly. When such large sizes must be measured, manufacturers may need to remove wafers from the manufacturing line and use specialized off-line measurement equipment.
期望提供一種可形成所詳述的具有可能難以在線量測的大尺寸的蝕刻罩幕的技術。It would be desirable to provide a technique that can form a detailed etch mask having a large size that may be difficult to measure online.
闡述一種形成對準罩幕的方法。所述方法包括:在基底上蝕刻參考標記,以區分蝕刻區的邊界;使用曝光設定值(exposure setting)在所述基底上形成蝕刻罩幕,所述蝕刻罩幕具有邊界;以及量測所述參考標記與所述蝕刻罩幕的所述邊界之間的距離。當所量測的所述距離超過目標距離的容限時,則可自所述基底移除所述蝕刻罩幕,可改變所述曝光設定值,可使用改變後的所述曝光設定值形成下一蝕刻罩幕,並可重複所述量測步驟。當所量測的所述距離處於所述容限內時,則可在蝕刻製程中使用所述蝕刻罩幕。A method of forming an alignment mask is described. The method includes etching a reference mark on a substrate to distinguish a boundary of an etched region, forming an etch mask on the substrate using an exposure setting, the etch mask having a boundary, and measuring the The distance between the reference mark and the boundary of the etch mask. When the measured distance exceeds the tolerance of the target distance, the etching mask may be removed from the substrate, the exposure setting value may be changed, and the changed exposure setting value may be used to form a next The mask is etched and the measurement step can be repeated. The etch mask can be used in an etch process when the measured distance is within the tolerance.
所述曝光設定值可包括為形成所述蝕刻罩幕而校準的曝光能量以及焦心點(focus center)。所述蝕刻製程可包括:使用所述蝕刻罩幕在所述基底中蝕刻凹陷部,將所述參考標記轉移至所述凹陷部的底部。所述蝕刻製程可包括在所述凹陷部中形成記憶體陣列。The exposure setting may include exposure energy calibrated to form the etch mask and a focus center. The etching process can include etching a recess in the substrate using the etching mask to transfer the reference mark to a bottom of the recess. The etching process can include forming an array of memory in the recess.
闡述一種裝置,所述裝置包括:基底,包括延伸至所述基底中的凹陷部;以及參考標記,位於所述凹陷部的底部上,所述參考標記與所述凹陷部的一側之間的距離處於目標距離的容限內。凹陷部的底部上的參考標記和所述凹陷部的一側之間的目標距離與基底的上表面上的參考標記和用於蝕刻所述凹陷部的蝕刻罩幕的邊界之間的目標距離可為不同的且具有不同的值。凹陷部的底部上的參考標記和所述凹陷部的一側之間的目標距離的容限與基底的上表面上的參考標記和用於蝕刻所述凹陷部的蝕刻罩幕的邊界之間的目標距離的容限可為不同的且具有不同的值。所述不同可歸因於所述蝕刻罩幕的所述邊界的斜率、所述凹陷部的所述一側的斜率、或其他因素。所述參考標記可平行於所述凹陷部的所述一側設置。記憶體陣列可設置於所述凹陷部中。Described a device comprising: a substrate comprising a recess extending into the substrate; and a reference mark on a bottom of the recess, between the reference mark and a side of the recess The distance is within the tolerance of the target distance. The target distance between the reference mark on the bottom of the depressed portion and one side of the depressed portion and the boundary between the reference mark on the upper surface of the substrate and the etching mask for etching the depressed portion may be They are different and have different values. The tolerance between the reference mark on the bottom of the recess and the target distance between one side of the recess is between the reference mark on the upper surface of the substrate and the boundary of the etch mask used to etch the recess The tolerance of the target distance can be different and have different values. The difference may be due to the slope of the boundary of the etch mask, the slope of the side of the recess, or other factors. The reference mark may be disposed parallel to the one side of the recess. A memory array can be disposed in the recess.
闡述一種形成一組對準罩幕的方法。所述方法包括:在基底上的一組層階(level)中的頂部層階上蝕刻一組參考標記,以區分各蝕刻區的邊界;以及執行蝕刻-修整製程,以在所述一組層階中的各層階處形成台階,其中所述蝕刻-修整製程至少包括使用所述一組參考標記中的第一參考標記的第一蝕刻-修整循環及使用所述一組參考標記中的第二參考標記的第二蝕刻-修整循環。A method of forming a set of alignment masks is illustrated. The method includes etching a set of reference marks on a top level in a set of levels on a substrate to distinguish boundaries of each etched area; and performing an etch-trimming process to form the set of layers Forming a step at each of the steps in the step, wherein the etch-trimming process includes at least a first etch-trim cycle using a first one of the set of reference marks and a second one of the set of reference marks A second etch-trim cycle of the reference mark.
所述第一蝕刻-修整循環可包括:使用第一曝光設定值在所述頂部層階上形成第一蝕刻-修整罩幕,所述第一蝕刻-修整罩幕具有第一邊界;以及量測所述一組參考標記中的所述第一參考標記與所述第一蝕刻罩幕的所述第一邊界之間的第一距離。The first etch-trim cycle can include forming a first etch-trim mask on the top level using a first exposure setting, the first etch-trim mask having a first boundary; and measuring a first distance between the first reference mark of the set of reference marks and the first boundary of the first etch mask.
當所量測的所述第一距離超過第一目標距離的容限時,則可自所述頂部層階移除所述第一蝕刻罩幕,可改變所述第一曝光設定值;可使用改變後的所述第一曝光設定值形成下一第一蝕刻罩幕,並可重複所述量測步驟。當所量測的所述第一距離處於所述容限內時,則可在第一蝕刻-修整製程中使用所述第一蝕刻罩幕。所述第一曝光設定值可包括為形成所述第一蝕刻-修整罩幕而校準的曝光能量以及焦心點。When the measured first distance exceeds the tolerance of the first target distance, the first etching mask may be removed from the top layer, and the first exposure setting may be changed; The subsequent first exposure setting forms a next first etch mask and the measurement step can be repeated. The first etch mask may be used in a first etch-trimming process when the measured first distance is within the tolerance. The first exposure setting may include exposure energy and a focal point that are calibrated to form the first etch-trim mask.
在本文所述的一個實例中,所述一組層階包括W個層階L(i),其中i為1至W。所述第一蝕刻-修整製程可包括:在所述第一蝕刻-修整循環中重複地修整所述第一蝕刻-修整罩幕以及使用經修整後的所述第一蝕刻-修整罩幕蝕刻一個層階達第一數目N1次重複,以在N1個各別層階L(i)上形成N1個台階,其中i為W-N1至W-1,其中所述N1個台階設置於所述第一參考標記與所述第二參考標記之間。所述第一蝕刻-修整製程可將所述第一參考標記自所述一組層階中的頂部層階L(W)轉移至所述一組層階中的層階L(W-N1-1)。In one example described herein, the set of levels includes W levels L(i), where i is 1 to W. The first etch-trimming process may include repeatedly trimming the first etch-trim mask in the first etch-trim cycle and etching one using the trimmed first etch-trim mask Levels up to a first number of N1 repetitions to form N1 steps on N1 respective levels L(i), where i is W-N1 to W-1, wherein the N1 steps are set to A reference mark and the second reference mark. The first etch-trimming process may transfer the first reference mark from a top level L(W) of the set of levels to a level L of the set of levels (W-N1- 1).
所述第二蝕刻-修整循環可包括:使用第二曝光設定值在所述頂部層階上形成第二蝕刻-修整罩幕,所述第二蝕刻-修整罩幕具有第二邊界;以及量測所述一組參考標記中的所述第二參考標記與所述第二蝕刻修整罩幕的所述第二邊界之間的第二距離。The second etch-trim cycle can include forming a second etch-trim mask on the top level using a second exposure setting, the second etch-trim mask having a second boundary; and measuring a second distance between the second one of the set of reference marks and the second boundary of the second etched trim mask.
當所量測的所述第二距離超過第二目標距離的容限時,則可自所述頂部層階移除所述第二蝕刻罩幕,可改變所述第二曝光設定值;可使用改變後的所述第二曝光設定值形成下一第二蝕刻罩幕,並可重複所述量測所述第二距離的步驟。當所量測的所述第二距離處於所述容限內時,則可在第二蝕刻-修整製程中使用所述第二蝕刻罩幕。所述第二曝光設定值可包括為形成所述第二蝕刻-修整罩幕而校準的曝光能量以及焦心點。When the measured second distance exceeds the tolerance of the second target distance, the second etching mask may be removed from the top layer, and the second exposure setting may be changed; The subsequent second exposure setting forms a next second etching mask, and the step of measuring the second distance may be repeated. The second etch mask can be used in the second etch-trimming process when the measured second distance is within the tolerance. The second exposure setting may include exposure energy and a focal point that are calibrated to form the second etch-trim mask.
所述一組層階包括W個層階L(i),其中i為1至W。所述第二蝕刻-修整製程可包括:在所述第二蝕刻-修整循環中重複地修整所述第二蝕刻-修整罩幕以及使用經修整後的所述第二蝕刻-修整罩幕蝕刻一個層階達第二數目N2次重複,以在N2個各別層階L(i)上形成N2個台階,其中i為W-N2至W-1,其中所述N2個台階設置於所述第二參考標記與所述一組參考標記中的第三參考標記之間。所述第二蝕刻-修整製程可將所述第二參考標記自所述一組層階中的頂部層階L(W)轉移至所述一組層階中的層階L(W-N2-1),且將所述第一參考標記自所述一組層階中的所述層階L(W-N1-1)轉移至所述一組層階中的層階L(W-N1-N2-2)。The set of levels includes W levels L(i), where i is 1 to W. The second etch-trimming process may include repeatedly trimming the second etch-trim mask in the second etch-trim cycle and etching one using the trimmed second etch-trim mask Levels up to a second number N2 repetitions to form N2 steps on N2 respective levels L(i), where i is W-N2 to W-1, wherein the N2 steps are set to Between the two reference marks and the third one of the set of reference marks. The second etch-trimming process may transfer the second reference mark from a top level L(W) of the set of levels to a level L of the set of levels (W-N2- 1) and transferring the first reference mark from the level L (W-N1-1) in the set of levels to a level L (W-N1- in the set of levels) N2-2).
所述第一曝光設定值可不同於所述第二曝光設定值,且所述第一目標距離可不同於所述第二目標距離。在所述第一蝕刻-修整循環中形成的台階的第一數目可不同於在所述第二蝕刻-修整循環中形成的台階的第二數目。所述蝕刻-修整製程可包括使用多於一個蝕刻-修整罩幕進行的多於一個蝕刻-修整循環。The first exposure setting may be different from the second exposure setting, and the first target distance may be different from the second target distance. The first number of steps formed in the first etch-trim cycle may be different than the second number of steps formed in the second etch-trim cycle. The etch-trim process can include more than one etch-trim cycle using more than one etch-trim mask.
闡述一種裝置,所述裝置包括:位於基底上的一組層階,所述一組層階包括W個層階L(i),其中i為0至W。所述一組層階包括至少層階L(i)的第一子集,其中i為0至N1,第一參考標記設置於所述第一子集中的層階L(0)中。所述第一子集中的所述層階L(0)中的所述第一參考標記與所述第一子集中的層階L(1)的第一邊界之間的距離處於第一目標距離的容限內。An apparatus is illustrated that includes a set of levels on a substrate, the set of levels comprising W steps L(i), where i is 0 to W. The set of levels includes a first subset of at least the level L(i), where i is 0 to N1, and the first reference mark is disposed in the level L(0) of the first subset. a distance between the first reference mark in the level L(0) in the first subset and a first boundary of the level L(1) in the first subset is at a first target distance Within the tolerance.
所述一組層階包括層階L(i)的第二子集,其中i為N1+1至N1+1+N2,第二參考標記設置於所述第二子集中的層階L(N1+1)中。所述層階L(N1+1)中的所述第二參考標記與所述第二子集中的層階L(N1+2)的第二邊界之間的第二距離處於第二目標距離的容限內。The set of levels includes a second subset of the levels L(i), where i is N1+1 to N1+1+N2, and the second reference mark is set to the level L (N1) in the second subset +1). a second distance between the second reference mark in the level L(N1+1) and a second boundary of the level L(N1+2) in the second subset is at a second target distance Within tolerance.
所述第二目標距離可不同於所述第一目標距離。所述一組層階的所述第一子集具有第一層階數目,所述一組層階的所述第二子集具有第二層階數目,且所述第一層階數目可不同於所述第二層階數目。所述一組層階L(i)中的所述層階中的每一者可包括導電材料層及絕緣材料層,其中i為1至W。 藉由閱讀各圖式、詳細說明、及隨附申請專利範圍可看出本發明技術的其他態樣及優點。The second target distance may be different from the first target distance. The first subset of the set of levels has a first number of levels, the second subset of the set of levels has a second number of levels, and the first number of stages may be different The number of steps in the second layer. Each of the levels in the set of levels L(i) may comprise a layer of electrically conductive material and a layer of insulating material, where i is from 1 to W. Other aspects and advantages of the present techniques can be seen by reading the drawings, the detailed description, and the accompanying claims.
將通常參照具體結構實施例及方法來闡述以下說明。應理解,本發明不旨在將本技術限制於所具體揭露的實施例及方法,但應理解本技術亦可使用其他特徵、元件、方法及實施例來實踐。闡述較佳實施例是為了說明本發明技術而非用於限制本發明技術的範圍,所述範圍是由申請專利範圍來界定。此項技術中具有通常知識者應認識到以下說明的各種等效變型。各種實施例中的相同元件一般是以相同的參考編號來指稱。The following description will be generally made with reference to specific structural examples and methods. It should be understood that the present invention is not intended to be limited to the details of the embodiments disclosed herein. The preferred embodiments are set forth to illustrate the teachings of the present invention and are not intended to limit the scope of the present invention, which is defined by the scope of the claims. Those of ordinary skill in the art will recognize the various equivalent variations described below. The same elements in the various embodiments are generally referred to by the same reference numerals.
圖1是半導體裝置結構的簡化剖視圖,其示出在基底110上形成蝕刻罩幕141的結果,其中蝕刻罩幕141具有邊界145,且所述基底可在上表面上具有絕緣材料層120。1 is a simplified cross-sectional view of a semiconductor device structure showing the result of forming an etch mask 141 on a substrate 110, wherein the etch mask 141 has a boundary 145, and the substrate can have a layer 120 of insulating material on the upper surface.
儘管示出蝕刻罩幕的邊界145,然而未示出蝕刻罩幕141的相對一側處的另一邊界,此指示所述蝕刻罩幕的尺寸過大而使得每次僅可輕易地監控所述蝕刻罩幕的兩個相對的邊界中的一者(例如使用在線掃描電子顯微鏡(SEM))。換言之,蝕刻罩幕的大尺寸使得可能無法同時輕易地監控所述蝕刻罩幕的兩個相對的邊界。因此,難以直接量測蝕刻罩幕在兩個相對的邊界之間的尺寸及相應地調整所述蝕刻罩幕。Although the boundary 145 of the etch mask is shown, another boundary at the opposite side of the etch mask 141 is not shown, which indicates that the size of the etch mask is too large so that the etch can only be easily monitored at a time One of the two opposing boundaries of the mask (eg, using a scanning electron microscope (SEM)). In other words, the large size of the etch mask makes it impossible to simultaneously monitor the two opposing boundaries of the etch mask. Therefore, it is difficult to directly measure the size of the etching mask between two opposing boundaries and adjust the etching mask accordingly.
為使蝕刻罩幕形成介於兩個相對的邊界之間的規定尺寸,應使兩個相對的邊界以在所述蝕刻罩幕的每一側上各一個的方式與晶圓上的兩個理想位置對準。在蝕刻罩幕的一側處示出有所述兩個理想位置中的一者(例如,理想位置105),而在所述蝕刻罩幕的相對一側處未示出所述兩個理想位置中的另一者。理想位置可不為基底上的實體特徵。確切而言,理想位置可為裝置的佈局中的名義上規定的位置。In order for the etch mask to be formed to a specified size between two opposing boundaries, the two opposing boundaries should be two on each side of the etched mask and two ideal on the wafer. Positioning. One of the two ideal positions (eg, ideal position 105) is shown at one side of the etch mask, and the two ideal positions are not shown at the opposite side of the etch mask The other one. The ideal location may not be a physical feature on the substrate. Rather, the ideal location can be a nominally defined location in the layout of the device.
在此實例中,理想位置105位於蝕刻罩幕141的邊界145與蝕刻罩幕141的和邊界145相對的另一邊界之間,因而理想位置105與邊界145之間的距離115可能過大,使得所述罩幕的位置無法對準。換言之,邊界145與蝕刻罩幕141的和邊界145相對的另一邊界之間的距離可能過大。In this example, the ideal location 105 is between the boundary 145 of the etch mask 141 and another boundary of the etch mask 141 opposite the boundary 145, such that the distance 115 between the ideal location 105 and the boundary 145 may be too large, such that The position of the mask is not aligned. In other words, the distance between the boundary 145 and the other boundary of the etch mask 141 opposite the boundary 145 may be too large.
圖2是半導體裝置結構的簡化剖視圖,其示出在基底110上形成蝕刻罩幕142的結果,其中蝕刻罩幕142具有邊界146。在此實例中,邊界146位於蝕刻罩幕142的和邊界146相對的另一邊界與理想位置105之間,因而理想位置105與邊界146之間的距離116可能在相反方向上過大。換言之,邊界146與蝕刻罩幕142的和邊界146相對的另一邊界之間的距離可能過小。2 is a simplified cross-sectional view of the structure of a semiconductor device showing the result of forming an etch mask 142 on substrate 110, wherein etch mask 142 has a boundary 146. In this example, the boundary 146 is between the other boundary of the etch mask 142 opposite the boundary 146 and the ideal location 105, such that the distance 116 between the ideal location 105 and the boundary 146 may be too large in the opposite direction. In other words, the distance between the boundary 146 and the other boundary of the etch mask 142 opposite the boundary 146 may be too small.
圖3至圖9說明在形成對準罩幕的過程中使用的製程步驟的一個實例。3 through 9 illustrate an example of a process step used in the process of forming an alignment mask.
圖3是積體電路裝置結構的一部分的簡化剖視圖,其示出在基底310上蝕刻參考標記330以區分蝕刻區的邊界的結果。由虛線305示出蝕刻區的邊界的理想位置。可使用參考標記蝕刻罩幕利用乾蝕刻(dry etch)或濕蝕刻(wet etch)來蝕刻參考標記。可將參考標記蝕刻罩幕與其他製程合併以節省製程步驟及成本。3 is a simplified cross-sectional view of a portion of an integrated circuit device structure showing the result of etching reference marks 330 on substrate 310 to distinguish the boundaries of the etched regions. The ideal position of the boundary of the etched region is shown by dashed line 305. The reference mark can be etched using a dry etch or a wet etch using a reference mark etch mask. The reference mark etch mask can be combined with other processes to save process steps and costs.
此實例中的基底可在所述基底的上表面上包括絕緣材料層320。參考標記330可穿透絕緣材料層320並到達基底310中的下伏材料中。在一個實施例中,在用於蝕刻參考標記的製程步驟之後的下一製程步驟可為執行深N阱植入(圖中未示出)。絕緣材料層320可防止在所述下一製程步驟處出現穿隧效應(tunneling effect)。參考標記可具有例如約140奈米(nm)的深度及約150奈米的寬度,且絕緣材料層可具有約20奈米的厚度。The substrate in this example may include a layer of insulating material 320 on the upper surface of the substrate. Reference mark 330 can penetrate the layer of insulating material 320 and into the underlying material in substrate 310. In one embodiment, the next process step after the process step for etching the reference mark may be to perform a deep N-well implant (not shown). The insulating material layer 320 prevents a tunneling effect from occurring at the next process step. The reference mark can have a depth of, for example, about 140 nanometers (nm) and a width of about 150 nanometers, and the layer of insulating material can have a thickness of about 20 nanometers.
圖4是示出在基底上形成罩幕材料層440(包括覆蓋參考標記330)的結果的結構的簡化剖視圖。罩幕材料可為光阻材料或不同類型的罩幕材料。4 is a simplified cross-sectional view showing the structure of the result of forming a mask material layer 440 (including a reference mark 330) on a substrate. The mask material can be a photoresist material or a different type of mask material.
圖5是示出使用關於罩幕材料層440的曝光設定值在基底上形成第一蝕刻罩幕540的結果的結構的簡化剖視圖。第一蝕刻罩幕540具有邊界545。曝光設定值可包括為形成蝕刻罩幕而校準的曝光能量及焦心點,且將結合圖11至圖13及圖14A/圖14B/圖14C進一步闡述所述曝光設定值。平行於第一蝕刻罩幕540的邊界545設置參考標記330。例如艾司摩爾(ASML)曝光掃描器、佳能(Canon)曝光掃描器及尼康(Nikon)曝光掃描器等,用於半導體製造的微影設備可在微影暨蝕刻製程中使用例如曝光能量及焦心點等參數。FIG. 5 is a simplified cross-sectional view showing the structure of the result of forming a first etch mask 540 on a substrate using exposure setting values for the mask material layer 440. The first etch mask 540 has a boundary 545. The exposure settings may include exposure energy and focal point calibrated to form an etch mask, and the exposure settings will be further illustrated in conjunction with FIGS. 11-13 and 14A/FIG. 14B/FIG. 14C. Reference mark 330 is disposed parallel to the boundary 545 of the first etch mask 540. For example, an Esmolar (ASML) exposure scanner, a Canon exposure scanner, and a Nikon exposure scanner, etc., can be used in semiconductor manufacturing lithography equipment such as exposure energy and focus in lithography and etching processes. Point and other parameters.
儘管示出第一蝕刻罩幕的邊界545,然而未示出第一蝕刻罩幕540的相對一側處的另一邊界,此指示所述第一蝕刻罩幕的尺寸過大而使得每次僅可輕易地監控所述第一蝕刻罩幕的兩個相對的邊界中的一者(例如使用在線計量工具,例如在線掃描電子顯微鏡(SEM))。Although the boundary 545 of the first etch mask is shown, another boundary at the opposite side of the first etch mask 540 is not shown, which indicates that the size of the first etch mask is too large for each time only One of the two opposing boundaries of the first etch mask is easily monitored (eg, using an on-line metrology tool, such as an on-line scanning electron microscope (SEM)).
可例如使用在線掃描電子顯微鏡等量測參考標記330與第一蝕刻罩幕540的邊界545之間的距離520。參考標記的第一側緊鄰於所述邊界且第二側遠離所述邊界。在一個實施例中,在所述邊界與所述參考標記的緊鄰於所述邊界的第一側(如在俯瞰掃描電子顯微鏡影像中所呈現)之間量測所述距離,所述距離可示出例如在第一蝕刻罩幕的底部所設置於的層階處的邊界的位置。當所量測距離520超過目標距離的容限(例如,目標距離的+/- 5%至10%)時,則可自基底310移除第一蝕刻罩幕540,可改變曝光設定值,可使用改變後的曝光設定值形成下一蝕刻罩幕,且可重複量測步驟。The distance 520 between the reference mark 330 and the boundary 545 of the first etch mask 540 can be measured, for example, using an on-line scanning electron microscope. The first side of the reference mark is adjacent to the boundary and the second side is away from the boundary. In one embodiment, the distance is measured between the boundary and a first side of the reference mark proximate the boundary (as presented in a top view scanning electron microscope image), the distance may be indicated For example, the position of the boundary at the step where the bottom of the first etching mask is disposed. When the measured distance 520 exceeds the tolerance of the target distance (eg, +/- 5% to 10% of the target distance), the first etching mask 540 may be removed from the substrate 310, and the exposure setting value may be changed. The next exposure mask is formed using the changed exposure settings, and the measurement step can be repeated.
在參考標記與蝕刻區的邊界之間規定具有容限的目標距離。在一個實施例中,在第一蝕刻罩幕的邊界與參考標記的第一側之間規定所述具有容限的目標距離,所述第一側在所述第一蝕刻罩幕的底部所安置於的層階處緊鄰於所述邊界。視具體量測工具或技術而定,可在參考標記的其他特徵與所述邊界之間進行量測。在一個實施例中,目標距離可介於約500奈米(nm)與800奈米之間,且容限可為+/- 50奈米。當所量測距離處於容限內時(此指示第一蝕刻罩幕540的邊界545與理想位置305對準),則可在蝕刻製程中使用第一蝕刻罩幕540。A target distance with tolerance is specified between the reference mark and the boundary of the etched area. In one embodiment, the target distance having a tolerance is defined between a boundary of the first etch mask and a first side of the reference mark, the first side being disposed at the bottom of the first etch mask The hierarchy is immediately adjacent to the boundary. Depending on the particular measurement tool or technique, measurements can be made between other features of the reference mark and the boundary. In one embodiment, the target distance can be between about 500 nanometers (nm) and 800 nanometers, and the tolerance can be +/- 50 nanometers. When the measured distance is within tolerance (this indicates that the boundary 545 of the first etch mask 540 is aligned with the ideal location 305), the first etch mask 540 can be used in the etch process.
圖6是示出當所量測距離處於容限內時在蝕刻製程中使用第一蝕刻罩幕540的結果的結構在Z-Y平面中的簡化剖視圖。蝕刻製程可包括使用第一蝕刻罩幕540利用乾蝕刻或濕蝕刻在基底310中蝕刻凹陷部610。凹陷部610的深度655可為例如約1950奈米。在凹陷部中實作有大的記憶體陣列的情形中,所述凹陷部的兩個相對的邊界之間的尺寸可例如介於500微米(μm)與10,000微米之間。蝕刻製程可將參考標記330轉移至凹陷部的底部。凹陷部610的側615的斜率、量測技術、或其他因素使得所轉移參考標記630與凹陷部610的側615之間的距離620可略微不同於處於目標距離的容限內的所量測距離520。6 is a simplified cross-sectional view showing the structure of the result of using the first etch mask 540 in the etching process when the measured distance is within tolerance, in the Z-Y plane. The etch process can include etching the recess 610 in the substrate 310 using dry etching or wet etching using the first etch mask 540. The depth 655 of the recess 610 can be, for example, about 1950 nm. In the case where a large memory array is implemented in the recess, the dimension between the two opposing boundaries of the recess may be, for example, between 500 micrometers (μm) and 10,000 micrometers. The etching process can transfer the reference mark 330 to the bottom of the recess. The slope of the side 615 of the recess 610, the measurement technique, or other factors such that the distance 620 between the transferred reference mark 630 and the side 615 of the recess 610 may be slightly different than the measured distance within the tolerance of the target distance. 520.
圖7是示出在與Z-Y平面正交的X方向上平行於凹陷部610的側615設置的參考標記630的結構的簡化俯視圖。FIG. 7 is a simplified plan view showing the structure of a reference mark 630 disposed parallel to the side 615 of the recess 610 in the X direction orthogonal to the Z-Y plane.
圖8是示出在凹陷部610之上(包括在凹陷部610的底部處的所轉移參考標記630之上)形成藉由絕緣材料(例如,810)而隔開的主動層(例如,8.1至8.8)的堆疊的結果的結構的簡化俯視圖。FIG. 8 is a diagram showing the formation of an active layer (eg, 8.1 to) separated by an insulating material (eg, 810) over the recess 610 (including over the transferred reference mark 630 at the bottom of the recess 610). 8.8) A simplified top view of the resulting structure of the stack.
圖9是示出蝕刻凹陷部中的主動層的堆疊以在基底的上表面與所述凹陷部的底部之間形成用於將設置於所述凹陷部中的陣列區920與所轉移參考標記630隔開的隔離區910的結果的結構的簡化剖視圖。陣列區可包括用於在凹陷部中形成記憶體陣列的主動層的堆疊。在一個實施例中,如圖9所示實例中所示,隔離區910與周邊區930之間的堆疊中的材料的殘餘物會覆蓋凹陷部的底部處的所轉移參考標記。在替代性實施例中,如結合圖16F所述,所轉移參考標記可設置於隔離區910中的凹陷的底部處且不被殘餘物覆蓋。9 is a view showing a stack of active layers in an etched recess to form an array region 920 and a transferred reference mark 630 to be disposed in the recessed portion between an upper surface of the substrate and a bottom of the recess. A simplified cross-sectional view of the resulting structure of the spaced apart isolation regions 910. The array region can include a stack of active layers for forming a memory array in the recess. In one embodiment, as shown in the example shown in FIG. 9, the residue of material in the stack between the isolation region 910 and the perimeter region 930 will cover the transferred reference mark at the bottom of the recess. In an alternative embodiment, as described in connection with FIG. 16F, the transferred reference mark can be disposed at the bottom of the recess in the isolation region 910 and is not covered by the residue.
圖10說明在形成對準罩幕的過程中使用的製程步驟的簡化流程圖。在步驟1011處,如結合圖3所述,在基底上蝕刻參考標記,以區分蝕刻區的邊界。在步驟1012處,如結合圖4至圖5所述,使用曝光設定值在基底上形成蝕刻罩幕,其中所述蝕刻罩幕具有邊界。Figure 10 illustrates a simplified flow diagram of the process steps used in forming the alignment mask. At step 1011, reference marks are etched on the substrate to distinguish the boundaries of the etched regions as described in connection with FIG. At step 1012, an etch mask is formed on the substrate using exposure settings as described in connection with Figures 4 through 5, wherein the etch mask has a boundary.
在步驟1013處,例如使用在線掃描電子顯微鏡量測參考標記與蝕刻罩幕的邊界之間的距離。在步驟1014處,判斷所量測距離超過目標距離的容限還是處於所述目標距離的容限內。在步驟1015處,當所量測距離超過目標距離的容限時,則可自基底移除蝕刻罩幕,可改變曝光設定值,可使用改變後的曝光設定值形成下一蝕刻罩幕(步驟1012),且可重複量測步驟1013。At step 1013, the distance between the reference mark and the boundary of the etch mask is measured, for example, using an on-line scanning electron microscope. At step 1014, it is determined whether the measured distance exceeds the tolerance of the target distance or is within the tolerance of the target distance. At step 1015, when the measured distance exceeds the tolerance of the target distance, the etching mask can be removed from the substrate, the exposure setting value can be changed, and the next exposure mask can be formed using the changed exposure setting value (step 1012) And the measurement step 1013 can be repeated.
在步驟1016處,當所量測距離處於容限內時,則可在蝕刻製程中使用蝕刻罩幕。如結合圖6所述,蝕刻製程可包括使用蝕刻罩幕在基底中蝕刻凹陷部,將參考標記轉移至所述凹陷部的底部。At step 1016, an etch mask can be used in the etch process when the measured distance is within tolerance. As described in connection with FIG. 6, the etching process can include etching the recesses in the substrate using an etch mask to transfer the reference marks to the bottom of the recesses.
圖11說明如結合圖3至圖7及圖10所述在為形成對準罩幕而校準曝光設定值的過程中使用的製程步驟的簡化流程圖。在步驟1111處,如結合圖3所述,在基底上蝕刻參考標記,以區分蝕刻區的邊界。Figure 11 illustrates a simplified flow diagram of the process steps used in calibrating the exposure setpoints for forming an alignment mask as described in connection with Figures 3-7 and 10. At step 1111, reference marks are etched on the substrate to distinguish the boundaries of the etched regions as described in connection with FIG.
在步驟1112處,自多個曝光設定值中選擇曝光設定值,將結合圖12對此進行闡述。在步驟1113處,使用所選擇曝光設定值在基底上形成蝕刻罩幕,其中所述蝕刻罩幕具有邊界。結合圖4至圖5闡述了在基底上形成蝕刻罩幕的過程。At step 1112, an exposure setting is selected from a plurality of exposure settings, which will be explained in conjunction with FIG. At step 1113, an etch mask is formed on the substrate using the selected exposure setting, wherein the etch mask has a boundary. The process of forming an etch mask on a substrate is illustrated in conjunction with FIGS. 4 through 5.
在步驟1114處,例如使用在線掃描電子顯微鏡量測參考標記與蝕刻罩幕的邊界之間的距離。在步驟1115處,判斷所量測距離超過目標距離的容限還是處於所述目標距離的容限內。在步驟1116處,當所量測距離超過目標距離的容限時,則可自基底移除蝕刻罩幕。可選擇不同的曝光設定值(步驟1112),可使用所述不同的曝光設定值形成下一蝕刻罩幕(步驟1113),且可重複量測步驟(步驟1114)。At step 1114, the distance between the reference mark and the boundary of the etch mask is measured, for example, using an on-line scanning electron microscope. At step 1115, it is determined whether the measured distance exceeds the tolerance of the target distance or is within the tolerance of the target distance. At step 1116, the etch mask can be removed from the substrate when the measured distance exceeds the tolerance of the target distance. Different exposure settings may be selected (step 1112), the next exposure mask may be formed using the different exposure settings (step 1113), and the measurement step may be repeated (step 1114).
在步驟1117處,當所量測距離處於目標距離的容限內時,則可儲存來自校準的一組曝光設定值,因而可選擇來自校準集合(calibration set)的曝光設定值以與在一或多個晶圓上生產多個晶片時形成對準罩幕的製程步驟一起使用。舉例而言,來自校準集合的一個曝光設定值可在某一方向上移動蝕刻罩幕的邊界以增大參考標記與邊界之間的距離,而來自所述校準集合的另一曝光設定值可在另一方向上移動蝕刻罩幕的邊界以減小所述參考標記與邊界之間的距離。At step 1117, when the measured distance is within the tolerance of the target distance, then a set of exposure settings from the calibration can be stored, and thus the exposure settings from the calibration set can be selected to be in one or Process steps for forming an alignment mask when multiple wafers are produced on multiple wafers are used together. For example, an exposure setting from a calibration set can move the boundary of the etch mask in one direction to increase the distance between the reference mark and the boundary, while another exposure setting from the calibration set can be another The boundary of the etch mask is moved in one direction to reduce the distance between the reference mark and the boundary.
校準集合可包括使得所量測距離處於容限內的特定曝光設定值。此特定曝光設定值可被儲存作為最佳曝光設定值,且被用作在一或多個晶圓上生產多個晶片時形成對準罩幕的製程步驟的第一選擇。對於校準集合中的每一曝光設定值,所儲存參數可包括曝光能量、焦心點、及參考標記與蝕刻罩幕的邊界之間的對應距離。The calibration set can include a particular exposure setting that causes the measured distance to be within tolerance. This particular exposure setting can be stored as an optimal exposure setting and used as a first choice for the process steps of forming an alignment mask when producing multiple wafers on one or more wafers. For each exposure setting in the calibration set, the stored parameters may include exposure energy, a focal point, and a corresponding distance between the reference mark and the boundary of the etch mask.
圖12說明曝光能量及焦心點的模型(matrix)的一個實例,其表現多個曝光設定值。模型示出參考標記與蝕刻罩幕的邊界之間的所量測距離(單位為奈米(nm))隨著曝光能量(單位為毫焦/平方公分(milli-Joule/cm 2))及焦心點(單位為微米(μm))而變化。舉例而言,對於700奈米的目標距離(容限為+/- 50奈米),與40.26毫焦/平方公分的曝光能量及1.61微米的焦心點對應的所量測距離較模型中的其他所量測距離更接近於所述目標距離的容限。在此實例中,最佳曝光設定值包括40.26毫焦/平方公分的曝光能量及1.61微米的焦心點。所儲存曝光設定值可包括在校準期間作為起始點而導出的名義上最佳的曝光設定值、形成處於目標距離的容限內的距離的曝光設定值或具有所量測距離的所有曝光設定值。另外,可將效能指標與所儲存曝光設定值一起儲存以指示:當使用所述所儲存曝光設定值形成對準罩幕時,如何選擇下一曝光設定值以在某一方向上移動蝕刻罩幕的邊界來增大或減小參考標記與所述蝕刻罩幕的邊界之間的距離。 Figure 12 illustrates an example of a model of exposure energy and focal point that exhibits multiple exposure settings. The model shows the measured distance (in nanometers (nm)) between the reference mark and the boundary of the etch mask as the exposure energy (in millijoules per square centimeter (milli-Joule/cm 2 )) and the center of focus The point (in micrometers (μm)) varies. For example, for a target distance of 700 nm (tolerance of +/- 50 nm), the measured distance corresponding to the exposure energy of 40.26 mJ/cm 2 and the focal point of 1.61 μm is more than the other in the model. The measured distance is closer to the tolerance of the target distance. In this example, the optimal exposure setting includes an exposure energy of 40.26 mJ/cm 2 and a focal point of 1.61 micron. The stored exposure setpoint may include a nominally optimal exposure setpoint derived as a starting point during calibration, an exposure setpoint that forms a distance within a tolerance of the target distance, or all exposure settings having a measured distance value. Additionally, the performance indicator can be stored with the stored exposure settings to indicate how to select the next exposure setting to move the etch mask in a certain direction when the alignment mask is formed using the stored exposure settings. The boundary increases or decreases the distance between the reference mark and the boundary of the etch mask.
圖13是示出參考標記與蝕刻罩幕的邊界之間的所量測距離隨著曝光能量及焦心點而變化的曲線的曲線圖。上部曲線1451與下部曲線1453之間的區域包括處於目標距離的容限內的所量測距離。反之,上部曲線1451與下部曲線1453之間以外的區域為超過所述目標距離的容限的所量測距離。在此實例中,虛線曲線1452對應於如使用圖12中所示實驗資料而預測的可達到或非常接近於700奈米的目標距離的距離。虛線曲線可包括具有40.26毫焦/平方公分的曝光能量及1.61微米的焦心點的名義上最佳的曝光設定值。FIG. 13 is a graph showing a curve in which the measured distance between the reference mark and the boundary of the etching mask varies with exposure energy and a focal point. The area between the upper curve 1451 and the lower curve 1453 includes the measured distance within the tolerance of the target distance. Conversely, the area other than between the upper curve 1451 and the lower curve 1453 is the measured distance exceeding the tolerance of the target distance. In this example, the dashed curve 1452 corresponds to the distance predicted to reach or very close to the target distance of 700 nm as predicted using the experimental data shown in FIG. The dashed curve may include a nominally optimal exposure setting with an exposure energy of 40.26 millijoules per square centimeter and a focal point of 1.61 micron.
圖14A以所述結構的剖視圖說明參考標記1430與蝕刻罩幕1410的邊界1415之間的距離1420。在一個實施例中,如1420處所示,量測可自參考標記的近側(proximal side)至蝕刻罩幕的底部邊緣處的特徵進行。在替代形式中,如1420’處所示,量測可自參考標記的遠側至蝕刻罩幕的頂部邊緣處的特徵進行。所述距離可使用例如在線掃描電子顯微鏡(SEM)等用於生成可在上面直接進行量測的俯瞰影像的在線計量工具來量測。量測結果可與目標距離的容限進行比較,以確定處於所述容限內的曝光設定值及可較其他曝光設定值形成更接近於所述目標距離的最佳曝光設定值。來自校準的一組曝光設定值(包括最佳曝光設定值及一些其他曝光設定值)可得到儲存,因而可選擇來自校準集合的曝光設定值以與在一或多個晶圓上生成多個晶片時形成對準罩幕的製程步驟一起使用。Figure 14A illustrates the distance 1420 between the reference mark 1430 and the boundary 1415 of the etch mask 1410 in a cross-sectional view of the structure. In one embodiment, as shown at 1420, the measurement can be made from the proximal side of the reference mark to the feature at the bottom edge of the etch mask. In an alternative form, as shown at 1420', the measurement can be made from the distal side of the reference mark to the feature at the top edge of the etch mask. The distance can be measured using an online metrology tool such as an on-line scanning electron microscope (SEM) for generating a bird's-eye view image that can be directly measured thereon. The measurement result can be compared to a tolerance of the target distance to determine an exposure setting value within the tolerance and an optimal exposure setting value that can be closer to the target distance than other exposure setting values. A set of exposure settings from the calibration (including the optimal exposure settings and some other exposure settings) can be stored, so the exposure settings from the calibration set can be selected to generate multiple wafers on one or more wafers. The process steps that form the alignment mask are used together.
圖14B說明在校準製程中自多個曝光設定值中選擇曝光設定值可在參考標記與蝕刻罩幕的邊界之間形成不同距離。舉例而言,圖14B說明圖14A中所示結構的俯視圖中的4列2行共8個影像。所述8個影像中的每一者說明參考標記、蝕刻罩幕的邊界、及所述參考標記與所述蝕刻罩幕的邊界之間的距離。所述8個影像中的每一者對應於各自的曝光設定值及自所述曝光設定值得到的距離。舉例而言,左上角的影像對應於包括32毫焦/平方公分的曝光能量及-0.7微米的焦心點的曝光設定值以及第一距離。右下角的影像對應於包括46毫焦/平方公分的曝光能量及0.7微米的焦心點的曝光設定值以及與第一距離不同的第二距離。曝光能量及焦心點的變化使得圖14B中的影像的邊界寬度不同。Figure 14B illustrates that selecting an exposure setting from a plurality of exposure settings in a calibration process can create different distances between the reference mark and the boundary of the etch mask. For example, FIG. 14B illustrates a total of eight images of four columns and two rows in a top view of the structure shown in FIG. 14A. Each of the eight images illustrates a reference mark, a boundary of the etch mask, and a distance between the reference mark and a boundary of the etch mask. Each of the eight images corresponds to a respective exposure setting value and a distance obtained from the exposure setting value. For example, the image in the upper left corner corresponds to an exposure setting including an exposure energy of 32 millijoules per square centimeter and a focal point of -0.7 micrometers and a first distance. The image in the lower right corner corresponds to an exposure setting including 46 mJ/cm 2 of exposure energy and a 0.7 micron focal point and a second distance different from the first distance. The change in exposure energy and focal point causes the boundary width of the image in Fig. 14B to be different.
圖14C是說明參考標記1430、蝕刻罩幕1410的邊界1415、及所述參考標記與所述蝕刻罩幕的邊界之間的距離1420的影像(與圖14B中的影像相同)。參考標記平行於蝕刻罩幕的邊界設置。參考標記的寬度可如由例如以下等因素所約束而為約150奈米至1,000奈米:在線掃描電子顯微鏡量測放大率、在線掃描電子顯微鏡量測失敗率、及用於蝕刻例如凹陷部或階梯(staircase)等電路特徵(包括參考標記)的製程設計。舉例而言,對於使用參考標記形成階梯的製程,所述參考標記的寬度(例如,150奈米)必須小於階梯中的梯級的寬度(例如,500奈米)。Figure 14C is an illustration of the reference mark 1430, the boundary 1415 of the etch mask 1410, and the distance 1420 between the reference mark and the boundary of the etch mask (same as the image in Figure 14B). The reference mark is placed parallel to the boundary of the etching mask. The width of the reference mark may be from about 150 nm to 1,000 nm as constrained by factors such as: on-line scanning electron microscope measurement magnification, on-line scanning electron microscope measurement failure rate, and for etching, for example, depressions or Process design of circuit features (including reference marks) such as stairs. For example, for a process that uses a reference mark to form a step, the width of the reference mark (eg, 150 nm) must be less than the width of the step in the step (eg, 500 nm).
圖15A說明用於在基底上製作參考標記的罩幕的微影罩幕圖案1510。罩幕圖案1510包括用於參考標記的參考標記圖案1515,參考標記圖案1515呈圍繞矩形周界的線的形狀且位於用於形成記憶體陣列的陣列區與用於形成周邊電路系統的周邊區之間。Figure 15A illustrates a lithographic mask pattern 1510 for a mask for making reference marks on a substrate. The mask pattern 1510 includes a reference mark pattern 1515 for reference marks, the reference mark pattern 1515 is in the shape of a line surrounding a rectangular perimeter and is located in an array area for forming a memory array and a peripheral area for forming a peripheral circuit system. between.
圖15B說明用於在基底中製作凹陷部的罩幕的微影罩幕圖案1520。罩幕圖案1520包括其中可設置有陣列區的凹陷部的矩形(例如,1525)。Figure 15B illustrates a lithographic mask pattern 1520 for a mask for making a recess in a substrate. The mask pattern 1520 includes a rectangle (eg, 1525) in which a recess of the array region may be disposed.
圖15C是示出使用罩幕圖案1510在基底上蝕刻參考標記1530並接著使用罩幕圖案1520及使用本文所述曝光設定值在所述基底上形成蝕刻罩幕1540的結果的結構的簡化俯視圖。為清晰起見,在圖15D中示出參考標記1530與蝕刻罩幕1540的邊界之間的距離。15C is a simplified top plan view showing the structure of etching a reference mark 1530 on a substrate using a mask pattern 1510 and then using the mask pattern 1520 and forming an etch mask 1540 on the substrate using the exposure settings described herein. For clarity, the distance between the reference mark 1530 and the boundary of the etch mask 1540 is shown in FIG. 15D.
圖15D說明所述結構的沿圖15C中的線A-A’截取的剖視圖。圖15D示出參考標記1530與基底310上的蝕刻罩幕1540的邊界1545之間的距離1535。Figure 15D illustrates a cross-sectional view of the structure taken along line A-A' in Figure 15C. FIG. 15D illustrates the distance 1535 between the reference mark 1530 and the boundary 1545 of the etch mask 1540 on the substrate 310.
圖16A至圖16F說明在參考標記圖案的形成過程中用於對光阻進行曝光的參考標記蝕刻罩幕中的參考標記的替代性微影罩幕圖案。圖16A說明位於用於形成記憶體陣列的陣列區與用於形成周邊電路系統的周邊區之間、呈由矩形周界各別隅角處的四條「L」型線(例如,1601a、1601b、1601c、1601d)構成的形狀的罩幕圖案,其中所述「L」型線中的每一者包括彼此橫向地定向的兩個區段。16A-16F illustrate an alternative lithographic mask pattern of reference marks in a reference mark etch mask for exposing photoresist during formation of a reference mark pattern. Figure 16A illustrates four "L" shaped lines (e.g., 1601a, 1601b, between the array regions used to form the memory array and the peripheral regions used to form the peripheral circuitry, at respective corners of the rectangular perimeter). 1601c, 1601d) A mask pattern of the shape formed, wherein each of the "L" shaped lines includes two sections oriented transversely to each other.
圖16B說明位於用於形成記憶體陣列的陣列區與用於形成周邊電路系統的周邊區之間、呈由矩形周界周圍的兩條線(例如,1602a、1602b)構成的形狀的罩幕圖案,所述兩條線彼此平行地且彼此相對地設置。Figure 16B illustrates a mask pattern in the shape of an array region for forming a memory array and a peripheral region for forming a peripheral circuitry, in the form of two lines (e.g., 1602a, 1602b) around the perimeter of the rectangle. The two lines are arranged parallel to each other and opposite each other.
圖16C說明位於用於形成記憶體陣列的陣列區與用於形成周邊電路系統的周邊區之間、呈由矩形周界周圍的四條線構成的形狀的罩幕圖案,其中所述四條線不彼此連接,且包括第一兩個平行線(例如,1603a、1603b)及與所述第一兩個平行線正交的第二兩個平行線(例如,1603c、1603d)。16C illustrates a mask pattern in a shape formed by four lines around a rectangular perimeter between an array region for forming a memory array and a peripheral region for forming a peripheral circuit system, wherein the four lines are not in each other Connected and includes a first two parallel lines (eg, 1603a, 1603b) and a second two parallel lines (eg, 1603c, 1603d) that are orthogonal to the first two parallel lines.
圖16D說明呈由第一對線(例如,1604a、1604b)及第二對線(例如,1604c、1604d)構成的形狀的罩幕圖案,所述第一對線在第一方向上在陣列區兩端彼此相對,所述第二對線在與所述第一方向正交的第二方向上在所述陣列區兩端彼此相對,其中所述第二對中的線包括分段式區段。Figure 16D illustrates a mask pattern in the shape of a first pair of lines (e.g., 1604a, 1604b) and a second pair of lines (e.g., 1604c, 1604d), the first pair of lines being in the array area in a first direction The ends are opposite each other, the second pair of lines being opposite each other at both ends of the array region in a second direction orthogonal to the first direction, wherein the line in the second pair comprises a segmented segment .
圖16E說明呈由同心矩形周界(例如,1605a、1605b、1605c)構成的形狀的罩幕圖案。圖16F說明所述結構的沿圖16E中的線B-B’截取的剖視圖。圖16F說明同心矩形周界中設置於隔離區910中的凹陷部610的底部處的第一矩形(例如,1605a),同心矩形周界中設置於隔離區910與周邊區930之間的凹陷部610的底部處的第二矩形(例如,1605b),及同心矩形周界中設置於周邊區930中的第三矩形(例如,1605c)。Figure 16E illustrates a mask pattern in the shape of a concentric rectangular perimeter (e.g., 1605a, 1605b, 1605c). Figure 16F illustrates a cross-sectional view of the structure taken along line B-B' in Figure 16E. Figure 16F illustrates a first rectangle (e.g., 1605a) disposed at the bottom of the recess 610 in the isolation region 910 in the perimeter of the concentric rectangle, disposed at the bottom of the recess 610 between the isolation region 910 and the peripheral region 930 in the concentric rectangular perimeter The second rectangle (eg, 1605b) and the third rectangle (eg, 1605c) disposed in the perimeter region 930 in the perimeter of the concentric rectangle.
圖17至圖23說明在基底上的一組層階上形成一組對準罩幕的過程中使用的製程步驟的一個實例。圖17是積體電路裝置結構的一部分的簡化剖視圖,其示出在基底1710上的一組層階(例如,1720)中的頂部層階上蝕刻一組參考標記(例如,1731至1736)以區分各蝕刻區的邊界的結果。在一個實施例中,所述一組層階可包括39個層階,且所述一組層階中的每一層階可包括犧牲材料(例如,SiN)層及絕緣材料層。在將任何其他蝕刻罩幕形成於所述一組層階上之前,可使用參考標記蝕刻罩幕將所述一組參考標記形成於所述一組層階上。當蝕刻所述一組參考標記形成所述參考標記後,移除所述參考標記蝕刻罩幕。17 through 23 illustrate an example of a process step used in forming a set of alignment masks on a set of levels on a substrate. 17 is a simplified cross-sectional view of a portion of an integrated circuit device structure showing etching of a set of reference marks (eg, 1731 to 1736) on a top level in a set of levels (eg, 1720) on substrate 1710. The result of distinguishing the boundaries of each etched zone. In one embodiment, the set of levels may include 39 levels, and each of the set of layers may include a sacrificial material (eg, SiN) layer and an insulating material layer. The set of reference marks can be formed on the set of levels using a reference mark etch mask prior to forming any other etch mask on the set of layers. After etching the set of reference marks to form the reference mark, the reference mark etch mask is removed.
在已執行本文所述蝕刻-修整製程以在所述一組層階中的各層階處形成台階之後,可採取進一步的製程步驟來以導電材料替換所述一組層階中的犧牲材料,以使所述一組層階中的每一層階包括導電材料層及絕緣材料層。以導電材料替換犧牲材料可形成一組層階,其中所述一組層階中的每一層階可包括導電材料層及絕緣材料層。After the etch-trimming process described herein has been performed to form a step at each of the set of levels, a further process step can be taken to replace the sacrificial material in the set of layers with a conductive material to Each of the set of layers includes a layer of conductive material and a layer of insulating material. Replacing the sacrificial material with a conductive material can form a set of levels, wherein each of the set of layers can include a layer of conductive material and a layer of insulating material.
所述一組層階中的導電材料可為:導電性半導體,包括經重摻雜多晶矽(使用例如As、P、B等摻雜劑);矽化物,包括TiSi、CoSi;氧化物半導體,包括InZnO、InGaZnO;以及半導體與矽化物的組合。導電材料亦可為金屬、導電化合物、或包括Al、Cu、W、Ti、Co、Ni、TiN、TaN、TaAlN等材料的組合。視所應用製造技術而定,所述一組層階中的絕緣材料可包含氧化物、氮化物、氮氧化物、矽酸鹽等。較佳地,可使用介電常數小於二氧化矽的介電常數的低介電常數材料(例如,SiCHO x)。亦可包含介電常數大於二氧化矽的介電常數的高介電常數(高k)材料(例如,HfO x、HfON、AlO x、RuO x、TiO x)。 The conductive material in the set of layers may be: a conductive semiconductor, including heavily doped polysilicon (using dopants such as As, P, B, etc.); germanides, including TiSi, CoSi; oxide semiconductors, including InZnO, InGaZnO; and a combination of a semiconductor and a telluride. The conductive material may also be a metal, a conductive compound, or a combination of materials including Al, Cu, W, Ti, Co, Ni, TiN, TaN, TaAlN, and the like. The insulating material in the set of layers may comprise an oxide, a nitride, an oxynitride, a niobate or the like, depending on the applied fabrication technique. Preferably, a low dielectric constant material (for example, SiCHO x ) having a dielectric constant smaller than the dielectric constant of cerium oxide can be used. A high dielectric constant (high k) material having a dielectric constant greater than the dielectric constant of cerium oxide (for example, HfO x , HfON, AlO x , RuO x , TiO x ) may also be included.
圖18至圖23說明執行蝕刻-修整製程以在所述一組層階中的各層階處形成台階,其中所述蝕刻-修整製程至少包括使用所述一組參考標記中的第一參考標記(例如,1731)的第一蝕刻-修整循環及使用所述一組參考標記中的第二參考標記(例如,1732)的第二蝕刻-修整循環。18 through 23 illustrate performing an etch-trimming process to form a step at each of the set of levels, wherein the etch-trimming process includes at least using a first one of the set of reference marks ( For example, a first etch-trim cycle of 1731) and a second etch-trim cycle using a second one of the set of reference marks (eg, 1732).
圖18說明在第一蝕刻-修整循環中使用第一曝光設定值在所述一組層階1720中的頂部層階上形成第一蝕刻-修整罩幕(例如,1840)的結果。第一曝光設定值可包括為形成第一蝕刻-修整罩幕而校準的曝光能量及焦心點。第一蝕刻-修整罩幕具有第一邊界1845。可例如使用在線掃描電子顯微鏡(SEM)等量測所述一組參考標記中的第一參考標記1731與第一蝕刻-修整罩幕1840的第一邊界1845之間的第一距離1850。Figure 18 illustrates the result of forming a first etch-trim mask (e.g., 1840) on the top level of the set of levels 1720 using the first exposure setpoint in a first etch-trim cycle. The first exposure setting may include exposure energy and a focal point calibrated to form a first etch-trim mask. The first etch-trim mask has a first boundary 1845. A first distance 1850 between the first reference mark 1731 of the set of reference marks and the first boundary 1845 of the first etch-dressing mask 1840 can be measured, for example, using an on-line scanning electron microscope (SEM) or the like.
當所量測第一距離超過第一目標距離的容限時,則可自頂部層階移除第一蝕刻-修整罩幕1840,可改變第一曝光設定值;可使用改變後的第一曝光設定值在所述一組層階1720中的頂部層階上形成下一第一蝕刻罩幕,且可重複所述量測第一距離的量測步驟。在第一參考標記與第一蝕刻-修整罩幕1840的第一邊界之間規定具有容限的第一目標距離。在一個實施例中,第一目標距離可為約100奈米(nm)至1,000奈米,且所述第一目標距離的容限可為+/- 30奈米。When the measured first distance exceeds the tolerance of the first target distance, the first etch-trim mask 1840 may be removed from the top level, the first exposure setting may be changed; the changed first exposure setting may be used The value forms a next first etch mask on the top level of the set of levels 1720, and the step of measuring the first distance can be repeated. A first target distance having a tolerance is defined between the first reference mark and the first boundary of the first etch-trim mask 1840. In one embodiment, the first target distance may be from about 100 nanometers (nm) to 1,000 nanometers, and the first target distance may have a tolerance of +/- 30 nanometers.
當所量測第一距離1850處於第一目標距離的容限內時,則可在第一蝕刻-修整製程中使用第一蝕刻-修整罩幕1840。When the measured first distance 1850 is within tolerance of the first target distance, the first etch-trim mask 1840 can be used in the first etch-trimming process.
所述一組層階包括W個層階L(i),其中i為1至W。The set of levels includes W levels L(i), where i is 1 to W.
圖19說明在第一蝕刻-修整循環中重複地修整第一蝕刻-修整罩幕1840並使用經修整後的第一蝕刻-修整罩幕蝕刻一個層階達第一數目N1次重複以在N1個各別層階L(i)上形成N1個台階的結果,其中i為W-N1至W-1,其中所述N1個台階設置於第一參考標記1731與第二參考標記1732之間。第一蝕刻-修整製程可將第一參考標記1731自所述一組層階中的頂部層階L(W)轉移至所述一組層階中的層階L(W-N1-1)。將結合圖24A、圖24B、圖24C、及圖24D闡述蝕刻-修整循環中的基礎步驟。Figure 19 illustrates that the first etch-trim mask 1840 is repeatedly trimmed in a first etch-trim cycle and the first etch-trimming mask is used to etch a level up to a first number of N1 repetitions at N1 The result of forming N1 steps on the respective layer order L(i), where i is W-N1 to W-1, wherein the N1 steps are disposed between the first reference mark 1731 and the second reference mark 1732. The first etch-trimming process may transfer the first reference mark 1731 from the top level L(W) of the set of levels to the level L (W-N1-1) of the set of levels. The basic steps in the etch-trim cycle will be described in conjunction with Figures 24A, 24B, 24C, and 24D.
圖20說明在第二蝕刻-修整循環中使用第二曝光設定值在所述一組層階1720中的頂部層階上形成第二蝕刻-修整罩幕(例如,2040)的結果。第二曝光設定值可包括為形成第二蝕刻-修整罩幕而校準的曝光能量及焦心點。第二蝕刻-修整罩幕具有第二邊界2045。可例如使用在線掃描電子顯微鏡等量測所述一組參考標記中的第二參考標記1732與第二蝕刻-修整罩幕2040的第二邊界2045之間的第二距離2050。20 illustrates the result of forming a second etch-trim mask (eg, 2040) on the top level of the set of levels 1720 using the second exposure setpoint in a second etch-trim cycle. The second exposure setting may include exposure energy and a focal point calibrated to form a second etch-trim mask. The second etch-trim mask has a second boundary 2045. A second distance 2050 between the second reference mark 1732 of the set of reference marks and the second boundary 2045 of the second etch-dressing mask 2040 can be measured, for example, using an on-line scanning electron microscope or the like.
當所量測第二距離2050超過第二目標距離的容限時,則可自頂部層階移除第二蝕刻-修整罩幕2040,可改變第二曝光設定值;可使用改變後的第二曝光設定值在所述一組層階1720的頂部層階上形成下一第二蝕刻罩幕,且可重複所述量測第二距離的量測步驟。在第二參考標記與第二蝕刻-修整罩幕2040的第二邊界之間規定具有容限的第二目標距離。第二目標距離及所述第二目標距離的容限可不同於結合圖18所述的第一目標距離及所述第一目標距離的容限。When the measured second distance 2050 exceeds the tolerance of the second target distance, the second etch-trimming mask 2040 may be removed from the top level, the second exposure setting may be changed; the changed second exposure may be used The set value forms a next second etch mask on the top level of the set of levels 1720, and the step of measuring the second distance can be repeated. A second target distance having a tolerance is defined between the second reference mark and the second boundary of the second etch-trim mask 2040. The tolerance of the second target distance and the second target distance may be different from the tolerance of the first target distance and the first target distance described in connection with FIG.
當所量測第二距離2050處於第二目標距離的容限內時,則可在第二蝕刻-修整製程中使用第二蝕刻-修整罩幕2040。When the measured second distance 2050 is within the tolerance of the second target distance, the second etch-trim mask 2040 can be used in the second etch-trimming process.
圖21說明在第二蝕刻-修整循環中重複地修整第二蝕刻-修整罩幕2040並使用經修整後的第二蝕刻-修整罩幕蝕刻一個層階達第二數目N2次重複以在N2個各別層階L(i)上形成N2個台階的結果,其中i為W-N2至W-1,其中所述N2個台階設置於第二參考標記1732與所述一組參考標記中的第三參考標記1733之間。第二蝕刻-修整製程可使得將第二參考標記1732自所述一組層階中的頂部層階L(W)轉移至所述一組層階中的層階L(W-N2-1),且將第一參考標記自所述一組層階中的層階L(W-N1-1)轉移至所述一組層階中的層階L(W-N1-N2-2)。將結合圖24A、圖24B、圖24C、及圖24D闡述蝕刻-修整循環中的基礎步驟。Figure 21 illustrates that the second etch-trim mask 2040 is repeatedly trimmed in a second etch-trim cycle and the second etch-trimming mask is used to etch a layer to a second number N2 times to repeat at N2 a result of forming N2 steps on the respective layer order L(i), where i is W-N2 to W-1, wherein the N2 steps are disposed in the second reference mark 1732 and the first of the set of reference marks The three reference marks are between 1733. The second etch-trimming process may cause the second reference mark 1732 to be transferred from the top level L(W) of the set of levels to the level L (W-N2-1) of the set of levels And shifting the first reference mark from the level L (W-N1-1) in the set of levels to the level L (W-N1-N2-2) in the set of levels. The basic steps in the etch-trim cycle will be described in conjunction with Figures 24A, 24B, 24C, and 24D.
第一曝光設定值可不同於第二曝光設定值,且第一目標距離可不同於第二目標距離。在第一蝕刻-修整循環中形成的台階的第一數目可不同於在第二蝕刻-修整循環中形成的台階的第二數目。蝕刻-修整製程包括使用多於一個蝕刻-修整罩幕進行的多於一個蝕刻-修整循環,例如使用第一蝕刻-修整罩幕進行的第一蝕刻-修整循環及使用第二蝕刻-修整罩幕進行的第二蝕刻-修整循環。The first exposure setting may be different from the second exposure setting, and the first target distance may be different than the second target distance. The first number of steps formed in the first etch-trim cycle may be different than the second number of steps formed in the second etch-trim cycle. The etch-trimming process includes more than one etch-trim cycle using more than one etch-trim mask, such as a first etch-trim cycle using a first etch-trim mask and a second etch-trim mask A second etch-trim cycle is performed.
在一個實施例中,所述一組層階中的層階的數目W可為39,第一蝕刻-修整循環中的重複的第一數目N1可為7,第二蝕刻-修整循環中的重複的第二數目N2可為6,且第三蝕刻-修整循環至第六蝕刻-修整循環中的重複的數目可為5。此項技術中具有通常知識者可基於例如以下參數來確定蝕刻-修整製程中的所有蝕刻-修整循環中的重複的數目(包括N1及N2):一組層階中的層階的數目、所述一組層階中包括犧牲材料層及絕緣材料層的層階的厚度、蝕刻-修整罩幕的厚度、階梯的寬度、及蝕刻配方(etch recipe)。In one embodiment, the number of levels in the set of levels may be 39, and the first number N1 of repetitions in the first etch-trim cycle may be 7, repeating in the second etch-trim cycle The second number N2 may be 6, and the number of repetitions in the third etch-trim cycle to the sixth etch-trim cycle may be five. Those of ordinary skill in the art can determine the number of repetitions (including N1 and N2) in all etch-trim cycles in an etch-trim process based on, for example, the number of levels in a set of levels, The thickness of the layer of the sacrificial material layer and the insulating material layer, the thickness of the etching-trimming mask, the width of the step, and the etch recipe are included in a set of layers.
圖22說明在第三蝕刻-修整循環中使用第三曝光設定值在所述一組層階1720中的頂部層階上形成第三蝕刻-修整罩幕(例如,2240)的結果。第三曝光設定值可包括為形成第三蝕刻-修整罩幕而校準的曝光能量及焦心點。第三蝕刻-修整罩幕具有第三邊界2245。可例如使用在線掃描電子顯微鏡等量測所述一組參考標記中的第三參考標記1733與第三蝕刻-修整罩幕2240的第三邊界2245之間的第三距離2250。22 illustrates the results of forming a third etch-trim mask (eg, 2240) on the top level of the set of levels 1720 using a third exposure setting in a third etch-trim cycle. The third exposure setting may include exposure energy and a focal point that are calibrated to form a third etch-trim mask. The third etch-trim mask has a third boundary 2245. A third distance 2250 between the third reference mark 1733 of the set of reference marks and the third boundary 2245 of the third etch-dressing mask 2240 can be measured, for example, using an on-line scanning electron microscope or the like.
當所量測第三距離2250超過第三目標距離的容限時,則可自頂部層階移除第三蝕刻-修整罩幕2240,可改變第三曝光設定值;可使用改變後的第三曝光設定值在所述一組層階1720的頂部層階上形成下一第三蝕刻罩幕,且可重複所述量測第三距離的量測步驟。在第三參考標記與第三蝕刻-修整罩幕2240的第三邊界之間規定具有容限的第三目標距離。第三目標距離及所述第三目標距離的容限可不同於結合圖20所述的第二目標距離及所述第二目標距離的容限。When the measured third distance 2250 exceeds the tolerance of the third target distance, the third etching-trimming mask 2240 may be removed from the top level to change the third exposure setting; the changed third exposure may be used. The set value forms a next third etch mask on the top level of the set of levels 1720, and the measuring step of measuring the third distance may be repeated. A third target distance having a tolerance is defined between the third reference mark and the third boundary of the third etch-trim mask 2240. The tolerance of the third target distance and the third target distance may be different from the tolerance of the second target distance and the second target distance described in connection with FIG.
當所量測第三距離2250處於第三目標距離的容限內時,則可在第三蝕刻-修整製程中使用第三蝕刻-修整罩幕2240。When the measured third distance 2250 is within a tolerance of the third target distance, a third etch-trim mask 2240 can be used in the third etch-trimming process.
可重複本文所述包括結合圖17至圖23中所述製程步驟的蝕刻-修整製程達利用更多參考標記的使用更多蝕刻-修整罩幕進行的更多個蝕刻-修整循環,直至如圖23中所示在所述一組層階中的各層階處形成所有台階。可在製造三維(three dimensional,3D)記憶體裝置的過程中對圖23中所示裝置結構執行進一步的製程步驟。The etch-trim process described herein, including the process steps described in connection with Figures 17 through 23, may be repeated to achieve more etch-trim cycles using more etch-trim masks with more reference marks until All of the steps are formed at each of the set of levels shown in FIG. Further processing steps can be performed on the device structure shown in Figure 23 during the manufacture of a three dimensional (3D) memory device.
圖23說明根據本文所述方法而形成的裝置結構。所述結構包括基底1710上的一組層階1720,所述一組層階包括W個層階L(i),其中i為0至W。所述一組層階包括至少層階L(i)的第一子集,其中i為0至N1,所述第一子集中的層階L(0)中設置有第一參考標記1731。第一子集中的層階L(0)中的第一參考標記與所述第一子集中的層階L(1)的第一邊界之間的距離處於第一目標距離的容限內。第一子集中的層階L(0)中的第一參考標記和所述第一子集(例如,圖23中的L(0)及L(1))中的層階L(1)的第一邊界之間的第一目標距離的容限與一組層階(例如,1720)中的頂部層階上的第一參考標記(例如,圖18中的1731)和第一蝕刻-修整罩幕(例如,圖18中的1840)的第一邊界(例如,圖18中的1845)之間的目標距離的容限可為不同的且具有不同的值。Figure 23 illustrates the structure of a device formed in accordance with the methods described herein. The structure includes a set of levels 1720 on a substrate 1710 that includes W levels L(i), where i is 0 to W. The set of levels includes a first subset of at least a level L(i), where i is 0 to N1, and a first reference mark 1731 is disposed in the level L(0) of the first subset. The distance between the first reference mark in the level L(0) of the first subset and the first boundary of the level L(1) in the first subset is within a tolerance of the first target distance. a first reference mark in the level L(0) of the first subset and a level L(1) of the first subset (eg, L(0) and L(1) in FIG. 23) The tolerance of the first target distance between the first boundaries and the first reference mark on the top level in a set of levels (eg, 1720) (eg, 1731 in FIG. 18) and the first etch-trimming hood The tolerance of the target distance between the first boundary of the curtain (eg, 1840 in FIG. 18) (eg, 1845 in FIG. 18) may be different and have different values.
所述一組層階包括層階L(i)的第二子集,其中i為N1+1至N1+1+N2,所述第二子集中的層階L(N1+1)中設置有第二參考標記1732。層階L(N1+1)中的第二參考標記與第二子集中的層階L(N1+2)的第二邊界之間的第二距離處於第二目標距離的容限內。The set of levels includes a second subset of the levels L(i), where i is N1+1 to N1+1+N2, and the level L(N1+1) in the second subset is set The second reference numeral 1732. A second distance between the second reference mark in the level L(N1+1) and the second boundary of the level L(N1+2) in the second subset is within a tolerance of the second target distance.
第二目標距離可不同於第一目標距離。所述一組層階的第一子集具有第一數目的層階,所述一組層階的第二子集具有第二數目的層階,且所述第一數目可不同於所述第二數目。在一個實施例中,所述一組層階L(i)中的每一層階可包括犧牲材料層及絕緣材料層,其中i為1至W。The second target distance may be different from the first target distance. The first subset of the set of levels has a first number of levels, the second subset of the set of levels has a second number of levels, and the first number may be different from the first Two numbers. In one embodiment, each of the set of levels L(i) may comprise a layer of sacrificial material and a layer of insulating material, where i is from 1 to W.
圖24A、圖24B、圖24C、及圖24D是用於闡述在可用於本文所述技術的實例中的蝕刻-修整循環中使用的基礎步驟的簡化圖式。這些圖示出積體電路上的多層階電路結構包括由犧牲層12與介電層14交錯而成的堆疊10。將具體的犧牲層及介電層標識為犧牲層12.1、12.2、12.3及介電層14.1、14.2、14.3。在此實例中,每一層階包括犧牲層(例如,12.2)及位於所述犧牲層之下的介電層(例如,14.2)。在替代性實施例中,每一層階包括介電層及位於所述介電層之下的犧牲層。在此種替代形式中,將蝕刻化學品擇選成終止於每一層階中的介電層上而非終止於犧牲層上。24A, 24B, 24C, and 24D are simplified diagrams illustrating the basic steps used in an etch-trim cycle that can be used in an example of the techniques described herein. These figures show that the multi-level circuit structure on the integrated circuit includes a stack 10 of interleaved sacrificial layers 12 and dielectric layers 14. The specific sacrificial layer and dielectric layer are identified as sacrificial layers 12.1, 12.2, 12.3 and dielectric layers 14.1, 14.2, 14.3. In this example, each level includes a sacrificial layer (eg, 12.2) and a dielectric layer (eg, 14.2) underlying the sacrificial layer. In an alternative embodiment, each level includes a dielectric layer and a sacrificial layer underlying the dielectric layer. In this alternative form, the etch chemistry is selected to terminate on the dielectric layer in each layer rather than terminating on the sacrificial layer.
對由犧牲層12與介電層14構成的堆疊10進行的蝕刻將使用蝕刻-修整罩幕來暴露出搭接區域(landing area)28.1、28.2、28.3。圖24A示出包括罩幕區18及敞開蝕刻區(open etch region)20的蝕刻-修整罩幕16.0。對於蝕刻-修整罩幕16.0,使用第一蝕刻罩幕蝕刻一個層階。在一組層階中的包括犧牲層(例如,12.3)及介電層(例如,14.3)的頂部層階上形成參考標記(例如,31)。參考標記與蝕刻-修整罩幕16.0的邊界之間的距離(例如,32)處於第一目標距離的容限內。圖24B示出在敞開蝕刻區20處穿過頂部犧牲層12.3及介電層14.3蝕刻一個層階且在第二犧牲層12.2處終止的結果,其將參考標記31轉移至所述一組層階中的位於下方的包括犧牲層(例如,12.2)及介電層(例如,14.2)的層階。圖24C示出修整圖24B所示第一蝕刻-修整罩幕16.1的結果會形成具有經修整後的罩幕區24、新敞開蝕刻區25、及擴展敞開蝕刻區26(區26等於區20加區25)的經修整後的第一蝕刻-修整罩幕16.1。圖24D示出在擴展敞開蝕刻區26處蝕刻圖3C所示結構的一個層階的結果,其將參考標記31轉移至所述一組層階中的位於下方的包括犧牲層(例如,12.1)及介電層(例如,14.1)的層階。所得結構具有被標識為28.1、28.2、及28.3的被暴露出的犧牲搭接區域。區域28.3被視為被暴露出的是因為其將在經修整後的第一蝕刻-修整罩幕16.1被移除時暴露出。所得結構包括設置於堆疊10的底部層階處的參考標記(例如,31)。Etching of the stack 10 of sacrificial layer 12 and dielectric layer 14 will use an etch-trim mask to expose the landing areas 28.1, 28.2, 28.3. FIG. 24A shows an etch-trim mask 16.0 that includes a mask region 18 and an open etch region 20. For the etch-trim mask 16.0, a first etching mask is used to etch a layer. A reference mark (eg, 31) is formed on a top level of a set of levels including a sacrificial layer (eg, 12.3) and a dielectric layer (eg, 14.3). The distance between the reference mark and the boundary of the etch-trim mask 16.0 (eg, 32) is within the tolerance of the first target distance. 24B shows the result of etching one level through the top sacrificial layer 12.3 and the dielectric layer 14.3 at the open etched region 20 and terminating at the second sacrificial layer 12.2, which transfers the reference mark 31 to the set of layers. The underlying layer includes a sacrificial layer (eg, 12.2) and a dielectric layer (eg, 14.2). Figure 24C shows that the result of trimming the first etch-trim mask 16.1 shown in Figure 24B will result in having a masked mask region 24, a new open etch region 25, and an extended open etch region 26 (region 26 equals region 20 plus The trimmed first etch-trim mask 16.1 of zone 25). 24D shows the result of etching a layer of the structure shown in FIG. 3C at the extended open etch region 26, which transfers the reference mark 31 to the underlying one of the set of layers including the sacrificial layer (eg, 12.1). And the level of the dielectric layer (for example, 14.1). The resulting structure has exposed sacrificial overlapping regions identified as 28.1, 28.2, and 28.3. Zone 28.3 is considered to be exposed because it will be exposed when the trimmed first etch-trim mask 16.1 is removed. The resulting structure includes reference marks (eg, 31) disposed at the bottom level of the stack 10.
圖24A、圖24B、圖24C、及圖24D示出用於在三個層階上形成具有順序性搭接區域的梯級結構的兩步式蝕刻-修整循環(two-step etch-trim cycle)。如本文所述,可將使用單一開始罩幕(例如,罩幕16.0)的一個蝕刻-修整循環用於形成多於兩個台階(包括例如4個、5個、6個、8個或任意數目的台階)。24A, 24B, 24C, and 24D illustrate a two-step etch-trim cycle for forming a step structure having sequential overlapping regions on three levels. As described herein, an etch-trim cycle using a single start mask (eg, mask 16.0) can be used to form more than two steps (including, for example, 4, 5, 6, 8, or any number) Stairs).
為使用一個蝕刻-修整循環形成更大數目的台階,所述開始罩幕必須較厚以適應在所述修整循環中的每一者期間對所述罩幕的侵蝕。使用較厚的罩幕時,在一些技術中,接觸區的尺寸必須相對大進而為微影台階維持足夠的容限。To form a larger number of steps using an etch-trim cycle, the starting mask must be thicker to accommodate erosion of the mask during each of the trim cycles. When using a thicker mask, in some techniques, the size of the contact area must be relatively large to maintain sufficient tolerance for the lithographic steps.
此外,可使用包括多個蝕刻-修整循環的蝕刻-修整製程來以每一循環使用一個開始罩幕的方式形成更大數目的台階。舉例而言,可在七個修整循環內使用一個開始罩幕形成八個台階,且可使用第二開始罩幕以形成依序排列的總共16個梯級中的其他八個台階。In addition, an etch-dressing process including multiple etch-trim cycles can be used to form a larger number of steps using one start mask per cycle. For example, one start mask can be used to form eight steps within seven trim cycles, and a second start mask can be used to form the other eight of the total of 16 steps in sequence.
可使用光阻來實作蝕刻-修整罩幕16.0及16.1。光阻罩幕的修整製程通常是等向性的或多方向的。此會使得光阻罩幕在X方向、Y方向、及Z方向上存在損失。Z方向上的損失可能限制將在給定蝕刻-修整循環中蝕刻的層階的數目。The photoresist can be used to etch-trim masks 16.0 and 16.1. The finishing process of the photoresist mask is usually isotropic or multi-directional. This causes loss of the photoresist mask in the X direction, the Y direction, and the Z direction. Loss in the Z direction may limit the number of levels that will be etched in a given etch-trim cycle.
圖25說明在基底上的一組層階中的頂部層階上形成對準罩幕的過程中使用的製程步驟的簡化流程圖。在步驟2511處,如結合圖17所述,在基底上蝕刻一組參考標記中的參考標記,以區分各蝕刻區的邊界。在步驟2512處,如結合圖18所述,使用第一曝光設定值在頂部層階上形成第一蝕刻-修整罩幕,其中所述第一蝕刻-修整罩幕具有第一邊界。Figure 25 illustrates a simplified flow diagram of the process steps used in forming an alignment mask on the top level of a set of levels on a substrate. At step 2511, reference marks in a set of reference marks are etched on the substrate to distinguish the boundaries of the etched regions as described in connection with FIG. At step 2512, a first etch-trim mask is formed on the top level using a first exposure setting as described in connection with FIG. 18, wherein the first etch-trim mask has a first boundary.
在步驟2513處,例如使用在線掃描電子顯微鏡量測第一參考標記與第一蝕刻罩幕的第一邊界之間的第一距離。在步驟2514處,判斷所量測第一距離超過第一目標距離的容限還是處於所述第一目標距離的容限內。在步驟2515處,當所量測第一距離超過第一目標距離的容限時,則可自基底移除第一蝕刻罩幕,可改變第一曝光設定值,可使用改變後的第一曝光設定值形成下一第一蝕刻罩幕(步驟2512),且可重複量測步驟2513。At step 2513, a first distance between the first reference mark and the first boundary of the first etch mask is measured, for example, using an on-line scanning electron microscope. At step 2514, it is determined whether the measured first distance exceeds the tolerance of the first target distance or is within the tolerance of the first target distance. At step 2515, when the measured first distance exceeds the tolerance of the first target distance, the first etching mask may be removed from the substrate, the first exposure setting may be changed, and the changed first exposure setting may be used. The value forms the next first etch mask (step 2512) and the measurement step 2513 can be repeated.
在步驟2516處,如結合圖19所述,當所量測第一距離處於第一目標距離的容限內時,則可在第一蝕刻-修整製程中使用第一蝕刻罩幕形成N1個台階的子集。At step 2516, as described in connection with FIG. 19, when the measured first distance is within the tolerance of the first target distance, the first etching mask may be used to form N1 steps in the first etching-dressing process a subset of.
如結合圖20所述,當形成N1個台階的子集時,可使用第二曝光設定值在頂部層階上形成第二蝕刻-修整罩幕,其中所述第二蝕刻-修整罩幕具有第二邊界。在第二參考標記與第二蝕刻罩幕的第二邊界之間量測第二距離。As described in connection with FIG. 20, when a subset of N1 steps is formed, a second etch-trim mask can be formed on the top level using the second exposure setting, wherein the second etch-trim mask has Two boundaries. A second distance is measured between the second reference mark and a second boundary of the second etch mask.
當所量測第二距離超過第二目標距離的容限時,則可自基底移除第二蝕刻罩幕,可改變第二曝光設定值,可使用改變後的第二曝光設定值形成下一第二蝕刻罩幕,且可重複所述量測第二距離的量測步驟。如結合圖21所述,當所量測第二距離處於第二目標距離的容限內時,則可在第二蝕刻-修整製程中使用第二蝕刻罩幕。When the measured second distance exceeds the tolerance of the second target distance, the second etching mask may be removed from the substrate, the second exposure setting value may be changed, and the changed second exposure setting value may be used to form the next The mask is etched, and the measuring step of measuring the second distance may be repeated. As described in connection with FIG. 21, when the measured second distance is within the tolerance of the second target distance, a second etch mask can be used in the second etch-trimming process.
可以相似的方式繼續進行如在形成對準罩幕的過程中所述的各製程步驟,以形成在所述一組層階中的各層階處形成台階所需的所有對準罩幕。在所述一組層階中的各層階處形成台階之後,可以導電材料替換所述一組層階中的犧牲材料,以使所述一組層階中的每一層階包括導電材料層及絕緣材料層。The various process steps as described in the process of forming the alignment mask can be continued in a similar manner to form all of the alignment masks required to form the steps at each of the set of levels. After forming a step at each of the set of levels, the sacrificial material in the set of layers may be replaced by a conductive material such that each of the set of layers includes a layer of conductive material and insulation Material layer.
圖26說明如結合圖17至圖23所述在基底上的一組層階中的頂部層階上形成對準罩幕而校準曝光設定值的過程中使用的製程步驟的簡化流程圖。在一個實施例中,所述一組層階中的每一層階可包括犧牲材料(例如,SiN)層及絕緣材料層。在步驟2611處,例如結合圖17所述,在基底上蝕刻一組參考標記中的參考標記,以區分各蝕刻區的邊界。Figure 26 illustrates a simplified flow diagram of the process steps used in the process of calibrating the exposure setpoints by forming an alignment mask on the top level of a set of levels on the substrate as described in connection with Figures 17-23. In one embodiment, each of the set of levels may include a sacrificial material (eg, SiN) layer and an insulating material layer. At step 2611, reference numerals in a set of reference marks are etched on the substrate to distinguish the boundaries of the etched regions, for example, as described in connection with FIG.
在步驟2612處,自例如藉由圖12中的曝光能量及焦心點的模型而說明的多個曝光設定值中選擇第一曝光設定值。在步驟2613處,使用所選擇第一曝光設定值在頂部層階上形成第一蝕刻-修整罩幕。例如結合圖18所述,第一蝕刻-修整罩幕具有第一邊界。At step 2612, the first exposure setting is selected from a plurality of exposure settings, such as illustrated by the model of exposure energy and focal point in FIG. At step 2613, a first etch-trim mask is formed on the top level using the selected first exposure setting. For example, in conjunction with FIG. 18, the first etch-trim mask has a first boundary.
在步驟2614處,例如使用在線掃描電子顯微鏡量測第一參考標記與第一蝕刻罩幕的第一邊界之間的第一距離。在步驟2615處,判斷所量測第一距離超過第一目標距離的容限還是處於所述第一目標距離的容限內。在步驟2616處,當所量測第一距離超過第一目標距離的容限時,則可自基底移除第一蝕刻罩幕。隨後,可自所述多個曝光設定值選擇不同的第一曝光設定值(步驟2612),且可使用改變後的第一曝光設定值形成下一第一蝕刻罩幕(步驟2613),且可重複量測步驟2614(步驟2614)。At step 2614, a first distance between the first reference mark and the first boundary of the first etch mask is measured, for example, using an on-line scanning electron microscope. At step 2615, it is determined whether the measured first distance exceeds the tolerance of the first target distance or is within the tolerance of the first target distance. At step 2616, the first etch mask can be removed from the substrate when the measured first distance exceeds the tolerance of the first target distance. Subsequently, different first exposure settings may be selected from the plurality of exposure settings (step 2612), and the next first exposure mask may be formed using the changed first exposure settings (step 2613), and The measurement step 2614 is repeated (step 2614).
在步驟2617處,當所量測第一距離處於第一目標距離的容限內時,則可儲存來自校準的一組第一曝光設定值,因而可選擇來自校準集合的第一曝光設定值以與在一或多個晶圓上生產多個晶片時形成對準罩幕的製程步驟一起使用。舉例而言,來自校準集合的一個第一曝光設定值可使得在某一方向上移動第一蝕刻罩幕的第一邊界以增大第一參考標記與所述第一邊界之間的第一距離,而來自所述校準集合的另一第一曝光設定值可使得在另一方向上移動所述第一蝕刻罩幕的第一邊界以減小所述第一參考標記與所述第一邊界之間的第一距離。At step 2617, when the measured first distance is within the tolerance of the first target distance, then a set of first exposure settings from the calibration may be stored, and thus the first exposure setting from the calibration set may be selected to Used in conjunction with the process steps of forming an alignment mask when producing multiple wafers on one or more wafers. For example, a first exposure setting from the calibration set can cause a first boundary of the first etch mask to be moved in a direction to increase a first distance between the first reference mark and the first boundary, And another first exposure setting from the calibration set may cause the first boundary of the first etch mask to be moved in another direction to reduce between the first reference mark and the first boundary The first distance.
第一校準集合可包括使得所量測第一距離處於容限內的特定第一曝光設定值。此特定第一曝光設定值可被儲存作為最佳第一曝光設定值,且被用作在一或多個晶圓上生產多個晶片時在基底上的一組層階上形成對準罩幕的製程步驟的第一選擇。對於第一校準集合中的每一曝光設定值,所儲存參數可包括曝光能量、焦心點、及所述一組參考標記中的第一參考標記與第一蝕刻罩幕的第一邊界之間的對應第一距離。例如結合圖19所述,當所量測第一距離處於第一目標距離的容限內時,則可在第一蝕刻-修整製程中使用第一蝕刻罩幕形成N1個台階的子集。The first set of calibrations can include a particular first exposure set point that causes the measured first distance to be within tolerance. This particular first exposure setting can be stored as an optimal first exposure setting and used to form an alignment mask on a set of levels on the substrate when the plurality of wafers are produced on one or more wafers The first choice of the process steps. For each exposure setting in the first set of calibrations, the stored parameters may include an exposure energy, a focal point, and a first reference mark of the set of reference marks and a first boundary of the first etch mask Corresponds to the first distance. For example, in conjunction with FIG. 19, when the measured first distance is within a tolerance of the first target distance, a first etching mask can be used in the first etch-trimming process to form a subset of N1 steps.
當形成N1個台階的子集時,可使用自第二多個曝光設定值中選擇的第二曝光設定值在頂部層階上形成第二蝕刻-修整罩幕。例如結合圖20所述,第二蝕刻-修整罩幕具有第二邊界。可在第二參考標記與第二蝕刻罩幕的第二邊界之間量測第二距離。When a subset of N1 steps is formed, a second etch-trim mask can be formed on the top level using a second exposure setting selected from a second plurality of exposure settings. For example, in conjunction with FIG. 20, the second etch-trim mask has a second boundary. A second distance can be measured between the second reference mark and the second boundary of the second etch mask.
可以相似的方式繼續進行如在校準曝光設定值的過程中所述的各製程步驟,以確定用於形成為在所述一組層階中的各層階處形成台階所需的所有對準罩幕的曝光設定值。The various process steps as described in the process of calibrating the exposure setpoint can be continued in a similar manner to determine all of the alignment masks required to form the steps at each of the set of levels. Exposure settings.
圖27A、圖27B、圖27C、及圖27D說明用於一組層階中的頂部層階上的參考標記蝕刻罩幕中的一組參考標記的微影罩幕圖案。參考標記蝕刻罩幕可使用罩幕圖案中的一者來形成,用於蝕刻所述一組參考標記,且接著在有任何蝕刻-修整罩幕(例如,圖18中的1840)形成於頂部層階上之前被移除。圖27A說明包括位於第一參考標記區2710及在用於形成記憶體陣列的陣列區兩端與所述第一參考標記區相對的第二參考標記區2720中的參考標記的罩幕圖案。第一參考標記區及第二參考標記區中的每一者中的參考標記具有實質上相同的長度。本文中所使用的用語「實質上」旨在包含製造容差。27A, 27B, 27C, and 27D illustrate a lithographic mask pattern for a set of reference marks in a reference mark etch mask on a top level in a set of levels. The reference mark etch mask can be formed using one of the mask patterns for etching the set of reference marks, and then formed on the top layer in any etch-trim mask (eg, 1840 in FIG. 18) It was removed before the stage. Figure 27A illustrates a mask pattern comprising reference marks in a first reference mark area 2710 and in a second reference mark area 2720 opposite the first reference mark area at both ends of the array area for forming a memory array. The reference marks in each of the first reference mark zone and the second reference mark zone have substantially the same length. The term "substantially" as used herein is intended to encompass manufacturing tolerances.
沿圖27A中的線B-B’截取的剖視圖可由圖17來說明。在圖27A所示實例中,第一參考標記區及第二參考標記區中的每一者中的所述6個參考標記可對應於圖17中所示的所述6個參考標記。在第一參考標記區中,第一參考標記2711可對應於圖17中所示參考標記1731,且第六參考標記2716可對應於圖17中所示參考標記1736。在第二參考標記區中,第一參考標記2721可對應於圖17中所示參考標記1731,且第六參考標記2726可對應於圖17中所示參考標記1736。A cross-sectional view taken along line B-B' in Fig. 27A can be explained by Fig. 17. In the example shown in FIG. 27A, the six reference marks in each of the first reference mark area and the second reference mark area may correspond to the six reference marks shown in FIG. In the first reference mark area, the first reference mark 2711 may correspond to the reference mark 1731 shown in FIG. 17, and the sixth reference mark 2716 may correspond to the reference mark 1736 shown in FIG. In the second reference mark area, the first reference mark 2721 may correspond to the reference mark 1731 shown in FIG. 17, and the sixth reference mark 2726 may correspond to the reference mark 1736 shown in FIG.
陣列區具有包括彼此橫向地定向的第一側(例如,2751、2753)與第二側(例如,2752、2754)等多個側。在一個實施例中,第一參考標記區及第二參考標記區(例如,2710、2720)設置於第一側上,而接觸搭接區(landing region)(例如,2730、2740)設置於第二側上。參考標記可設置於第一參考標記區及第二參考標記區中,但不設置於接觸搭接區中。接點可搭接於接觸搭接區中,但不搭接於第一參考標記區及第二參考標記區中。The array region has a plurality of sides including a first side (eg, 2751, 2753) and a second side (eg, 2752, 2754) oriented laterally to each other. In one embodiment, the first reference mark region and the second reference mark region (eg, 2710, 2720) are disposed on the first side, and the contact landing regions (eg, 2730, 2740) are disposed on the first On the two sides. The reference mark may be disposed in the first reference mark area and the second reference mark area, but is not disposed in the contact overlap area. The contacts may be overlapped in the contact overlap region but not in the first reference mark region and the second reference mark region.
圖27B說明與圖27A中所示罩幕圖案相似的罩幕圖案。不同之處在於第一參考標記區及第二參考標記區中的每一者中的參考標記具有不同的長度。在一個實施例中,第一參考標記區及第二參考標記區中的每一者中相較於遠離陣列區的參考標記(例如,2711a)接近於所述陣列區的參考標記(例如,2716a)具有較短的長度。Figure 27B illustrates a mask pattern similar to the mask pattern shown in Figure 27A. The difference is that the reference marks in each of the first reference mark area and the second reference mark area have different lengths. In one embodiment, each of the first reference mark zone and the second reference mark zone is closer to the reference mark of the array area than the reference mark (eg, 2711a) remote from the array area (eg, 2716a) ) has a shorter length.
圖27C說明與圖27B中所示罩幕圖案相似的罩幕圖案。不同之處在於第一參考標記區及第二參考標記區中的每一者中的參考標記可具有在第一方向上定向的第一區段(例如,2711a)、以及連接至所述第一區段且在與所述第一方向正交的第二方向上定向的第二區段及第三區段(例如,2711b、2711c)。Figure 27C illustrates a mask pattern similar to the mask pattern shown in Figure 27B. The difference is that the reference mark in each of the first reference mark area and the second reference mark area may have a first section (eg, 2711a) oriented in the first direction, and connected to the first And a second segment and a third segment (eg, 2711b, 2711c) oriented in a second direction orthogonal to the first direction.
圖27D說明與圖27A中所示罩幕圖案相似的罩幕圖案。不同之處在於第一參考標記區及第二參考標記區中的每一者中的參考標記可包括在同一方向上定向的不連續區段(例如,2711a1、2711a2、2711a3、2711a4)。Figure 27D illustrates a mask pattern similar to the mask pattern shown in Figure 27A. The difference is that the reference marks in each of the first reference mark area and the second reference mark area may include discontinuous sections (eg, 2711a1, 2711a2, 2711a3, 2711a4) oriented in the same direction.
儘管藉由參照以上所詳述的較佳實施例及實例來揭露本發明技術,然而應理解,這些實例旨在為說明性的而非具有限制意義。應設想,熟習此項技術者將輕易地思及各種潤飾及組合形式,且所述潤飾及組合形式將處於本技術的精神及以下申請專利範圍的範圍內。以上提及的任何及所有專利、專利申請案、及印刷出版物的揭露內容併入本案供參考。Although the present invention has been disclosed with reference to the preferred embodiments and examples of the invention, it is understood that the examples are intended to be illustrative and not restrictive. It is to be understood that those skilled in the art will readily appreciate various modifications and combinations, and such retouching and combinations will be within the spirit of the present technology and the scope of the following claims. The disclosure of any and all patents, patent applications, and printed publications mentioned above is hereby incorporated by reference.
8.1、8.2、8.3、8.4、8.5、8.6、8.7、8.8‧‧‧主動層8.1, 8.2, 8.3, 8.4, 8.5, 8.6, 8.7, 8.8 ‧ ‧ active layers
10‧‧‧堆疊10‧‧‧Stacking
12.1、12.2、12.3‧‧‧犧牲層12.1, 12.2, 12.3‧‧‧ sacrificial layer
14.1、14.2、14.3‧‧‧介電層14.1, 14.2, 14.3‧‧‧ dielectric layer
16.0、16.1、1840、2040、2240‧‧‧蝕刻-修整罩幕16.0, 16.1, 1840, 2040, 2240‧‧‧ etching-trimming mask
18‧‧‧罩幕區18‧‧‧ Covering area
20、25、26‧‧‧區20, 25, 26‧‧‧
24‧‧‧經修整後的罩幕區24‧‧‧Finished mask area
28.1、28.2、28.3‧‧‧搭接區域28.1, 28.2, 28.3‧‧‧ lap area
31、330、630、1430、1530、2711、2716、2716a、2721、2726‧‧‧參考標記31, 330, 630, 1430, 1530, 2711, 2716, 2716a, 2721, 2726‧‧ ‧ reference mark
32、115、116、520、620、1420、1535‧‧‧距離32, 115, 116, 520, 620, 1420, 1535‧ ‧ distance
105、305‧‧‧理想位置105, 305‧‧‧ ideal location
110、310、1710‧‧‧基底110, 310, 1710‧‧‧ base
120、320‧‧‧絕緣材料層120, 320‧‧‧Insulation material layer
141、142、1410、1540‧‧‧蝕刻罩幕141, 142, 1410, 1540‧‧‧ etching mask
145、146、545、1415、1545‧‧‧邊界145, 146, 545, 1415, 1545‧ ‧ borders
440‧‧‧罩幕材料層440‧‧‧ Cover material layer
540‧‧‧第一蝕刻罩幕540‧‧‧First etching mask
610‧‧‧凹陷部610‧‧‧Depression
615‧‧‧側615‧‧‧ side
655‧‧‧深度655‧‧ depth
810‧‧‧絕緣材料810‧‧‧Insulation
910‧‧‧隔離區910‧‧ ‧Isolated area
920‧‧‧陣列區920‧‧‧Array area
930‧‧‧周邊區930‧‧‧ surrounding area
1011、1012、1013、1014、1015、1016、1111、1112、1113、1114、1115、1116、1117、2511、2512、2513、2514、2515、2516、2611、2612、2613、2614、2615、2616、2617‧‧‧步驟1011, 1012, 1013, 1014, 1015, 1016, 1111, 1112, 1113, 1114, 1115, 1116, 1117, 2511, 2512, 2513, 2514, 2515, 2516, 2611, 2612, 2613, 2614, 2615, 2616, 2617‧‧‧Steps
1451、1452、1453‧‧‧曲線1451, 1452, 1453‧‧‧ curves
1510、1520‧‧‧罩幕圖案1510, 1520‧‧‧ mask pattern
1515‧‧‧參考標記圖案1515‧‧‧ reference mark pattern
1525‧‧‧矩形1525‧‧‧Rectangle
1601a、1601b、1601c、1601d‧‧‧「L」型線1601a, 1601b, 1601c, 1601d‧‧‧ "L" line
1602a、1602b、1603a、1603b、1603c、1603d、1604a、1604b、1604c、1604d‧‧‧線Lines 1602a, 1602b, 1603a, 1603b, 1603c, 1603d, 1604a, 1604b, 1604c, 1604d‧‧‧
1605a‧‧‧矩形周界/第一矩形1605a‧‧‧Rectangle perimeter/first rectangle
1605b‧‧‧矩形周界/第二矩形1605b‧‧‧Rectangle perimeter/second rectangle
1605c‧‧‧矩形周界/第三矩形1605c‧‧‧Rectangle perimeter/third rectangle
1720‧‧‧層階1720‧‧ ‧ level
1731、1732、1733、1734、1735、1736‧‧‧參考標記1731, 1732, 1733, 1734, 1735, 1736‧‧‧ reference marks
1850‧‧‧第一距離1850‧‧‧First distance
2045‧‧‧第二邊界2045‧‧‧ second border
2050‧‧‧第二距離2050‧‧‧Second distance
2245‧‧‧第三邊界2245‧‧‧ third border
2250‧‧‧第三距離2250‧‧‧ third distance
2710‧‧‧第一參考標記區 2710‧‧‧First reference mark area
2711a‧‧‧第一區段 2711a‧‧‧First section
2711a1、2711a2、2711a3、2711a4‧‧‧區段 Sections 2711a1, 2711a2, 2711a3, 2711a4‧‧
2711b‧‧‧第二區段 2711b‧‧‧Second section
2711c‧‧‧第三區段 2711c‧‧‧ third section
2720‧‧‧第二參考標記區 2720‧‧‧Second reference mark area
2730、2740‧‧‧接觸搭接區 2730, 2740‧‧‧Contact lap area
2751、2753‧‧‧第一側 2751, 2753‧‧‧ first side
2752、2754‧‧‧第二側 2752, 2754‧‧‧ second side
A-A’、B-B’‧‧‧線 A-A’, B-B’‧‧‧ line
X、Y、Z‧‧‧方向 X, Y, Z‧‧ Direction
圖1是半導體裝置結構的簡化剖視圖,其示出在基底上形成蝕刻罩幕的結果,其中所述蝕刻罩幕具有可使得所述蝕刻罩幕在兩個相對的邊界之間的尺寸大於規定尺寸且超過製造容差(先前技術)的邊界。 圖2是所述結構的簡化剖視圖,其示出在基底上形成蝕刻罩幕的結果,其中所述蝕刻罩幕具有可使得所述蝕刻罩幕在兩個相對的邊界之間的尺寸小於規定尺寸且超過製造容差(先前技術)的邊界。 圖3至圖9說明根據本發明技術的在形成對準罩幕的過程中使用的製程步驟的一個實例。 圖10說明在形成對準罩幕的過程中使用的製程步驟的簡化流程圖。 圖11說明在為形成對準罩幕而校準曝光設定值的過程中使用的製程步驟的簡化流程圖。 圖12說明曝光能量及焦心點(focus center)的模型的一個實例,其表現多個曝光設定值。 圖13是示出參考標記與蝕刻罩幕的邊界之間的所量測距離隨著曝光能量及焦心點而變化的曲線的曲線圖。 圖14A說明參考標記與蝕刻罩幕的邊界之間的距離。 圖14B說明圖14A中所示結構的俯視圖影像。 圖14C是說明參考標記、蝕刻罩幕的邊界、及所述參考標記與所述蝕刻罩幕的邊界之間的距離的影像。 圖15A說明用於在基底上製作參考標記的罩幕的微影罩幕圖案(lithographic mask pattern)。 圖15B說明用於在基底中在製作凹陷部的罩幕的微影罩幕圖案1520。 圖15C是所述結構的簡化俯視圖,其示出使用圖15A中所示罩幕圖案在基底上蝕刻參考標記並接著使用圖15B中所示罩幕圖案在所述基底上形成蝕刻罩幕的結果。 圖15D說明圖15C中所示結構的剖視圖。 圖16A至圖16F說明在參考標記圖案的形成過程中使用的參考標記蝕刻罩幕中的參考標記的替代性微影罩幕圖案。 圖17至圖23說明在基底上的一組層階上形成一組對準罩幕的過程中使用的製程步驟的另一個實例。 圖24A、圖24B、圖24C、及圖24D是說明根據本發明技術的蝕刻-修整循環的一組簡化圖式,其中藉由介電層而將導電層的堆疊隔開,蝕刻一個層階,修整蝕刻罩幕,且蝕刻一個層階以形成圖24D所示結構。 圖25說明在基底上的一組層階中的頂部層階上形成對準罩幕的過程中使用的製程步驟的簡化流程圖。 圖26說明在為在一組層階中的頂部層階上形成對準罩幕而校準曝光設定值的過程中使用的製程步驟的簡化流程圖。 圖27A、圖27B、圖27C、及圖27D說明用於一組層階中的頂部層階上的參考標記蝕刻罩幕中的一組參考標記的微影罩幕圖案。1 is a simplified cross-sectional view of a structure of a semiconductor device showing the result of forming an etch mask on a substrate, wherein the etch mask has a dimension such that the etch mask is between two opposing boundaries greater than a specified size And beyond the boundaries of manufacturing tolerances (prior art). 2 is a simplified cross-sectional view of the structure showing the result of forming an etch mask on a substrate, wherein the etch mask has a dimension such that the etch mask is less than a specified size between two opposing boundaries And beyond the boundaries of manufacturing tolerances (prior art). 3 through 9 illustrate an example of a process step used in the process of forming an alignment mask in accordance with the teachings of the present invention. Figure 10 illustrates a simplified flow diagram of the process steps used in forming the alignment mask. Figure 11 illustrates a simplified flow diagram of the process steps used in calibrating the exposure setpoints for forming an alignment mask. Figure 12 illustrates an example of a model of exposure energy and focus center that exhibits multiple exposure settings. FIG. 13 is a graph showing a curve in which the measured distance between the reference mark and the boundary of the etching mask varies with exposure energy and a focal point. Figure 14A illustrates the distance between the reference mark and the boundary of the etch mask. Figure 14B illustrates a top view image of the structure shown in Figure 14A. Figure 14C is an image illustrating the reference mark, the boundary of the etch mask, and the distance between the reference mark and the boundary of the etch mask. Figure 15A illustrates a lithographic mask pattern for a mask for making reference marks on a substrate. Figure 15B illustrates a lithographic mask pattern 1520 for a mask that is used to make a recess in a substrate. Figure 15C is a simplified top plan view of the structure showing the result of etching a reference mark on a substrate using the mask pattern shown in Figure 15A and then forming an etch mask on the substrate using the mask pattern shown in Figure 15B. . Figure 15D illustrates a cross-sectional view of the structure shown in Figure 15C. 16A-16F illustrate an alternative lithographic mask pattern of reference marks in a reference mark etch mask used in the formation of a reference mark pattern. 17 through 23 illustrate another example of a process step used in forming a set of alignment masks on a set of levels on a substrate. 24A, 24B, 24C, and 24D are a simplified set of illustrations illustrating an etch-trim cycle in accordance with the teachings of the present invention, wherein the stack of conductive layers is separated by a dielectric layer, etching a layer, The etch mask is trimmed and a layer is etched to form the structure shown in Figure 24D. Figure 25 illustrates a simplified flow diagram of the process steps used in forming an alignment mask on the top level of a set of levels on a substrate. Figure 26 illustrates a simplified flow diagram of the process steps used in calibrating the exposure setpoint for forming an alignment mask on the top level in a set of levels. 27A, 27B, 27C, and 27D illustrate a lithographic mask pattern for a set of reference marks in a reference mark etch mask on a top level in a set of levels.
Claims (20)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW106143410A TWI639885B (en) | 2017-12-11 | 2017-12-11 | Method for forming aligned mask, semiconductor device and method for forming a set of aligned mask |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW106143410A TWI639885B (en) | 2017-12-11 | 2017-12-11 | Method for forming aligned mask, semiconductor device and method for forming a set of aligned mask |
Publications (2)
Publication Number | Publication Date |
---|---|
TWI639885B true TWI639885B (en) | 2018-11-01 |
TW201928509A TW201928509A (en) | 2019-07-16 |
Family
ID=65034125
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW106143410A TWI639885B (en) | 2017-12-11 | 2017-12-11 | Method for forming aligned mask, semiconductor device and method for forming a set of aligned mask |
Country Status (1)
Country | Link |
---|---|
TW (1) | TWI639885B (en) |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW278201B (en) * | 1994-10-28 | 1996-06-11 | At & T Corp | |
TW581993B (en) * | 1999-02-15 | 2004-04-01 | Micro Displays Inc | Method for assembling a tiled, flat-panel microdisplay array |
TWI439557B (en) * | 2006-10-30 | 2014-06-01 | Applied Materials Inc | Workpiece rotation apparatus for a plasma reactor system |
WO2017169763A1 (en) * | 2016-03-30 | 2017-10-05 | 東レ株式会社 | Negative photosensitive resin composition, cured film, display device provided with cured film and method for manufacturing same |
-
2017
- 2017-12-11 TW TW106143410A patent/TWI639885B/en active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW278201B (en) * | 1994-10-28 | 1996-06-11 | At & T Corp | |
TW581993B (en) * | 1999-02-15 | 2004-04-01 | Micro Displays Inc | Method for assembling a tiled, flat-panel microdisplay array |
TWI439557B (en) * | 2006-10-30 | 2014-06-01 | Applied Materials Inc | Workpiece rotation apparatus for a plasma reactor system |
WO2017169763A1 (en) * | 2016-03-30 | 2017-10-05 | 東レ株式会社 | Negative photosensitive resin composition, cured film, display device provided with cured film and method for manufacturing same |
Also Published As
Publication number | Publication date |
---|---|
TW201928509A (en) | 2019-07-16 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN109786239B (en) | Method for forming alignment mask or group of alignment masks, semiconductor device | |
US9859224B2 (en) | Registration mark formation during sidewall image transfer process | |
JP4307664B2 (en) | Semiconductor device | |
TWI651809B (en) | Feature size reduction | |
CN104658892B (en) | Method for integrated circuit patterns | |
TWI553781B (en) | Pitch-halving integrated circuit process and integrated circuit structure made thereby | |
TWI612637B (en) | Contact pad structure and method for fabricating the same | |
TW201349369A (en) | Method for forming patterns of dense conductor lines and their contact pads, and memory array having dense conductor lines and contact pads | |
US20120288683A1 (en) | Protuberant structure and method for making the same | |
US9941153B1 (en) | Pad structure and manufacturing method thereof | |
TWI639885B (en) | Method for forming aligned mask, semiconductor device and method for forming a set of aligned mask | |
CN113035732B (en) | Three-dimensional memory and method for forming step area of three-dimensional memory | |
CN108257910B (en) | The production method of shallow trench isolation groove | |
JP2006134940A (en) | Manufacturing method of semiconductor device | |
US20120286402A1 (en) | Protuberant structure and method for making the same | |
KR100823706B1 (en) | Signal line structure of semiconductor device and method of manufacturing the same | |
JP3172998B2 (en) | Semiconductor device and manufacturing method thereof | |
KR100715600B1 (en) | Method of fabricating the fine pattern | |
US20100009510A1 (en) | Method of manufacturing semiconductor device | |
TWI641100B (en) | Method for manufacturing semiconductor device | |
JP2010232669A (en) | Semiconductor device and method of manufacturing semiconductor | |
TWI449085B (en) | Process for semiconductor device | |
TWI727049B (en) | Method of manufacturing a semiconductor device | |
JP2010010716A (en) | Semiconductor device | |
JP2008258493A (en) | Forming method of wiring of semiconductor memory device |