TWI635566B - Method for filling trench with metal layer and semiconductor structure formed by using the same - Google Patents

Method for filling trench with metal layer and semiconductor structure formed by using the same Download PDF

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TWI635566B
TWI635566B TW101105605A TW101105605A TWI635566B TW I635566 B TWI635566 B TW I635566B TW 101105605 A TW101105605 A TW 101105605A TW 101105605 A TW101105605 A TW 101105605A TW I635566 B TWI635566 B TW I635566B
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trench
metal layer
layer
filling
deposition
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TW101105605A
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TW201336018A (en
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許啟茂
黃信富
蔡旻錞
陳健豪
陳威宇
林進富
李景剛
陳旻賢
蘇劍洪
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聯華電子股份有限公司
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Abstract

本發明提供一種以金屬層填滿溝渠的方法。首先提供一沈積機台,並提供一基底以及位於基底上之一介電層,介電層包含一溝渠。接著,進行一第一沈積步驟以使得溝渠填入一金屬層,且在第一沈積步驟中,基底的溫度逐漸上升至一預定溫度。當達到預定溫度時,進行一第二沈積步驟,使得金屬層填滿溝渠。 The present invention provides a method of filling a trench with a metal layer. A deposition machine is first provided and provides a substrate and a dielectric layer on the substrate, the dielectric layer comprising a trench. Next, a first deposition step is performed to fill the trench with a metal layer, and in the first deposition step, the temperature of the substrate gradually rises to a predetermined temperature. When the predetermined temperature is reached, a second deposition step is performed such that the metal layer fills the trench.

Description

以金屬層填滿溝渠的方法以及利用此方法形成的半導體結構 Method for filling a trench with a metal layer and semiconductor structure formed by the method

本發明係關於一種以金屬層填滿溝渠的方法以及利用此方法形成的一種半導體結構,特別來說,是關於一種具有至少兩沈積步驟以金屬層填滿溝渠的方法,以及利用此方法形成的一種半導體結構。 The present invention relates to a method of filling a trench with a metal layer and a semiconductor structure formed by the method, and more particularly to a method for filling a trench with a metal layer with at least two deposition steps, and a method formed by the method A semiconductor structure.

在現代的資訊社會中,由積體電路所構成的微處理機系統早已被普遍運用於生活的各個層面,例如自動控制之家電用品、行動通訊設備、個人電腦等,都有積體電路之蹤跡。而隨著科技的日益精進,以及人類社會對於電子產品的各種想像,使得積體電路也往更多元、更精密、更小型的方向發展。 In the modern information society, the microprocessor system consisting of integrated circuits has been widely used in all aspects of life, such as automatic control of household appliances, mobile communication devices, personal computers, etc., all of which have traces of integrated circuits. . With the increasing advancement of technology and the imagination of human society for electronic products, the integrated circuit has also developed in the direction of more yuan, more precision and smaller.

而隨著元件尺寸的逐漸降低,在積體電路的製作方法上也面臨到許多的問題。舉例來說,金屬鋁是目前常用的金屬閘極材料,以現有的閘極後(gate last)製程而言,通常是會先形成一虛擬閘極(dummy gate),接著在會把虛擬閘極移除而形成一溝渠,接著才在溝渠中填滿鋁層而形成金屬閘極。然而,由於元件尺寸的微縮,使得鋁層的填洞能力備受考驗,例如容易在溝渠中形成空洞(void);此外,現有沈積製程形成的鋁層,其金屬粒度(grain size)過大,也導致了表面粗糙(roughness),使得鋁層所形成的金屬閘極容易穿刺(spike)至下方的阻障層(barrier layer)甚至是功函數金屬層(work function metal),進而降低了元件的品質。 With the gradual decrease in the size of components, many problems have also been encountered in the fabrication of integrated circuits. For example, metal aluminum is a commonly used metal gate material. In the case of the existing gate last process, a dummy gate is usually formed first, followed by a dummy gate. The trench is removed to form a trench, and then the trench is filled with an aluminum layer to form a metal gate. However, due to the size reduction of the components, the filling ability of the aluminum layer is tested, for example, it is easy to form voids in the trench; in addition, the aluminum layer formed by the existing deposition process has a large grain size, too This results in surface roughness, so that the metal gate formed by the aluminum layer is easily spiked to the underlying barrier layer or even the work function metal layer (work function) Metal), which in turn reduces the quality of the components.

本發明於是提供一種以金屬層填滿溝渠的方法,以克服上述問題。 The present invention thus provides a method of filling a trench with a metal layer to overcome the above problems.

根據本發明之一實施例,本發明提供一種以金屬層填滿溝渠的方法。首先提供一沈積機台,並提供一基底以及位於基底上之一介電層,介電層包含一溝渠。接著,進行一第一沈積步驟,使得溝渠填入一金屬層,且基底的溫度逐漸上升至一預定溫度。當達到預定溫度時,進行一第二沈積步驟,使得金屬層填滿溝渠。 In accordance with an embodiment of the present invention, the present invention provides a method of filling a trench with a metal layer. A deposition machine is first provided and provides a substrate and a dielectric layer on the substrate, the dielectric layer comprising a trench. Next, a first deposition step is performed such that the trench fills a metal layer and the temperature of the substrate gradually rises to a predetermined temperature. When the predetermined temperature is reached, a second deposition step is performed such that the metal layer fills the trench.

根據本發明另一實施例,本發明提供一種半導體結構,包含一基底、一介電層以及一鋁層。介電層設置於基底上,且具有一溝渠。鋁層填滿溝渠,其中鋁層具有一複數折射率實質上大於1。 According to another embodiment of the present invention, the present invention provides a semiconductor structure including a substrate, a dielectric layer, and an aluminum layer. The dielectric layer is disposed on the substrate and has a trench. The aluminum layer fills the trench, wherein the aluminum layer has a complex refractive index substantially greater than one.

本發明特點在於使用了三道的沈積製程,能分別克服習知金屬層填入溝渠時的問題,而得到一品質較佳的金屬層。 The invention is characterized in that a three-layer deposition process is used, which can overcome the problems of the conventional metal layer filling the trench, and obtain a metal layer of better quality.

為使熟習本發明所屬技術領域之一般技藝者能更進一步了解本發明,下文特列舉本發明之數個較佳實施例,並配合所附圖式,詳細說明本發明的構成內容及所欲達成之功效。 The present invention will be further understood by those skilled in the art to which the present invention pertains. The effect.

本發明提供了一種把溝渠填滿金屬層的方法,其特徵在於包含至少兩個以上沈積步驟,並搭配沈積機台的溫度控制、熱傳導氣體的提供以及沈積功率的調整,可得到一填洞能力較佳的金屬層。 The invention provides a method for filling a trench with a metal layer, characterized in that it comprises at least two deposition steps, and with the temperature control of the deposition machine, the supply of the heat conduction gas and the adjustment of the deposition power, a hole filling capability can be obtained. A preferred metal layer.

請參考第1圖與第2圖,所示為本發明所使用沈積機台的結構示意圖。如第1圖所示,本發明的沈積機台300包含一陰極(cathode)302以及一陽極(anode)304,兩者會電性連接至一偏壓供應單元(bias voltage unit)306,可提供沈積製程時所需的電壓。陰極302的表面上設置有一靶材(target)308,其作為預沈積的金屬層材料。晶圓312則設置在陽極304上的一放置平面316上。如第1圖所示,陽極304還設置有複數個支撐柱(supporting pin)310,自放置平面316上伸出,以在運送過程中支撐晶圓312。如第2圖所示,支撐柱310亦可收回至陽極304中,使得晶圓312能安置在放置平面316上。於本發明較佳實施例中,陽極304還可具有加熱板(heater)的功能,可提供沈積時所需的溫度,並可提供熱傳導氣體314,例如氬氣(Ar)。於一實施例中,熱傳導氣體314可經由加熱板之陽極304上的孔洞318接觸晶圓312的背面,使得加熱板的溫度能快速且均勻地傳遞至晶圓312。 Please refer to FIG. 1 and FIG. 2 for a schematic structural view of a deposition machine used in the present invention. As shown in FIG. 1, the deposition machine 300 of the present invention includes a cathode 302 and an anode 304, which are electrically connected to a bias voltage unit 306. The voltage required to deposit the process. A target 308 is provided on the surface of the cathode 302 as a pre-deposited metal layer material. Wafer 312 is disposed on a placement plane 316 on anode 304. As shown in FIG. 1, the anode 304 is also provided with a plurality of support pins 310 extending from the placement plane 316 to support the wafer 312 during transport. As shown in FIG. 2, the support post 310 can also be retracted into the anode 304 such that the wafer 312 can be placed on the placement plane 316. In a preferred embodiment of the invention, the anode 304 may also have the function of a heater that provides the temperature required for deposition and may provide a thermally conductive gas 314, such as argon (Ar). In one embodiment, the thermally conductive gas 314 can contact the back side of the wafer 312 via a hole 318 in the anode 304 of the heater plate such that the temperature of the heater plate can be transferred to the wafer 312 quickly and uniformly.

請參考第3圖至第6圖,所繪示為本發明一種把溝渠填滿金屬層的方法示意圖。如第3圖所示,首先提供一基底500,例如是一矽基底、含矽基底或矽覆絕緣(silicon-on-insulator,SOI)基底等。接 著在基底500上形成一介電層502,並在介電層502中形成一溝渠504。值得注意的是,本發明在基底500以及介電層502之間還可能有一層或多層的半導體結構,例如還具有其他的介電層或金屬層等。接著,可選擇性地在基底500上形成一阻障層506,其材質例如是鈦/氮化鈦(Ti/TiN)或鉭/氮化鉭(Ta/TaN)。阻障層506會覆蓋在溝渠504的表面上,但並不會把溝渠504填滿。 Please refer to FIG. 3 to FIG. 6 , which are schematic diagrams showing a method for filling a trench with a metal layer according to the present invention. As shown in FIG. 3, a substrate 500 is first provided, such as a germanium substrate, a germanium-containing substrate, or a silicon-on-insulator (SOI) substrate. Connect A dielectric layer 502 is formed on the substrate 500, and a trench 504 is formed in the dielectric layer 502. It should be noted that the present invention may also have one or more layers of semiconductor structures between the substrate 500 and the dielectric layer 502, such as other dielectric layers or metal layers. Next, a barrier layer 506 may be selectively formed on the substrate 500, such as titanium/titanium nitride (Ti/TiN) or tantalum/tantalum nitride (Ta/TaN). The barrier layer 506 will overlie the surface of the trench 504 but will not fill the trench 504.

接著如第4圖所示,進行一第一沈積製程,以在溝渠504內的阻障層506表面上形成一金屬層508。金屬層508較佳是鋁(Al),但也可以是其他金屬材料例如是鈦(Ti)、鉭(Ta)、鎢(W)、鈮(Nb)、鉬(Mo)、銅(Cu)、氮化鈦(TiN)、碳化鈦(TiC)、氮化鉭(TaN)、鈦鎢(Ti/W)或鈦與氮化鈦(Ti/TiN)等複合金屬層料,但並不以此為限。本發明較佳實施例中,第一沈積製程是在如第1圖所示之沈積機台中進行。本發明之一特點在於,第一沈積製程是從室溫開始加熱至一預定溫度,且基底500沒有直接接觸加熱板之陽極304。更詳細地來說,基底500從室溫下被放置到支撐柱310上時立刻進行沈積,此時支撐柱310是伸出在放置平面316上,故基底500(即第1圖的晶圓312)並沒有接觸放置平台316,而是具有一間隙(gap)。陽極304加熱板雖然具有一預定溫度,但由於基底500沒有直接接觸放置平台316,且加熱板之陽極304並沒有提供熱傳導氣體314,故兩者並非處於熱平衡(thermal equilibrium)狀態,因此基底300的溫度並不會立刻上升,而是會逐漸從室溫加熱至預定溫度。在此須注意的是,本發明的室溫會隨著機台環境的不同而有所不同,並非一固定數值,且 可能和基底500在上一個製程所進行的步驟有關。大體而言,室溫會低於攝氏100度,較佳者會低於攝氏50度,例如15度至30度之間。而預定溫度則是指一般沈積機台在穩定狀態(steady state)下進行沈積的溫度,例如攝氏380度至攝氏420度間,較佳是攝氏400度。而於本發明另一實施例中,第一沈積步驟中沈積機台300中的偏壓供應單元306會提供一第一沈積功率,所提供的功率大體上為10,000瓦至15,000瓦之間。 Next, as shown in FIG. 4, a first deposition process is performed to form a metal layer 508 on the surface of the barrier layer 506 in the trench 504. The metal layer 508 is preferably aluminum (Al), but other metal materials such as titanium (Ti), tantalum (Ta), tungsten (W), niobium (Nb), molybdenum (Mo), copper (Cu), Titanium nitride (TiN), titanium carbide (TiC), tantalum nitride (TaN), titanium tungsten (Ti/W) or composite metal layers such as titanium and titanium nitride (Ti/TiN), but not limit. In a preferred embodiment of the invention, the first deposition process is carried out in a deposition machine as shown in FIG. One feature of the present invention is that the first deposition process is heated from room temperature to a predetermined temperature, and the substrate 500 does not directly contact the anode 304 of the heating plate. In more detail, the substrate 500 is deposited as soon as it is placed on the support post 310 from room temperature, at which time the support post 310 is projected over the placement plane 316, so the substrate 500 (i.e., the wafer 312 of FIG. 1) There is no contact with the placement platform 316, but a gap. Although the anode 304 heating plate has a predetermined temperature, since the substrate 500 does not directly contact the placement platform 316, and the anode 304 of the heating plate does not provide the heat conduction gas 314, the two are not in a thermal equilibrium state, and therefore the substrate 300 The temperature does not rise immediately, but is gradually heated from room temperature to a predetermined temperature. It should be noted here that the room temperature of the present invention will vary with the environment of the machine, not a fixed value, and It may be related to the steps performed by the substrate 500 in the previous process. In general, room temperature will be less than 100 degrees Celsius, preferably less than 50 degrees Celsius, such as between 15 and 30 degrees. The predetermined temperature refers to a temperature at which the deposition machine is deposited in a steady state, for example, between 380 degrees Celsius and 420 degrees Celsius, preferably 400 degrees Celsius. In another embodiment of the invention, the bias supply unit 306 in the deposition station 300 in the first deposition step provides a first deposition power that is substantially between 10,000 watts and 15,000 watts.

接著如第5圖所示,當基底500達到預定溫度時,隨即進行一第二沈積製程,逐漸以金屬層508將溝渠504填滿。於本發明之一特徵在於,在第二沈積製程中支撐柱310會內縮至陽極304中,使得基底500被安置在放置平台316上(如第2圖所示)。此時陽極304加熱板也會提供熱傳導氣體314例如氬氣(Ar),可將加熱板的預定溫度(例如400℃)均勻傳遞至基底500,此時基底500和陽極304加熱板會呈現熱平衡的狀況。此外,第二沈積步驟中沈積機台300中的偏壓供應單元306會提供一第二沈積功率,於本發明較佳實施例中,第二沈積功率會小於等於第一沈積功率。第二沈積功率例如介於2,000瓦至10,000瓦之間。 Next, as shown in FIG. 5, when the substrate 500 reaches a predetermined temperature, a second deposition process is performed, and the trench 504 is gradually filled with the metal layer 508. One feature of the present invention is that the support post 310 will be retracted into the anode 304 during the second deposition process such that the substrate 500 is placed on the placement platform 316 (as shown in Figure 2). At this time, the anode 304 heating plate also provides a heat conducting gas 314 such as argon (Ar), which can uniformly transfer the predetermined temperature of the heating plate (for example, 400 ° C) to the substrate 500, at which time the substrate 500 and the anode 304 heating plate are thermally balanced. situation. In addition, the bias supply unit 306 in the deposition station 300 in the second deposition step provides a second deposition power. In a preferred embodiment of the invention, the second deposition power is less than or equal to the first deposition power. The second deposition power is, for example, between 2,000 watts and 10,000 watts.

接著請參考第6圖,當金屬層508填滿溝渠504後,可視情況進行一第三沈積製程,以增加金屬層508在基底500上的厚度。第三沈積製程與第二沈積製程的參數大致相同。差別在於,第三沈積步驟中沈積機台300中的偏壓供應單元306會提供一第三沈積功 率,於本發明較佳實施例中,第三沈積功率會大於第二沈積功率。 Referring to FIG. 6 again, after the metal layer 508 fills the trench 504, a third deposition process may be performed to increase the thickness of the metal layer 508 on the substrate 500. The parameters of the third deposition process are substantially the same as those of the second deposition process. The difference is that the bias supply unit 306 in the deposition machine 300 in the third deposition step provides a third deposition work. Rate, in a preferred embodiment of the invention, the third deposition power will be greater than the second deposition power.

在進行完第三沈積製程之後,可選擇性第進行一熱回流製程(reflow)。此時並不進行沈積,而僅是維持陽極304加熱板在預定溫度,且也會提供熱傳導氣體314,過程約15分鐘。 After the third deposition process is completed, a thermal reflow process may be selectively performed. No deposition is performed at this time, but only the anode 304 is maintained at a predetermined temperature, and the heat transfer gas 314 is also supplied for about 15 minutes.

本發明所提供的把溝渠填滿金屬層的方法,其特徵在於使用了至少兩道以上的沈積步驟。首先在第一沈積製程中以緩慢上升的溫度來形成金屬層508,可以降低金屬層508形成時的熱積存(thermal budget),故靠近阻障層506一側的金屬層508的可以得到粒度較小,品質較佳的金屬層508,避免習知金屬層508穿刺阻障層506的現象。另一方面,在第二沈積製程中,由於較低的沈積功率,可增加金屬層508的填洞能力,可避免溝渠504中產生空洞。最後,在第三沈積製程中,金屬層508已完美地填入溝渠504中,故可以較高的沈積功率進行,以增加製程的效率(through put)。於本發明之一較佳實施例中,第一沈積製程所形成的金屬層508之厚度,比上第二沈積製程以及第三沈積製程所形成的金屬層508之厚度,比值大約為1/2。 The method of filling a trench with a metal layer provided by the present invention is characterized in that at least two deposition steps are used. First, the metal layer 508 is formed at a slowly rising temperature in the first deposition process, and the thermal budget of the metal layer 508 can be reduced. Therefore, the metal layer 508 near the barrier layer 506 can be obtained with a smaller particle size. The small, better quality metal layer 508 avoids the phenomenon that the conventional metal layer 508 penetrates the barrier layer 506. On the other hand, in the second deposition process, the hole filling ability of the metal layer 508 can be increased due to the lower deposition power, and voids in the trench 504 can be avoided. Finally, in the third deposition process, the metal layer 508 has been perfectly filled into the trench 504, so that higher deposition power can be performed to increase the throughput of the process. In a preferred embodiment of the present invention, the thickness of the metal layer 508 formed by the first deposition process is about 1/2 of the thickness of the metal layer 508 formed by the second deposition process and the third deposition process. .

而於本發明另一實施例中,前述第一沈積製程、第二沈積製程以及第三沈積製程亦可透過時間模式(time mode)來管理,例如在沈積機台300中設定:當第一沈積製程在經過一第一預定時間後即進入第二沈積製程,當第二沈積製程經過一第二預定時間後即進入第 三沈積製程,當第三沈積製程經過一第三預定時間後即進入熱回流製程。 In another embodiment of the present invention, the first deposition process, the second deposition process, and the third deposition process may also be managed through a time mode, such as setting in the deposition machine 300: when the first deposition The process enters the second deposition process after a first predetermined time, and enters the second deposition process after a second predetermined time. The three deposition process, when the third deposition process passes a third predetermined time, enters the thermal reflow process.

如上所述,本發明可以提供一種形成較佳品質的金屬層508的方法,具有較小的粒度以及較光滑的表面,特別是對金屬鋁來講,這樣的特點可反應在其複數折射率上,例如鋁層的複數折射率可以達到1以上,例如是大於1.5,甚至大於1.7。須注意的是,在此複數折射率的量測基準,較佳者是指在裸晶(bulk wafer)上先形成一例如80埃的阻障層後,再以前述的沈積方法來形成一約3000埃至4000埃的鋁層,然後以KLA-Tensor公司所提供的型號為ASET-F5X機台以波長436柰米的光進行量測所得到的複數折射率。 As described above, the present invention can provide a method of forming a metal layer 508 of a better quality, having a smaller particle size and a smoother surface, particularly for metallic aluminum, which can be reflected in its complex refractive index. For example, the complex refractive index of the aluminum layer may be above 1, for example greater than 1.5, or even greater than 1.7. It should be noted that the measurement reference of the complex refractive index preferably means that a barrier layer of, for example, 80 angstroms is formed on the bulk wafer, and then formed by the deposition method described above. An aluminum layer of 3,000 angstroms to 4,000 angstroms is then measured by a KLA-Tensor model of the ASET-F5X machine with a wavelength of 436 mils.

本發明所提供的把溝渠填滿金屬層的方法可應用在任何需要將溝渠填入金屬層的製程中,例如是各種鑲嵌製程、電容製程甚至是各種平面電晶體(planar transistor)或非平面電晶體(non-planar transistor)的金屬閘極製程。請參考第7圖至第11圖,所繪示為本發明一種製作金屬閘極的方法的步驟示意圖。如第7圖所示,首先提供一基底400,例如是一矽基底、含矽基底或矽覆絕緣基底。基底400上具有複數個淺溝渠隔離(shallow trench isolation,STI)401。然後在淺溝渠隔離401所包圍的主動區域中形成一電晶體402,例如是一P型電晶體或是一N型電晶體。 The method for filling a trench with a metal layer provided by the present invention can be applied to any process that requires filling a trench into a metal layer, such as various damascene processes, capacitor processes, or even various planar transistors or non-planar electrodes. Metal gate process for non-planar transistors. Please refer to FIG. 7 to FIG. 11 , which are schematic diagrams showing the steps of a method for fabricating a metal gate according to the present invention. As shown in Fig. 7, a substrate 400 is first provided, such as a germanium substrate, a germanium containing substrate or a germanium insulating substrate. The substrate 400 has a plurality of shallow trench isolation (STI) 401 thereon. A transistor 402 is formed in the active region surrounded by the shallow trench isolation 401, such as a P-type transistor or an N-type transistor.

於本發明之一實施例中,如第7圖所示,電晶體402包含一介 質層404、一高介電常數層405、一蝕刻停止層407、一犧牲閘極406、一蓋層408、一側壁子410、一輕摻雜汲極(light doped drain,LDD)412以及一源極/汲極414。於本發明較佳實施例中,介質層404為一二氧化矽層,高介電常數層405的介電常數大約大於4,其可以是稀土金屬氧化物層或鑭系金屬氧化物層,例如氧化鉿(hafnium oxide,HfO2)、矽酸鉿氧化合物(hafnium silicon oxide,HfSiO4)、矽酸鉿氮氧化合物(hafnium silicon oxynitride,HfSiON)、氧化鋁(aluminum oxide,Al2O3)、氧化鑭(lanthanum oxide,La2O3)、鋁酸鑭(lanthanum aluminum oxide,LaAlO)、氧化鉭(tantalum oxide,Ta2O5)、氧化鋯(zirconium oxide,ZrO2)、矽酸鋯氧化合物(zirconium silicon oxide,ZrSiO4)、鋯酸鉿(hafnium zirconium oxide,HfZrO)、氧化鐿(yttrium oxide,Yb2O3)、氧化矽鐿(yttrium silicon oxide,YbSiO)、鋁酸鋯(zirconium aluminate,ZrAlO)、鋁酸鉿(hafnium aluminate,HfAlO)、氮化鋁(aluminum nitride,AlN)、氧化鈦(titanium oxide,TiO2),氮氧化鋯(zirconium oxynitride,ZrON)、氮氧化鉿(hafnium oxynitride,HfON)、氮氧矽鋯(zirconium silicon oxynitride,ZrSiON)、氮氧矽鉿(hafnium silicon oxynitride,HfSiON)、鍶鉍鉭氧化物(strontium bismuth tantalate,SrBi2Ta2O9,SBT)、鋯鈦酸鉛(lead zirconate titanate,PbZrxTi1-xO3,PZT)或鈦酸鋇鍶(barium strontium titanate,BaxSr1-xTiO3,BST),但不以上述為限。蝕刻停止層407包含金屬層或金屬氮化物層,例如是氮化鈦(TiN)。犧牲閘極406則例如是多晶矽閘極,但也可以是由多晶矽層、非晶矽(amorphous Si)或者鍺層所組合的複合閘極。蓋層408則例如是一氮化矽層。側壁子410可為一複合膜層之結構,其可包含高溫氧化 矽層(high temperature oxide,HTO)、氮化矽、氧化矽或使用六氯二矽烷(hexachlorodisilane,Si2Cl6)形成的氮化矽(HCD-SiN)。輕摻雜汲極412以及源極/汲極414則以適當濃度的摻質加以形成。然後,於基底400上形成一接觸洞蝕刻停止層(contact etch stop layer,CESL)403與一內層介電層(inter-layer dielectric,ILD)409覆蓋在電晶體402上。 In an embodiment of the present invention, as shown in FIG. 7, the transistor 402 includes a dielectric layer 404, a high dielectric constant layer 405, an etch stop layer 407, a sacrificial gate 406, and a cap layer 408. A sidewall 410, a light doped drain (LDD) 412, and a source/drain 414. In a preferred embodiment of the present invention, the dielectric layer 404 is a germanium dioxide layer, and the high dielectric constant layer 405 has a dielectric constant of greater than about 4. It may be a rare earth metal oxide layer or a lanthanide metal oxide layer, for example. Hafnium oxide (HfO 2 ), hafnium silicon oxide (HfSiO 4 ), hafnium silicon oxynitride (HfSiON), aluminum oxide (aluminum oxide, Al 2 O 3 ), Lanthanum oxide (La 2 O 3 ), lanthanum aluminum oxide (LaAlO), tantalum oxide (Ta 2 O 5 ), zirconium oxide (ZrO 2 ), zirconium oxychloride (zirconium silicon oxide, ZrSiO 4 ), hafnium zirconium oxide (HfZrO), yttrium oxide (Yb 2 O 3 ), yttrium silicon oxide (YbSiO), zirconium aluminate (zirconium aluminate, ZrAlO), hafnium aluminate (HfAlO), aluminum nitride (AlN), titanium oxide (TiO 2 ), zirconium oxynitride (ZrON), hafnium oxynitride (hafnium oxynitride, HfON), zirconium silicon oxynitride (ZrSiON) Hafnium silicon oxynitride (hafnium silicon oxynitride, HfSiON), tantalum oxide bismuth strontium (strontium bismuth tantalate, SrBi 2 Ta 2 O 9, SBT), lead zirconate titanate (lead zirconate titanate, PbZr x Ti 1-x O 3, PZT) or barium strontium titanate (Ba x Sr 1-x TiO 3 , BST), but not limited to the above. The etch stop layer 407 includes a metal layer or a metal nitride layer, such as titanium nitride (TiN). The sacrificial gate 406 is, for example, a polysilicon gate, but may be a composite gate composed of a polysilicon layer, an amorphous Si or a germanium layer. The cap layer 408 is, for example, a tantalum nitride layer. The sidewall spacer 410 may be a composite film layer structure, which may include high temperature oxide (HTO), tantalum nitride, hafnium oxide or nitrogen formed using hexachlorodisilane (Si 2 Cl 6 ). Huayu (HCD-SiN). The lightly doped drain 412 and the source/drain 414 are formed with a suitable concentration of dopant. Then, a contact etch stop layer (CESL) 403 and an inter-layer dielectric (ILD) 409 are formed on the substrate 400 to cover the transistor 402.

如第8圖所示,接著進行一平坦化製程,例如一化學機械平坦化(chemical mechanical polish,CMP)製程或者一回蝕刻製程或兩者的組合,以依序移除部份的內層介電層409、部份的接觸洞蝕刻停止層403、部份的側壁子410,並完全移除蓋層408,直到暴露出犧牲閘極406之頂面。接著,進行一溼蝕刻製程及/或乾蝕刻製程以移除犧牲閘極406,此蝕刻步驟會停止在蝕刻停止層407,並在第一電晶體402中形成一溝渠(trench)416。 As shown in FIG. 8, a planarization process, such as a chemical mechanical polish (CMP) process or an etch process or a combination of the two, is performed to sequentially remove portions of the inner layer. The electrical layer 409, a portion of the contact hole etch stop layer 403, a portion of the sidewall spacer 410, and completely remove the cap layer 408 until the top surface of the sacrificial gate 406 is exposed. Next, a wet etch process and/or a dry etch process is performed to remove the sacrificial gate 406, the etch step stops at the etch stop layer 407, and a trench 416 is formed in the first transistor 402.

如第9圖所示,於基底400上全面形成一功函數金屬層418。功函數金屬層418可電晶體402的類型來作調整。若電晶體402為P型電晶體,則功函數金屬層418則例如是鎳(Ni)、鈀(Pd)、鉑(Pt)、鈹(Be)、銥(Ir)、碲(Te)、錸(Re)、釕(Ru)、銠(Rh)、鎢(W)、鉬(Mo);鎢、釕、鉬、鉭(Ta)、鈦(Ti)的氮化物;鎢、鉭、鈦的碳化物;或者氮鋁化鈦(TiAlN)、氮鋁化鉭(TaAlN)等。若電晶體402為N型電晶體,則功函數金屬層418則例如是鋁化鈦(TiAl)、鋁化鋯(ZrAl)、鋁化鎢(WAl)、鋁化鉭(TaAl)或鋁化鉿(HfAl)等,但並不以上述為限。而於本發明其他實施例中,在形成功函數金屬層418之前,亦可選 擇性地形成一底阻障層(圖未示),例如是一氮化鉭(TaN)層。 As shown in FIG. 9, a work function metal layer 418 is formed over the substrate 400. The work function metal layer 418 can be adjusted by the type of transistor 402. If the transistor 402 is a P-type transistor, the work function metal layer 418 is, for example, nickel (Ni), palladium (Pd), platinum (Pt), bismuth (Be), iridium (Ir), yttrium (Te), yttrium. (Re), ruthenium (Ru), rhenium (Rh), tungsten (W), molybdenum (Mo); tungsten, tantalum, molybdenum, tantalum (Ta), titanium (Ti) nitride; tungsten, tantalum, titanium carbonization Or titanium aluminide (TiAlN), tantalum aluminide (TaAlN), and the like. If the transistor 402 is an N-type transistor, the work function metal layer 418 is, for example, titanium aluminide (TiAl), zirconium aluminide (ZrAl), tungsten aluminide (WAl), tantalum aluminide (TaAl) or tantalum aluminide. (HfAl), etc., but not limited to the above. In other embodiments of the present invention, before the success function metal layer 418 is formed, it is also optional. A bottom barrier layer (not shown) is formed selectively, such as a tantalum nitride (TaN) layer.

如第10圖所示,在基底400上全面形成一選擇性的阻障層420以及一金屬層422。本發明的金屬層422即是以前述形成金屬層508的方式來形成(如第3圖至第6圖),故可得到一較佳品質的金屬層422。最後如第11圖所示,進行一平坦化製程以移除位於溝渠416外的金屬層422、(阻障層420)以及功函數金屬層418,使得功函數金屬層418、(阻障層420)以及金屬層共同形成了一金屬閘極424,而形成了本發明具有金屬閘極的電晶體結構。 As shown in FIG. 10, a selective barrier layer 420 and a metal layer 422 are integrally formed on the substrate 400. The metal layer 422 of the present invention is formed by forming the metal layer 508 as described above (as shown in FIGS. 3 to 6), so that a metal layer 422 of a better quality can be obtained. Finally, as shown in FIG. 11, a planarization process is performed to remove the metal layer 422, the barrier layer 420, and the work function metal layer 418 outside the trench 416, such that the work function metal layer 418, (the barrier layer 420) And the metal layers together form a metal gate 424 to form a transistor structure having a metal gate of the present invention.

綜上所述,本發明提供了一種把溝渠填滿金屬層的方法,以及利用此方法所形成的半導體結構。這種方法可應用在例如金屬閘極的製程上。本發明特點在於使用了三道的沈積製程,能分別克服習知金屬層填入溝渠時的問題,而得到一品質較佳的金屬層。 In summary, the present invention provides a method of filling a trench with a metal layer, and a semiconductor structure formed by the method. This method can be applied to processes such as metal gates. The invention is characterized in that a three-layer deposition process is used, which can overcome the problems of the conventional metal layer filling the trench, and obtain a metal layer of better quality.

以上所述僅為本發明之較佳實施例,凡依本發明申請專利範圍所做之均等變化與修飾,皆應屬本發明之涵蓋範圍。 The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should be within the scope of the present invention.

300‧‧‧沈積機台 300‧‧‧Sedimentation machine

302‧‧‧陰極 302‧‧‧ cathode

304‧‧‧陽極 304‧‧‧Anode

306‧‧‧偏壓供應單元 306‧‧‧ bias supply unit

308‧‧‧靶材 308‧‧‧ Target

310‧‧‧支撐柱 310‧‧‧Support column

312‧‧‧晶圓 312‧‧‧ wafer

314‧‧‧熱傳導氣體 314‧‧‧heat conducting gas

316‧‧‧放置平台 316‧‧‧Placement platform

318‧‧‧孔洞 318‧‧‧ hole

400‧‧‧基底 400‧‧‧Base

402‧‧‧電晶體 402‧‧‧Optoelectronics

403‧‧‧接觸洞蝕刻停止層 403‧‧‧Contact hole etch stop layer

404‧‧‧介質層 404‧‧‧ dielectric layer

405‧‧‧高介電常數層 405‧‧‧High dielectric constant layer

406‧‧‧犧牲閘極 406‧‧‧sacrificial gate

407‧‧‧蝕刻停止層 407‧‧‧etch stop layer

408‧‧‧蓋層 408‧‧‧ cover

409‧‧‧層內介電層 409‧‧‧Interlayer dielectric layer

410‧‧‧側壁子 410‧‧‧ Sidewall

412‧‧‧輕摻雜汲極 412‧‧‧Lightly doped bungee

414‧‧‧源極/汲極 414‧‧‧Source/Bungee

416‧‧‧溝渠 416‧‧‧ Ditch

418‧‧‧功函數金屬層 418‧‧‧Work function metal layer

420‧‧‧阻障層 420‧‧‧Barrier layer

422‧‧‧金屬層 422‧‧‧metal layer

424‧‧‧金屬閘極 424‧‧‧Metal gate

500‧‧‧基底 500‧‧‧Base

502‧‧‧介電層 502‧‧‧ dielectric layer

504‧‧‧溝渠 504‧‧‧ Ditch

506‧‧‧阻障層 506‧‧‧ barrier layer

508‧‧‧金屬層 508‧‧‧metal layer

第1圖與第2圖所示為本發明所使用沈積機台的結構示意圖。 Fig. 1 and Fig. 2 are schematic views showing the structure of a deposition machine used in the present invention.

第3圖至第6圖繪示了本發明一種把溝渠填滿金屬層的方法示意圖。 3 to 6 are schematic views showing a method of filling a trench with a metal layer according to the present invention.

第7圖至第11圖繪示了本發明一種製作金屬閘極的方法的步驟 示意圖。 7 to 11 illustrate steps of a method of fabricating a metal gate of the present invention. schematic diagram.

Claims (20)

一種以金屬層填滿溝渠的方法,包含:提供一沈積機台;提供一基底以及位於該基底上之一介電層,該介電層包含一溝渠;進行一第一沈積步驟使得該溝渠填入一金屬層,其中該第一沈積步驟時,該基底的溫度逐漸上升至一預定溫度;以及當達到該預定溫度時,進行一第二沈積步驟,使得該金屬層填滿該溝渠。 A method of filling a trench with a metal layer, comprising: providing a deposition machine; providing a substrate and a dielectric layer on the substrate, the dielectric layer comprising a trench; performing a first deposition step to fill the trench And entering a metal layer, wherein the temperature of the substrate gradually rises to a predetermined temperature in the first deposition step; and when the predetermined temperature is reached, performing a second deposition step, so that the metal layer fills the trench. 如申請專利範圍第1項所述之以金屬層填滿溝渠的方法,其中在該第一沈積步驟中,該基底的溫度是由室溫逐漸上升至該預定溫度。 A method of filling a trench with a metal layer as described in claim 1, wherein in the first deposition step, the temperature of the substrate is gradually increased from room temperature to the predetermined temperature. 如申請專利範圍第1項所述之以金屬層填滿溝渠的方法,其中該第二沈積步驟是維持在該預定溫度下進行。 A method of filling a trench with a metal layer as described in claim 1 wherein the second deposition step is performed at the predetermined temperature. 如申請專利範圍第1項所述之以金屬層填滿溝渠的方法,其中該機台包含一加熱板(heater)。 A method of filling a trench with a metal layer as described in claim 1 wherein the machine comprises a heater. 如申請專利範圍第4項所述之以金屬層填滿溝渠的方法,其中進行該第一沈積步驟時,該加熱板具有該預定溫度,且該基底以及該加熱板之間具有一間隙。 A method of filling a trench with a metal layer as described in claim 4, wherein when the first deposition step is performed, the heating plate has the predetermined temperature, and the substrate and the heating plate have a gap therebetween. 如申請專利範圍第4項所述之以金屬層填滿溝渠的方法,其中進行該第一沈積步驟時,該加熱板不會提供一熱傳導氣體。 A method of filling a trench with a metal layer as described in claim 4, wherein the heating plate does not provide a heat conducting gas when the first deposition step is performed. 如申請專利範圍第4項所述之以金屬層填滿溝渠的方法,其中進行該第二沈積步驟時,該加熱板具有該預定溫度且會提供一熱傳導氣體。 A method of filling a trench with a metal layer as described in claim 4, wherein when the second deposition step is performed, the heating plate has the predetermined temperature and provides a heat transfer gas. 如申請專利範圍第1項所述之以金屬層填滿溝渠的方法,其中該第一沈積步驟的沈積功率實質上大於該第二沈積步驟的沈積功率。 A method of filling a trench with a metal layer as described in claim 1, wherein the deposition power of the first deposition step is substantially greater than the deposition power of the second deposition step. 如申請專利範圍第1項所述之以金屬層填滿溝渠的方法,其中該第一沈積步驟的沈積功率實質上等於該第二沈積步驟的沈積功率。 A method of filling a trench with a metal layer as described in claim 1, wherein the deposition power of the first deposition step is substantially equal to the deposition power of the second deposition step. 如申請專利範圍第1項所述之以金屬層填滿溝渠的方法,還包含:在該第二沈積步驟後,進行一第三沈積步驟,以增加該金屬層的厚度,其中該第三沈積步驟的沈積功率實質上大於該第二沈積步驟的沈積功率。 The method of filling a trench with a metal layer as described in claim 1, further comprising: after the second deposition step, performing a third deposition step to increase a thickness of the metal layer, wherein the third deposition The deposition power of the step is substantially greater than the deposition power of the second deposition step. 如申請專利範圍第10項所述之以金屬層填滿溝渠的方法,其中該沈積機台包含一加熱板,且在該第三沈積步驟時,該加熱板具有該預定溫度且會提供一熱傳導氣體。 A method of filling a trench with a metal layer as described in claim 10, wherein the deposition machine comprises a heating plate, and in the third deposition step, the heating plate has the predetermined temperature and provides a heat conduction gas. 如申請專利範圍第1項所述之以金屬層填滿溝渠的方法,其中該預定溫度實質上介於攝氏380度至攝氏420度之間。 A method of filling a trench with a metal layer as described in claim 1 wherein the predetermined temperature is substantially between 380 degrees Celsius and 420 degrees Celsius. 如申請專利範圍第1項所述之以金屬層填滿溝渠的方法,其中該預定溫度實質上為攝氏400度。 A method of filling a trench with a metal layer as described in claim 1 wherein the predetermined temperature is substantially 400 degrees Celsius. 如申請專利範圍第1項所述之以金屬層填滿溝渠的方法,其中在進行該第一沈積製程之前,還包含在該溝渠上形成至少一阻障層,該阻障層包含鈦/氮化鈦(Ti/TiN)或鉭/氮化鉭(Ta/TaN)。 The method of filling a trench with a metal layer as described in claim 1, wherein before the performing the first deposition process, forming at least one barrier layer on the trench, the barrier layer comprising titanium/nitrogen Titanium (Ti/TiN) or tantalum/tantalum nitride (Ta/TaN). 一種半導體結構,包含:一基底;一介電層設置於該基底上,該介電層中具有一溝渠;以及一鋁層填滿該溝渠,其中該鋁層具有一複數折射率實質上大於1.5。 A semiconductor structure comprising: a substrate; a dielectric layer disposed on the substrate, the dielectric layer having a trench; and an aluminum layer filling the trench, wherein the aluminum layer has a complex refractive index substantially greater than 1.5 . 如申請專利範圍第15項所述之半導體結構,其中還包含至少一阻障層設置在該介電層以及該鋁層之間。 The semiconductor structure of claim 15 further comprising at least one barrier layer disposed between the dielectric layer and the aluminum layer. 如申請專利範圍第16項所述之半導體結構,其中該阻障層包含鈦/氮化鈦或鉭/氮化鉭。 The semiconductor structure of claim 16, wherein the barrier layer comprises titanium/titanium nitride or tantalum/niobium nitride. 如申請專利範圍第15項所述之半導體結構,其中該半導體結構 為一電晶體,且該鋁層是作為該電晶體之閘極的一部分。 The semiconductor structure of claim 15, wherein the semiconductor structure It is a transistor and the aluminum layer is part of the gate of the transistor. 如申請專利範圍第18項所述之半導體結構,其中該電晶體還包含一閘極介電層設置於該鋁層以及該基底之間,以及一源極/汲極設置在該鋁層兩側之該基底中。 The semiconductor structure of claim 18, wherein the transistor further comprises a gate dielectric layer disposed between the aluminum layer and the substrate, and a source/drain electrode disposed on both sides of the aluminum layer In the substrate. 如申請專利範圍第15項所述之半導體結構,其中該鋁層是以申請專利範圍第1項所述之以金屬層填滿溝渠的方法來形成。 The semiconductor structure of claim 15, wherein the aluminum layer is formed by filling a trench with a metal layer as described in claim 1 of the patent application.
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TW409388B (en) * 1998-12-30 2000-10-21 United Microelectronics Corp Manufacture method of metal plug
TW436988B (en) * 1999-10-01 2001-05-28 Taiwan Semiconductor Mfg Planarization method of copper gap filling process in integrated circuit
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