TWI633315B - Automated testing device - Google Patents

Abstract

The invention provides an automated test device comprising a top press and a control unit. The top pressure fixture comprises a plurality of candidate test carriers, each candidate test carrier has a lower ballast plate and an upper top carrier plate, and the lower ballast plate and the upper top carrier plate have a corresponding set of thimbles. The control unit can select a candidate test carrier to become the actual test carrier, and can control one of the ballast plate and the upper top carrier under the actual test carrier, and the top pressure actuating system is composed of the lower ballast plate and The upper carrier board clamps the memory module to be tested, so that the thimble set on the actual test carrier board correspondingly contacts the metal terminal on the memory module to be tested. The position of the thimble set or the number of thimbles of the actual test carrier is different from the position of the thimble set or the number of thimbles on the other candidate test carriers.

Description

Automated testing device

This case relates to a test device, and in particular to an automated test device that can reduce the cost of replacing test molds.

SPD (Serial Presence Detect) is a set of information about the configuration of the memory module, such as the number of P-Banks, voltage, number of row / column addresses, bit width, various main operation timings (such as CL, tRCD, tRP, tRAS Etc.), they are stored in an EEPROM (Electrically Erasable Programmable Read Only Memory) with a capacity of 256 bytes. In other words, the information related to the memory module can be burned in this EEPROM. The advantage of this EEPROM is that when the user boots, the BIOS can directly read the SPD to obtain the relevant data of the memory, and the detection by the BIOS is omitted. Measure the operation of the memory module.

The current SPD burning operation method can be divided into manual operation and automated operation. The former can use SMART IO to test single-chip memory module products, but when the number of memory module products to be tested is too large At that time, manual work will be replaced by automated SPD PCB tester.

On the market, the operation mode of the continuous board automatic burning machine can only be tested for a single product, but because DRAM products have different product specifications (for example: DDR3 / DDR4, LO-DIMM / SO-DIMM ...), There will be different positions in the design of the golden finger. If you switch between different test products, such as changing from DDR3 LO-DIMM to DDR3 SO-DIMM, you need to replace the entire set of test thimble molds (including upper mold, lower mold, Thimble fixtures ... etc.) And repositioning before testing. In this way, in addition to the lengthy operation time of switching test thimble molds, the test manufacturer must prepare four different sets of test thimble molds for testing to facilitate its coverage of the above four test products. For test manufacturers The cost of money and time is extremely expensive.

Therefore, how to improve the above problems has become an extremely important issue.

Based on the above purpose, the present invention provides an automated testing device, which is suitable for testing a memory module to be tested. The automated testing device includes a top jig and a control unit. The top jig can include a plurality of candidate test carrier boards, each candidate test carrier board has a lower ballast board and an upper top carrier board, and each candidate test carrier board has a lower ballast board and an upper top carrier board It has a corresponding thimble set. The control unit is electrically connected to the top pressing fixture. The control unit can select one of the candidate test carrier boards to become an actual test carrier board, and can control the actual test carrier board under the ballast board and the upper top carrier board. A top pressing action, the top pressing action is to clamp the memory module to be tested by the lower pressure carrier board and the upper top carrier board, so that the thimble set on the actual test carrier board correspondingly contacts the memory module to be tested Metal terminals on the group. Wherein, the position of the thimble set or the number of thimble of this actual test carrier is different from the position or the number of thimble set of other candidate test carrier.

Preferably, the memory module to be tested is located in a memory connecting board.

Preferably, the automated testing device of the present invention further includes a positioning jig, which is used to move the memory connecting board to move the memory module to be tested to the ballast board under the actual test carrier board And between the top carrier board.

Preferably, the ballast board under the actual test carrier board includes at least one first positioning post, and the at least one first positioning post is used to penetrate at least one first positioning hole on the positioning jig to position the memory module .

Preferably, the top carrier board on the actual test carrier board includes at least one second positioning post, at least one second positioning post is used to penetrate at least one second positioning hole on the memory module to be tested Test memory module.

Preferably, the ballast board under the actual test carrier board includes at least one first positioning post, and the at least one first positioning post is used to penetrate at least one second positioning hole on the memory module to be tested Test memory module.

Preferably, the top carrier board on the actual test carrier board includes at least one second positioning post, and the at least one second positioning post is used to penetrate at least one first positioning hole on the positioning jig to position the memory to be tested Module.

Preferably, the control unit is electrically connected to the positioning jig, and the control unit controls the movement of the positioning jig.

Preferably, the positions of the thimble set of the actual test carrier on the lower pressure carrier and the upper carrier are corresponding to the metal terminals of the DDR3 LO-DIMM.

Preferably, the position of the thimble set of the actual test carrier on the lower pressure carrier and the upper carrier is corresponding to the metal terminal of the DDR3 SO-DIMM.

Preferably, the position of the thimble set of the actual test carrier on the lower pressure carrier and the upper carrier is corresponding to the metal terminal of the DDR4 LO-DIMM.

Preferably, the position of the thimble set of the actual test carrier on the lower pressure carrier and the upper carrier is corresponding to the metal terminal of the DDR4 SO-DIMM.

Some typical embodiments embodying the characteristics and advantages of this case will be described in detail in the following paragraphs. It should be understood that this case can have various changes in different forms, and they all do not deviate from the scope of this case, and the descriptions and illustrations therein are essentially used for explanation, not for limiting this case.

Please refer to FIG. 1, which is a block diagram of an automated testing device according to a first preferred embodiment of the present invention. As shown in the figure, an automated testing device 100 is suitable for testing a memory module 41 to be tested. The automated testing device 100 may include a top jig 10 and a control unit 20. The control unit 20 may include a microcontroller or a processor.

The top pressing jig 10 may include a plurality of candidate test carrier boards 11, and each group of candidate test carrier boards 11 has a pair of a lower pressure carrier board 111 and an upper top carrier board 112 respectively, wherein each group of candidate test carrier boards 11 The lower ballast board 111 and the upper top board 112 have a corresponding thimble set 113.

The control unit 20 can be electrically connected to the pressing jig 10 for control. It is worth mentioning that the user can select one of the complex array candidate test carrier boards 11 through the control unit 20 to make it an actual test carrier board 12 for testing. After the actual test carrier 12 is determined, the control unit 20 will further control the lower test carrier 111 and the upper carrier 112 of the actual test carrier 12 to perform a pressing operation. The top pressing operation will be carried out by the lower pressing board 111 and the upper top board 112 to move closer to each other to clamp the memory module 41 to be tested, so that the actual test carrier 12 The pin set 113 on the ballast board 111 and the top loading board 112 can correspondingly contact the metal terminals (commonly known as gold fingers) of the memory module 41 to be tested. In this way, the user can use the control unit 20 or other electronic device to electrically connect to the thimble set 113, and then receive the signal from the memory module 41 under test from the thimble set 113, or send the signal to the memory under test Module 41.

It is worth mentioning that the actual position or number of the ejector pins 113 of the test carrier board 12 may be different from the position or the number of ejector pins 113 on other candidate test carrier boards 11.

In a preferred embodiment, the positions of the thimble set 113 of the actual test carrier on the lower pressure carrier 111 and the upper carrier 112 can respectively contact the metal terminals on both sides of the DDR3 LO-DIMM circuit board That is, the thimble set 113 includes a total of 240 thimble pins, and the lower pressing plate 111 and the upper top plate 112 each have 120 thimble pins.

In a preferred embodiment, the positions of the thimble set 113 of the actual test carrier on the lower pressure carrier 111 and the upper carrier 112 can respectively contact the metal terminals on both sides of the DDR3 SO-DIMM circuit board That is, the thimble group 113 includes a total of 204 thimble pins, and the lower pressing plate 111 and the upper top plate 112 each have 102 thimble pins.

In a preferred embodiment, the positions of the thimble set 113 of the actual test carrier on the lower pressure carrier 111 and the upper carrier 112 can respectively contact the metal terminals on both sides of the DDR4 LO-DIMM circuit board That is, there are a total of 288 thimbles in this thimble group 113, and the lower pressure carrier 111 and the upper top carrier 112 each have 144 thimbles.

In a preferred embodiment, the positions of the thimble set 113 of the actual test carrier on the lower pressure carrier 111 and the upper carrier 112 can respectively contact the metal terminals on both sides of the circuit board of the DDR4 SO-DIMM That is, the thimble set 113 includes a total of 260 thimble pins, and the lower pressing plate 111 and the upper top plate 112 each have 130 thimble pins.

In a preferred embodiment, the pressing jig 10 on the automated testing device 100 of the present invention may simultaneously include four sets of candidate test carrier boards 11, and the four sets of candidate test carrier boards 11 may include different sets of ejector pins 113 respectively. For example, the first group of candidate test carrier boards 11 may be a thimble group corresponding to DDR3 LO-DIMM, the second group of candidate test carrier boards 11 may be a thimble group corresponding to DDR3 SO-DIMM, and the third group of candidate test carrier boards 11 may be Corresponding to the thimble set of DDR4 LO-DIMM, the fourth set of candidate test carrier boards 11 may be the thimble set corresponding to DDR4 SO-DIMM, as shown in FIG. 2, which is the top test board 112 of the candidate test carrier boards 11 schematic diagram. The user can select the corresponding candidate test carrier board 11 according to the memory module 41 to be tested. It is worth mentioning that when testing multiple sets of memory modules 41 with different specifications, the automated test device of the present invention can save the cost of preparing multiple sets of test modules and replacing test molds, thereby effectively solving the conventional techniques Shortcomings.

Please refer to FIG. 3 and FIG. 4, which are a block diagram and a schematic diagram of an automated testing device according to a second preferred embodiment of the present invention. In this embodiment, the automatic testing device 100 can be used to test any one of the memory modules 41 in a memory connecting board 40, which can include a top pressing jig 10, a control unit 20 and a positioning jig 30, wherein the top pressing jig 10 is similar to the top pressing jig 10 of the above embodiment, the only difference is that each lower ballast board 111 and upper top board 112 in this embodiment have at least one first The technical features of the positioning post 114 and at least one second positioning post 115 are as follows.

The positioning jig 30 can include a circuit board tray with an opening and a mechanical support for moving the circuit board tray. The circuit board tray can be used to place a memory connecting plate 40, wherein the memory connecting plate 40 is a plurality of waiting The test memory module 41 constitutes a connecting plate, and the ejector pins 113 of all the memory modules 41 to be tested in the memory connecting plate 40 can be exposed on the upper and lower sides of the opening. The control unit 20 can be electrically connected to the pressing jig 10 and the positioning jig 30. After the control unit 20 selects the actual test carrier board 12, the control unit 20 can further control the mechanical support to move the circuit board tray. The memory modules 41 to be tested in the memory link board 40 are moved one by one to between the ballast board 111 under the actual test carrier board 12 and the upper top board 112. The circuit board tray and the mechanical bracket in the positioning jig 30 are well known to those with ordinary knowledge in the related art, so they will not be repeated here.

In order to avoid moving the circuit board tray continuously, the positional offset between the pin group 113 of the actual test carrier 12 and the metal terminal of the memory module 41 to be tested is gradually increased, which leads to the inability of the two Complete contact. The present invention also includes a preferred positioning method. The following is an example of a memory connecting plate 40 having five memory modules 41 to be tested.

Please refer to FIG. 5, which is a schematic diagram of an automated testing device according to a third preferred embodiment of the present invention. Please also refer to Figure 4. In this embodiment, the positioning jig 30 may be provided with at least one first positioning hole 31 relative to the five groups of memory modules 41 to be tested, and each group of memory modules to be tested 41 has At least one second positioning hole 411. When the control unit 20 controls the positioning jig 30 to move, a memory module 41 to be tested will move between the ballast board 111 under the actual test board 12 and the top board 112 at this time.

When the top pressing operation is started, at least one first positioning post 114 on the lower ballast plate 111 will pass through the first positioning hole 31 on the positioning jig 30, wherein the first positioning hole 31 is opposite to The memory module 41 to be tested is tested, and at least one second positioning post 115 on the top carrier 112 will pass through the second positioning hole 411 on the memory module 41 to be tested . Through this positioning method, the memory module 41 to be tested will be positioned between the ballast board 111 under the actual test carrier 12 and the top carrier board 112, and the metal of the memory module 41 to be tested The terminal accurately contacts the thimble set 113 on the actual test carrier board 12.

Preferably, the shape of the first positioning post 114 and the second positioning post 115 may be a conical column, and the appearance of the first positioning hole 31 and the second positioning hole 411 may be a circle. The tip of the conical column penetrates the circular positioning hole to effectively achieve the positioning effect.

It can be understood that the above embodiment is only an example, and is not limited to this. The first positioning post 114 on the lower ballast board 111 can also penetrate the second positioning hole on the memory module 41 to be tested 411. At the same time, the second positioning post 115 of the upper carrier board 112 can penetrate the first positioning hole 31 of the positioning jig 30, thereby accurately positioning the memory module 41 to be tested and the actual test carrier board 12 The lower ballast board 111 and the upper top board 112 make the metal terminals of the memory module 41 to be tested contact the thimble set 113 on the actual test board 12.

This case may be modified by any person familiar with the technology as a craftsman, but none of them may be as protected as the scope of the patent application.

100‧‧‧Automated testing device
10‧‧‧Top Pressure Fixture
11‧‧‧ Candidate test carrier
111‧‧‧Lower ballast board
112‧‧‧Top loading board
113‧‧‧ Thimble set
114‧‧‧First positioning post
115‧‧‧Second positioning post
12‧‧‧ Actual test carrier board
20‧‧‧Control unit
21‧‧‧ Pressing action
30‧‧‧Positioning fixture
31‧‧‧First positioning hole
40‧‧‧Memory board
41‧‧‧ memory module under test
411‧‧‧Second positioning hole

Figure 1 is a block diagram of an automated testing device according to a first preferred embodiment of the present invention.

FIG. 2 is a schematic diagram of a candidate test carrier board according to the second preferred embodiment of the present invention.

Figure 3 is a block diagram of an automated testing device according to a second preferred embodiment of the present invention.

FIG. 4 is a schematic diagram of an automated testing device according to a second preferred embodiment of the present invention.

FIG. 5 is a schematic diagram of an automated testing device according to a third preferred embodiment of the present invention.

Claims (12)

An automated testing device, suitable for testing a memory module to be tested, includes: a top jig, including a plurality of candidate test carrier boards, each of the plurality of candidate test carrier boards having a ballast board and a top A top carrier board, and each of the plurality of candidate test carrier boards has a corresponding thimble set on the lower pressure carrier board and the upper top carrier board; and a control unit electrically connected to the top pressure jig, The control unit selects one of the plurality of candidate test carrier boards to become an actual test carrier board, and controls the pressing operation of one of the lower pressure carrier board and the upper top carrier board of the actual test carrier board, wherein The top pressing action is to clamp the memory module to be tested by the lower pressure carrier board and the upper top carrier board, so that the thimble set on the actual test carrier board correspondingly contacts the memory module to be tested The metal terminal; wherein the position or number of the thimble set of the actual test carrier is different from the position or number of the thimble set on the other candidate test carrier. The automatic testing device as described in item 1 of the patent application scope, wherein the memory module to be tested is located in a memory connecting board. The automatic testing device as described in item 2 of the patent application scope further includes a positioning jig for carrying the memory connecting board and moving the memory module to be tested to the actual test load Between the lower ballast board and the upper top board. The automatic testing device as described in item 3 of the patent application scope, wherein the lower ballast plate of the actual test carrier plate includes at least one first positioning post, and the at least one first positioning post is used to penetrate the positioning treatment At least one first positioning hole on the tool is used to position the memory module to be tested. The automated testing device as described in item 3 of the patent application scope, wherein the top carrier board of the actual test carrier board includes at least one second positioning post, and the at least one second positioning post is used to penetrate the to-be-tested At least one second positioning hole on the memory module to position the memory module to be tested. The automatic test device as described in item 3 of the patent application scope, wherein the lower ballast plate of the actual test carrier plate includes at least one first positioning post, and the at least one first positioning post is used to penetrate the to-be-tested At least one second positioning hole on the memory module to position the memory module to be tested. The automatic test device as described in item 3 of the patent application scope, wherein the upper top carrier board of the actual test carrier board includes at least one second positioning post, and the at least one second positioning post is used to penetrate the positioning treatment At least one first positioning hole on the tool is used to position the memory module to be tested. The automatic test device as described in item 3 of the patent application scope, wherein the control unit is electrically connected to the positioning jig, and the movement of the positioning jig is controlled by the control unit. The automatic test device as described in item 1 of the patent application scope, wherein the position of the ejector pin group of the actual test carrier on the lower pressure carrier and the upper carrier is corresponding to the metal terminal of the DDR3 LO-DIMM . The automatic test device as described in item 1 of the patent application scope, wherein the position of the thimble set of the actual test carrier on the lower pressure carrier and the upper carrier is corresponding to the metal terminal of the DDR3 SO-DIMM . The automatic test device as described in item 1 of the patent application scope, wherein the position of the thimble set of the actual test carrier on the lower pressure carrier and the upper upper carrier corresponds to the metal terminal of the DDR4 LO-DIMM . The automatic test device as described in item 1 of the patent application scope, wherein the position of the thimble set of the actual test carrier on the lower pressure carrier and the upper upper carrier corresponds to the metal terminal of the DDR4 SO-DIMM .