TWI615994B - Diode for a printable composition - Google Patents

Abstract

An exemplary printable composition of a diode liquid or colloidal suspension comprises a plurality of diodes, a first solvent, and/or a viscosity modifier. An exemplary diode includes: a luminescent or light absorbing region having a diameter between about 20 microns and 30 microns and a height between 2.5 microns and 7 microns; a plurality of first terminals spaced apart and at a peripheral portion is coupled to the light emitting region, a height of each of the plurality of first terminals is between about 0.5 micrometers and 2 micrometers; and a second terminal is disposed on the first surface The center is coupled to the mesa region of the light emitting region, and the height of the second terminal is between 1 micrometer and 8 micrometers.

Description

Diode used in printable compositions

[Copyright Notice and License]

A portion of this patent document contains material that is subject to copyright protection. The copyright owner has no objection to the facsimile reproduction of the patent document or the disclosure of the patent in the Patent and Trademark Office patent file or record, but retains all copyrights in all other cases. The following statement shall apply to this document, the materials and content as described below, and its schema: Copyright © 2010-2011, NthDegree Technologies Worldwide.

[Cross application]

This application is a conversion of US Provisional Patent Application No. 61/379,225, entitled "Printable Composition of a Liquid or Gel Suspension of Diodes", filed on September 1, 2010, by the inventor of the s. The patent application is hereby incorporated by reference in its entirety in its entirety in its entirety in its entirety in its entirety in its entirety in its entirety in its entirety in its entirety in its entirety herein right.

This application is a conversion of US Provisional Patent Application No. 61/379,284, entitled "Light Emitting, Photovoltaic and Other Electronic Apparatus", filed on September 1, 2010, by the inventor of the s. This patent application is hereby incorporated by reference in its entirety in its entirety in its entirety in its entirety in its entirety in its entirety in its entirety in the the the the the the the the

U.S. Provisional Patent Application Serial No. 61/379,830, entitled "Printable Composition of a Liquid or Gel Suspension of Diodes and Method of Making Same", filed on September 3, 2010 by the inventor of the s. The present invention is hereby incorporated by reference in its entirety in its entirety in its entirety in its entirety in its entirety in its entirety in its entirety in its entirety in its entirety herein in The subject matter claims priority.

This application is a conversion of US Provisional Patent Application No. 61/379,820, entitled "Light Emitting, Photovoltaic and Other Electronic Apparatus", filed on September 3, 2010 by the inventor of the s. This patent application is hereby incorporated by reference in its entirety in its entirety in its entirety in its entirety in its entirety in its entirety in its entirety in the the the the the the the the

This application is a continuation-in-part of U.S. Patent Application Serial No. 11/756,616, filed on May 31, 2007, which is hereby incorporated by and assigned to the entire entire entire entire entire disclosure This patent application is hereby incorporated by reference in its entirety in its entirety in its entirety in its entirety in its entirety in its entirety in its entirety in its entirety in the the the the the the the the .

This application was filed on November 22, 2009 by the inventor of William Johnstone Ray and entitled "Method of Manufacturing U.S. Patent Application Serial No. 12/601,268, the entire disclosure of which is incorporated herein by reference in its entirety, the entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire all U.S. Patent Application Serial No. 11/756,616, entitled "Method of Manufacturing Addressable and Static Electronic Displays," filed on May 31, 2007, and which claims priority, and is the inventor of William Johnstone Ray et al. The international application PCT/US2008/65237, entitled "Method of Manufacturing Addressable and Static Electronic Displays, Power Generating and Other Electronic Apparatus", filed on May 30, 2008, follows the US National Phase III application of 35 USC Section 371 and Claiming priority, the international application PCT/US2008/65237 claims priority to U.S. Patent Application Serial No. 11/756,616, filed on May 31, 2007, which is assigned to The content is incorporated herein by reference as if it were set forth herein The text of the same general full force and effect and the priority claimed for all commonly disclosed the subject matter.

This application is also a part of the continuation application of U.S. Patent Application Serial No. 13/149,681, filed on Jan. Priority, U.S. Patent Application Serial No. 13/149,681, filed on May 31, 2007 by the inventor of William Johnstone Ray, and issued to the United States on July 5, 2011. U.S. Patent Application Serial No. 11/756,619, entitled "Addressable or Static Light Emitting or Electronic Apparatus", which claims the priority of the present application, which is assigned to the present application. The entire content of the disclosure is hereby incorporated by reference in its entirety in its entirety in its entirety in its entirety in its entirety herein This application is part of a continuation application of U.S. Patent Application Serial No. 12/601,271, entitled "Addressable or Static Light Emitting, Power Generating or Other Electronic Apparatus", filed on November 22, 2009 by the inventor of the s. And U.S. Patent Application Serial No. 12/601,271, filed on May 31, 2007, entitled "Addressable or Static Light Emitting or Electronic Apparatus", filed on May 31, 2007. /756, Part 619, which continues the application and claims its priority, and is an international application for the "Addressable or Static Light Emitting, Power Generating or Other Electronic Apparatus" filed by the inventor of William Johnstone Ray on May 30, 2008. PCT/US2008/65230, in accordance with the US National Application No. 371 of the 35 USC, Section 371, and claims its priority, the International Patent Application No. PCT/US2008/65230, filed on May 31, 2007 Priority, these applications are co-assigned with this application, and the entire contents of which are incorporated herein by reference. Having completely the same as if set forth in their entirety herein effect of ships and filed for all commonly disclosed subject matter may.

The present application is also related to the following patent applications which are hereby incorporated by reference in its entirety herein in its entirety in the the the the the the the the the the the the The same full effect and priority is claimed for all commonly disclosed subject matter: (1) The United States, entitled "Printable Composition of a Liquid or Gel Suspension of Diodes", filed on August 31, 2011 by Mark D. Lowenthal et al. Patent Application No. ________; (2) US Patent Application No. ________, entitled "Light Emitting, Power Generating or Other Electronic Apparatus", filed on August 31, 2011 by Mark D. Lowenthal et al. No. (3) US Patent Application No. ________, entitled "Method of Manufacturing a Printable Composition of a Liquid or Gel Suspension of Diodes", filed on August 31, 2011 by the inventor, et al. (4) The United States, such as Mark D. Lowenthal, applied for the "Method of Manufacturing a Light Emitting, Power Generating or Other Electronic Apparatus" on August 31, 2011. Patent Application No. ________; (5) US Patent Application No. ________, entitled "Diode For a Printable Composition", filed on August 31, 2011 by Mark D. Lowenthal et al; 6) U.S. Patent Application Serial No. ________, entitled "Printable Composition of a Liquid or Gel Suspension of Two-Terminal Integrated Circuits and Apparatus", filed on August 31, 2011.

The present invention relates generally to luminescence and optoelectronic technology, and more particularly to luminescent or photodiode or other two-terminal integrated circuits suspended in a liquid or colloid and capable of being printed, and for the manufacture of luminescent, optoelectronic or other diodes or A method in which a two-terminal integrated circuit is suspended in a composition in a liquid or a gel.

Lighting devices with light-emitting diodes ("LEDs") typically require the use of integrated circuit processing steps to form LEDs on a semiconductor wafer. The resulting LED is substantially planar and relatively large, on the order of 200 microns or more. Each such LED is a two-terminal device, typically having two metal ends on the same side of the LED to provide an Ohmic contact for the p-type and n-type portions of the LED. The LED wafer is then typically divided into individual LEDs via a mechanical process such as sawing. Individual LEDs are then placed in the reflective housing and the wires are individually attached to each of the two metal ends of the LED. This process is time consuming, labor intensive, and expensive, making LED-based lighting devices generally too expensive for most consumer applications.

Likewise, energy generating devices, such as photovoltaic panels, also typically require the use of integrated circuit processing steps to form photodiodes on semiconductor wafers or other substrates. The resulting wafer or other substrate is then packaged and assembled to form a photovoltaic panel. This process is also time consuming, labor intensive and expensive, making optoelectronic devices too expensive to use widely without third party funding or without other government incentives.

Various techniques have been employed to attempt to form novel diodes or other semiconductor devices for illuminating or energy generating purposes. For example, it has been proposed to print quantum dots functionalized or capped with organic molecules so as to be miscible in organic resins and solvents to form a pattern, followed by second light excitation in the patterns Lights up (pump). Various methods of forming devices have also been performed using semiconductor nanoparticles, such as particles in the range of from about 1.0 nm to about 100 nm (tenths of micrometers). Another method has utilized a large amount of tantalum powder dispersed in a solvent-adhesive carrier, wherein the resulting tantalum powder colloidal suspension is used to form the active layer in the printed transistor. Another different approach has used an extremely flat AlInGaP LED structure formed on a GaAs wafer, where each LED has a detached photoresist anchor to each of two adjacent LEDs on the wafer, and then each The LEDs form the resulting device.

Other approaches use a "lock and key" fluid self-assembly in which the trapezoidal diode is placed in a solvent and then poured into a match that is used to capture and hold the trapezoidal diode in place. On the substrate of the trapezoidal hole. However, the trapezoidal diode in the solvent is not suspended and dispersed in the solvent. On the contrary, the trapezoidal diode rapidly settles into mutually adhered diode blocks, which cannot be suspended or dispersed in the solvent, and requires active sonication or agitation before use. Such a trapezoidal diode in a solvent cannot be used as a diode-based ink capable of being stored, packaged, or used as an ink, and is further unsuitable for use in a printing process.

None of these methods utilize liquids or colloids that are truly dispersed and suspended in a liquid or colloidal medium, such as a two-terminal integrated circuit or other semiconductor device that forms an ink, wherein the two-terminal integrated circuit is suspended into particles to complete the semiconductor device. And it can function, and the liquid or colloid containing the two-terminal integrated circuit or other semiconductor device can form a device or system in a non-inert atmospheric air environment using a printing process.

For LED-based devices and optoelectronic devices, these are based on The recent developments in polar technology are still too complex and expensive to achieve commercial viability. Therefore, there is still a need for an illuminating and/or optoelectronic device that is designed to be less costly in terms of incorporated components and ease of manufacture. There is still a need to fabricate such illuminating or optoelectronic devices using less costly and more robust processes, thereby producing LED-based lighting devices and photovoltaic panels that are widely available and acceptable to consumers and businesses. Thus, a liquid or colloidal suspension of a diode or other two-terminal integrated circuit capable of being printed to form a completed LED-based device and optoelectronic device, forming such LED-based devices and optoelectronic devices The printing method and the resulting printed LED-based devices and optoelectronic devices still have various needs.

Illustrative embodiments provide a "diode ink," a liquid or colloidal suspension and dispersion that can be printed, for example, via a diode or other two-end integrated circuit, such as screen printing or fast-drying printing. As described in more detail below, the diode itself is a fully formed semiconductor device prior to inclusion in the diode ink composition that can function to illuminate (when embodied as an LED) or to be exposed to light upon energization Power is supplied when the light source is used (when embodied as a photodiode). The exemplary method also includes a method of making a diode ink, as discussed in more detail below, which disperses and suspends a plurality of diodes in a solvent and a viscous resin or polymer mixture, and prints the diode Ink to manufacture LED-based devices and optoelectronic devices. Exemplary devices and systems formed by printing such a diode ink are also disclosed.

Although the description focuses on the diode as a type of two-terminal integrated circuit, those skilled in the art should understand that it can be equivalently replaced with other Semiconductor devices of the type are formed to be more broadly referred to as "semiconductor device inks" and all such variations are considered equivalent and are within the scope of the invention. Therefore, any reference to "diode" in this document should be understood to mean and include any two-terminal integrated circuit of any kind, such as resistors, inductors, capacitors, RFID circuits, sensors, piezoelectric devices. Etc., and any other integrated circuit that can be operated with two terminals or electrodes.

An exemplary embodiment provides a composition comprising: a plurality of diodes; a first solvent; and a viscosity modifier.

In an exemplary embodiment, the first solvent comprises at least one solvent selected from the group consisting of: water; alcohols such as methanol, ethanol, n-propanol (including 1-propanol, 2-propanol (isopropanol) ), 1-methoxy-2-propanol), butanol (including 1-butanol, 2-butanol (isobutanol)), pentanol (including 1-pentanol, 2-pentanol, 3- Pentanol), octanol, n-octanol (including 1-octanol, 2-octanol, 3-octanol), tetrahydrofurfuryl alcohol, cyclohexanol, rosin alcohol; ether, such as methyl ethyl ether, diethyl ether, Ethyl propyl ether and polyether; esters such as ethyl acetate, dimethyl adipate, propylene glycol monomethyl ether acetate, dimethyl glutarate, dimethyl succinate, glycerol acetate; Alcohols such as ethylene glycol, diethylene glycol, polyethylene glycol, propylene glycol, dipropylene glycol, glycol ethers, glycol ether acetates; carbonates such as propyl carbonate; glycerols such as glycerol; acetonitrile, Tetrahydrofuran (THF), dimethylformamide (DMF), N-methylformamide (NMF), dimethyl hydrazine (DMSO); and mixtures thereof. The first solvent may be present, for example, in an amount from about 0.3% to 50% or 60% by weight.

In various exemplary embodiments, each of the plurality of diodes has a diameter between about 20 microns and 30 microns and is between about 5 microns a height between 15 and 15 microns; or a diameter between about 10 microns and 50 microns and a height between about 5 microns and 25 microns; or each having between about 10 microns and 50 microns Width and length therebetween and a height between about 5 microns and 25 microns; or having a width and length of between about 20 microns and 30 microns and a height between about 5 microns and 15 microns . The plurality of diodes can be, for example, a light emitting diode or a photodiode.

Exemplary compositions can further comprise a plurality of substantially optically transparent and chemically inert particles having a size ranging between about 10 microns and about 50 microns and present in an amount from about 0.1% to about 2.5% by weight. Another exemplary composition can further comprise a plurality of substantially optically transparent and chemically inert particles having a size ranging between about 10 microns and about 30 microns and present in an amount from about 0.1% to about 2.5% by weight.

In an exemplary embodiment, the viscosity modifier comprises at least one viscosity modifier selected from the group consisting of clay, such as lithium bentonite clay, garamite clay, organically modified clay; sugars and polysaccharides, such as Guar gum, Sanxian gum; cellulose and modified cellulose, such as hydroxymethyl cellulose, methyl cellulose, ethyl cellulose, propyl methyl cellulose, methoxy cellulose, Methoxymethylcellulose, methoxypropylmethylcellulose, hydroxypropylmethylcellulose, carboxymethylcellulose, hydroxyethylcellulose, ethylhydroxyethylcellulose, cellulose ether, Cellulose ether, polyglucamine; polymers such as acrylate and (meth) acrylate polymers and copolymers; glycols such as ethylene glycol, diethylene glycol, polyethylene glycol, propylene glycol, dipropylene glycol , glycol ether, glycol ether acetate; smog-like oxygen Plutonium, bismuth dioxide powder; modified urea; and mixtures thereof. The viscosity modifier may be present, for example, in an amount from about 0.30% to about 5% by weight or from about 0.10% to about 3% by weight.

The composition may further comprise a second solvent different from the first solvent. The second solvent is present in an amount of, for example, about 0.1% to 60% by weight.

In an exemplary embodiment, the first solvent comprises n-propanol, isopropanol, dipropylene glycol, diethylene glycol, propylene glycol, 1-methoxy-2-propanol, 1-octanol, ethanol, tetrahydrogen a sterol or cyclohexanol, or a mixture thereof, and is present in an amount of from about 5% by weight to 50% by weight; the viscosity modifier comprises a methoxypropylmethylcellulose resin or a hydroxypropylmethylcellulose resin or a mixture thereof And present in an amount of from about 0.10% by weight to 5.0% by weight; and the second solvent comprises n-propanol, isopropanol, dipropylene glycol, diethylene glycol, propylene glycol, 1-methoxy-2-propanol, 1 An octanol, ethanol, tetrahydrofurfuryl alcohol or cyclohexanol, or a mixture thereof, and is present in an amount of from about 0.3% to about 50% by weight.

In another illustrative embodiment, the first solvent comprises n-propanol, isopropanol, dipropylene glycol, diethylene glycol, propylene glycol, 1-methoxy-2-propanol, 1-octanol, ethanol, tetra Hydroquinol or cyclohexanol, or a mixture thereof, and is present in an amount of from about 5% by weight to 30% by weight; the viscosity modifier comprises methoxypropylmethylcellulose resin or hydroxypropylmethylcellulose resin or a mixture, and is present in an amount of from about 1.0% by weight to 3.0% by weight; and the second solvent comprises n-propanol, isopropanol, dipropylene glycol, diethylene glycol, propylene glycol, 1-methoxy-2-propanol, 1-octanol, ethanol, tetrahydrofurfuryl alcohol or cyclohexanol, or a mixture thereof, and is present in an amount from about 0.2% to 8.0% by weight; and wherein the remainder of the composition further comprises water.

In another illustrative embodiment, the first solvent comprises n-propanol, isopropanol, dipropylene glycol, diethylene glycol, propylene glycol, 1-methoxy-2-propanol, 1-octanol, ethanol, tetra Hydroquinol or cyclohexanol, or a mixture thereof, and is present in an amount of from about 40% to 60% by weight; the viscosity modifier comprises methoxypropylmethylcellulose resin or hydroxypropylmethylcellulose resin or a mixture, and is present in an amount of from about 0.10% to about 1.5% by weight; and the second solvent comprises n-propanol, isopropanol, dipropylene glycol, diethylene glycol, propylene glycol, 1-methoxy-2-propanol, 1-octanol, ethanol, tetrahydrofurfuryl alcohol or cyclohexanol, or a mixture thereof, and is present in an amount of from about 40% to about 60% by weight.

An exemplary method of preparing a composition can include: mixing a plurality of diodes with a first solvent; adding a mixture of the first solvent and the plurality of diodes to the viscosity modifier; adding a second solvent; and in an air atmosphere The plurality of diodes, the first solvent, the second solvent, and the viscosity modifier are mixed for about 25 to 30 minutes. The exemplary method can further include releasing a plurality of diodes from the wafer, and the step of releasing the plurality of diodes from the wafer includes, for example, etching the back side of the wafer, grinding and polishing the back side of the wafer, or Shot peeling.

In various exemplary embodiments, the composition has a viscosity substantially between about 50 cps and about 25,000 cps at about 25 ° C, or substantially between about 100 cps and about 25,000 cps at about 25 ° C. The viscosity, either having a viscosity between about 1,000 cps and about 10,000 cps at about 25 °C, or a viscosity between about 10,000 cps and about 25,000 cps at about 25 °C.

In various exemplary embodiments, each of the plurality of diodes may include GaN and a GaN portion of each of the plurality of diodes Divided into substantially hexagonal, square, triangular, rectangular, lobed, star or super-circular. In an exemplary embodiment, the illuminating or light absorbing region of each of the plurality of diodes may have a surface texture selected from the group consisting of a plurality of rings, a plurality of substantially curved trapezoids, and a plurality of Parallel stripes, star patterns and mixtures thereof.

In an exemplary embodiment, each of the plurality of diodes has a first metal terminal on a first side of the diode and a second metal on a second side (back side) of the diode a terminal, and the heights of the first terminal and the second terminal are each between about 1 and 6 microns. In another exemplary embodiment, each of the plurality of diodes has a diameter between about 20 microns and 30 microns and a height between 5 microns and 15 microns, and the plurality of two Each of the diodes has a plurality of first metal terminals on the first surface and a second metal terminal on the first surface, and a junction of the contacts of the second metal terminals and the plurality of first metal terminals They are spaced about 2 microns to 5 microns apart in height. In an exemplary embodiment, the height of each of the plurality of first metal terminals is between about 0.5 microns and 2 microns and the height of the second metal terminals is between about 1 microns and 8 microns. between. In another illustrative embodiment, each of the plurality of diodes has a diameter between about 10 microns and 50 microns and a height between 5 microns and 25 microns, and a plurality of two Each of the diodes has a plurality of first metal terminals on the first surface and a second metal terminal on the first surface, and a junction of the contacts of the second metal terminals and the plurality of first metal terminals They are spaced about 1 micron to 7 microns apart in height.

In another illustrative embodiment, each of the plurality of diodes The body has at least one metal via structure extending between at least one p+ type or n+ type GaN layer on the first side of the diode and a second side (back side) of the diode. The metal via structure includes, for example, a central via, a peripheral via, or a surrounding via.

In various exemplary embodiments, each of the plurality of diodes has a size less than about 30 microns. In another exemplary embodiment, the diode has a diameter between about 20 microns and 30 microns and a height between about 5 microns and 15 microns; or between about 10 microns and 50 microns. Diameter and a height between about 5 microns and 25 microns; or substantially hexagonal in the lateral direction, having a relative face-to-face diameter between about 10 microns and 50 microns, and between about 5 a height between microns and 25 microns; or substantially hexagonal in the lateral direction, having a relative face-to-face diameter between about 20 microns and 30 microns, and between about 5 microns and 15 microns. Height; or having a width and length of between about 10 microns and 50 microns and a height of between about 5 microns and 25 microns; or having a width of between about 20 microns and 30 microns each. And length and a height between about 5 microns and 15 microns. In various exemplary embodiments, the height of the sides of each of the plurality of diodes is less than about 10 microns. In another illustrative embodiment, the height of the sides of each of the plurality of diodes is between about 2.5 microns and 6 microns. In another exemplary embodiment, the sides of each of the plurality of diodes are substantially S-shaped and terminate at a bend point.

In various exemplary embodiments, the viscosity modifier further comprises an adhesion viscosity modifier. The viscosity modifier substantially surrounds when dried or cured A polymer or resin mesh or structure is formed around each of the plurality of diodes. The composition may be visually opaque, for example, when wet, and substantially optically clear when dried or cured. The contact angle of the composition can be greater than about 25 degrees or greater than about 40 degrees. The relative evaporation rate of the composition may be less than 1, wherein the evaporation rate is relative to butyl acetate, and the evaporation rate of the latter is 1. The method of using the composition can include printing the composition on the substrate or on the first conductor coupled to the substrate.

In an exemplary embodiment, each of the plurality of diodes includes at least one inorganic semiconductor selected from the group consisting of germanium, gallium arsenide (GaAs), gallium nitride (GaN), GaP, InAlGaP, InAlGaP, AlInGaAs, InGaNAs, and AlInGASb. In another illustrative embodiment, each of the plurality of diodes comprises at least one organic semiconductor selected from the group consisting of π-conjugated polymers, poly(acetylene), poly(pyrrole), poly (thiophene), polyaniline, polythiophene, poly(p-phenylene sulfide), poly(p-phenylene vinylene) (PPV) and PPV derivatives, poly(3-alkylthiophene), polyfluorene, polyfluorene , polycarbazole, poly camomile blue, polyazabarium, poly(fluorene), polynaphthalene, polyaniline, polyaniline derivative, polythiophene, polythiophene derivative, polypyrrole, polypyrrole derivative, polybenzothiophene , polybenzothiophene derivatives, polyparaphenylene, polyparaphenylene derivatives, polyacetylene, polyacetylene derivatives, polydiacetylene, polydiacetylene derivatives, polyparaphenylene vinyl, polypair Phenyl extended vinyl derivatives, polynaphthalene, polynaphthalene derivatives, polyisothianaphthene (PITN), heteroaryl groups are thiophene, furan or pyrrole poly(arylene) vinyl (ParV), poly Phenyl sulfide (PPS), polyperinaphthalene (PPN), polyphthalocyanine (PPhc), and Derivatives, copolymers thereof and mixtures thereof.

Another illustrative embodiment provides a composition comprising: a plurality of diodes; a first solvent; and a viscosity modifier; wherein the composition has a viscosity of from about 100 cps to about 25,000 cps at about 25 °C. Another illustrative embodiment provides a composition comprising: a plurality of diodes, each of the plurality of diodes having any size less than about 50 microns; a first solvent; different from the first solvent a second solvent; and a viscosity modifier; wherein the composition has a viscosity of from about 50 cps to about 25,000 cps at about 25 °C. Another illustrative embodiment provides a composition comprising a plurality of diodes of any size less than about 50 microns; and a viscosity modifier such that the composition has a viscosity at about 25 ° C of substantially between about 100 cps. Up to about 20,000 cps. Another illustrative embodiment provides a composition comprising: a plurality of diodes; a first solvent selected from the group consisting of n-propanol, isopropanol, dipropylene glycol, diethylene glycol, propylene glycol, 1 - methoxy-2-propanol, 1-octanol, ethanol, tetrahydrofurfuryl alcohol, cyclohexanol, and mixtures thereof; a viscosity modifier selected from the group consisting of methoxypropyl methylcellulose resins, a hydroxypropyl methylcellulose resin and a mixture thereof; and a second solvent different from the first solvent, the second solvent being selected from the group consisting of n-propanol, isopropanol, dipropylene glycol, diethylene glycol, Propylene glycol, 1-methoxy-2-propanol, 1-octanol, ethanol, tetrahydrofurfuryl alcohol, cyclohexanol, and mixtures thereof.

Another illustrative embodiment provides a device comprising: a plurality of diodes; at least a trace amount of a first solvent; and a polymer or resin film at least partially surrounding each of the plurality of diodes. In an exemplary case In one embodiment, the polymer or resin film comprises a methylcellulose resin having a thickness of between about 10 nm and 300 nm. In another illustrative embodiment, the polymer or resin film comprises a methoxypropyl methylcellulose resin or a hydroxypropyl methylcellulose resin or a mixture thereof. The apparatus can further comprise at least a trace amount of a second solvent different from the first solvent.

In an exemplary embodiment, the polymer or resin film comprises a cured, dried or polymerized viscosity modifier selected from the group consisting of clays such as lithium bentonite clay, bentonite clay, and organically modified clay. Sugars and polysaccharides, such as guar gum, tricyon; cellulose and modified cellulose, such as hydroxymethyl cellulose, methyl cellulose, ethyl cellulose, propyl methyl cellulose, methoxy fiber , methoxymethylcellulose, methoxypropylmethylcellulose, hydroxypropylmethylcellulose, carboxymethylcellulose, hydroxyethylcellulose, ethylhydroxyethylcellulose, cellulose Ether, cellulose ether, polyglucamine; polymers such as acrylate and (meth) acrylate polymers and copolymers; glycols such as ethylene glycol, diethylene glycol, polyethylene glycol, propylene glycol, Dipropylene glycol, glycol ether, glycol ether acetate; aerosolized cerium oxide, cerium oxide powder; modified urea; and mixtures thereof.

An exemplary device can further comprise a plurality of substantially optically transparent and chemically inert particles, each of the plurality of substantially optically transparent and chemically inert particles being between about 10 microns and about 50 microns; wherein the polymer or The resin film further at least partially surrounds each of the plurality of substantially optically transparent and chemically inert particles.

The exemplary device can further include: a substrate; one or more first conductors coupled to the first terminal; at least one coupled to the one or more first conductors a dielectric layer; and one or more second conductors coupled to the second terminal and coupled to the dielectric layer. In an exemplary embodiment, at least one of the plurality of diodes has a first terminal coupled to the at least one second conductor and a second terminal coupled to the at least one first conductor. In another exemplary embodiment, the first portion of the plurality of diodes has a first terminal coupled to the at least one first conductor and a second terminal coupled to the at least one second conductor, and wherein the second portion is plural The diode has a first terminal coupled to the at least one second conductor and a second terminal coupled to the at least one first conductor. The exemplary device can further include: a interface circuit coupled to the one or more first conductors and coupled to the one or more second conductors, the interface circuit being further operably coupled to the power source.

In various exemplary embodiments, the one or more first conductors may further include: a first electrode including a first bus bar and a first plurality of elongated conductors extending from the first bus bar; and a second electrode A second bus bar and a second plurality of extension conductors extending from the second bus bar are included. The second plurality of elongated conductors may be misaligned with the first plurality of elongated conductors. The one or more second conductors can be further coupled to the second plurality of elongate conductors.

In various exemplary embodiments, the device is foldable and bendable. The device can be substantially flat and have a total thickness of less than about 3 mm. The device can be cut with a die and folded into a selected shape. The plurality of diodes of the device may have an average surface area concentration of from about 25 to 50,000 diodes per square centimeter. In various exemplary embodiments, the device does not include a heat sink or fin assembly.

In another exemplary embodiment, the device includes: a substrate; a plurality of diodes, each of the plurality of diodes having a first terminal and a second The terminal, each of the plurality of diodes has a size of less than about 50 microns; substantially surrounding the film of each of the plurality of diodes, the film comprising a polymer or a resin and having a thickness Between about 10 nm and 300 nm; one or more first conductors coupled to the first plurality of first terminals; a first dielectric layer coupled to the one or more first conductors; and one or more couplings Connected to the second conductor of the first plurality of second terminals.

In another illustrative embodiment, a device includes: a substrate; one or more first conductors; a dielectric layer coupled to the one or more first conductors; one or more second conductors; and a plurality of diodes Any of the plurality of diodes having a size less than about 50 microns, the first portion of the plurality of diodes being coupled to the one or more first conductors in a forward bias direction and coupled to One or more second conductors, and at least one of the plurality of diodes is coupled to the one or more first conductors in a reverse bias direction and coupled to the one or more second conductors; A film that substantially surrounds each of the plurality of diodes, the film comprising a polymer or resin and having a thickness between about 10 nm and 300 nm.

In various exemplary embodiments, the diode comprises: a luminescent or light absorbing region having a diameter between about 20 microns and 30 microns and a height between about 2.5 microns and 7 microns; coupled on the first side a first terminal to the light emitting region, the first terminal having a height of between about 1 micrometer and 6 micrometers; and a second terminal coupled to the light emitting region on a second surface opposite the first surface, the first terminal The height of the two terminals is between about 1 micrometer and 6 micrometers.

In another illustrative embodiment, the diode comprises: a luminescent or light absorbing region having a diameter between about 6 microns and 30 microns and a height between about 1 micron and 7 microns; on the first side The upper coupling to the light emitting area a terminal having a height between about 1 micrometer and 6 micrometers; and a second terminal coupled to the light emitting region on a second surface opposite the first surface, the height of the second terminal being Between about 1 micrometer and 6 micrometers; wherein the diode is substantially hexagonal in the lateral direction, having a relative face-to-face diameter between about 10 micrometers and 50 micrometers, and between about 5 micrometers to A height between 25 microns, and wherein the height of each side of the diode is less than about 10 microns, each side of the diode has a substantially S-shaped bend and terminates at a point of curvature.

In another illustrative embodiment, the diode comprises: a luminescent or light absorbing region having a diameter of from about 6 microns to 30 microns and a height of from about 1 micron to 7 microns; a first surface coupled to the illuminating region a terminal having a height of about 1 micrometer to 6 micrometers; and a second terminal coupled to the light emitting region on a second surface opposite to the first surface, the second terminal having a height of about 1 micron to 6 microns; wherein the diodes each have a width and length between about 10 microns and 50 microns and a height between about 5 microns and 25 microns, and wherein the height of each side of the diode is less than About 10 microns, each side of the diode has a substantially S-shaped bend and terminates at a bend point.

In various exemplary embodiments, the diode comprises: a luminescent or light absorbing region having a diameter of between about 6 microns and 30 microns and a height of between about 2.5 microns and 7 microns; a first coupled to the illuminating region on the first side a terminal having a height of about 3 micrometers to 6 micrometers; and a second terminal coupled to the light emitting region on a second surface opposite to the first surface, the second terminal having a height of about 3 micrometers to 6 Micron; wherein the diodes each have a width and length of between about 10 microns and 30 microns and a height between about 5 microns and 15 microns And wherein the height of each side of the diode is less than about 10 microns, each side of the diode has a substantially S-shaped bend and terminates at a point of curvature.

In another exemplary embodiment, the diode comprises: a luminescent or light absorbing region having a diameter between about 20 microns and 30 microns and a height between 2.5 microns and 7 microns; on the first side a plurality of first terminals spaced apart and peripherally coupled to the light emitting region, each of the plurality of first terminals having a height of about 0.5 micrometers to 2 micrometers; and a center coupled to the light emitting region on the first surface A second terminal of the mesa region, the second terminal having a height of from 1 micron to 8 microns.

In another illustrative embodiment, the diode comprises: a luminescent or light absorbing region having a mesa region having a height of from 0.5 microns to 2 microns and a diameter of from about 6 microns to 22 microns; on the first side a plurality of first terminals spaced apart from each other and coupled to the mesa region, the first terminals of the plurality of first terminals having a height of about 0.5 micrometers to 2 micrometers; and a center on the first surface a second terminal coupled to the mesa region of the light emitting region, the second terminal having a height of 1 micrometer to 8 micrometers; wherein the lateral dimension of the diode is about 10 micrometers to 50 micrometers and the height is about 5 micrometers to 25 micrometers Micron.

In another illustrative embodiment, the diode comprises: a luminescent or light absorbing region having a diameter of from about 20 microns to 30 microns and a height of from 2.5 microns to 7 microns; spaced apart on the first side and peripherally coupled to the luminescence a plurality of first terminals of the region, each of the first terminals having a height of about 0.5 micrometers to 2 micrometers; and a second terminal centrally coupled to the mesa region of the light emitting region on the first surface, the height of the second terminal being 3 microns to 6 microns; wherein the diode It is substantially hexagonal in the lateral direction, has a diameter of about 20 to 30 micrometers, and a height of between about 5 micrometers and 15 micrometers, wherein the height of each side of the diode is less than about 10 micrometers, and each of the diodes The sides have a substantially S-shaped bend and terminate at a bend point.

In another illustrative embodiment, the diode comprises: a luminescent or light absorbing region having a mesa region having a height of from 0.5 microns to 2 microns and a diameter of from about 6 microns to 22 microns; on the first side a plurality of first terminals spaced apart from each other and coupled to the mesa region, the first terminals of the plurality of first terminals having a height of about 0.5 micrometers to 2 micrometers; and a center on the first surface a second terminal coupled to the mesa region of the light emitting region, the second terminal having a height of 1 micrometer to 8 micrometers, the second metal terminal having a contact, and a contact of the second terminal and the plurality of first The contacts of the metal terminals are spaced apart by a height of between about 1 micron and 7 microns; wherein the dipoles are substantially hexagonal in the lateral direction, have a diameter between about 10 microns and 50 microns, and are between about 5 microns. To a height of between 25 microns, wherein the height of each side of the diode is less than about 15 microns, each side of the diode has a substantially S-shaped bend and terminates at a point of curvature.

An exemplary method of preparing a liquid or colloidal suspension for printing includes: adding a viscosity modifier to a plurality of diodes in a first solvent; and mixing a plurality of diodes, a first solvent, and viscosity adjustment The agent forms a liquid or colloidal suspension containing a plurality of diodes.

In another illustrative embodiment, a method of preparing a liquid or colloidal suspension for printing includes: adding a second solvent to a plurality of diodes in a first solvent, the second solvent being different from the first Solvent; adjust viscosity Adding a plurality of diodes to the plurality of diodes, the first solvent and the second solvent; adding a plurality of substantially chemically inert particles to the plurality of diodes, the first solvent, the second solvent, and the viscosity modifier; Mixing a plurality of diodes, a first solvent, a second solvent, a viscosity modifier, and a plurality of substantially chemically inert particles until a viscosity of at least about 100 centipoise (cps) is measured at about 25 ° C to form a A liquid or colloidal suspension of a plurality of diodes.

In another illustrative embodiment, a method of preparing a liquid or colloidal suspension for printing includes: adding a viscosity modifier to a plurality of diodes, a first solvent, and a second solvent, the second solvent being different In the first solvent, wherein each of the plurality of diodes has a lateral dimension of about 10 micrometers to 50 micrometers and a height of about 5 micrometers to 25 micrometers; and a plurality of substantially chemically inert particles are added to the plurality Of the plurality of diodes, the first solvent, the second solvent, and the viscosity modifier, wherein each of the plurality of substantially chemically inert particles has a size of from about 10 microns to about 70 microns; and mixing the plurality of diodes And a first solvent, a second solvent, a viscosity modifier, and a plurality of substantially chemically inert particles until a viscosity measured at about 25 ° C is at least about 1,000 centipoise (cps) to form a plurality of diodes Liquid or colloidal suspension.

In an exemplary embodiment, a method of fabricating an electronic device includes: depositing one or more first conductors; and depositing a plurality of diodes suspended in a mixture of the first solvent and the viscosity modifier.

In another illustrative embodiment, the method includes depositing a plurality of diodes suspended in a mixture of a first solvent and a viscosity modifier on a first side of the optically transmissive substrate, each of the plurality of diodes Diode in the first The surface has a plurality of first terminals and has a second terminal on the first surface, and each of the plurality of diodes has a lateral dimension of about 10 micrometers to 50 micrometers and a height of 5 micrometers to 25 micrometers. Depositing one or more first conductors coupled to the first terminal; depositing at least one dielectric layer coupled to the one or more first conductors; depositing one or more second conductors coupled to the second terminals And depositing a first phosphor layer on the second side of the optically transmissive substrate.

In another illustrative embodiment, the method includes depositing one or more first conductors on a first side of the substrate; depositing one or more first conductors in a mixture of the first solvent and the viscosity modifier a plurality of diodes, each of the plurality of diodes having a first terminal on a first side and a second terminal on a second side, each of the plurality of diodes The lateral dimension is from about 10 microns to 50 microns and the height is from 5 microns to 25 microns; at least one dielectric layer is deposited on the plurality of diodes and the one or more first conductors; one or more deposited on the dielectric layer An optically transmissive second conductor; and a first phosphor layer deposited.

In another illustrative embodiment, the composition comprises: a plurality of two-terminal integrated circuits, each of the two-terminal integrated circuits of the plurality of two-terminal integrated circuits having a size less than about 75 microns; the first solvent; a second solvent in the first solvent; and a viscosity modifier; wherein the composition has a viscosity of from about 50 cps to about 25,000 cps at about 25 °C. In various exemplary embodiments, the plurality of two-terminal integrated circuits comprise a two-terminal integrated circuit selected from the group consisting of: a diode, a light emitting diode, a photodiode, a resistor, an inductor, and a capacitor. , an integrated IC circuit, a sensor integrated circuit, and a piezoelectric integrated circuit.

In another illustrative embodiment, the apparatus includes: a substrate; a plurality of two-terminal integrated circuits, each of the two-terminal integrated circuits of the plurality of two-terminal integrated circuits having a size less than about 75 microns; at least trace amounts a first solvent; a film substantially surrounding each of the plurality of diodes, the film comprising a methylcellulose resin and having a thickness of about 10 nm to 300 nm; and one or more coupled to the plurality of two-terminal products a first conductor of the bulk circuit; a first dielectric layer coupled to the one or more first conductors; and one or more second conductors coupled to the plurality of two-terminal integrated circuits.

In another illustrative embodiment, the composition comprises: a plurality of two-terminal integrated circuits, each of the two-terminal integrated circuits of the plurality of two-terminal integrated circuits having a size less than about 75 microns; the first solvent; a second solvent in the first solvent; a plurality of substantially chemically inert particles having a size ranging from about 10 microns to about 100 microns and present in an amount from about 0.1% to about 2.5% by weight; and a viscosity modifier Wherein the composition has a viscosity at about 25 ° C of from about 50 cps to about 25,000 cps.

The various other advantages and features of the invention are apparent from the description and appended claims appended claims

The objects, features, and advantages of the present invention will become more apparent from the aspects of the <RTIgt; Reference numerals with alphabetic characters are used to identify other types, examples, or variations of specific examples of selected components.

The present invention is to be construed as being limited to the details of the embodiments of the invention. It is not intended to limit the invention to the particular embodiments disclosed. In this regard, it is to be understood that the invention is not limited by the scope of the application, the details . The method and apparatus in accordance with the present invention can be embodied in other specific embodiments and can be practiced and carried out in various ways. It is also to be understood that the phraseology and terminology used herein, and the abstract,

Exemplary embodiments of the present invention provide diodes 100, 100A, 100B, 100C, 100D, 100E, 100F, 100G, 100H, 100I, 100J, 100K, 100L (collectively referred to herein as "diode 100-" 100L") liquid and / or colloidal dispersions and suspensions, which can be printed and equivalently referred to herein as "diode ink", it should be understood that "diode ink" means and refers to A liquid and/or colloidal suspension of a polar body or other two-terminal integrated circuit, such as the exemplary diode 100-100L. As described in more detail below, the diodes 100-100L themselves are fully formed semiconductor devices prior to being included in the diode ink composition, which can function to illuminate when energized (when embodied as LEDs) or Power is provided when exposed to a light source (when embodied as a photodiode). Exemplary methods of the present invention also include methods of making a diode ink, as discussed in more detail below, the diode ink dispersing and suspending a plurality of diodes 100-100L in a solvent and a viscous resin or polymer mixture. In the composition, wherein the diode 100-100L or other two-end integrated circuit maintains dispersion and suspension for a long period of time, such as one or more, at room temperature (25 ° C) or refrigerated conditions (5 ° C to 10 ° C) This is especially true for higher viscosity, more colloidal compositions and freeze induced colloidal compositions, and the liquid or colloidal suspension can be printed to produce LED based devices and optoelectronic devices. Although the description focuses on a diode 100-100L as a type of two-terminal integrated circuit, those skilled in the art will appreciate that it can be equivalently replaced with other types of semiconductor devices to form a more widely known "semiconductor device ink." Such other types of semiconductor devices such as, but not limited to, any type of transistor (field effect transistor (FET), metal oxide semiconductor field effect transistor (MOSFET), junction field effect transistor ( JFET), bipolar junction transistor (BJT), etc., two-terminal AC switch (diac), three-terminal bidirectional controllable triac, trim rectifier.

The diode ink (or semiconductor device ink) can be deposited, printed, or otherwise coated to form any of a variety of products discussed in more detail below, such as devices 300, 300A, 300B, 300C, 300D, 700, 700A, 700B, 720, 730, 740, 750, 760, 770 embodiments or systems 350, 375, 800, 810, or may be deposited, printed or otherwise applied to any product of any kind or to form any kind Any product, including signs or markings for product packaging, such as consumer products, personal products, commercial products, industrial products, construction products, construction products, and the like.

FIG. 1 is a perspective view illustrating an exemplary first diode 100 embodiment. 2 is a plan view (or top view) illustrating an exemplary first diode 100 embodiment. FIG. 3 is a specific example of an exemplary first diode 100 A cross-sectional view (through the 10-10' plane of Figure 2). 4 is a perspective view illustrating an exemplary second diode 100A embodiment. FIG. 5 is a plan view (or top view) illustrating an exemplary second diode 100A embodiment. FIG. 6 is a perspective view illustrating an exemplary third diode 100B embodiment. FIG. 7 is a plan view (or top view) illustrating an exemplary third diode 100B embodiment. FIG. 8 is a perspective view illustrating an exemplary fourth diode 100C embodiment. FIG. 9 is a plan view (or top view) illustrating an exemplary fourth diode 100C embodiment. 10 is a cross-sectional view (through the 20-20' plane of FIGS. 5, 7, 9) illustrating an exemplary second, third, and/or fourth diode 100A, 100B, 100C. Figure 11 is a perspective view illustrating an exemplary fifth and sixth diode 100D, 100E embodiment. FIG. 12 is a plan view (or top view) illustrating an exemplary fifth and sixth diode 100D, 100E embodiment. Figure 13 is a cross-sectional view (through the 40-40' plane of Figure 12) illustrating an exemplary fifth diode 100D embodiment. 14 is a cross-sectional view (through the 40-40' plane of FIG. 12) illustrating an exemplary sixth diode 100E embodiment. Figure 15 is a perspective view illustrating an exemplary seventh diode 100F embodiment. FIG. 16 is a plan view (or top view) illustrating an exemplary seventh diode 100F embodiment. 17 is a cross-sectional view (through the 42-42' plane of FIG. 16) illustrating an exemplary seventh diode 100F embodiment. FIG. 18 is a perspective view illustrating a specific example of an exemplary eighth diode 100G. 19 is a plan view (or top view) illustrating a specific example of an exemplary eighth diode 100G. 20 is a cross-sectional view (through the 43-43' plane of FIG. 19) illustrating an exemplary eighth diode 100G embodiment. Figure 21 is a perspective view illustrating an exemplary twelfth polar body 100K embodiment. Figure 22 is a diagram illustrating an exemplary twelfth polar body 100K. A cross-sectional view of the example (through the 47-47' plane of Figure 21). 23 is a perspective view illustrating a specific example of an exemplary eleventh diode 100L. Figure 24 is a cross-sectional view (through the 48-48' plane of Figure 23) illustrating an exemplary eleventh diode 100L embodiment. Cross-sectional views of specific examples of ninth, twelfth and thirteenth diodes 100H, 100I and 100J are illustrated in Figures 44, 50 and 66, respectively, as part of an illustration of an exemplary manufacturing process. Figure 110 is a scanning electron micrograph of an exemplary second diode 100A embodiment. Figure 111 is a scanning electron micrograph of a specific example of an exemplary second diode 100A.

In the perspective and plan view (or top view) of Figures 1, 2, 4-9, 11, 12, 15, 16, 18, 19, 21 and 23, the description of the external passivation layer 135 is omitted to provide additional relief. A view of the layers and structures that would otherwise be covered by the passivation layer 135 (and therefore not visible). Passivation layer 135 is illustrated in cross-sectional views of Figures 3, 10, 13, 14, 17, 20, 22, 24, 44, 50, 57, 62, 63, and 66-69, and those skilled in the art will appreciate that The diode 100-100L will generally include at least one such passivation layer 135. In addition, with reference to Figures 1-69, 74, 76-85, and 87-103, those skilled in the art should understand that the drawings are not intended to be

As described in more detail below, exemplary first to thirteenth dipole embodiments 100-100L differ primarily in the following aspects: the shape, material, doping, and use of substrate 105 and wafers 150, 150A that can be used. Other composition; the shape of the diode-emitting region to be fabricated; the depth and position of the vias (130, 131, 132, 133, 134, 136) (such as shallow or "blind", deep or "through", Center, periphery, and surroundings; having a first terminal 125 on the first side (top or front) or having a first terminal and a second terminal 125, 127; forming a back surface of the first terminal 125 or the second terminal 127 ( The second side) the use and size of the metallization layer (122); the shape, extent and location of the other contact metal; and may also differ in the shape or position of other features, as described in more detail below. Exemplary methods and method variations for making exemplary diodes 100-100L are also described below. One or more exemplary diodes 100-100L are also available from and available from NthDegree Technologies Worldwide, Inc. of Tempe, Arizona, USA.

Referring to Figures 1 through 24, exemplary diodes 100-100L are formed using substrate 105, such as a heavily doped n+ type or p+ type substrate 105, such as a heavily doped n+ type or p+ type germanium substrate, which may be twinned The circle may be a more complex substrate or wafer, such as, for example, but not limited to, a germanium substrate (105) on insulator ("SOI"), or gallium nitride (GaN) on sapphire (106) wafer 150A. Substrate 105 (illustrated in Figures 11-20). Other types of substrates (and/or wafers having or having substrates) 105 can also be used equivalently, including, for example, but not limited to, Ga, GaAs, GaN, SiC, SiO ₂ , sapphire, organic semiconductors, etc., and as follows The article is discussed in more detail. Thus, reference to substrate 105 or 105A is to be broadly understood to also include any type of substrate, such as n+ or p+ type germanium, n+ type or p+ type GaN, such as n+ type or p+ type formed using germanium wafer 150. A germanium substrate or n+ type or p+ type GaN fabricated on sapphire wafer 105A (described below with reference to Figures 11-20 and 38-50). In the specific examples illustrated in Figures 21 through 24, after removal of the substrate during fabrication, negligible to the absence of substrate 105, 105A (and buffer layer 145) remains (remaining composite GaN heterostructure in place, as described in more detail below) Discussion), and for example, but not limited to, any of the substrates 105, 105A can be used. Substrate 105 typically has a <111> or <110> crystal structure or orientation when used with germanium, although other crystalline structures may equally be used. A buffer layer 145 (such as aluminum nitride or tantalum nitride), which is optionally present, is typically fabricated on the germanium substrate 105 to facilitate subsequent fabrication of GaN layers having different lattice constants.

On the buffer layer 145, a GaN layer is formed, such as by epitaxial growth, to form a composite GaN heterostructure, generally illustrated as an n+ type GaN layer 110, a quantum well region 185, and a p+ type GaN layer 115. In other embodiments, buffer layer 145 is not used or may not be used, such as when a composite GaN heterostructure (n+ type GaN layer 110, quantum well) is fabricated on GaN substrate 105 (or directly on sapphire (106) wafer 105A) Region 185 and p+ type GaN layer 115) are illustrated as more specific alternatives in Figures 15-17. Those skilled in the art should appreciate that there may be multiple quantum wells (internal) and possibly multiple p+, n+, and other GaN layers containing multiple dopants, and may have any of various dopants. a non-GaN layer to form a light-emitting (or light-absorbing) region 140, wherein the n+-type GaN layer 110, the quantum well region 185, and the p+-type GaN layer 115 are merely illustrative and provide only one or more pairs of light (or light absorption). A general or brief description of the composite GaN heterostructure of region 140 or any other semiconductor structure. Those skilled in the art will also appreciate that, for example, for the use of a p+ type germanium or GaN substrate 105, the locations of the n+ type GaN layer 110 and the p+ type GaN layer 115 may be the same or may be equivalently reversed, and other compositions and materials may be used. Forming one or more illuminating (or light absorbing) regions 140 (some of which are described below), and all such variations are in the present Within the scope of the Ming Dynasty. While reference GaN is described as a set of exemplary materials having different compounds, dopants, and structures for forming luminescent or light absorbing regions 140, those skilled in the art will appreciate that any other suitable semiconductor can be used equivalently. Materials and they are within the scope of the invention. In addition, those skilled in the art will appreciate that any reference to GaN should not be considered "pure" GaN, but rather is meant to include and encompass all of the various other things that may be used to form the illuminating or light absorbing region 140 and/or to allow illumination or The light absorbing region 140 deposits compounds, dopants, and layers, including any intermediate non-GaN layers.

It should also be noted that although it is discussed that a plurality of diodes in a plurality of diodes (dipoles 100-100L) may be or may be selected semiconductors, other inorganic or organic semiconductors may be equivalently used and It is within the scope of the invention. Examples of inorganic semiconductors include, but are not limited to, ruthenium, osmium, and mixtures thereof; titanium dioxide, ruthenium dioxide, zinc oxide, indium tin oxide, antimony tin oxide, and mixtures thereof; Group II-VI semiconductors, which contain at least one a compound of a divalent metal (zinc, cadmium, mercury, and lead) and at least one divalent nonmetal (oxygen, sulfur, selenium, and tellurium), such as zinc oxide, cadmium selenide, cadmium sulfide, mercury selenide, and mixtures thereof; a III-V semiconductor, which is a compound containing at least one trivalent metal (aluminum, gallium, indium, and antimony) and at least one trivalent nonmetal (nitrogen, phosphorus, arsenic, and antimony), such as gallium arsenide, indium phosphide And mixtures thereof; and Group IV semiconductors, including hydrogen terminated ruthenium, carbon, ruthenium and alpha-tin, and combinations thereof.

In addition to GaN luminescence/light absorbing regions 140 (eg, GaN heterostructure deposited on substrate 105 (such as n+ or p+ type germanium) or GaN (105) deposited on germanium wafer 150 or sapphire (106) wafer 150A In addition to the structure), the plurality of diodes 100-100L may also contain any type of semiconductor element A material, material, or compound, such as germanium, gallium arsenide (GaAs), gallium nitride (GaN), or any inorganic or organic semiconductor material, and in any form including, but not limited to, GaP, InAlGaP, InAlGaP, AlInGaAs , InGaNAs, AlInGASb. In addition, the wafer used to fabricate the two-terminal integrated circuit may be of any type or kind, such as, but not limited to, germanium, GaAs, GaN, sapphire, tantalum carbide.

The scope of the invention is therefore to be understood to cover any epitaxial or compound semiconductor on a semiconductor substrate, including but not limited to any LED or optoelectronic semiconductor of any kind known or to be known in the art using semiconductor substrate fabrication.

In various exemplary embodiments, the n+ type or p+ type substrate 105 conducts a current that flows to the n+ type GaN layer 110 as illustrated. Again, it should be noted that any of the various layers illustrated by the illuminating or light absorbing region 140 may be equivalently reversed or otherwise ordered, such as reversing the position of the illustrated n+ and p+ GaN layers 110, 115. The current path also passes through a metal layer forming one or more vias (130) (which may also be used to provide an extremely thin (about 25 angstroms) buffer between the n+ type or p+ type substrate 105 and the n+ type GaN layer 110. Electrical bypass of layer 145. Other types of vias 131-134 and 136 that provide additional connections to the conductive layer are described below. One or more metal layers 120 (illustrated as two (or more) separately deposited metal layers 120A and 120B) (which may also be used to form vias (130, 131, 132, 133, 134, 136)) Providing a p+ type GaN layer 115, a second other metal layer 120B (such as a mold metal for forming a "bump" or a protruding structure), and a first electrical terminal forming each of the diodes 100-100L (or Point) 125 or second terminal Ohmic contact of the metal layers 120A, 120B of 127. Other metal layers can also be used as discussed below. For the illustrated exemplary diode 100, 100A, 100B, 100C embodiment, the electrical terminal 125 can be the only ohmic metal terminal formed on the diode 100, 100A, 100B, 100C during fabrication for subsequent power (Voltage) delivery (for LED applications) or reception (for optoelectronic applications), an n+ or p+ type substrate 105 is used to provide a second electrical terminal of the diode 100, 100A, 100B, 100C for power delivery or reception. It should be noted that the electrical terminal 125 and the n+ type or p+ type substrate 105 are on opposite sides (i.e., the top surface (first surface) and the bottom surface (or back surface, second surface)) of the diodes 100, 100A, 100B, and 100C. Instead of being on the same side. As an alternative to the specific examples of such diodes 100, 100A, 100B, 100C and as illustrated for other exemplary diode embodiments, in a diode (eg, diodes 100D, 100F, 100G, 100J) A second ohmic metal terminal 127, as the case may be, is formed on the second side (back side) using a metal layer 122. As an alternative to the specific example of the diode 100K illustrated in FIGS. 21 and 22, the first ohmic metal terminal 125 is formed on the second side (back side) of the diode 100K using the metal layer 122, and then flipped or reversed. The diode 100K is for use. As another alternative illustrated in FIGS. 23 and 24 for the exemplary diode 100L, the first terminal 125 and the second terminal 127 are both on the same first side (top surface) of the diode 100L. In particular, a tantalum nitride passivation layer 135 (or any other equivalent passivation layer) is used to achieve electrical insulation, environmental stability, and possibly other structural integrity. Without being separately described, as discussed below, a plurality of trenches 155 are formed along the sides of the diode 100-100L during fabrication to cause the diodes 100-100L to be on the wafers 150, 150A to each other. Separated (monomerized) and used to separate the diodes 100-100L from the rest of the wafers 150, 150A.

1-24 also illustrate various shapes and form factors of one or more luminescent (or light absorbing) regions 140 (described as GaN heterostructures (n+ GaN layer 110, quantum well region 185, and p+ GaN layer 115)). Form factor and some of the shapes and form factors of the various shapes and form factors of the substrate 105 and/or the composite GaN heterostructure. As also illustrated, although the exemplary diode 100-100L is substantially hexagonal in shape on the xy plane (having curved or arched sides 121, concave or convex (or both, forming a more complex S-shape) , as discussed in more detail below, to provide a greater device density per wafer, but other diode shapes and modalities are considered equivalent and within the scope of the claimed invention, such as square, circular, Oval, oval, rectangular, triangular, octagonal, ring, etc. As also illustrated in the illustrative embodiments, the hexagonal side 121 may also be slightly curved or arched, such as convex (Figs 1, 2, 4, 5) or concave (Figs. 6-9) for self-crystallisation When the circle is released and suspended in the liquid, the diodes 100-100L can avoid sticking or sticking to each other. In addition, for the fabrication of the devices 300, 300A, 300B, 300C, 300D, 700, 700A, 700B, 720, 730, 740, 750, 760, 770, a relatively small thickness of the diode 100-100L is used to prevent individual grains. (Individual diodes 100-100L) are erected on their sides or side edges (121). As also illustrated in the illustrative embodiments, the hexagonal sides 121 may also be slightly curved or arched to project around the center or central portion of each side 121 while being peripherally/laterally recessed to form a more complex S-shape. Shapes (overlapping double "S" shapes) produce sharper or protruding vertices 114 (Figures 11 through 24) for self-crystallisation When the circle is released and suspended in the liquid, the diodes 100-100L can also avoid sticking or sticking to each other and can push away from each other when rolling or moving relative to the other diode. The variation of the diodes 100-100L from the flat surface profile (i.e., the non-flat surface profile) also helps prevent the grains from sticking to one another when suspended in a liquid or gel. Again, for devices 300, 300A, 300B, 300C, 300D, 700, 700A, 700B, 720, 730, 740, 750, 760, 770, diodes 100-100L (or two) of relatively small thickness or height are fabricated. The polar regions 100K and 100L of the illuminating region) (compared to their lateral dimensions (diameter or width/length)) tend to prevent individual dies (individual diodes 100-100L) from erecting on their sides or side edges (121) .

Various shapes and form factors of the illuminating (or light absorbing) region 140 (n+-type GaN layer 110, quantum well region 185, and p+-type GaN layer 115) are also illustrated, wherein Figures 1-3 illustrate substantially circular or disc-shaped illumination. (or light absorbing) regions 140 (n+-type GaN layer 110, quantum well region 185, and p+-type GaN layer 115), and FIGS. 4 and 5 illustrate substantially circular (or super-annular) luminescent (or light absorbing) regions 140 (n+-type GaN layer 110, quantum well region 185, and p+-type GaN layer 115), wherein the second metal layer 120B extends to the center of the super-annular body (and possibly provides a reflective surface). In FIGS. 6 and 7, the light-emitting (or light-absorbing) region 140 (n+-type GaN layer 110, quantum well region 185, and p+-type GaN layer 115) has a substantially circular inner (side) surface and a substantially leaf-shaped outer surface. (side) surface, while in FIGS. 8 and 9, the illuminating (or light absorbing) region 140 (n+-type GaN layer 110, quantum well region 185, and p+-type GaN layer 115) also has a substantially circular inner (side) surface And the outer (side) surface is substantially star-shaped. In Figures 11-24, one or more of the illuminating (or light absorbing) regions 140 have real A hexagonal (side) surface (which may or may not extend around the die) and may have (at least partially) a substantially circular or elliptical inner (side) surface. In other illustrative embodiments not separately illustrated, there may be multiple illuminating (or light absorbing) regions 140 that may be continuous or spaced apart on the die. Various configurations having one or a plurality of luminescent (or light absorbing) regions 140 (n+ type GaN layer 110, quantum well region 185, and p+ GaN layer 115) having a circular inner surface can be constructed to increase light output (for The potential for LED applications) and light absorption (for optoelectronic applications). As discussed in more detail below, the inner and/or outer surface of any of the n+-type GaN layer 110 or the p+-type GaN layer 115 may also have, for example, but not limited to, any of various surface textures or surface geometries. By.

In an exemplary embodiment, the first terminal 125 (or the second terminal 127 of the diode 100K) includes one or more metal layers 120A, 120B and has a bump or protruding structure to make the diode 100-100L One significant portion is covered by one or more insulating or dielectric layers (either by the first conductor 310 or 310A with the n+ or p+ type germanium substrate 105 (or with the second terminal formed by the metal layer 122, or with metal) The second terminal formed by layer 128) is formed after electrical contact, while providing sufficient structure for one or more other conductive layers, such as second conductor 320 discussed below, to contact electrical terminal 125. In addition, the bump or protruding structure of the terminal 125 may also affect the rotation of the diode 100-100L in the diode ink and the subsequent manufacture thereof, in addition to the curvature of the side surface 121 and the thickness (height) of the side surface 121. Orientation in device 300, 300A, 300B, 300C, 300D, 700, 700A, 700B, 720, 730, 740, 750, 760, 770 (top up (forward bias) or bottom up (reverse bias) Press)) One of a plurality of factors.

Referring to Figures 11-22, exemplary diodes 100D, 100E, 100F, 100G, 100K illustrate several other and optionally features in various combinations. As illustrated, the perimeter of the metal layer 120B, which is typically formed of a mold metal to form a bump or protrusion, is substantially elliptical (or oval) (and substantially hexagonal in Figure 21) rather than substantially circular. Shape, although other shapes and form factors of the terminal 125 are within the scope of the present invention. Additionally, the metal layer 120B forming the bump or protruding structure may have two or more elongated extensions 124 at the devices 300, 300A, 300B, 300C, 300D, 700, 700A, 700B, 720, 730, 740, 750, 760, 770 are used in manufacturing for several other purposes, such as to facilitate electrical contact with the second conductor 320 and to help insulate the dielectric 315 (and/or the first conductor 310) away from the terminal 125 (metal layer 120B) Or metal 122) flows. The elliptical form factor may also allow for additional illumination (or light absorption) or illumination (or light absorption) regions 140 along the long axis side self-luminous (or light absorbing) region 140 of the elliptical metal layer 120B forming the bump or protrusion structure. Additional luminescence (or light absorption). For the selected specific example, the metal layer 120A which is in ohmic contact with the p+ type GaN layer 115 and which may be deposited as a plurality of layers in a plurality of steps also has an extended extension on the p+ type GaN layer 115, which is shown in FIG. 12, 15, 16, 18, and 19 are illustrated as curved metal contact extensions 126 that facilitate conduction of current to the p+ type GaN layer 115 while allowing (rather than excessively repressing) illumination (or light absorbing) regions 140 to illuminate. Or the potential of light absorption. Numerous other shapes of metal contact extensions 126, such as grid patterns, other curved shapes, and the like, can be used equivalently. Although not separately stated, the other features illustrated in Figures 1-10 and 21-24 The extended metal contact extensions can also be used in the body examples. Other seed or reflective metal layers can also be used, as described in more detail below.

Also shown in FIGS. 11-22, in the fabricated diodes 100, 100A, 100B, 100C, which extend through the buffer layer 145 and into the substrate 105, but not deeper into or through the substrate 105, as previously described. The surrounding (i.e., eccentric) is a shallow or "blind" guide hole structure other than the type of pilot hole 130 (131, 132, 133, 134, 136). As illustrated in FIG. 13 (and FIGS. 44 and 66), a relatively deep "through" via 131 at the center (or at the center) extends completely through the substrate 105 and is used to form an ohmic contact with the n+ type GaN layer 110 and Current is conducted (or otherwise formed into electrical contact) between the second (back) metal layer 122 and the n+ type GaN layer 110. As illustrated in Figure 22, a "through" via 136 having a smaller or shallower center (or center) extends completely through the composite GaN heterostructure (115, 185, 110) and is used with n+ GaN. Layer 110 forms an ohmic contact and conducts (or otherwise forms electrical contact) between second side (back) metal layer 122 and n+ type GaN layer 110. As illustrated in FIG. 14, a shallower or blind via 132 (also referred to as a "blind" via 132) at the center (or at the center) extends through the buffer layer 145 and into the substrate 105, and is used in conjunction with the n+ type. The GaN layer 110 forms an ohmic contact and conducts (or otherwise forms electrical contact) between the n+ type GaN layer 110 and the substrate 105. As illustrated in Figures 15-17 and 49-50, the surrounding deeper or through vias 133 extend along the side 121 (although covered by the passivation layer 135) from the n+ type GaN layer 110 and extend to the second of the diode 100F. Face (back), in this embodiment the diode 100F also includes a second (back) metal layer 122 that completely surrounds the side of the substrate 105 and It is used to form an ohmic contact with the n+ type GaN layer 110 and to conduct (or otherwise form an electrical contact) between the second (back) metal layer 122 and the n+ type GaN layer 110. As illustrated in Figures 18-20, the relatively deep "through" vias 134 extend completely through the substrate 105 and are used to form an ohmic contact with the n+ type GaN layer 110 and a second (back) metal layer. Current is conducted between 122 and the n+ type GaN layer 110 (or otherwise forms electrical contact). In a specific example where the second (back) metal layer 122 is not used, the through via structures (131, 133, 134, 136) can be used to make electrical contact with the conductor 310A (at devices 300, 300A, 300B, 300C). , 300D, 720, 730, 760) and conduct current (or otherwise form electrical contact) between conductor 310A and n+ type GaN layer 110. These through-via structures (131, 133, 134, 136) are exposed to the poles during fabrication after singulation of the diodes by back grinding and polishing or laser stripping (discussed below with reference to Figures 64 and 65). On the second side (back side) of the body 110D, 100F, 100G, 100K, and may remain exposed or may be covered by the second side (back) metal layer 122 (and in electrical contact with the second side (back) metal layer 122) ( As illustrated in Figure 66).

The through via structures (131, 133, 134, 136) are much narrower than the typical vias known in the art. The depth through the via structure (131, 133, 134) (the height extending through the substrate 105) is approximately 7 microns to 9 microns, and the depth through the via structure 136 (extending through the height of the composite GaN heterostructure) It is approximately 2 microns to 4 microns and has a width of between about 3 microns and 5 microns compared to a width of about 30 microns or greater than 30 microns for conventional vias.

11-13, 17, 18, 20-22, 66, and 68 also illustrate the second (back) metal forming the second terminal or contact 127 or the first terminal 125 (diode 100K) as the case may be. Layer 122. The second terminal or contact 127 can be used, for example, but not limited to, to facilitate current conduction to the n+ type GaN layer 110, such as via various through via structures (131, 133, 134, 136), and/or to facilitate Electrical contact is made with conductor 310A.

Referring to Figures 21-22, the exemplary diode 100K illustrates a number of other and optional features. Figure 22 illustrates a fabrication layer cross section to illustrate how to fabricate the exemplary diode 100K; then flip or invert the exemplary diode 100K to face up as illustrated in Figure 21 for the illustrative device 300, In the specific examples 300A, 300B, 300C, 300D, 720, 730, 760, light is emitted through the upper n+ type GaN layer 110 (in the LED embodiment). Therefore, the first terminal 125 is formed by the second surface (back surface) metal 122, and the orientation of the n + -type GaN layer 110 and the p + -type GaN layer 115 can be reversed as well (the n + -type GaN layer 110 is now the upper layer in FIG. 21) In other specific examples 100-100J), wherein the second terminal 127 is formed from one or more metal layers 120B. There is little or no substrate 105, 105A or buffer layer 145 that has been substantially removed during fabrication, leaving a complex GaN heterostructure (p+ type GaN layer 115, quantum well region 185, and p+ type GaN layer 115) in place. And possibly also removing a certain amount of other GaN layers or substrates. The side or side edges (121) are relatively thinner (or less thick) than the other illustrated embodiments, in the illustrative embodiments, 10 microns or less, or more specifically about 2 microns to 8 microns, or more particularly From about 2 microns to 6 microns, or more specifically from about 2 microns to 4 microns, or more specifically from 2.5 microns to 3.5 microns, or about 3 The micron is also used to prevent the individual diodes 100K from standing up on their sides or side edges (121) during manufacture of the device 300, 300A, 300B, 300C, 300D, 720, 730, 760.

The second side (back) metal 122 forming the first terminal 125 is relatively thick, in the illustrative embodiment, from about 3 microns to 6 microns, or from 4.5 microns to about 5.5 microns, or about 5 microns, to provide the diode 100K. The height is from about 11 microns to 15 microns, or from 12 microns to 14 microns, or about 13 microns to allow the dielectric layer 315 to be deposited and in contact with the second conductor 320, and has a long axis of, for example, but not limited to about 14 The micrometer and minor axis are elliptical in shape of about 6 microns. The second (back) metal 122 forming the first terminal 125 also does not extend across the entire back surface to facilitate back alignment and singulation of the diode 100K. The second terminal 127 is formed of a metal layer 120B, and in an exemplary embodiment, typically has a thickness of from about 3 microns to 6 microns, or a thickness of from 4.5 microns to about 5.5 microns, or a thickness of about 5 microns. As also illustrated, the insulating (passivation) layer 135A is also used to electrically or electrically isolate the metal layer 120B from the vias 136 and may be deposited independently of the step of depositing a passivation (nitride) layer 135 around the perimeter, thus illustrated as 135A. . In an illustrative embodiment, the width of the diode 100K (the distance between the face and the face of the generally hexagonal shape rather than the distance between the apex and the apex) is, for example, but not limited to, about 10 microns to 50. Micron, or more specifically from about 20 microns to 30 microns, or more specifically from about 22 microns to 28 microns, or more specifically from about 25 microns to 27 microns, or more specifically from about 25.5 microns to 26.5 microns, or more particularly About 26 microns. The metal layer 120A may also be included in the process of fabricating the second terminal 127, unless otherwise specified. During the manufacture of the diode 100K (and in other exemplary In the diode 100-100L specific example), the top GaN layer (illustrated as p+ type GaN layer 115, but may be other types of GaN layers, as illustrated in FIG. 25) may also pass through a very thin optically reflective metal layer. Metallized (described as silver layer 103 in FIG. 25) and/or optically transmissive metal layer (not separately illustrated) (such as nickel-gold or nickel-gold-nickel having a thickness of about 100 angstroms) and alloyed therewith, It facilitates ohmic contact formation (and possibly provides light reflection towards the n+ type GaN layer 110), some of which are then removed along with other GaN layers, such as during formation of GaN mesas.

Referring to Figures 23 and 24, the exemplary eleventh diode 100L embodiment differs from all other illustrated diode 100-100K embodiments in that it is on the same side (top or top) of the diode 100L. There are first and second terminals 125, 127 thereon. When used in the illustrative device 700, 700A, 700B, 740, 750, 770 embodiments, light will pass through the (lower) n+ type GaN layer 110, typically through a substantially optically transparent substrate 305A (in the LED specific In the examples) or absorption (for photovoltaic specific examples), as illustrated in Figures 80-82. Since the first and second terminals 125, 127 are on the same side (upper or top) of the diode 100L, the exemplary diode 100L does not use any second (back) metal 122, and generally does not Any of the various via structures previously discussed are required. There is little or no substrate 105, 105A or buffer layer 145, which has also been substantially removed during fabrication, leaving a complex GaN heterostructure (p+ type GaN layer 115, quantum well region 185, and p+ type GaN layer) in place. 115), and may also remove a certain amount of other GaN. The side or side edges (121) are also relatively thinner (or less thick) than the other illustrated embodiments, in the illustrative embodiment, from about 2 microns to 4 microns, or More particularly from 2.5 microns to 3.5 microns, or about 3 microns, also serves to prevent individual diodes 100L from standing up on their sides or side edges (121) during manufacture of device 700, 700A, 700B, 740, 750, 770. Not separately stated, during the fabrication of the diode 100L (and in other exemplary diode 100-100K specific examples), the top GaN layer (illustrated as a p+ type GaN layer 115, but may be other types of GaN layers) , as illustrated in FIG. 25, may also pass through an extremely thin optically reflective metal layer (illustrated as silver layer 103 in FIG. 25) and/or an optically transmissive metal layer (not separately illustrated) (such as a thickness of about 100 angstroms). Nickel-gold or nickel-gold-nickel are metallized and alloyed therewith to aid in ohmic contact formation (and possibly provide light reflection towards the n+ type GaN layer 110), some of which are then formed along with other GaN layers, such as in formation Removed during GaN mesa.

As illustrated in Figures 23 and 24, the GaN mesas (p+-type GaN layer 115 and quantum well layer 185) are generally atypical in shape, somewhat similar to the top-triangled triangle (e.g., by providing a plurality from a hexagon or a circle) (three) drawn portions are formed to provide space on the upper surface of the n + -type GaN layer 110 as metal contacts 128 (illustrating three metal contacts 128), the metal contacts 128 being in the diode A second terminal 127 is formed on the upper or top surface of 100L. In various exemplary embodiments, the height of the GaN mesas is typically from about 0.5 microns to 1.5 microns, or more specifically from 0.8 microns to 1.2 microns, or more specifically from 0.9 to 1.1 microns, or more specifically about 1.0 microns. The metal contacts 128 may be formed of a via metal having a height of about 0.75 microns to 1.5 microns, or more particularly about 0.9 microns to 1.1 microns, or more particularly about 1.0 microns, such as about 100 angstroms of titanium, 500 nm. Aluminum, 500nm nickel And gold of 100 nm, and a width of about 2.5 to 3.5 microns (radial measurement). In various exemplary embodiments, the first terminal 125 formed from metal layers 120A and 120B is shaped similar to a GaN mesa but smaller than a GaN mesa, typically having a height of between about 4 microns and 8 microns, or more specifically between 5 microns and 7 microns. , or more particularly about 6 microns, to allow deposition of the first conductor 310A in contact with the metal contacts 128 and to allow deposition of the dielectric layer 315, which in turn is in contact with the second conductor 320 (illustrated in Figures 80-82) ). In this exemplary embodiment, the first terminal 125 formed by the metal layers 120A and 120B is also passivated (135). In addition to providing insulation and protection from contact with the first conductor 310, the passivation can also be used to facilitate The structural integrity of a terminal 125 is suitable for resisting the various forces applied in the printing process. In an exemplary embodiment, the width of the diode 100L (the distance between the face and the face of the generally hexagonal shape rather than the distance between the apex and the apex) is from about 10 microns to 50 microns, or more particularly From about 20 microns to 30 microns, or more specifically from about 22 microns to 28 microns, or more specifically from about 25 microns to 27 microns, or more specifically from about 25.5 microns to 26.5 microns, or more specifically about 26 microns. In an exemplary embodiment, the height of the diode 100L is typically from about 8 microns to 15 microns, or more specifically from 9 microns to 12 microns, or more specifically from about 10.5 microns to 11.5 microns.

It should be noted that the size of the two-terminal device can be more generally larger, such as diameter (width or length, depending on shape, also for face-to-face measurement) of about 10 microns to 75 microns, and a height of about 5 to 25 microns. .

25 is a cross-sectional view through a portion of a composite GaN heterostructure (or GaN mesa) (n+-type GaN layer 110, quantum well region 185, p+-type GaN layer 115) and metal layers 120A, 120B illustrating a composite GaN heterostructure The geometry and texture of the outer surface and/or inner surface (eg, the surface of the p+ type GaN layer 115 or the n+ type GaN layer 110 or other silver or mirror layer (103)) as appropriate. Any of the various features illustrated in Figure 25 can be used as an alternative to any of the various exemplary diodes 100-100L. As illustrated in Figures 1-24, the outer and/or inner surface of the composite GaN heterostructure can be relatively smooth. As illustrated in Figure 25, any of the various outer and/or inner surfaces of the composite GaN heterostructure can be fabricated to have any of a variety of textures, geometries, mirrors, reflectors, or other surface treatments. By way of example, but not limitation, the outer surface (upper surface or top surface) of the composite GaN heterostructure (illustrated as n+ type GaN layer 110) may be etched to provide surface roughness 112 (illustrated as a serrated cone or Tapered structure, such as to reduce internal reflection and enhance light extraction within the specific embodiment of the diode 100-100L. Additionally, the outer surface of the composite GaN heterostructure (eg, the surface of the p+ type GaN layer 115 or the n+ type GaN layer 110) may be masked and etched or otherwise fabricated to have various geometries, such as, but not limited to, a dome shape Or lens shape 116; super-annular, honeycomb or waffle shape 118; stripes 113 or other geometric shapes (eg, hexagons, triangles, etc.) 117. Additionally, side 121 may also include various mirrors or reflectors 109, such as dielectric reflectors (e.g., SiO ₂ /Si ₃ N ₄ ) or metal reflectors. A variety of surface treatments and reflectors are described, for example, in U.S. Patent No. 7,704,763 to Fujii et al. (issued on Apr. 27, 2010), and U.S. Patent No. 7,897,420 (issued on March 1, 2011). U.S. Patent Application Publication No. 2010/0295014 A1 to Kang et al. (published on Nov. 25, 2010), and U.S. Patent No. 7,825,425 (issued on Nov. 2, 2010), all of which are incorporated by reference. The manner is incorporated herein. Other surface textures and geometries are illustrated in Figures 104-108.

With continued reference to FIG. 25, the inner surface of the composite GaN heterostructure (or more generally, the diode 100-100L) can also be fabricated to have any of a variety of textures, geometries, mirrors, reflectors, or other surface treatments. As illustrated, by way of example and not limitation, reflective layer 103 can be used to provide orientation toward diodes 100-100L, such as by using a silver layer applied during fabrication (before fabrication of metal layers 102A, 102B) The exposed surface reflects outward and enhances light extraction, and the reflective layer 103 can be smooth (111) or have a textured (107) surface. Also by way of example, but not limitation, the inner surface of the composite GaN heterostructure can also be smooth or have a textured surface, such as by using other layers 108 that can be, for example, diffuse n-type InGaN materials. In addition, any of these various surface textures and textures as may be present may be used alone or in combination with one another, such as having a complex diffusion of outer surface texture 112 and inner surface texture (107) and/or reflective layer 103. structure. Various layers may optionally be used for other reasons, such as the use of n-type InGaN material in layer 108 to provide a preferred ohmic contact, regardless of any surface treatment that may or may not be used.

All dimensions of the diode 100-100L are generally less than about 450 microns, and all dimensions are more particularly less than about 200 microns, and all dimensions are more particularly less than about 100 microns, and all dimensions are more particularly less than 50 microns. In the illustrated exemplary embodiment, the width of the diode 100-100L is generally from about 10 microns to 50 microns, or more specifically from about 20 microns to 30 microns. And heights from about 5 microns to 25 microns, or heights more particularly from 5 microns to 15 microns, or diameters from about 25 microns to 28 microns (side to side rather than apex versus apex) and heights from 10 microns to 15 microns . In an exemplary embodiment, the height of the diode 100-100L that does not include the metal layer 120B or 122 forming the bump or protruding structure (ie, the height of the side 121 including the GaN heterostructure) depends on the specific example. Roughly from about 2 microns to 15 microns, or more specifically from about 2 microns to 4 microns, or more specifically from 7 microns to 12 microns, or more specifically from 8 microns to 11 microns, or more specifically from 9 microns to 10 microns, Or more particularly less than 10 microns to 30 microns, and the height of the metal layer 120B forming the bumps or protruding structures is generally from about 3 microns to 7 microns. Since the dimensions of the diode are engineered to be within a selected tolerance range during device fabrication, for example, but not limited to, using an optical microscope (which may also include measurement software), a scanning electron microscope (SEM), or Horiba LA-920 (for example, using Fraunhofer diffraction and light scattering to measure particle size when the particles are in a dilute solution, which can be in a diode ink or any other liquid or colloid (and Particle size distribution)) to measure the size of the diode. All dimensions or other measurements of the diode 100-100L shall be considered as the average of the plurality of diodes 100-100L (eg, mean and/or median) and will vary significantly depending on the particular instance selected ( For example, diodes 110-100J or 100K or 100L will generally have different individual sizes).

The diode 100-100L can be fabricated using any semiconductor fabrication technology currently known or developed in the future. Figures 26-66 illustrate a plurality of exemplary methods of fabricating exemplary diodes 100-100L and illustrating several other exemplary dipoles Body 100H, 100I and 100J (in cross section). Those skilled in the art will appreciate that the various steps in the various steps of making the diode 100-100L can be performed in any of a variety of orders, in other orders, omitted or incorporated, and can be Many diode structures outside the structure. For example, Figures 38-44 illustrate the formation of a diode 100H including central and peripheral through (or deep) vias 131 and 134, respectively, in the presence or absence of a second (back) metal layer 122, as appropriate. The features of the diodes 100D and 100G, and FIGS. 45-50 illustrate the formation of the diode 100I including the surrounding vias 133 under the presence or absence of the second (back) metal layer 122, as appropriate, and which may be Other illustrated manufacturing steps are combined to include a center or perimeter through the vias 131 and 134, for example to form a diode 100F.

26, 27 and 29-37 are cross-sectional views illustrating an exemplary method of fabricating diodes 100, 100A, 100B, 100C in accordance with the teachings of the present invention, wherein Figures 26-29 illustrate fabrication and fabrication at wafer 150 level 30-37 illustrates fabrication on the level of diodes 100, 100A, 100B, 100C. The various fabrication steps illustrated may also be used to form other diodes 100D-100L, and Figures 26-32 are applicable to any of the diodes 100-100L, depending on the selected substrate 105, 105A. 26 and 27 are cross-sectional views of a wafer 150 (such as a germanium wafer) having a cerium oxide (or "oxide") layer 190. 28 is a plan (or top) view of a germanium wafer 150 having a ceria layer 190 etched into a grid pattern. An oxide layer 190 (typically about 0.1 microns thick) is deposited or grown on wafer 150 as shown in FIG. As illustrated in Figure 27, a portion of the oxide layer 190 has been removed via a suitable or standard mask and/or photoresist layer and etch as known in the art, leaving a grid pattern (also known as a "road" Object The oxide 190 of (street)") is as illustrated in FIG.

29 is a buffer layer 145, a hafnium oxide (or "oxide") layer 190, and a GaN layer (in an exemplary embodiment, typically epitaxially grown or deposited to a thickness of between about 1.25 microns and 2.50 microns, although A cross-sectional view of a wafer 150 (such as a germanium wafer) having a small or large thickness also within the scope of the present invention, the GaN layer being illustrated as polycrystalline GaN 195 on oxide 190, and formed as described above The n + -type GaN layer 110 of the GaN heterostructure is combined, the quantum well region 185, and the p + -type GaN layer 115. As indicated above, a buffer layer 145, such as aluminum nitride or tantalum nitride, and typically about 25 angstroms thick, is deposited over the germanium wafer 150 to facilitate subsequent GaN deposition. The use of polycrystalline GaN 195 grown or deposited on oxide 190 reduces stress and/or strain in a composite GaN heterostructure (n+ type GaN layer 110, quantum well region 185, and p+ type GaN layer 115) that typically has a single crystal structure. (eg due to thermal mismatch between GaN and germanium wafers). Other equivalent methods that reduce the stress and/or strain within the scope of the present invention, such as, but not limited to, include roughening the surface of selected regions of germanium wafer 150 and/or buffer layer 145 such that the corresponding GaN regions are not The trench is etched for a single crystal, or in the germanium wafer 150 such that there are no continuous GaN crystals throughout the wafer 150. In other exemplary fabrication methods, such as when other substrates, such as GaN (substrate 105) on sapphire wafer 150A, are used, the road formation and stress reduction fabrication steps may be omitted. GaN deposition or growth to form a composite GaN heterostructure can be provided by any selected process known or to be known in the art and/or can be proprietary to device manufacturers. In an exemplary embodiment, the composite GaN heterojunction including the n+ type GaN layer 110, the quantum well region 185, and the p+ type GaN layer 115 is heterogeneous. The structure is available, for example, but not limited to, Blue Photonics, Inc. of Walnut, California, USA, and other suppliers.

30 is a cross-sectional view of a substrate 105 having a buffer layer 145 and a composite GaN heterostructure (n+-type GaN layer 110, quantum well region 185, and p+-type GaN layer 115) in accordance with the teachings of the present invention, illustrating one of wafers 150. A very small portion (such as region 191 of Figure 29) is used to illustrate the fabrication of a single diode 100-100L. The composite GaN heterostructure (n+-type GaN layer 110, quantum well region 185, and p+-type GaN layer 115) is etched to form a GaN mesa structure via appropriate or standard mask and/or photoresist layers and etching known in the art. 187, as illustrated in Figures 31 and 32, wherein Figure 32 illustrates a GaN mesa structure 187A having relatively sloping sides that may contribute to light generation and/or absorption. Other GaN mesa structures 187, such as partially or substantially hyper-annular GaN mesa structures 187, may also be constructed, as illustrated in Figures 10, 13, 14, 17, 20, 22, 39-44, and 66. After etching the GaN mesas (also known or known as standard or masks and/or photoresist layers and etching), a (shallow or blind) via etch is performed, as illustrated in FIG. A shallow trench 186 is formed through the GaN layer and buffer layer 145 and into the germanium substrate 105.

The vias 130A are formed and formed by the appropriate or standard mask and/or photoresist layer and etch as known in the art, followed by deposition of a metallization layer to form a via 130 with the p+ type GaN layer 115, as in FIG. Explained. In an exemplary embodiment, a plurality of layers of metal are deposited, the first or initial layer forming an ohmic contact with the p+ type GaN layer 115, which typically comprises two metal layers (nickel layer, followed by a gold layer) each of about 50 angstroms to 200 angstroms ), and then at about 450 ° C to 500 ° C Annealing in an oxidizing atmosphere containing about 20% oxygen and 80% nitrogen causes the nickel to rise to the top to form a nickel oxide layer and form a metal layer (as part of 120A) having a relatively good ohmic contact with the p+ type GaN layer 115. As another embodiment, during the fabrication of the diode 100L (and in other exemplary diode 100-100K embodiments), the top GaN layer (illustrated as a p+ type GaN layer 115, but may be other types of GaN) The layer, as illustrated in Figure 25, may also pass through a very thin optically reflective metal layer (illustrated as silver layer 103 in Figure 25) and/or an optically transmissive metal layer (not separately illustrated) (such as a thickness of about 100 angstroms) Nickel-gold or nickel-gold-nickel is metallized and alloyed therewith to aid in ohmic contact formation (and possibly to provide light reflection towards the n+ type GaN layer 110), some of which are then along with other GaN layers such as Removed during formation of GaN mesas. Another metallization layer can also be deposited, such as to form a thicker interconnect metal to shape and fully form metal layer 120A (eg, for current distribution) and to form vias 130. In another exemplary embodiment (illustrated in FIGS. 45-50), the metal contact 120A that forms an ohmic contact with the p+ type GaN layer 115 can be formed prior to GaN mesa etching, followed by GaN mesa etching, via etching, etc. . Many other metallization processes and corresponding materials that make up the metal layers 120A and 120B are also within the scope of the present invention, with different manufacturing facilities often using different processes and material choices. By way of example and not limitation, any one or two of the metal layers 120A and 120B may be deposited by depositing titanium to form an adhesive or seed layer having a thickness of typically 50 angstroms to 200 angstroms, followed by deposition of 2 micrometers to 4 micrometers. Nickel layer and gold thin layer or "flash layer" (gold "flash layer" is a layer having a thickness of about 50 angstroms to 500 angstroms), depositing 3 micrometers to 5 micrometers of aluminum, followed by deposition of nickel (about 0.5 micrometers, Physical vapor deposition or electroplating) and gold "flash layer", or by depositing titanium, followed by deposition of gold, followed by deposition of nickel (typically 3 microns to 5 microns for 120B), followed by deposition of gold, or by depositing aluminum, followed by deposition of nickel, followed by deposition of gold And formed. In addition, the height of the metal layer 120B forming the bump or protruding structure may also vary, typically between about 3.5 microns and 5.5 microns in the exemplary embodiment, depending on the thickness of the substrate 105 (eg, about 7 microns to The 8 micron GaN is relative to about 10 microns, such that the resulting diode 100-100L has a substantially uniform height and form factor.

For subsequent singulation of the diodes 100-100L from each other and singulation from the wafer 150, via appropriate or standard masking and/or photoresist layers and etching known in the art, as shown in FIG. 35 and other figures 40. As described in and at 48, a trench 155 is formed around the perimeter of each of the diodes 100-100L (e.g., as also illustrated in Figures 2, 5, 7, and 9). The trenches 155 generally have a width of from about 3 microns to 5 microns and a depth of from 10 microns to 12 microns. Appropriate or standard masking and/or photoresist layers and etching known in the art are then also used, as illustrated in Figure 36, such as by, for example, but not limited to, plasma enhanced chemical vapor deposition (PECVD) nitrogen. The ruthenium is grown to deposit or deposit a nitride passivation layer 135, typically up to a thickness of about 0.35 microns to 1.0 microns, followed by deposition of photoresist and an etching step to remove unnecessary tantalum nitride regions. In other exemplary embodiments, the sidewalls of the monolithic trenches may be passivated or may not be passivated. A metal layer 120B having bumps or protruding structures, typically having a height of from 3 microns to 5 microns, is formed via appropriate or standard masking and/or photoresist layers and etching known in the art, as shown in FIG. Description. In an exemplary embodiment, metal layer 120B is formed in several steps using metal crystals The seed layer is then deposited using an electroplating or stripping process to re-deposit the metal, remove the resist and clean the seed layer region. In addition to subsequent singulation of the diodes from the wafer 150 (in this case, the diodes 100, 100A, 100B, 100C), the diodes 100, 100A, 100B, 100C are otherwise completed as described below. It should be noted that the completed diodes 100, 100A, 100B, 100C have only one metal contact or terminal (first terminal 125) on the upper surface of each of the diodes 100, 100A, 100B, 100C. As an alternative, the second side (back) metal layer 122 can be fabricated to form the second terminal 127 as described below and as mentioned above with reference to other exemplary diodes.

Figures 38-44 illustrate another exemplary method of fabricating a diode 100-100L, wherein Figure 38 illustrates fabrication on the wafer 150A level and Figures 39-44 illustrate fabrication on the diode 100-100L level. 38 is a cross-sectional view of a wafer 150A having a substrate 105 and having a composite GaN heterostructure (n+-type GaN layer 110, quantum well region 185, and p+-type GaN layer 115). In this illustrative embodiment, a relatively thick GaN layer is grown or deposited on sapphire (106) (sapphire (106) of sapphire wafer 150A) (to form substrate 105), followed by deposition or growth of a GaN heterostructure (n+ type) The GaN layer 110, the quantum well region 185, and the p+ type GaN layer 115).

39 is a cross-sectional view of a substrate 105 having a third mesa-etched composite GaN heterostructure, illustrating a very small portion of wafer 150A (such as region 192 of FIG. 38) to illustrate a single diode (eg, diode 100H) , 100K) manufacturing. The composite GaN heterostructure (n+-type GaN layer 110, quantum well region 185, and p+-type GaN layer 115) is etched via appropriate or standard mask and/or photoresist layer and etching known in the art to form GaN mesa structure 187B . After the GaN mesa etching, the vias and the singulation trenches are etched (through or deep) via appropriate or standard masking and/or photoresist layers and etching known or to be known in the art. As illustrated in FIG. 40, one or more relatively deep vias are formed that pass through the non-mesa portion of the GaN heterostructure (n+-type GaN layer 110) and pass through the GaN substrate 105 to the sapphire (106) of the wafer 150A. The trench 188 and forms the singulated trench 155 described above. As illustrated, a central via trench 188 and a plurality of peripheral via trenches 188 are formed. For the specific example of the diode 100K, shallow or blind via etching may also be performed at the center of the mesa structure 187B without forming any peripheral vias or trenches.

The metallization layer is then deposited via a suitable or standard mask and/or photoresist layer and etching known in the art to form a central through via 131 and a plurality of peripheral vias 134, which are also associated with an n+ type GaN layer. 110 forms an ohmic contact as illustrated in FIG. In an illustrative embodiment, several layers of metal are deposited to form through vias 131, 134. For example, titanium and tungsten may be sputtered to coat the sides and bottom of the trench 188 to form a seed layer, which in turn is plated with nickel to form solid metal vias 131, 134.

The metallization layer is then deposited via a suitable or standard mask and/or photoresist layer and etch as known in the art to form a metal layer 120A that forms an ohmic contact with the p+ type GaN layer 115, as illustrated in FIG. In an illustrative embodiment, several layers of metal may be deposited as previously described to form metal layer 120A and form an ohmic contact with p+ type GaN layer 115. Appropriate or standard masking and/or photoresist layers and etchings known in the art are then also used, as illustrated in Figure 43, such as by, for example, but not limited to, plasma enhanced chemical vapor deposition (PECVD) nitrogen. Growth or deposition of a nitride passivation layer by bismuth or bismuth oxynitride 135, typically up to a thickness of about 0.35 microns to 1.0 microns, is then deposited with photoresist and an etching step is performed to remove unnecessary tantalum nitride regions. Metal layer 120B having bumps or protruding structures is then formed via suitable or standard mask and/or photoresist layers and etching as is known in the art, as illustrated in FIG. In an exemplary embodiment, as also described above, the metal layer 120B is formed in several steps, using a metal seed layer, followed by electroplating or stripping to redeposit the metal, removing the resist and cleaning the seed layer region. Come on. In addition to subsequent singulation of the diode from the wafer 150A (in this case, the diode 100H), the diode 100H is completed in other ways as described below, and it should be noted that such completed diodes The 100H also has only one metal contact or terminal (also the first terminal 125) on the upper surface of each of the diodes 100H. Also as an alternative, the second (back) metal layer 122 can be fabricated to form the second terminal 127 as described below and as mentioned above with reference to other exemplary diodes.

45-50 illustrate another exemplary method of fabricating a diode 100-100L, wherein FIG. 45 illustrates fabrication on a wafer 150 or 150A level and FIGS. 46-50 illustrates fabrication on a diode 100-100L level. 45 is a substrate having a buffer layer 145, a composite GaN heterostructure (n+-type GaN layer 110, quantum well region 185, and p+-type GaN layer 115) and a metallization layer (metal layer 120A) that forms an ohmic contact with the p+-type GaN layer. A cross-sectional view of 105. As described above, the buffer layer 145 is typically fabricated when the substrate 105 is germanium (eg, using a germanium wafer 150), and for other substrates (such as the GaN substrate 105), the buffer layer 145 may be omitted. Additionally, sapphire 106 is illustrated as an alternative, such as for a thick GaN substrate 105 grown or deposited on sapphire wafer 150A. also As described above, in the earlier step of fabricating the diode, after deposition or growth of the GaN heterostructure (n+-type GaN layer 110, quantum well region 185, and p+-type GaN layer 115), rather than in a later step, A metal layer 119 is deposited (as a seed layer for subsequent deposition of the metal layer 120A). For example, metal layer 119 can be a nickel and gold flash layer having a total thickness of about a few hundred angstroms, or can be passed through an extremely thin optically reflective metal layer (illustrated as silver layer 103 in FIG. 25) and/or optical. A transmissive metal layer, such as nickel-gold or nickel-gold-nickel having a thickness of about 100 angstroms, is metallized and alloyed therewith to aid in ohmic contact formation (and possibly provide light reflection towards the n+ type GaN layer 110) Some of them are then removed along with other GaN layers, such as during GaN mesa formation.

46 is a cross-sectional view of a substrate having a buffer layer, a fourth mesa-etched composite GaN heterostructure, and a metallization layer (metal layer 119) forming an ohmic contact with the p+ type GaN layer, illustrating one of the wafers 150 or 150A A very small portion (such as region 193 of Figure 45) is used to illustrate the fabrication of a single diode (e.g., diode 100I). The composite GaN heterostructure (n+-type GaN layer 110, quantum well region 185, and p+-type GaN layer 115) is etched (along with metal layer 119) via appropriate or standard mask and/or photoresist layers and etching known in the art. ) to form a GaN mesa structure 187C (along with the metal layer 119). After GaN mesa etching, a metallization layer (using any of the processes and metals previously described, such as titanium and aluminum, is also deposited via a suitable or standard mask and/or photoresist layer known or to be known in the art). It is then annealed to form metal layer 120A and also form a metal layer 129 having ohmic contact with n+ type GaN layer 110, as illustrated in FIG.

After metallization, it is also known or will be known by the art. A suitable or standard mask and/or photoresist layer and etch, as illustrated in Figure 48, passes through the non-mesa portion of the GaN heterostructure (n+-type GaN layer 110) and enters or penetrates deeper into the substrate 105 (eg As previously described, the sapphire (106) through the GaN substrate 105 to the wafer 150A or through a portion of the germanium substrate 105) is etched and singulated to form the singulated trench 155 described above.

A metallization layer is then deposited in the trench 155 via a suitable or standard mask and/or photoresist layer and etching known in the art to form a through or deep surrounding via 133 (around the diode (100I)) The entire periphery or side walls provide electrical conductivity) which also forms an ohmic contact with the n+ type GaN layer 110, as illustrated in FIG. In an exemplary embodiment, a plurality of layers of metal may also be deposited to form a peripheral through via 133. For example, titanium and tungsten may be sputtered to coat the sides and bottom of the trench 155 to form a seed layer, which in turn is plated with nickel to form a solid metal surrounding via 133.

Appropriate or standard masking and/or photoresist layers and etchings known in the art are then again used, as illustrated in Figure 50, such as by, for example, but not limited to, plasma enhanced chemical vapor deposition (PECVD). Nitridium nitride is used to grow or deposit a nitride passivation layer 135, typically up to a thickness of about 0.35 microns to 1.0 microns, followed by deposition of photoresist and an etching step to remove unnecessary tantalum nitride regions. Metal layer 120B having bumps or protruding structures is then formed as described previously by suitable or standard masking and/or photoresist layers and etching as is known in the art, as illustrated in FIG. In addition to subsequent singulation of the diode 150 or 150A singulated diode (in this case, the diode 100I), the diode 100I is completed in other ways as described below, and it should be noted that such completion is achieved. The diode 100I also has only one metal contact or terminal (also the first terminal 125) on the upper surface of each of the diodes 100I. Also as an alternative, the second (back) metal layer 122 can be fabricated to form the second terminal 127 as described below and as mentioned above with reference to other exemplary diodes.

Figures 51-57, 67 and 68 illustrate another exemplary method of fabricating a diode 100K after fabrication on a wafer 150 or 150A level as illustrated in Figure 45. 51 is a cross-sectional view of a substrate having a buffer layer, a fifth mesa-etched composite GaN heterostructure 187D, and a metallization layer that forms an ohmic contact with the p+-type GaN layer. As described above, the buffer layer 145 is typically fabricated when the substrate 105 is germanium (eg, using a germanium wafer 150), and for other substrates (such as the GaN substrate 105), the buffer layer 145 may be omitted. Additionally, sapphire 106 is illustrated as an alternative, such as for thick GaN substrate 105 grown or deposited on sapphire wafer 150A, in which case buffer layer 145 may be omitted. As also described above, in the earlier step of fabricating the diode, after deposition or growth of the GaN heterostructure (n+-type GaN layer 110, quantum well region 185, and p+-type GaN layer 115), rather than in a later step A metal layer 119 is deposited (as a seed layer for subsequently depositing the metal layer 120A). For example, metal layer 119 can be a nickel and gold flash layer having a total thickness of about a few hundred angstroms, or can be passed through an extremely thin optically reflective metal layer (illustrated as silver layer 103 in FIG. 25) and/or optical. A transmissive metal layer, such as nickel, nickel-gold or nickel-gold-nickel having a thickness of about 100 angstroms, is metallized and alloyed therewith to help form an ohmic contact with the p+ type GaN layer 115 (and possibly provide towards n+ The light of the GaN layer 110 is reflected, some of which are then removed along with other GaN layers, such as during GaN mesa formation. Suitable or standard masks and/or photoresists known in the art Layer and etching, etching a composite GaN heterostructure (n+-type GaN layer 110, quantum well region 185, and p+-type GaN layer 115) (along with metal layer 119) to form a GaN mesa structure 187D having a depth of about 1 micron (along with a metal layer) 119 together) generally has a toroidal shape with an inner diameter of about 14 microns and an outer generally hexagonal diameter of about 26 microns (side to side measurement).

After GaN mesa etching (187D), blind or shallow via trench etching is also performed via appropriate or standard masking and/or photoresist layers and etching known or to be known in the art, as shown in FIG. It is illustrated that a relatively shallow central via trench 211 is formed into the non-mesa portion (n+ type GaN layer 110) of the GaN heterostructure. As illustrated, a circular central via trench 211 having a depth of about 2 microns and a diameter of 6 microns is formed.

The metallization layer is then deposited via a suitable or standard mask and/or photoresist layer and etch as known in the art to form a central via 136 that also forms an ohmic contact with the n+ type GaN layer 110, such as This is illustrated in Figure 53. In an illustrative embodiment, several layers of metal (eg, via metal) are deposited to form a central via 136. For example, about 100 angstroms of titanium and about 1.5 to 2 micrometers of aluminum can be sputtered or plated to coat the sides, bottom, and a portion of the top of the trench 211, and then form an alloy at about 550 ° C for n+ type. A solid metal via 136 having a maximum diameter of about 10 microns is formed on top of the GaN layer 110. Appropriate or standard masking and/or photoresist layers and etchings known in the art are then also used, as illustrated in Figure 54, such as by, for example, but not limited to, plasma enhanced chemical vapor deposition (PECVD) nitrogen. The ruthenium or ruthenium oxynitride is grown or deposited with a first nitride passivation layer 135A, typically up to about 0.35 microns to 1.0 microns, or more specifically about 0.5 microns thick and about 18 microns. The largest diameter, followed by deposition of photoresist and an etching step to remove unnecessary tantalum nitride regions.

The metallization layer is then deposited via appropriate or standard masking and/or photoresist layers and etching as is known in the art to form a commonly used mold metal formed into contact with the p+ type GaN layer 115 as illustrated in FIG. A metal layer 120B having bumps or protruding structures. In an exemplary embodiment, several layers of metal may be deposited as previously described herein to form metal layers 120A and/or 120B for making contact with p+ type GaN layer 115, and for the sake of brevity, will not be repeated here . In an exemplary embodiment, metal layer 120B is generally hexagonal in shape and has a diameter of about 22 microns (side-to-side measurement) and comprises about 100 angstroms of nickel, about 4.5 micrometers of aluminum, and about 0.5 micrometers of nickel. And about 100nm gold.

After metallization, an appropriate or standard mask and/or photoresist layer and etching are also known or to be known in the art, as illustrated in Figure 56, through a portion of the GaN heterogeneity using the methods previously described. The structure (into but not completely through the n+ type GaN layer 110) (typically about 2 microns deep in an exemplary embodiment) is singulated trench trench etched and forms the singulated trench 155 described above .

As illustrated in FIG. 57, the second nitride passivation layer 135 is then grown or deposited, such as by, but not limited to, plasma enhanced chemical vapor deposition (PECVD) tantalum nitride or hafnium oxynitride, typically up to about 0.35. A thickness of from micron to 1.0 micron, or more specifically about 0.5 micron. The unnecessary tantalum nitride regions are then removed using suitable or standard mask and/or photoresist layers and etching known in the art, such as to clean the top of metal layer 102B, which will form a second Terminal 127.

Subsequent substrate removal, singulation and fabrication of the second (back) metal layer 122 are described below with reference to Figures 64, 65, 67 and 68.

Figures 58-63 and 69 illustrate another exemplary method of fabricating diode 100L after fabrication on wafer 150 or 150A level as illustrated in Figure 45. Figure 58 is a cross-sectional view of a substrate having a buffer layer, a sixth mesa-etched composite GaN heterostructure 187E, and a metallization layer that forms an ohmic contact with the p+-type GaN layer. As described above, the buffer layer 145 is typically fabricated when the substrate 105 is germanium (eg, using a germanium wafer 150), and for other substrates (such as the GaN substrate 105), the buffer layer 145 may be omitted. Additionally, sapphire 106 is illustrated as an alternative, such as for thick GaN substrate 105 grown or deposited on sapphire wafer 150A, in which case buffer layer 145 may be omitted. As also described above, in the earlier step of fabricating the diode, after deposition or growth of the GaN heterostructure (n+-type GaN layer 110, quantum well region 185, and p+-type GaN layer 115), rather than in a later step A metal layer 119 is deposited (as a seed layer for subsequently depositing the metal layer 120A). For example, metal layer 119 can be a nickel and gold flash layer having a total thickness of about a few hundred angstroms, or can be passed through an extremely thin optically reflective metal layer (illustrated as silver layer 103 in FIG. 25) and/or optical. A transmissive metal layer, such as nickel, nickel-gold or nickel-gold-nickel having a thickness of from about 100 angstroms to about 2.5 nm, is metallized and alloyed therewith to facilitate ohmic contact with the p+ type GaN layer 115 (and It is possible to provide light reflection towards the n+ type GaN layer 110, some of which are then removed along with other GaN layers, such as during GaN mesa formation. In an exemplary embodiment, nickel or nickel and gold are deposited from about 2 nm to 3 nm, or more specifically about 2.5 nm, and It is alloyed at 500 ° C to form a metal layer 119 in ohmic contact with the p + -type GaN layer 115. The composite GaN heterostructure (n+-type GaN layer 110, quantum well region 185, and p+-type GaN layer 115) is etched (along with metal layer 119) via appropriate or standard mask and/or photoresist layers and etching known in the art. Having a GaN mesa structure 187E (along with metal layer 119) having a depth of about 1 micron having the flattened triangular shape discussed above, the first radius of the cut-out region leaving space for contact 128 is about 8 The second radius of the micron and to the apex/side of the triangle is about 11 microns.

After the GaN mesa etching (187E), the first metallization layer is then deposited via the appropriate or standard mask and/or photoresist layer and etching known in the art to form contacts 128, which are also An ohmic contact is formed with the n+ type GaN layer 110 as illustrated in FIG. In an exemplary embodiment, several layers of via metal are deposited to form contacts 128 that serve as second terminals 127. By way of example and not limitation, about 100 angstroms of titanium, about 500 nm of aluminum, 500 nm of nickel, and 100 nm of gold can be sputtered or plated to form solid metal contacts 128 each having a thickness of about 1.1 microns. The vector is measured to have a width of about 3 microns and extends around the perimeter of the n+ type GaN layer 110 as illustrated in FIG. In an exemplary embodiment, as illustrated in FIG. 23, three contacts 128 are formed.

After depositing the contacts 128, other metallization layers are also deposited via appropriate or standard mask and/or photoresist layers known or to be known in the art (using any of the processes and metals previously described, such as titanium and Aluminum, which in turn is annealed, to form metal layer 120A as part of the ohmic contact for p+ type GaN layer 115, as illustrated in FIG. For example, in an exemplary specific In an example, about 200 nm of silver (forming a reflective or mirror layer), 200 nm of nickel, about 500 nm of aluminum, and 200 nm of nickel can be sputtered or plated to form a centrally located metal layer 120A having a thickness of about 1.1 microns and The diameter is about 8 microns.

Other metallization layers are then deposited via appropriate or standard masking and/or photoresist layers and etching known in the art to form a commonly used mold metal in contact with the p+ type GaN layer 115 as illustrated in FIG. A metal layer 120B having bumps or protruding structures is formed. In an exemplary embodiment, several layers of metal may be deposited as previously described herein to form metal layers 120A and/or 120B for making contact with p+ type GaN layer 115, and for the sake of brevity, will not be repeated here . In an exemplary embodiment, metal layer 120B generally has a flattened triangular shape as illustrated in FIG. 23, wherein the first radius to the dicing region (for contact 128) is about 6 microns, to the apex/side of the triangle The second radius is about 9 microns, each having a width of about 3.7 microns, and it comprises about 200 nm of silver (also forming a reflective or mirror layer on the p+ type GaN layer 115), about 200 nm of nickel, about 200 nm of aluminum, About 250 nm of nickel, about 200 nm of aluminum, about 250 nm of nickel, and about 100 nm of gold, each of the above metals is added as a continuous layer, and then an alloy is formed in a nitrogen atmosphere at 550 ° C for about 10 minutes to achieve a total of about 5 μm. Height (except for a height of about 1.1 microns of metal layer 120A). It should be noted that this places the first terminal and the second terminal 125, 127 at a height of about 5 microns.

As illustrated in FIG. 62, the second nitride passivation layer 135 is then grown or deposited, such as by, but not limited to, plasma enhanced chemical vapor deposition (PECVD) tantalum nitride or hafnium oxynitride, typically up to about 0.35. Micron to 1.0 A thickness of micrometers, or more particularly about 0.5 micrometers. The unnecessary tantalum nitride regions are then removed using suitable or standard mask and/or photoresist layers and etching as known in the art, such as to clean the top of metal layer 102B, which will form first terminal 125.

After passivation, an appropriate or standard mask and/or photoresist layer and etch as known or to be known in the art, as illustrated in Figure 63, through a portion of the GaN heterostructure, as previously illustrated in FIG. (Entering but not completely passing through the n+ type GaN layer 110) (typically about 2 microns to 3.5 microns in depth in an exemplary embodiment) undergoing singulation trench etching and forming the monolithic channels described above Ditch 155.

Subsequent substrate removal and singulation are described below with reference to Figures 64, 65, 67 and 69.

Various variations of the method of making the diode 100-100L are apparent from the teachings of the present invention, and all variations are considered equivalent and within the scope of the invention. In other exemplary embodiments, the trench 155 formation and (nitride) passivation layer formation may be performed earlier or later in the device fabrication process. For example, trenches 155 may be formed later in the fabrication process after formation of metal layer 120B, and the exposed substrate 105 may be left or a second passivation may be performed thereafter. Also for example, a trench 155 may be formed earlier in the fabrication process, such as after GaN mesa etching, followed by deposition of a (nitride) passivation layer 135. In the latter embodiment, to maintain planarization during the remainder of the device fabrication process, the passivated trench 155 may be filled with an oxide, photoresist, or other material (deposited layer, followed by a photoresist mask and etched or absent Mask etch process removes unnecessary areas) or can be filled with resist (and at metal contacts 120A It may be refilled after formation). In another embodiment, the deposition of tantalum nitride 135 (followed by a masking and etching step) can be performed after GaN mesa etching and prior to deposition of metal contacts 120A.

64 is a cross-sectional view illustrating a specific example of an exemplary tantalum wafer 150 having a plurality of diodes 100-100L adhered to a holding device 160, such as a holding, handling or holder wafer. 65 is a cross-sectional view illustrating a specific example of an exemplary diode sapphire wafer 150A adhered to holding device 160. As illustrated in Figures 64 and 65, any known commercially available wafer adhesive or wafer bond 165 will be used to contain a plurality of unreleased diodes 100-100L (for general purposes of illustration purposes without any significant The feature details of the diode wafers 150, 150A are adhered to the holding device 160 (such as a wafer holder) on the first side of the diode 150, 150A having the manufactured diodes 100-100L. As illustrated and as described above, singulated or individualized trenches 155 have been formed between wafers 100-100L during wafer processing, such as via etching, followed by singulation or individualization The trench 155 separates each of the diodes 100-100L from the adjacent diodes 100-100L without performing a mechanical process such as sawing. As illustrated in FIG. 64, while the diode wafer 150 is still adhered to the holding device 160, the second side (back side) 180 of the diode wafer 150 is then etched (eg, wet or dry etched) or Mechanically ground and polished to a certain level (illustrated in dashed lines), or etched and mechanically ground and polished to expose the trenches 155, or leave some other substrate, which may then be etched via, for example, but not limited to, except. When sufficiently etched or ground and polished, or fully etched and ground and polished (and/or along with any other etching), the individual diodes 100-100L have They are released from each other and released from any remaining diode wafer 150 while still being adhered to the holding device 160 by the adhesive 165. As illustrated in FIG. 65, while the diode wafer 150A is still adhered to the holding device 160, the second side (back) 180 of the diode wafer 150A is then exposed to the laser light (illustrated as one or more a laser beam 162), which then cuts the GaN substrate 105 from the sapphire 106 of the wafer 150A (illustrated by dashed lines) (also known as laser stripping), and may be followed by any other chemical mechanical polishing and any desired Etching (eg, wet or dry etching) causes the individual diodes 100-100L to be released from each other and released from the wafer 150A while still being adhered by the adhesive 165 to the holding device 160. In this illustrative embodiment, wafer 150A can then be ground and/or polished and reused.

Epoxy beads are also typically applied around the perimeter of wafer 150 (not separately illustrated) to prevent non-diode segments from being released from the wafer edge to the diode during the diode release process discussed below (100) -100L) in the fluid.

Figure 66 is a cross-sectional view showing an exemplary embodiment of an exemplary diode 100J adhered to a holding device. After the singulated diode 100-100K (as described above with reference to Figures 64 and 65), and while the diode 100-100K is still adhered to the holding device 160 by the adhesive 165, the diode 100 is exposed. The second side of the 100K (back). As illustrated in FIG. 66, the metallization layer can then be deposited to the second side (back side), such as via vapor deposition (tilting to avoid filling trenches 155), forming a second side (back) metal layer 122 and a diode 100J. Specific examples. As also illustrated, the diode 100J has a central through via 131 formed in ohmic contact with the n+ type GaN layer 110 and in contact with the second side (back) metal layer 122 for the n+ type GaN layer 110 and the second side. (back) Current is conducted between the metal layers 122. The exemplary diode 100D is quite similar to the exemplary diode 100J having a second (back) metal layer 122 to form a second terminal 127. As mentioned previously, the second (back) metal layer 122 (or any of the substrate 105 or each of the through vias 131, 133, 134) can be used in the devices 300, 300A, 300B, 300C, 300D, 720 The first conductor 310 is electrically connected to the 730, 760 to energize the diode 100-100K.

Figure 67 is a cross-sectional view illustrating an exemplary twelfth polar body embodiment adhered to holding device 160 prior to back metallization. As illustrated in FIG. 67, the diodes in the exemplary process are singulated, wherein any substrate 105, 105A is removed as described above and also by an etching step (eg, wet or dry etching), exposing the n+ type GaN layer 110 And the surface of via 136, leaving a composite GaN heterostructure having a depth of from about 2 microns to 6 microns (or more specifically from about 2 microns to 4 microns, or more specifically about 3 microns). The second side (back side) is then formed using a suitable or standard mask and/or photoresist layer and etching known in the art, such as by depositing a metallization layer to the second side (back side) via sputtering, electroplating or vapor deposition. Specific examples of the metal layer 122 and the diode 100K are as illustrated in FIG. In an exemplary embodiment, metal layer 122 is elliptical, as illustrated in Figure 21, having a major axis width of generally from about 12 microns to 16 microns, a minor axis width of from about 4 microns to 8 microns, and a depth of about 4 microns to 6 microns, or more preferably having a major axis width of about 14 microns, a minor axis width of about 6 microns, and a depth of about 5 microns, and comprising about 100 angstroms of titanium, about 4.5 microns of aluminum, about 0.5 micron nickel and 100 nm gold. As also explained for the diode 100K, the initial shallow pilot hole is now A through via 136 that forms an ohmic contact with the n+ type GaN layer 110 and contacts the second side (back) metal layer 122 to conduct a current between the n+ type GaN layer 110 and the second side (back) metal layer 122. As mentioned previously, for this exemplary diode 100K embodiment, the diode 100K is then flipped or inverted, and the second (back) metal layer 122 forms the first terminal 125 and can be used in the device 300, 300A , 300B, 300C, 300D, 720, 730, 760 form an electrical connection with the second conductor 320 to energize the diode 100K.

Figure 69 is a cross-sectional view showing an exemplary embodiment of an exemplary eleventh diode 100L adhered to a holding device. As illustrated in Figure 69, an exemplary diode 100L is singulated, wherein any substrate 105, 105A is removed as described above and in an etch step, exposing the surface of the n+ type GaN layer 110 leaving a depth of about 2 microns A composite GaN heterostructure to 6 microns (or more particularly from about 3 microns to 5 microns, or more specifically from about 4 microns to 5 microns, or more specifically about 4.5 microns).

After the monomerized diode 100-100L, it can be used to form a diode ink, which is discussed below with reference to Figures 74 and 75.

It should also be noted that various surface geometries and/or textures can also be fabricated for each of the diodes 100-100L to help reduce internal reflection and enhance light extraction while constructing the LED. Any of these various surface geometries can also have any of the various surface textures previously discussed with reference to FIG. Figure 104 is a perspective view illustrating an exemplary first surface geometry of an exemplary illuminating or light absorbing region constructed as a plurality of concentric rings or super-annular shapes on the upper illuminating (or light absorbing) surface of the diode 100K. Usually before or after the addition of the back metal 122, via this technology The geometry is etched into the second side (back side) of the diode 100K by a suitable or standard mask and/or photoresist layer and etching to be known. Figure 105 is a perspective view illustrating an exemplary second surface geometry of an exemplary illuminating or light absorbing region constructed as a plurality of substantially curved trapezoidal shapes on the upper illuminating (or light absorbing) surface of the diode 100K. The geometry is also etched to the second side of the diode 100K, either before or after the addition of the back metal 122, also via a suitable or standard mask and/or photoresist layer and etching known or to be known in the art. (back).

106 is a perspective view illustrating an exemplary third surface geometry of an exemplary illuminating or light absorbing region constructed as a plurality of substantially curved edges on a lower (or bottom) illuminating (or light absorbing) surface of a diode 100L. Trapezoidal shape. Figure 107 is a perspective view illustrating an exemplary fourth surface geometry of an exemplary illuminating or light absorbing region constructed to be substantially star shaped on the lower (or bottom) illuminating (or light absorbing) surface of the diode 100L. Figure 108 is a perspective view illustrating an exemplary fifth surface geometry of an exemplary illuminating or light absorbing region constructed as a plurality of substantially parallel rods on a lower (or bottom) illuminating (or light absorbing) surface of a diode 100L. Shape or stripe shape. The geometries are also typically etched into the second side (back side) of the diode 100L via a suitable or standard mask and/or photoresist layer and etch known or to be known in the art, as a prior reference Part of the substrate removal process and/or diode singulation process discussed in FIG.

Figures 70, 71, 72, and 73 are flow diagrams illustrating illustrative first, second, third, and fourth method embodiments for fabricating diodes 100-100L, respectively, and provide a suitable overview. It should be noted that many of these methods The steps can be performed in any of a variety of orders, and the steps of one exemplary method can be used in other exemplary methods. Thus, each method will generally involve the fabrication of any of the diodes 100-100L, rather than the manufacture of specific examples of specific diodes 100-100L, and those skilled in the art should be aware of which steps can be "mixed and matched". To form any selected diode 100-100L specific example.

Referring to Figure 70, starting from the initial step 240, an oxide layer is grown or deposited on a semiconductor wafer, such as a germanium wafer (step 245). The oxide layer is etched (step 250) such as to form a grid or other pattern. A buffer layer and a luminescent or light absorbing region (such as a GaN heterostructure) are grown or deposited (step 255), followed by etching to form a mesa structure of each of the diodes 100-100L (step 260). The wafer 150 is then etched to form via trenches in the substrate 105 of each of the diodes 100-100L (step 265). One or more metallization layers are then deposited to form metal contacts and vias for each of the diodes 100-100L (step 270). The singulated trench is then etched between the diodes 100-100L (step 275). A passivation layer is then grown or deposited (step 280). A bump or protruding metal structure is then deposited or grown on the metal contacts (step 285) and the method may end, returning to step 290. It should be noted that multiple of these manufacturing steps can be performed by different entities and reagents, and the method can include other variations and ordering of the steps discussed above.

Referring to Figure 71, starting from the initial step 500, a relatively thick GaN layer (e.g., 7 microns to 8 microns) is grown or deposited on a wafer (such as sapphire wafer 150A) (step 505). Growing or depositing a luminescent or light absorbing region (such as a GaN heterostructure) (step 510), followed by etching to form each diode A mesa structure of 100-100 L (on the first side of each of the diodes 100-100L) (step 515). The wafer 150 is then etched to form one or more through or deep via trenches and singulated trenches in the substrate 105 of each of the diodes 100-100L (step 520). The seed layer is then typically deposited by using any of the methods described above (step 525), followed by other metal deposition to deposit one or more metallization layers to form through vias for each of the diodes 100-100L. The guide holes (131, 134, 133, respectively) may be through the center, the periphery or the periphery. Metal is also deposited to form one or more metal contacts with GaN heterostructures (such as with p+ type GaN layer 115 or with n+ type GaN layer 110) (step 535) and to form any other current distribution metal (eg, 120A, 126) (Step 540). A passivation layer is then grown or deposited (step 545) wherein a certain area is etched or removed as previously described and illustrated. A bump or protruding metal structure (120B) is then deposited or grown on the metal contacts (step 550). Wafer 150A is then attached to the holding wafer (step 555) and sapphire or other wafers are removed (eg, via laser cutting) to singulate or individualize diodes 100-100L (step 560). Metal is then deposited on the second side (back side) of the diode 100-100L to form a second side (back) metal layer 122 (step 565), and the method may end, returning to step 570. It should also be noted that the various steps in such manufacturing steps can be performed by different entities and reagents, and the method can include other variations and ordering of the steps discussed above.

Referring to Figure 72, starting from the initial step 600, a relatively thick GaN layer (e.g., 7 microns to 8 microns) is grown or deposited on the wafer 150 (such as sapphire wafer 150A) (step 605). A luminescent or light absorbing region (such as a GaN heterostructure) is grown or deposited (step 610). Depositing metal to form one or more Metal junctions with GaN heterostructures (such as with p+ type GaN layer 115, as illustrated in Figure 45) (step 615). Next, an illuminating or light absorbing region (such as a GaN heterostructure) and a metal contact layer (119) are etched to form a mesa structure of each of the diodes 100-100L (on the first side of each of the diodes 100-100L) (step 620) ). The metal is deposited to form one or more metal contacts to the GaN heterostructure (such as n+ type metal contact layer 129 with n+ type GaN layer 110, as illustrated in Figure 47) (step 625). The wafer 150A is then etched to form one or more through or deep via trenches and/or singulated trenches in the substrate 105 of each of the diodes 100-100L (step 630). One or more metallization layers are then deposited using any of the metal deposition methods described above to form through vias for each of the diodes 100-100L, which may be through the vias at the center, perimeter, or periphery (131, 134, respectively) , 133). Metal is also deposited to form one or more metal contacts with GaN heterostructures (such as with p+ type GaN layer 115 or with n+ type GaN layer 110) and to form any other current distribution metal (eg, 120A, 126) (step 640) ). If the monolithic trench has not previously been formed (in step 630), the singulated trench is etched (step 645). A passivation layer is then grown or deposited (step 650) wherein a certain area is etched or removed as previously described and illustrated. A bump or protruding metal structure (120B) is then deposited or grown on the metal contacts (step 655). The wafers 150, 150A are then attached to the holding wafer (step 660), and the sapphire or other wafer is removed (eg, via laser cutting or back grinding and polishing) to singulate or individualize the diode 100- 100L (step 665). Metal is then deposited on the second side (back side) of the diode 100-100L to form a second (back) conductive (e.g., metal) layer 122 (step 670), and the method may end, returning to step 675. It should also be noted that the various steps in such manufacturing steps can be performed by different entities and reagents, and the method can include other variations and ordering of the steps discussed above.

Referring to FIG. 73, starting from the initial step 611, a relatively thick GaN layer (eg, 7 micrometers to 8 micrometers) is grown or deposited on the wafer 150 (such as sapphire wafer 150A) or the buffer layer 145 of the germanium wafer 150 (steps) 611). A luminescent or light absorbing region (such as a GaN heterostructure) is grown or deposited (step 616). The metal is deposited to form one or more metal contacts with a GaN heterostructure (such as with p+ type GaN layer 115, as illustrated in Figure 45) (step 621). Next, an illuminating or light absorbing region (such as a GaN heterostructure) and a metal contact layer (119) are etched to form a mesa structure of each of the diodes 100-100L (on the first side of each of the diodes 100-100L) (step 626) ). For the diode 100K specific example, the GaN heterostructure is then etched to form a central via trench for each of the diodes 100K (step 631), and in other cases step 631 may be omitted. One or more metallization layers are then deposited using any of the metal deposition methods described above to form the central vias 136 of each of the diodes 100K or the metal contacts 128 of the diodes 100L (step 636). For the diode 100K specific example, passivation layer 135A is then grown or deposited (step 641), where certain regions are etched or removed as previously described and as illustrated, and in other cases step 641 may be omitted. Metal is also deposited to form one or more metal contacts to a GaN heterostructure, such as p+ type GaN layer 115, such as metal layer 120B or metal layers 120A and 120B (step 646). If the monolithic trench has not previously been formed, the singulated trench is etched (step 651). A passivation layer is then grown or deposited (step 656), wherein the etching or Remove a certain area. It should be noted that for the fabrication of the diode 100L, steps 656 and 651 are performed in reverse order, wherein passivation is performed first, followed by etching of the singulated trench. The wafers 150, 150A are then attached to the holding wafer (step 661) and the crucible, sapphire or other wafer is removed (eg, via laser cutting or back grinding and polishing) to singulate or individualize the diode 100-100L (step 666), such as removing any other GaN via etching. For the diode 100K embodiment, metal is then deposited on the second side (back side) of the diode 100K to form a second (back) conductive (eg, metal) layer 122 (step 671), and the method can end Go back to step 676. It should also be noted that the various steps in such manufacturing steps can be performed by different entities and reagents, and the method can include other variations and ordering of the steps discussed above. For example, steps 611 and 612 can be performed by a specialized vendor.

Figure 74 is a cross-sectional view showing individual diodes 100-100L (also without any significant feature details for illustrative purposes), the diodes are no longer in the diode wafer 150, 150A Coupling together (since the second side of the diode wafer 150, 150A is now ground or polished, cut (laser stripped) and/or etched to fully exposed singulated (individualized) trench 155), However, the wafer adhesive 165 is adhered to the holding device 160 and suspended or immersed in the vessel 175 containing the wafer adhesive solvent 170. Any suitable vessel 175 can be used, such as a petri dish, wherein one exemplary method uses a polytetrafluoroethylene (PTFE or Teflon) vessel 175. Wafer Adhesive Solvent 170 can be any commercially available wafer adhesive solvent or wafer adhesive remover, including, without limitation, 2-dodecene crystals available from Brewer Science, Inc. of Rolla, Missouri USA. circle A binder remover, or any other relatively long chain alkane or olefin or short chain heptane or heptene. The diode 100-100L adhered to the holding device 160 is typically immersed in the wafer adhesive solvent 170 for about 5 to about 15 minutes at room temperature (eg, about 65 °F - 75 °F or higher), and is illustrated In the specific example, sonic processing can also be performed. As the wafer adhesive solvent 170 dissolves the adhesive 165, the diodes 100-100L are separated from the adhesive 165 and the holding device 160 and are mostly or substantially individually or in groups or clumps down to the bottom of the vessel 175. When all or most of the diodes 100-100L have been released from the holding device 160 and deposited to the bottom of the vessel 175, the vessel 175 is removed from the holding device 160 and a portion of the wafer adhesive solvent 170 currently in use. Then add a wafer adhesive solvent 170 (about 120ml to 140ml), and usually stir the mixture of the wafer adhesive solvent 170 and the diode 100-100L at room temperature or higher (for example, using a sonic processor) Or the impeller mixer) for about 5 to 15 minutes, and then the diode 100-100L is again precipitated to the bottom of the vessel 175. This process is then generally repeated at least once again so that when all or most of the diode 100-100L has settled to the bottom of the vessel 175, a portion of the wafer adhesive solvent 170 currently in use is removed from the vessel 175 and then added (about 120 ml). Up to 140 ml) of the wafer adhesive solvent 170, and then agitating the mixture of the wafer adhesive solvent 170 and the diode 100-100L at room temperature or higher for about 5 to 15 minutes, and then again making the diode 100-100L Precipitates to the bottom of the vessel 175 and removes a portion of the remaining wafer adhesive solvent 170. At this stage, a sufficient amount of any residual wafer adhesive 165 has been removed from the diode 100-100L, or the wafer adhesive solvent 170 process has been repeated until it is no longer possible to interfere with the printing of the diode 100-100L. or It works.

The wafer adhesive solvent 170 (containing the dissolved wafer adhesive 165) or any other solvent, solution or other liquid discussed below can be removed in any of a variety of ways. For example, the wafer adhesive solvent 170 or other liquid can be removed by vacuum, pumping, pumping, pumping, etc., such as via a pipette. Also for example, the wafer adhesion can be removed by, for example, using a sieve having a suitable opening or micropore size or a porous ruthenium membrane to filter a mixture of the diode 100-100L and the wafer adhesive solvent 170 (or other liquid). Agent solvent 170 or other liquid. It should also be mentioned that all of the various fluids used in the diode ink (and the dielectric ink discussed below) are filtered to remove particles larger than about 10 microns.

Diode Ink Example 1:

The composition comprising the following: a plurality of diodes 100-100L; and a solvent.

Substantially all or most of the wafer adhesive solvent 170 is then removed. In an exemplary embodiment and by way of example, a solvent, and more particularly a polar solvent such as isopropyl alcohol ("IPA"), is added to the mixture of wafer adhesive solvent 170 and diode 100-100L, The mixture of IPA, wafer adhesive solvent 170 and diode 100-100L is then typically stirred at room temperature (although equivalently higher temperatures can be used) for about 5 to 15 minutes, followed by diodes 100-100L again. Precipitate to the bottom of vessel 175 and remove a portion of the mixture of IPA and wafer adhesive solvent 170. Add IPA (120ml to 140ml) and repeat the process twice or more, usually at room temperature A mixture of IPA, wafer adhesive solvent 170 and diode 100-100L for about 5 to 15 minutes, and then again precipitate the diode 100-100L to the bottom of the vessel 175, removing a portion of the IPA and wafer adhesive solvent 170. Mix the mixture and add IPA. In an exemplary embodiment, the resulting mixture is from about 100 ml to 110 ml IPA and from about 9 million to 10 million diodes from four wafers 100-100 L (about 9.7 million diodes per four wafers 150) The body 100-100L), which is then transferred to another larger container, such as a PTFE bottle, can include, for example, re-cleaning the diode into the vial with IPA. One or more solvents may be used equivalently, such as, but not limited to, water; alcohols such as methanol, ethanol, n-propanol ("NPA") (including 1-propanol, 2-propanol (IPA), 1 -Methoxy-2-propanol), butanol (including 1-butanol, 2-butanol (isobutanol)), pentanol (including 1-pentanol, 2-pentanol, 3-pentanol) , octanol, n-octanol (including 1-octanol, 2-octanol, 3-octanol), tetrahydrofurfuryl alcohol (THFA), cyclohexanol, rosin alcohol; ethers, such as methyl ethyl ether, diethyl ether, Ethyl propyl ether and polyether; esters such as ethyl acetate, dimethyl adipate, propylene glycol monomethyl ether acetate, dimethyl glutarate, dimethyl succinate, glycerol acetate; Alcohols such as ethylene glycol, diethylene glycol, polyethylene glycol, propylene glycol, dipropylene glycol, glycol ethers, glycol ether acetates; carbonates such as propyl carbonate; glycerols such as glycerol; acetonitrile, Tetrahydrofuran (THF), dimethylformamide (DMF), N-methylformamide (NMF), dimethyl hydrazine (DMSO); and mixtures thereof. The first embodiment in which the resulting mixture of diode 100-100L and solvent (such as IPA) is a diode ink is described above as Example 1 and may be provided as a separate composition, for example for subsequent modification or also for example In printing. In other illustrative embodiments discussed below, the diode 100-100L and the solvent (the The resulting mixture, such as IPA), is an intermediate mixture which is further modified as described below to form a diode ink for use in printing.

In various exemplary embodiments, the first (or second) solvent is selected based on at least two characteristics or characteristics. The first characteristic of the solvent is that it is soluble in a viscosity modifier or an adhesive viscosity modifier (such as hydroxypropyl methylcellulose resin, methoxypropyl methylcellulose resin or other cellulose resin or methyl cellulose resin) The ability to disperse viscosity modifiers or adhesion viscosity modifiers. The second characteristic or characteristic is its evaporation rate, which should be slow enough to allow sufficient retention of the screen ink (for screen printing) or other printing parameters. In various exemplary embodiments, the exemplary evaporation rate is less than 1 (<1, relative rate compared to butyl acetate) or more specifically 0.0001 to 0.9999.

Diode Ink Example 2:

Contains the following composition: a plurality of diodes 100-100L; and a viscosity modifier.

Diode Ink Example 3:

The composition comprising: a plurality of diodes 100-100L; and a solvating agent.

Diode Ink Example 4:

The composition comprises the following: a plurality of diodes 100-100L; and a wetting solvent.

Diode Ink Example 5:

The composition comprises the following: a plurality of diodes 100-100L; a solvent; and a viscosity modifier.

Diode Ink Example 6:

The composition comprises the following: a plurality of diodes 100-100L; a solvent; and an adhesive viscosity modifier.

Diode Ink Example 7:

The composition comprises: a plurality of diodes 100-100L; a solvent; and a viscosity modifier; wherein the composition is opaque when wet and substantially optically transmissive or otherwise transparent when dry.

Diode Ink Example 8:

The composition comprises: a plurality of diodes 100-100L; a first polar solvent; a viscosity modifier; and a second non-polar solvent (or a rewetting agent).

Diode Ink Example 9:

The composition comprises: a plurality of diodes 100-100L, each of the plurality of diodes 100-100L having a size of less than 450 microns; and a solvent.

Diode Ink Example 10:

A composition comprising: a plurality of diodes 100-100L; and at least one substantially non-insulating carrier or solvent.

Diode Ink Example 11:

The composition comprises: a plurality of diodes 100-100L; a solvent; and a viscosity modifier; wherein the composition has a dewetting or contact angle of greater than 25 degrees or greater than 40 degrees.

Referring to Diode Ink Examples 1-11, a variety of exemplary diode ink compositions are within the scope of the present invention. In general, as in Example 1, the liquid suspension of the diode (100-100 L) comprises a plurality of diodes (100-100 L) and a first solvent (such as the IPA discussed above or as discussed below) Propanol, 1-methoxy-2-propanol, dipropylene glycol, 1-octanol (or more generally n-octanol), or diethylene glycol); as in Example 2, a diode (100- 100L) of the liquid suspension comprises a plurality of diodes (100-100L) and a viscosity modifier (such as the viscosity modifier discussed below, which may also be an adhesion viscosity modifier as in Example 6); In Examples 3 and 4, The liquid suspension of the diode (100-100 L) comprises a plurality of diodes (100-100 L) and a solvating or wetting solvent (such as one of the second solvents discussed below, such as a dibasic ester). More specifically, such as in Examples 2, 5, 6, 7, and 8, the liquid suspension of the diode (100-100 L) comprises a plurality of diodes (100-100 L) (and/or a plurality of two) Polar body (100-100L) and a first solvent (such as n-propanol, 1-octanol, 1-methoxy-2-propanol, dipropylene glycol, rosin or diethylene glycol), and a viscosity modifier (or equivalently a viscous compound, an adhesive, a viscous polymer, a viscous resin, a viscous adhesive, a thickener, and/or a rheology modifier) or an adhesive viscosity modifier (discussed in more detail below) For example, but not limited to, the viscosity of the diode ink at room temperature (about 25 ° C) is from about 1,000 centipoise (cps) to 25,000 cps (or at a refrigerated temperature (eg, 5 ° C to 10 ° C) The viscosity is from about 20,000 cps to 60,000 cps), such as the E-10 viscosity modifier described below. Depending on the viscosity, the resulting composition may be equivalently referred to as a diode or other two-terminal integrated circuit liquid suspension or colloidal suspension, and any reference to liquid or colloid herein is understood to include and include The other.

In addition, the resulting viscosity of the diode ink will generally vary depending on the type of printing process to be used and may also vary depending on the composition of the diode, such as the germanium substrate 105 or the GaN substrate 105. For example, the diode 100-100L having the ruthenium substrate 105 for screen printing of the diode ink may have a viscosity of about 1,000 centipoise (cps) to 25,000 cps at room temperature, or at room temperature. More particularly having a viscosity of from about 6,000 centipoise (cps) to 15,000 cps, or more particularly from about 6,000 centipoise (cps) to 15,000 cps at room temperature, or more particularly about 8,000 centimeter at room temperature. Park (cps) to The viscosity of 12,000 cps, or more particularly at room temperature, has a viscosity of from about 9,000 centipoise (cps) to 11,000 cps. By way of example, the diode 100-100L having a GaN substrate 105 for screen printing of the diode ink may have a viscosity of about 10,000 centipoise (cps) to 25,000 cps at room temperature, or at room temperature. More particularly, it may have a viscosity of from about 15,000 centipoise (cps) to 22,000 cps, or more particularly at room temperature, having a viscosity of from about 17,500 centipoise (cps) to 20,500 cps, or more particularly about 18,000 at room temperature. Viscosity from centipoise (cps) to 20,000 cps. Also for example, the diode 100-100L has a ruthenium substrate 105 for fast drying printing. The diode ink can have a viscosity of about 1,000 centipoise (cps) to 10,000 cps at room temperature, or at room temperature. More particularly, it may have a viscosity of from about 1,500 centipoise (cps) to 4,000 cps, or more particularly from about 1,700 centipoise (cps) to 3,000 cps at room temperature, or more particularly about 1,800 at room temperature. The viscosity of centipoise (cps) to 2,200 cps. Also for example, the diode 100-100L has a GaN substrate 105 for fast-drying printing. The diode ink may have a viscosity of about 1,000 centipoise (cps) to 10,000 cps at room temperature, or at room temperature. More particularly, it may have a viscosity of from about 2,000 centipoise (cps) to 6,000 cps, or more particularly from about 2,500 centipoise (cps) to 4,500 cps at room temperature, or more particularly about 2,000 at room temperature. Viscosity from centipoise (cps) to 4,000 cps.

Viscosity can be measured in a variety of ways. For comparison purposes, various viscosity ranges described and/or claimed herein are using a Brookfield viscometer (available from Brookfield Engineering Laboratories, Middleboro Massachusetts, USA) at about 200 Pa (or more generally Shear stress of 190 Pa to 210 Pa), at about 25 ° C in a water jacket, using a spindle SC4-27 at about 10 rpm (or more typically 1 rpm to 30 rpm, especially for, for example, but not limited to, refrigerated fluids) The speed of the measurement.

唑啉。 One or more thickeners (as viscosity modifiers) may be used, such as, but not limited to, clays, such as lithium bentonite clay, bentonite clay, organically modified clay; sugars and polysaccharides, such as guar gum, three scented gums Cellulose and modified cellulose, such as hydroxymethyl cellulose, methyl cellulose, ethyl cellulose, propyl methyl cellulose, methoxy cellulose, methoxymethyl cellulose, methoxy Propylmethylcellulose, hydroxypropylmethylcellulose, carboxymethylcellulose, hydroxyethylcellulose, ethylhydroxyethylcellulose, cellulose ether, cellulose ether, polyglucamine; polymer , such as acrylate and (meth) acrylate polymers and copolymers; glycols such as ethylene glycol, diethylene glycol, polyethylene glycol, propylene glycol, dipropylene glycol, glycol ethers, glycol ether acetate ; fumed cerium oxide (such as Cabosil), cerium oxide powder; and modified urea, such as BYK® 420 (available from BYK Chemie GmbH); and mixtures thereof. Other viscosity modifiers can be used, as well as the addition of particles to control the viscosity, as described in US Patent Application Publication No. US 2003/0091647, the disclosure of which is incorporated herein. Other viscosity modifiers discussed below with reference to dielectric inks may also be used, including (not limited to) polyvinylpyrrolidone, polyethylene glycol, polyvinyl acetate (PVA), polyvinyl alcohol, polyacrylic acid, polyethylene oxide. , polyvinyl butyral (PVB); diethylene glycol, propylene glycol, 2-ethyl

Oxazoline.

Referring to the diode ink embodiment 6, the liquid suspension of the diode (100-100 L) may further comprise an adhesion viscosity modifier, i.e., any of the above viscosity modifiers having additional adhesion characteristics. The adhesive viscosity modifier is manufactured (for example) Bonding the diode (100-100L) to the first conductor (eg, as in the printing) device (300, 300A, 300B, 300C, 300D, 700, 700A, 700B, 720, 730, 740, 750, 760, 770) (eg 310A) or adhered to the substrate 305, 305A, and then further provided to hold the diode (100-100L) to the device (300, 300A, 300B, 300C, 300D, 700, 700A, 700B, 720, 730, 740, 750, Infrastructure (eg, polymer) in place at 760, 770) (when dried or cured). While providing the adhesion, the viscosity modifier should also have some resistance to moisture (such as terminals 125 and/or 127) of the contacts of the diode (100-100 L). These adhesion, viscosity and moisture resistance properties are one of the reasons for using methylcellulose, methoxypropylmethylcellulose or hydroxypropylmethylcellulose resins in various exemplary embodiments. Other suitable viscosity modifiers can also be selected based on experience.

Other characteristics of the viscosity modifier or adhesive viscosity modifier are also suitable and within the scope of the invention. First, the viscosity modifier should prevent the suspended diode (100-100L) from precipitating at the selected temperature. Second, the viscosity modifier should help to orient the diodes in a uniform manner during the manufacturing process (300, 300A, 300B, 300C, 300D, 700, 700A, 700B, 720, 730, 740, 750, 760, 770). (100-100L) and printed diode (100-100L). Third, in some embodiments, the viscosity modifier is also applied to buffer or otherwise protect the diode (100-100L) during the printing process, while in other embodiments, additional inert particles (such as glass beads) are additionally added. ) to protect the diode 100-100L during the printing process (diode ink embodiments 17-19 discussed below).

Reference Diode Ink Examples 3, 4 and 8, Diodes (100-100L) The liquid suspension may further comprise a second solvent (Example 8) or a solvating agent (Example 3) or a wetting solvent (Example 4), wherein various embodiments are discussed in more detail below. After printing the diode ink and drying the diode ink during subsequent device fabrication, the (first or second) solvent is selected as a wetting agent (equivalently a solvating agent) or a rewetting agent to aid in the a conductor (eg, 310A, which may comprise a conductive polymer such as silver ink, carbon ink or a mixture of silver ink and carbon ink) and a diode 100-100L (via substrate 105, through via structure (131, 133, 134) And/or an ohmic contact between the second (back) metal layer 122, as illustrated in FIG. 83, such as a non-polar resin solvent, including, for example, but not limited to, one or more dibasic esters. For example, when the diode ink is printed on the first conductor 310, the wetting agent or solvating agent partially dissolves the first conductor 310; as the wetting agent or solvating agent subsequently dissipates, the first conductor 310 hardens and The diode (100-100 L) forms a contact.

The remainder of the liquid (or 100-100 L) liquid or colloidal suspension is typically another third solvent, such as deionized water, and any description of the percentages herein can assume a diode (100-100 L) liquid or colloidal suspension. The remainder of the liquid is the third solvent (such as water), and all of the percentages are by weight rather than by volume or some other measure. It should also be noted that various diode ink suspensions can be mixed in a typical atmosphere without any particular air composition or other contained or filtered environment.

The solvent can also be selected based on the polarity of the solvent. In an exemplary embodiment, the first solvent, such as an alcohol, can be selected as a polar or hydrophilic solvent to aid in manufacturing apparatus 300, 300A, 300B, 300C, 300D, 700, 700A, The diodes (100-100L) and other conductors (e.g., 310) are resistant to wetting during 700B, 720, 730, 740, 750, 760, 770, with the ability to be dissolved in the viscosity modifier or to dissolve the viscosity modifier.

Another suitable property of an exemplary diode ink is illustrated by Example 7. For this illustrative embodiment, the diode ink can be opaque when wet during printing to aid in various printing processes, such as alignment. However, when dried or cured, the dried or cured diode ink is substantially optically transmissive or otherwise transparent at selected wavelengths, such as to substantially not interfere with the generation of the diode (100-100L). Visible light emission. However, in other exemplary embodiments, the diode ink can also be substantially optically transmissive or transparent.

Another way to characterize an exemplary diode ink is based on the size of a diode (100-100 L), as illustrated in Example 9, wherein any of the dimensions of the diode 100-100L is generally less than about 450 microns, and any of them The dimensions are more particularly less than about 200 microns, and any size thereof is more particularly less than about 100 microns, and any of its dimensions are more particularly less than 50 microns, and any size thereof is more particularly less than 30 microns. In the illustrated exemplary embodiment, the width of the diode 100-100L is generally from about 10 microns to 50 microns, or more specifically from about 20 microns to 30 microns, and from about 5 microns to 25 microns in height. Or a diameter of from about 25 microns to 28 microns (side to side rather than apex versus apex) and height from 8 microns to 15 microns or height from 9 microns to 12 microns. In some exemplary embodiments, the height of the diode 100-100L that does not include the metal layer 120B forming the bump or protruding structure (ie, the height of the side 121 including the GaN heterostructure) is approximately 5 micrometers. Meters to 15 microns, or more particularly from 7 microns to 12 microns, or more particularly from 8 microns to 11 microns, or more especially from 9 microns to 10 microns, or more especially from less than 10 microns to 30 microns, forming bumps or The height of the metal layer 120B of the protruding structure is generally from about 3 microns to about 7 microns.

In other exemplary embodiments, the diode (eg, 100L) does not include the height of the metal layer 120B and the back metal 122 that form the bump or protrusion structure (ie, the height of the side 121 including the GaN heterostructure). Forming bumps or less than about 10 microns, or more specifically less than about 8 microns, or more specifically from about 2 microns to 6 microns, or more specifically from about 3 microns to 5 microns, or more specifically about 4.5 microns. The height of the metal layer 120B of the protruding structure is generally from about 3 microns to 7 microns, or more particularly about 5 microns to 7 microns, and the total height of the diodes 100L is generally less than about 15 microns, or more specifically less than About 12 microns, or more specifically from about 9 microns to 11 microns, or more specifically from about 10 microns to 11 microns, or more specifically about 10.5 microns.

In other exemplary embodiments, the diode (eg, 100K) does not include the height of the metal layer 120B and the back metal 122 that form the bump or protrusion structure (ie, the height of the side 121 including the GaN heterostructure). Forming bumps or less than about 10 microns, or more specifically less than about 8 microns, or more specifically from about 2 microns to 6 microns, or more specifically from about 2 microns to 4 microns, or more specifically about 3.0 microns. The height of the metal layer 120B and the back metal 122 of the protruding structure is generally from about 3 microns to 7 microns, or more specifically about 4 microns to 6 microns, or more specifically about 5 microns, and the total height of the diode 100K. Roughly less than about 15 microns, or more It is less than about 14 microns, or more specifically from about 12 microns to 14 microns, or more specifically about 13 microns. In other exemplary embodiments, the height of the diode 100K is approximately between about 5 microns and 10 microns at a height that does not include the height of the backside metal 122 that forms the bump or protrusion structure but includes the metal layer 120B.

The diode ink can also be characterized by its electrical properties, as illustrated in Example 10. In this illustrative embodiment, the diode (100-100L) is suspended in at least one substantially non-insulating carrier or solvent, as opposed to, for example, an insulating binder.

The diode ink can also be characterized by its surface characteristics, as illustrated in Example 11. In this exemplary embodiment, the anti-wetting or contact angle of the diode ink is greater than 25 degrees, or greater than 40 degrees, depending on, for example, the surface energy of the substrate used for measurement (such as 34 dyne to 42 dyne). .

Diode Ink Example 12:

The composition comprises: a plurality of diodes 100-100L; a first solvent comprising about 5% to 50% n-propanol, rosin or diethylene glycol, ethanol, tetrahydrofurfuryl alcohol and/or cyclohexane An alcohol, or a mixture thereof; a viscosity modifier comprising from about 0.75% to 5.0% methoxypropyl methylcellulose resin or hydroxypropyl methylcellulose resin or other cellulose or methylcellulose resin, or A mixture thereof; a second solvent (or rewetting agent) comprising from about 0.5% to 10% of a non-polar resin solvent, such as a dibasic ester; and the remainder comprising a third solvent, such as water.

Diode Ink Example 13:

The composition comprises: a plurality of diodes 100-100L; a first solvent comprising about 15% to 40% n-propanol, rosin or diethylene glycol, ethanol, tetrahydrofurfuryl alcohol and/or cyclohexane An alcohol, or a mixture thereof; a viscosity modifier comprising from about 1.25% to 2.5% methoxypropyl methylcellulose resin or hydroxypropyl methylcellulose resin or other cellulose or methylcellulose resin, or A mixture thereof; a second solvent (or rewetting agent) comprising from about 0.5% to 10% of a non-polar resin solvent, such as a dibasic ester; and the remainder comprising a third solvent, such as water.

Diode Ink Example 14:

The composition comprises: a plurality of diodes 100-100L; a first solvent comprising about 17.5% to 22.5% n-propanol, rosin or diethylene glycol, ethanol, tetrahydrofurfuryl alcohol and/or cyclohexane An alcohol, or a mixture thereof; a viscosity modifier comprising from about 1.5% to about 2.25% methoxypropyl methylcellulose resin or hydroxypropyl methylcellulose resin or other cellulose or methylcellulose resin, or a mixture thereof; a second solvent (or rewetting agent) comprising from about 0.0% to 6.0% of at least one dibasic ester; and the balance comprising a third solvent, such as water, wherein the composition has a viscosity at 25 ° C. It is from about 5,000 cps to about 20,000 cps.

Diode Ink Example 15:

The composition comprises: a plurality of diodes 100-100L; a first solvent comprising about 20% to 40% n-propanol, rosin or diethylene glycol, ethanol, tetrahydrofurfuryl alcohol and/or cyclohexane An alcohol, or a mixture thereof; a viscosity modifier comprising from about 1.25% to 1.75% of a methoxypropylmethylcellulose resin or a hydroxypropylmethylcellulose resin or other cellulose or methylcellulose resin, or a mixture thereof; a second solvent (or rewetting agent) comprising from about 0% to 6.0% of at least one dibasic ester; and the balance comprising a third solvent, such as water, wherein the composition has a viscosity at 25 ° C. It is from about 1,000 cps to about 5,000 cps.

Diode Ink Example 16:

A composition comprising: a plurality of diodes 100-100L having a diameter (width and/or length) of from about 10 microns to 50 microns and a height of from 5 microns to 25 microns; a solvent; and a viscosity modifier.

Diode Ink Example 17:

The composition comprises: a plurality of diodes 100-100L; a solvent; a viscosity modifier; and at least one mechanical stabilizer or spacer.

Diode Ink Example 18:

The composition comprises: a plurality of diodes 100-100L having a diameter (width and/or length) of from about 10 micrometers to 50 micrometers and a height of from 5 micrometers to 25 micrometers; a solvent; a viscosity modifier; and a plurality of inertia The particles range in size from about 10 microns to 50 microns.

Diode Ink Example 19:

The composition comprising: a plurality of diodes 100-100L having a diameter (width and/or length) of from about 20 microns to 30 microns and a height of from about 9 microns to 15 microns; a solvent; a viscosity modifier; and a plurality of The substantially optically transparent and chemically inert particles range in size from about 15 microns to about 25 microns.

Diode Ink Example 20:

The composition comprising: a plurality of diodes 100-100L having a diameter (width and/or length) of from about 10 microns to 50 microns and a height of from 5 microns to 25 microns; a first solvent comprising an alcohol; a solvent comprising a diol; a viscosity modifier comprising from about 0.10% to 2.5% methoxypropyl methylcellulose resin or hydroxypropyl methylcellulose resin or other cellulose or methylcellulose resin, Or a mixture thereof; and a plurality of substantially optically transparent and chemically inert particles having a size The circumference is from about 10 microns to about 50 microns.

Diode Ink Example 21:

The composition comprising: a plurality of diodes 100-100L having a diameter (width and/or length) of from about 10 micrometers to 50 micrometers and a height of from 5 micrometers to 25 micrometers; at least a first solvent different from the first solvent a second solvent mixture comprising from about 15% to 99.99% of at least two solvents selected from the group consisting of n-propanol, isopropanol, dipropylene glycol, diethylene glycol, propylene glycol, 1-methoxy a base 2-propanol, n-octanol, ethanol, tetrahydrofurfuryl alcohol, cyclohexanol, and mixtures thereof; and a viscosity modifier comprising from about 0.10% to about 2.5% methoxypropylmethylcellulose resin or hydroxy A propylmethylcellulose resin or other cellulose or methylcellulose resin, or a mixture thereof.

Diode Ink Example 22:

The composition comprising: a plurality of diodes 100-100L having a diameter (width and/or length) of from about 10 micrometers to 50 micrometers and a height of from 5 micrometers to 25 micrometers; at least a first solvent different from the first solvent a second solvent mixture comprising from about 15% to 99.99% of at least two solvents selected from the group consisting of n-propanol, isopropanol, dipropylene glycol, diethylene glycol, propylene glycol, 1-methoxy a base 2-propanol, n-octanol, ethanol, tetrahydrofurfuryl alcohol, cyclohexanol, and mixtures thereof; a viscosity modifier comprising from about 0.10% to about 2.5% methoxypropylmethylcellulose resin or hydroxypropyl Methyl cellulose resin or other cellulose or nail A base cellulose resin, or a mixture thereof; from about 0.01% to 2.5% of a plurality of substantially optically clear and chemically inert particles having a size ranging from about 10 microns to about 50 microns.

Diode Ink Example 23:

The composition comprising: a plurality of diodes 100-100L having a diameter (width and/or length) of from about 10 micrometers to 50 micrometers and a height of from 5 micrometers to 25 micrometers; at least a first solvent different from the first solvent a second solvent mixture comprising from about 15% to about 50.0% of at least two solvents selected from the group consisting of n-propanol, isopropanol, dipropylene glycol, diethylene glycol, propylene glycol, 1-methoxy a base 2-propanol, n-octanol, ethanol, tetrahydrofurfuryl alcohol, cyclohexanol, and mixtures thereof; a viscosity modifier comprising from about 1.0% to 2.5% methoxypropyl methylcellulose resin or hydroxypropyl a methylcellulose resin or other cellulose or methylcellulose resin, or mixtures thereof; from about 0.01% to 2.5% of a plurality of substantially optically transparent and chemically inert particles having a size ranging from about 10 microns to about 50 Micron; and the remainder contains a third solvent, such as water.

Diode Ink Example 24:

A composition comprising: a plurality of diodes 100-100L having a diameter (width and/or length) of from about 10 microns to 50 microns and a height of from 5 microns to 25 microns; a first solvent comprising about 15% to 40% of a solvent selected from the group consisting of n-propanol, isopropanol, dipropylene glycol, diethylene glycol, and propylene Alcohol, 1-methoxy-2-propanol, n-octanol, ethanol, tetrahydrofurfuryl alcohol, cyclohexanol, and mixtures thereof; second solvent, which is different from the first solvent and contains about 2% to 10% Free solvent of the following group: n-propanol, isopropanol, dipropylene glycol, diethylene glycol, propylene glycol, 1-methoxy-2-propanol, n-octanol, ethanol, tetrahydrofurfuryl alcohol, cyclohexanol And a mixture thereof; a third solvent different from the first solvent and the second solvent and comprising from about 0.01% to 2.5% of a solvent selected from the group consisting of n-propanol, isopropanol, dipropylene glycol, diethylene glycol Alcohol, propylene glycol, 1-methoxy-2-propanol, n-octanol, ethanol, tetrahydrofurfuryl alcohol, cyclohexanol, and mixtures thereof; viscosity modifier comprising from about 1.0% to 2.5% methoxypropyl Methylcellulose resin or hydroxypropyl methylcellulose resin or other cellulose or methylcellulose resin, or mixtures thereof; and the remainder comprising a third solvent, such as water.

Diode Ink Example 25:

A composition comprising: a plurality of diodes 100-100L having a diameter (width and/or length) of from about 10 microns to 50 microns and a height of from 5 microns to 25 microns; a first solvent comprising about 15% to 30% of a solvent selected from the group consisting of n-propanol, isopropanol, dipropylene glycol, diethylene glycol, propylene glycol, 1-methoxy-2-propanol, n-octanol, ethanol, tetrahydrofurfuryl alcohol And cyclohexanol and a mixture thereof; the second solvent, which is different from the first solvent and comprises from about 3% to 8% of a solvent selected from the group consisting of n-propanol, isopropanol, dipropylene glycol, Diethylene glycol, propylene glycol, 1-methoxy-2-propanol, n-octanol, ethanol, tetrahydrofurfuryl alcohol, cyclohexanol, and mixtures thereof; a third solvent different from the first solvent and the second solvent and A solvent comprising from about 0.01% to 2.5% of a group selected from the group consisting of n-propanol, isopropanol, dipropylene glycol, diethylene glycol, propylene glycol, 1-methoxy-2-propanol, n-octanol, Ethanol, tetrahydrofurfuryl alcohol, cyclohexanol, and mixtures thereof; viscosity modifiers comprising from about 1.25% to 2.5% methoxypropyl methylcellulose resin or hydroxypropyl methylcellulose resin or other cellulose or a methylcellulose resin, or a mixture thereof; from about 0.01% to 2.5% of a plurality of substantially optically transparent and chemically inert particles having a size ranging from about 10 microns to about 50 microns; and the remainder comprising a third solvent, such as water.

Diode Ink Example 26:

A composition comprising: a plurality of diodes 100-100L having a diameter (width and/or length) of from about 10 microns to 50 microns and a height of from 5 microns to 25 microns; a first solvent comprising about 40% to 60% of a solvent selected from the group consisting of n-propanol, isopropanol, dipropylene glycol, diethylene glycol, propylene glycol, 1-methoxy-2-propanol, n-octanol, ethanol, tetrahydrofurfuryl alcohol And cyclohexanol and a mixture thereof; the second solvent, which is different from the first solvent and comprises about 40% to 60% of a solvent selected from the group consisting of n-propanol, isopropanol, dipropylene glycol, diethylene glycol Alcohol, propylene glycol, 1-methoxy-2-propanol, n-octanol, ethanol, tetrahydrofurfuryl alcohol, cyclohexanol, and mixtures thereof; A viscosity modifier comprising from about 0.10% to about 1.25% methoxypropyl methylcellulose resin or hydroxypropyl methylcellulose resin or other cellulose or methylcellulose resin, or a mixture thereof.

Diode Ink Example 27:

A composition comprising: a plurality of diodes 100-100L having a diameter (width and/or length) of from about 10 microns to 50 microns and a height of from 5 microns to 25 microns; a first solvent comprising about 40% to 60% of a solvent selected from the group consisting of n-propanol, isopropanol, dipropylene glycol, diethylene glycol, propylene glycol, 1-methoxy-2-propanol, 1-octanol, ethanol, tetrahydrogen a sterol, a cyclohexanol, and a mixture thereof; a second solvent different from the first solvent and comprising about 40% to 60% of a solvent selected from the group consisting of n-propanol, isopropanol, dipropylene glycol, and diethyl ether a diol, propylene glycol, 1-methoxy-2-propanol, 1-octanol, ethanol, tetrahydrofurfuryl alcohol, cyclohexanol, and mixtures thereof; a viscosity modifier comprising from about 0.10% to about 1.25% methoxy groups a propylmethylcellulose resin or a hydroxypropyl methylcellulose resin or other cellulose or methylcellulose resin, or a mixture thereof; From about 0.01% to 2.5% of a plurality of substantially optically transparent and chemically inert particles having a size ranging from about 10 microns to 50 microns.

Referring to the two-electrode inks Examples 12-27, in an exemplary embodiment, another alcohol as the first solvent, n-propanol ("NPA") (and/or n-octanol (eg 1-octanol) (or any of the various secondary or tertiary octanol isomers), 1-methoxy-2-propanol, rosinol, diethylene glycol, dipropylene glycol, Tetrahydrofurfuryl alcohol or cyclohexanol) replaces substantially all or most of the IPA. In the case where the diode 100-100L is generally or mostly precipitated at the bottom of the container, the IPA is removed, NPA is added, and a mixture of IPA, NPA and a 100-100 L of the diode is stirred or mixed at room temperature, and then the dipole is again made. The body 100-100L was precipitated to the bottom of the vessel, and a portion of the mixture of IPA and NPA was removed and NPA (about 120 ml to 140 ml) was added. The process of adding NPA and removing the mixture of IPA and NPA is generally repeated twice to produce a wafer adhesive mainly containing NPA, a diode 100-100L, a trace amount or a small amount of IPA, and possibly a trace amount or a small amount of residual A mixture of wafer adhesive solvent 170. In an exemplary embodiment, the residual or trace amount of residual IPA is less than about 1%, and more typically about 0.4%. Also in an exemplary embodiment, the final percentage of NPA that may be present in an exemplary diode ink is from about 0.5% to 50%, or more specifically from about 1.0% to 10%, or more specifically from about 3% to 7%, or in other specific examples, more particularly from about 15% to 40%, or more specifically from about 17.5% to 22.5%, or more specifically from about 25% to about 35%, depending on the type of printing desired set. When rosinol and/or diethylene glycol are used in conjunction with or in place of NPA, typical concentrations of rosin alcohol are from about 0.5% to 2.0%, and typical concentrations of diethylene glycol are from about 15% to 25%. It is also possible to filter IPA, NPA, rewetting agent, deionized water (and other compounds and mixtures used to form the exemplary diode ink) to about 25 microns or less to remove the larger than the diode 100-100L. Or particle contaminants of the same size class as the diode 100-100L.

Next, a mixture of substantially NPA or another first solvent and a diode 100-100L is added to and mixed with the viscosity modifier, such as methoxypropyl methylcellulose resin, Hydroxypropyl methylcellulose resin or other cellulose or methyl cellulose resin. In an illustrative embodiment, E-3 and E-10 methylcellulose resins (available from The Dow Chemical Company ( www.dow.com ) and Hercules Chemical Company ( www.herchem.com )), So that the final percentage in the exemplary diode ink is from about 0.10% to 5.0%, or more specifically from about 0.2% to 1.25%, or more specifically from about 0.3% to 0.7%, or more specifically about 0.4%. To 0.6%, or more particularly from about 1.25% to 2.5%, or more especially from 1.5% to 2.0%, or more especially less than or equal to 2.0%. In an exemplary embodiment, about 3.0% of the E-10 formulation is used and diluted with deionized and filtered water to achieve a final percentage of the finished composition. Other viscosity modifiers can be used equivalently, including the viscosity modifiers discussed above and the viscosity modifiers discussed below with reference to the dielectric inks. The viscosity modifier provides sufficient viscosity for the diode 100-100L to substantially disperse and maintain suspension, especially under refrigeration, without precipitating from the liquid or colloidal suspension.

As noted above, a second solvent can then be added (or for Examples 3 and 4, a first solvent added), which is typically a non-polar resin solvent, such as one or more dibasic esters. In an exemplary embodiment, a mixture of two dibasic esters is used to achieve from about 0.0% to about 10%, or more specifically from about 0.5% to about 6.0%, or more specifically from about 1.0% to about 5.0%, or more. Especially a final percentage of from about 2.0% to about 4.0%, or more especially from about 2.5% to about 3.5%, such as dimethyl glutarate or such as about two-thirds (2/3) dimethyl glutarate and about a third (1/3) mixture of dimethyl succinate with a final percentage of about 3.73%, such as DBE-5 or DBE-9 (available from Invista USA, Wilmington, Delaware, USA), respectively. There are also traces or minor amounts of impurities such as about 0.2% dimethyl adipate and 0.04% water. A third solvent, such as deionized water, may also be added as needed or necessary to adjust the relative percentage and reduce the viscosity. In addition to the dibasic ester, other second solvents which may be used equivalently include, but are not limited to, water; alcohols such as methanol, ethanol, n-propanol (including 1-propanol, 2-propanol (isopropyl) Alcohol), 1-methoxy-2-propanol), isobutanol, butanol (including 1-butanol, 2-butanol), pentanol (including 1-pentanol, 2-pentanol, 3- Pentanol), n-octanol (including 1-octanol, 2-octanol, 3-octanol), tetrahydrofurfuryl alcohol, cyclohexanol; ethers such as methyl ethyl ether, diethyl ether, ethyl propyl ether and Polyether; esters such as ethyl acetate, dimethyl adipate, propylene glycol monomethyl ether acetate (and dimethyl glutarate and dimethyl succinate as described above); glycols such as B Glycol, diethylene glycol, polyethylene glycol, propylene glycol, dipropylene glycol, glycol ether, glycol ether acetate; carbonate, such as propyl carbonate; glycerin, such as glycerin; acetonitrile, tetrahydrofuran (THF) , dimethylformamide (DMF), N-methylformamide (NMF), dimethyl hydrazine (DMSO); and mixtures thereof. In an exemplary embodiment, the molar ratio of the amount of the first solvent to the amount of the second solvent is in the range of at least about 2:1, and more particularly in the range of at least about 5:1, and more particularly at least In the range of about 12:1 or more than 12:1; in other cases, the function of the two solvents can be combined in a single reagent, and in one exemplary embodiment, a polar or non-polar solvent is used. Also in addition to the dibasic esters discussed above, such as, but not limited to, exemplary solubilizing, wetting or solvating agents also include propylene glycol monomethyl ether acetate (C ₆ H ₁₂ O) as mentioned below. ₃ ) (sold by Eastman under the name "PM Acetate"), which is used with 1-propanol (or isopropanol) at a molar ratio of about 1:8 (or 22:78) Forming a suspension medium; and a plurality of dibasic esters, and mixtures thereof, such as dimethyl succinate, dimethyl adipate and dimethyl glutarate (different mixtures thereof available from Invista under the product names DBE, DBE-2 , DBE-3, DBE-4, DBE-5, DBE-6, DBE-9, and DBE-IB are obtained). In an illustrative embodiment, DBE-9 is used. The molar ratio of solvent will vary based on the solvent chosen, with 1:8 and 1:12 being typical ratios.

Reference Diode Inks Examples 17-20, 22, 25, and 27 include one or more mechanical stabilizers or spacers, such as chemically inert particles and/or optically clear particles, such as typically comprising, but not limited to, germanium. Glass beads of acid or borosilicate glass. In various exemplary embodiments, from about 0.01% to 2.5% by weight, or especially from about 0.05% to 1.0% by weight, or especially from about 0.1% to 0.3% by weight, of the glass spheres, average size or size, are used. The range is from about 10 microns to 30 microns, or more specifically from about 12 microns to 28 microns, or more specifically from about 15 microns to 25 microns. These particles provide mechanical stability and/or spacing during the printing process, such as acting as a thin plate spacer when feeding the printed sheet into the printing press, since the diode 100-100L initially passes only through the dried or cured diode The relatively thin film formed by the ink is held in place (as illustrated in Figures 89 and 90). In general, the concentration of inert particles is sufficiently low that the number of inert particles per unit area (device area, after deposition) is less than the density of 100-100 L per unit area of the diode. Inert particles provide mechanical stability and spacing, tending to prevent diodes 100-100L from depositing conductive layers (310) and/or dielectric layers At (315), when the printed sheets are fed into the printing press, the printed sheets are displaced and lost as they slide over each other, similar to ball bearings providing stability. After deposition of the conductive layer (310) and/or the dielectric layer (315), the diodes 100-100L are effectively held or locked in place, and the likelihood of displacement is significantly reduced. The inert particles are also held or locked in place, but do not perform other functions in the completed device 300, 700, 720, 730, 740, 750, 760, 770 and are actually electrically and chemically inert. A plurality of inert particles 292 are illustrated in cross-section in Figure 94 and, although not separately illustrated in other figures, may be included in any other illustrated device.

Diode Ink Embodiments 20-27 are illustrated to provide other and more specific embodiments of diode ink compositions that are effective for fabricating various embodiments 300, 700, 720, 730, 740, 750, 760, 770 embodiments. . Diode inks having cellulosic or methylcellulose resins (such as hydroxypropyl methylcellulose resins) Example 20 and other embodiments may also include other solvents not specifically mentioned, such as, but not limited to, water Or 1-methoxy-2-propanol.

Although various diode inks are generally mixed in the order described above, it should also be noted that various first solvents, viscosity modifiers, second solvents, and third solvents (such as water) may be added or mixed together in other orders. Any and all orders are within the scope of the invention. For example, deionized water (as a third solvent) may be added first, followed by the addition of 1-propanol and DBE-9, followed by the addition of a viscosity modifier, and then water may then be added to adjust, for example, the relative percentage and viscosity.

Then at room temperature in an air atmosphere, such as by using an impeller mixer at a relatively low speed (to avoid incorporation of air into the mixture) or A mixture of substantially a first solvent (such as NPA), a diode 100-100L, a viscosity modifier, a second solvent, and a third solvent (if present) (such as water) is stirred for about 25 minutes to 30 minutes. In an exemplary embodiment, the resulting volume of the diode ink is typically from about one-half liter to one liter (per wafer) containing from 9 million to 10 million diodes 100-100L, and may be upwards as needed. Or downwardly adjusting the concentration of the diode 100-100L, such as depending on the desired density of the selected printed LED or optoelectronic device described below, with exemplary viscosity ranges above for different types of printing and different types. Diode 100-100L as described. The first solvent, such as NPA, also tends to act as a preservative and inhibit bacterial and fungal growth for storage of the resulting diode ink. When other first solvents are to be used, individual preservatives, inhibitors or fungicides may also be added. For illustrative specific embodiments, other surfactants or defoamers for printing may be used as an alternative, but not required for proper functioning and exemplary printing.

The concentration of the diode 100-100L can be adjusted according to the needs of the device. For example, for lighting applications, a lower surface brightness lamp can use about 25 diodes per square centimeter 100-100L, and a diode 100-100L concentration is about 12,500 diodes per milliliter (cm ³ ). Diode ink. For another illustrative embodiment, a wafer 150 can contain about 7.2 million diodes 100-100L to yield about 570 ml of diode ink. Each milliliter of the diode ink can be used to cover about 500 square centimeters when printed, and 570 ml of diode ink covers about 28.8 square meters. Also for example, for a very high surface brightness lamp of about 100 diodes 100-100 L per square centimeter, it requires a concentration of about 50,000 diodes per 100 milliliters (cm ³ ) of 100-100 L.

Figure 75 is a flow diagram illustrating an exemplary embodiment of an exemplary method of making a diode ink and provides a suitable overview. The method begins (initial step 200) by releasing diodes 100-100L from wafers 150, 150A (step 205). As discussed above, this step involves bonding the first side (the diode side) of the wafer to the wafer holder with a wafer bonding adhesive, using a laser stripping, grinding and/or polishing and/or etching wafer. a second side (back side) to expose the singulated trench and remove any other substrate or GaN as needed or as specified, and dissolve the wafer bonding adhesive to release the diode 100-100L to a solvent (such as IPA) or Another solvent, such as NPA, or any other solvent described herein. When IPA is used, the method includes the step 210 selected as appropriate to transfer the diode 100-100L to a (first) solvent such as NPA. The method then adds the diode 100-100L in the first solvent to a viscosity modifier such as methylcellulose (step 215) and adds one or more second solvents, such as one or two dibasic esters. For example, dimethyl glutarate and/or dimethyl succinate (step 220). Any weight percentage can be adjusted using a third solvent, such as deionized water (step 225). In step 230, the method then mixes a plurality of diodes 100-100 L, a first solvent, a viscosity modifier, a second solvent (and a plurality of chemical and electrical inertities) in an air atmosphere at room temperature (about 25 ° C). The particles, such as glass beads, and any other deionized water for about 25 to 30 minutes have a viscosity of from about 1,000 cps to about 25,000 cps. The method can then end and return to step 235. It should also be noted that steps 215, 220, and 225 may be performed in other orders as described above, and may be repeated as needed, and other mixing steps may be used as appropriate.

Figure 76 is a perspective view of an exemplary embodiment of an exemplary device 300. Figure 77 shows A plan view (or top view) of an exemplary electrode structure of a first conductive layer of an exemplary device embodiment is illustrated. 78 is a first cross-sectional view of an exemplary embodiment of an exemplary device 300 (through the 30-30' plane of FIG. 76). 79 is a second cross-sectional view of the illustrative device 300 embodiment (through the 31-31' plane of FIG. 76). FIG. 80 is a perspective view of an exemplary second device 700 embodiment. 81 is a first cross-sectional view of an exemplary second device 700 embodiment (through the 88-88' plane of FIG. 80). 82 is a second cross-sectional view of the exemplary second device 700 embodiment (through the 87-87' plane of FIG. 80). 83 is a second cross-sectional view of exemplary diodes 100J, 100K, 100D, and 100E coupled to first conductor 310A. Figure 87 is a cross-sectional view of an exemplary third device 300C illumination from both sides. Figure 88 is a cross-sectional view of an exemplary fourth device 300D embodiment illuminated from both sides. Figure 89 is a more detailed partial cross-sectional view of an exemplary first device embodiment. Figure 90 is a more detailed partial cross-sectional view of an exemplary second device embodiment. 91 is a perspective view of an exemplary fifth device 720 embodiment. Figure 92 is a cross-sectional view of an exemplary fifth device 720 embodiment (through the 57-57' plane of Figure 91). Figure 93 is a perspective view of an exemplary sixth device 730 embodiment. Figure 94 is a cross-sectional view of an exemplary sixth device 730 embodiment (through the 58-58' plane of Figure 93). Figure 95 is a perspective view of an exemplary seventh device 740 embodiment. Figure 96 is a cross-sectional view of an exemplary seventh device 740 embodiment (through the 59-59' plane of Figure 95). 97 is a perspective view of an exemplary eighth device 750 embodiment. Figure 98 is a cross-sectional view of an exemplary eighth device 750 embodiment (through the 61-61' plane of Figure 97). Figure 99 is a plan view showing an exemplary second electrode structure of a first conductive layer of an exemplary device embodiment (or Top view). 101 is a plan view (or top view) of an exemplary ninth and tenth device 760, 770 embodiment of the system 800, 810 embodiments typically illustrated in FIG. Figure 102 is a cross-sectional view of an exemplary ninth device 760 embodiment (through the 63-63' plane of Figure 101). Figure 103 is a cross-sectional view of an exemplary tenth device 770 embodiment (through the 63-63' plane of Figure 101). Figure 109 is a photograph of a specific example of an energized power-expressing exemplary device 300A.

Referring to FIGS. 76-79, in apparatus 300, one or more first conductors 310 are deposited on a first side of substrate 305, followed by deposition of a plurality of diodes 100-100K (coupled second terminal 127 to conductor 310). The dielectric layer 315, the second conductor 320 (generally a transparent conductor coupled to the first terminal), and optionally a stabilizing layer 335, a light emitting (or emitting) layer 325, and a protective layer or coating 330 are deposited. In the embodiment of device 300, if optically opaque substrate 305 and first conductor 310 are used, light is primarily emitted or absorbed through the top first side of device 300, and if optically transmissive substrate 305 and first conductor 310 are used, Light is then emitted or absorbed or absorbed from both sides of the device 300 to either side of the device 300 (especially if energized with an AC voltage to energize the diodes 100-100K having the first or second orientation).

Referring to Figures 80-83, in device 700, a plurality of diodes 100L are deposited on a first side of substrate 305 having optical transparency and thus referred to herein as substrate 305A, followed by deposition of one or more first conductors. 310 (couples the conductor 310 to the second terminal 127), the dielectric layer 315, the second conductor 320 (coupled to the first terminal) (which may or may not be optically transmissive), and optionally deposits a stabilizing layer 335 and a protective layer or coating 330. At the base 305 The illuminating (or emitting) layer 325, as appropriate, may be applied to the second side of the substrate 305 along with any other protective layer or coating 330 before or after any deposition step on one side. In this embodiment of device 700, if one or more optically opaque second conductors 320 are used, light is primarily emitted or absorbed through substrate 305A of device 700 on the second side, and if one or more optical transmissions are used The second conductor 320 then emits or absorbs light on either side of the device 700.

Specific examples of various devices 300, 700, 720, 730, 740, 750, 760, 770 can be printed as flexible sheets or other lighting fixtures based on LED illumination, for example, which can be crimped, folded, twisted, hovered, flattened , entangled, creased, and otherwise shaped into any of a variety of forms and designs, including, for example, but not limited to, architectural shapes, other art or imaginative designs of folded and creased origami hand shapes, Edison (Edison) bulb shape, fluorescent bulb shape, chandelier shape, one of the wrinkled and folded Edison bulb shapes is illustrated in FIG. 100 as systems 800, 810. The various embodiments 300, 700 embodiments can also be combined in various ways (such as back-to-back) to cause light to be emitted or absorbed from both sides of the resulting device. By way of example and not limitation, two devices 300 can be combined back-to-back on a second side of respective substrate 305 to form a device 300C embodiment, or device 300 can be printed on both sides of substrate 305 to form device 300D For a specific example, a specific example of the device 300C and a specific example of the device 300D are illustrated in cross section in FIGS. 87 and 88, respectively. Also by way of example and not limitation, the two devices 700 may be combined back-to-back on the non-substrate 305 (first side) and also from both sides of the resulting device.

Referring to Figures 91-92, in device 720, one or more layers of first conductor 310 are deposited on a first side of substrate 305, followed by deposition of carbon contacts 322A to couple to conductor 310, followed by deposition of a plurality of diodes 100- 100K (couples the second terminal 127 to the conductor 310), the dielectric layer 315, and one or more layers of the second conductor 320 (generally a transparent conductor coupled to the first terminal), and then deposits the carbon junction 322B to couple Connected to conductor 320, a stabilizing layer 335, a light emitting (or emitting) layer 325, and a protective layer or coating 330 are optionally deposited. In this embodiment of device 300, light is primarily emitted or absorbed through the top first side of device 720, and if optically transmissive substrate 305 and first conductor 310 are used, light is emitted or absorbed or emitted from both sides of device 720. Or absorbed to both sides of the device 720 (especially if energized with an AC voltage).

Referring to Figures 93-94, in device 730, one or more layers of substantially optically transmissive first conductor 310 are deposited on a first side of optically transmissive substrate 305A, followed by deposition of carbon contacts 322A to couple to conductor 310, and then Depositing a plurality of diodes 100-100K (couples the second terminal 127 to the conductor 310) together with a plurality of inert particles 292, a dielectric layer 315, and one or more layers of a second conductor 320 (also generally coupled to the first a terminal transparent conductor), followed by deposition of carbon contacts 322B to couple to conductor 320, optionally depositing a stabilizing layer 335, a first luminescent (or emitting) layer 325, and a protective layer or coating 330, followed by substrate 305A A second luminescent (or emitting) layer 325 and a protective layer or coating 330 are deposited on the second side. In this embodiment of device 730, light is transmitted or absorbed through both the top first side and the bottom second side of device 730. Additionally, the use of the second illuminating (or emitting) layer 325 can also shift the wavelength of light emitted through the second side (except for shifting the spectrum of light emitted through the first side) The first luminescent (or emitting) layer 325 is external).

Referring to Figures 95-96, in device 740, a plurality of diodes 100L are deposited on a first side of substrate 305 that is optically transmissive and also referred to herein as substrate 305A, followed by deposition of one or more layers of first conductor 310. (conducting the conductor 310 to the second terminal 127), then depositing the carbon contact 322A to be coupled to the conductor 310, depositing the dielectric layer 315, and depositing one or more layers of the second conductor 320 (coupled to the first terminal), Carbon junction 322B is then deposited to couple to conductor 320 and, optionally, a stabilizing layer 335 and a protective layer or coating 330 are deposited. The luminescent (or emissive) layer 325, as appropriate, may be applied to the second side of the substrate 305 along with any other protective layer or coating 330 before or after any deposition step on the first side of the substrate 305. In this embodiment of device 740, light is primarily emitted or absorbed through substrate 305A of device 740 on the second side (and any wavelength shift occurs via first illumination (or emission) layer 325), and if one or more are used The optically transmissive second conductor 320 emits or absorbs light on both sides of the device 740.

Referring to FIGS. 97-98, in device 750, a plurality of diodes 100L are deposited on a first side of substrate 305 that is optically transmissive and also referred to herein as substrate 305A, followed by deposition of one or more layers of first conductor 310. (coupling conductor 310 to second terminal 127), then depositing carbon junction 322A to couple to conductor 310, depositing dielectric layer 315, and depositing one or more layers of substantially optically transmissive second conductor 320 (coupled to The first terminal), in turn, deposits carbon junction 322B to couple to conductor 320, and optionally deposits a stabilizing layer 335, optionally a first luminescent (or emitting) layer 325, and a protective layer or coating 330. Before or after any deposition step on the first side of the substrate 305, as appropriate The second luminescent (or emitting) layer 325 can be applied to the second side of the substrate 305A along with any other protective layer or coating 330. In this embodiment of device 750, light is transmitted or absorbed through both the top first side and the bottom second side of device 750, and any wavelength shift occurs through first and second light emitting (or emitting) layers 325.

Devices 760 and 770 are described in more detail below with respect to Figures 100-103 and differ from other illustrated devices in that a third conductor 312, also typically deposited as one or more layers, is used. Additionally, device 770 is also illustrated as using barrier layer 318 discussed in greater detail below.

As described above, the apparatus 300, 700, 720, 730, 740, 750, 760, 770 is formed by depositing (eg, printing) a plurality of on the substrate 305 (ie, for the devices 300, 720, 730, 750). a layer, one or more first conductors 310 deposited on the substrate 305, in the form of a conductor 310 layer or a plurality of conductors 310, which in turn deposits the diode 100 when the diode 100-100L is in a liquid or colloidal suspension -100L (a wet film thickness of about 18 microns to 20 microns or more) (i.e., a diode ink), and evaporating or otherwise dispersing the liquid/colloidal portion of the suspension, while for devices 700, 740, In 750, a diode 100-100L is deposited on the first side of the optically transmissive substrate 305A when the diode 100-100L is in a liquid or colloidal suspension (up to about 18 microns to 20 microns or more). Wet film thickness) (i.e., diode ink) and evaporates or otherwise disperses the liquid/colloid portion of the suspension, which in turn deposits one or more first conductors 310.

As the diode 100-100L liquid or colloidal suspension dries or solidifies, the components of the diode ink (especially the viscosity modifier or adhesive as described above) a degree adjusting agent) forms a relatively thin film, coating, mesh or mesh around the diode 100-100L, which helps hold the diode 100-100L in place on the substrate 305 or the first conductor 310 Above, which is illustrated in Figures 89 and 90 as film 295, typically has a thickness of from about 50 nm to about 300 nm (when fully cured or dried), depending on the concentration of viscosity modifier used, such as for lower viscosity adjustments. The thickness is about 50 to 100 nm for the concentration of the agent, and about 200 to 300 nm for the higher viscosity modifier concentration. The deposited film 295 can continuously surround the diode 100-100L, as illustrated in FIG. 89, or can be intermittent, leaving a gap and only partially surrounding the diode 100-100L, as illustrated in FIG. Although the terminals 125, 127 are typically coated with a diode ink film 295, the terminals 125, 127 generally have sufficient surface roughness such that the film 295 does not interfere with electrical connection with the first and second conductors 310, 320. Film 295 typically comprises a viscosity modifier in a cured or dried form, and may also contain minor or trace amounts of various solvents, such as a first or second solvent, as mentioned below with reference to a specific example of a cured or dried diode ink. As also discussed in more detail below, the viscosity modifier can also be used to form the barrier layer 318 discussed below with reference to FIG.

For device 300, diodes 100-100K are physically and electrically coupled to one or more first conductors 310A, and for device 700, diode 100K is physically coupled to substrate 305 and subsequently coupled to one or more a conductor 310, and in the embodiment of the apparatus 300, 700, since the diode 100-100L is deposited while suspended in a liquid or colloid in any orientation, the diode 100-100L can assume a first orientation (first The terminal 125 is in an upward direction, in a second orientation (the first terminal 125 is in a downward direction) or may be in a third orientation (a first terminal 125) Horizontal). Additionally, since the diodes 100-100L are deposited while suspended in a liquid or gel, the diodes 100-100L are generally fairly irregularly spaced within the devices 300, 700. Additionally, as noted above, in an illustrative embodiment, the diode ink can include a plurality of chemically inert, generally optically transmissive particles, such as glass beads, ranging in size from about 10 microns to 30 microns, or more It is especially from about 12 microns to 28 microns, or more particularly from about 15 microns to 25 microns.

In the first upward orientation or direction, as illustrated in FIG. 83, the first terminal 125 (the metal layer 120B forming the bump or protruding structure of the diode 100-100J or the metal layer 122 of the diode 100K) is oriented upward And the diode 100-100K is via the second terminal 127 (which may be the metal layer 120B of the diode 100K or the back metal layer 122 as illustrated for the diode 100J) or via, for example, for the diode 100D The central guide hole 131 is illustrated (concrete under the back metal layer 122 in the absence of the diode 100J), or via the peripheral via 134 (not separately illustrated), or as illustrated by the diode 100E The substrate 105 is coupled to the one or more first conductors 310A. In a second downward orientation or direction, as illustrated in Figures 78 and 79, the first terminal 125 is oriented downward and the diode 100-100K is via or via the first terminal 125 (e.g., diode 100-100J) The metal layer 120B forming the bump or protruding structure or the metal layer 122 of the diode 100K is coupled to the one or more first conductors 310A.

For the diode 100L, the diode 100L can be oriented in a first upward orientation or direction as illustrated in FIGS. 81 and 82, wherein the first and second terminals 125, 127 are oriented upwardly and are not separately illustrated, and the diode 100L can Second downward Orientation or orientation, wherein the first and second terminals 125, 127 are oriented downward. For this downward orientation, it should be noted that although the first terminal 125 can be in electrical contact with the one or more first conductors 310, the second terminal 127 is likely to be within the dielectric layer 135 and will not be in contact with the second conductor 320, The diode 100L is electrically isolated and non-functional when having a second orientation, which may be desirable in many embodiments.

As far as the diode 100-100L is suspended in a liquid or colloid, the spacing between them is uncertain and deposited in any 360 degree orientation, it cannot be accurately known in advance with any certainty (for example, the average of the highest quality manufacturing) In the range of 4σ-6σ defect-free rate, where and how the orientation of any particular diode 100-100L will fall on substrate 305A or one or more first conductors 310. In fact, there is a statistical distribution of the spacing of the diodes 100-100L from each other and the orientation of the diodes 100-100L (first upward or second downward). It is quite certain that at least one of the diodes 100-100L, which may be deposited on the substrate 305, 305A or a series of thin plates, at least one of the diodes 100-100L will be erected in a second orientation, Because it deposits when dispersed and suspended in a liquid or colloid.

Thus, the distribution and orientation of the diodes 100-100L in the devices 300, 700, 720, 730, 740, 750, 760, 770 can be described statistically. For example, although it may not be possible to accurately know or determine where any particular diode 100-100L will fall and properly hold on substrate 305A or one or more first conductors 310 prior to deposition and what Orientation, but an average number of diodes 100-100L will be 100-100L per unit area of a diode, such as (but not limited to) 25 diodes per square centimeter 100-100L is in a specific orientation.

Thus, the diodes 100-100L can be considered to have or have been deposited in a substantially random or pseudo-random orientation and at irregular intervals, and can be oriented first upward (first terminal 125 up), which is typically The direction of the forward bias voltage of the diode 100-100J and the reverse bias of the diode 100K (depending on the polarity of the applied voltage), or may be the second orientation downward (the first terminal 125 is downward) The second orientation is generally the reverse bias voltage of the diode 100-100J and the direction of the forward bias of the diode 100K (depending on the polarity of the applied voltage). Also for the diode 100L, it may be oriented first upward (the first and second terminals 125, 127 are upward), the first orientation being generally the direction of the forward bias voltage of the diode 100L, or The second orientation may be downward (the first and second terminals 125, 127 are downward), and the second orientation is generally the direction of the reverse bias voltage of the diode 100L (depending on the polarity of the applied voltage), although As described above and as described in more detail below, the diodes 100L in the second orientation are typically not fully electrically coupled and do not function. It is also possible for the diode 100-100L to be laterally deposited or erected in a third orientation (the diode side 121 is downward and the other diode side 121 is upward).

Fluid dynamics, viscosity or rheology of the diode ink, mesh count, mesh opening, mesh material (surface energy of the mesh material), printing speed, interphase mismatch or comb structure of the first conductor 310 Orientation of the tines (the teeth are perpendicular to the direction in which the substrate 305 is moved by the printer), the surface of the substrate 305 or the first conductor 310 on which the diode 100-100L is deposited, and the shape and size of the diode 100-100L. , the printed or deposited diode 100-100L density, the shape, size and/or thickness of the diode side 121, and Sonic processing or other mechanical vibration of a 100-100L liquid or colloidal suspension of a diode prior to curing or drying of the polar ink appears to affect a first, second or third orientation compared to another first, second or third The advantage of three orientations. For example, the height (or vertical thickness, perpendicular to the first or second orientation) of the diode side 121 is less than about 10 microns, and more particularly less than about 8 microns, such that the diodes 100-100L have a comparison. The thin side or side edges significantly reduce the percentage of diodes 100-100L having a third orientation.

Similarly, fluid dynamics, higher viscosity, and lower mesh counts, as well as other factors described above, provide some degree of control over the orientation of the diode 100-100L to tune or adjust for the first or second orientation for a given application. The percentage of polar bodies 100-100L. For example, the factors listed above can be adjusted to increase the incidence of the first orientation such that as much as 80% to 90% or more of the diodes 100-100L are in a first orientation. Also for example, the factors listed above may be adjusted to balance the occurrence of the first orientation and the second orientation such that the first orientation and the second orientation of the diodes 100-100L are substantially or substantially evenly distributed, For example, 40% to 60% of the diodes 100-100L are in a first orientation and 60% to 40% of the diodes 100-100L are in a second orientation.

It should be noted that even though a significantly higher percentage of the diodes 100-100L coupled to the first conductor 310A or the substrate 305 are in a first upward orientation or orientation, it is still statistically still possible to have at least one or more poles. The body 100-100L will have a second downward orientation or orientation, and statistically, the diode 100-100L will also exhibit an irregular spacing, with some of the diodes 100-100J being relatively close together, and at least some two The polar body 100-100J is much farther apart.

In other words, depending on the polarity of the applied voltage, although significantly higher 100-100L will or will be coupled in a first forward bias direction or direction, but statistically, at least one or more diodes 100-100L will have a second reverse bias Orientation or direction. If the illuminating or light absorbing regions 140 are oriented differently, those skilled in the art will appreciate that depending on the polarity of the applied voltage, the first orientation should be reverse biased and the second orientation should be forward biased. .

For example, unlike conventional electronic electronics that use a pick and place machine to position an electrical component, such as a diode, to adhere to a predetermined location on the board within a selected tolerance and in a predetermined orientation, in any given situation. The diodes 100-100L do not have such predetermined or determined positions (in the xy plane) and orientations (z-axis) in the devices 300, 700 (ie, at least one diode 100-100L is in the device 300, Will be in the second orientation in 700).

This is significantly different from existing device structures in which all of the diodes (such as LEDs) have a single orientation with respect to the voltage track, ie the respective anodes of all the diodes are coupled to a higher voltage and their cathodes are coupled. Connect to a lower voltage. Due to the statistical orientation, depending on the percentage of the first or second oriented diode 100-100L and depending on various diode characteristics (such as tolerance to reverse bias), AC or DC voltage can be used. Or current causes the diode 100-100L to be energized without additionally converting voltage or current.

Referring to Figures 77 and 99, a plurality of first conductors 310 can be used to form at least two respective electrode structures, which are illustrated as first (first) conductor electrodes or contacts 310A and second (first) conductor electrodes or The phase-to-phase miscellaneous or comb electrode structure of point 310B. As illustrated in Figure 77, conductors 310A and 310B have the same width, and in Figures 76 and 78, are illustrated as having different widths. Degrees, all of which are within the scope of the invention. For the exemplary device 300 embodiment, a diode ink or suspension (having a diode 100-100K) is deposited on conductor 310A. A second transparent conductor 320 (having optical transmission, as discussed below) is then deposited (on the dielectric layer, as discussed below) to form a separate electrical contact with conductor 310B, as illustrated in FIG. Although not separately illustrated, as an alternative, the exemplary device 700 embodiment may have such 310A, 310B electrical connections: after the diode ink or suspension (having the diode 100L) is deposited on the substrate 305A One or more conductors 310A and 310B (in the form of interphase mismatch or comb structures) may be deposited, followed by deposition of a dielectric layer 315 on conductor 310A. The second conductor 320, which does not require optical transmission, is subsequently deposited (on the dielectric layer 315, as discussed below) and may also have interphase mismatch or comb structures to form separate electrical contacts with the conductor 310B, as in FIG. As explained for device 300. As illustrated in FIG. 80-82 for device 700, to illustrate another structural alternative, second terminal 127 is coupled to one or more first conductors 310 and first terminal 125 is coupled to one or more second conductors 320. . Figures 81 and 91-98 also illustrate another structural alternative suitable for use in any of the embodiments 300, 700, 720, 730, 740, 750, 760, 770, wherein the carbon electrodes 322A and 322B are coupled, respectively. To the first conductor 310 and the second conductor 320 and extending beyond the protective coating 330 to provide electrical connection or coupling for the devices 300, 700.

It should be noted that when the first conductor 310 has the phase-to-phase miscellaneous or comb-like structure illustrated in FIG. 77, the second conductor 320 can be energized using the first conductor 310B. The interphase mismatch or comb structure of the first conductor provides current balance such that the first conductor 310A, the diode 100-100L, the second conductor 320, and Each current path of the first conductor 310B is substantially within a predetermined range. This is used to minimize the distance that current must pass through the second transparent conductor, thereby reducing resistance and heat generation, and generally providing current to all or most of the diodes 100-100L simultaneously and within a predetermined current level.

In addition, a plurality of interphase miscellaneous or comb structures of the first conductor 310 may also be coupled in series, such as to generate a total device voltage having a desired forward voltage of a plurality of diodes 100-100J, such as, but not limited to, up to Typical household voltage. For example, as illustrated in FIG. 99, for the first region 711 (where the diodes 100-100L are coupled in parallel), the conductor 310B can be coupled to the second region 712 (the diodes 100-100L are also coupled in parallel). The conductor 310A or the conductor 310A of the second region 712 is deposited as an integral layer, and for the second region 712 (where the diodes 100-100L are coupled in parallel), the conductor 310B can be coupled to the third region 713 (which The conductor 310A of the diode 100-100L is also coupled in parallel or deposited integrally with the conductor 310A of the third region 713, and the like, such that the first, second and third regions (711, 712, 713) are coupled in series. The diodes 100-100L of each of the regions are coupled in parallel. This series connection can also be used with the specific examples of systems 800, 810 and devices 760, 770 illustrated in Figures 100-103.

As also illustrated in FIG. 99, any phase miscellaneous or comb electrode structure can be energized by applying a voltage level to bus bar 714 coupled to all of the respective tines (310A, 310B). Bus bar 714 is typically sized to have a relatively low sheet resistance or impedance.

For relatively small areas or for other applications (such as graphic art), such current balancing and impedance matching are not required (thin layer The structure is matched, and the simpler first and second conductors 310, 320 structures, such as the layered structures illustrated in Figures 91-98, 102, 103, can be used. For example, when the ratio of the sheet resistance of the first conductor and the second conductor 310, 320 to the total resistance of the first and second conductors 310, 320 together with the diodes 100-100L is relatively small or relatively small, such use may be used. Layered structure. As also illustrated in Figures 102 and 103, a third conductive layer 312 can also be used, such as to provide parallel busbar connections along relatively long devices 300, 700, 720, 730, 740, 750, 760, 770 strips.

Next, one or more dielectric layers 315 are left to leave the exposed first terminal 125 (in the first orientation) or the second side (back) of the diode 100-100K (or the GaN heterostructure of the diode 100L) Structure (in the second orientation) or both to be sufficient for one or more first conductors 310 (coupled to the diodes 100-100L) and deposited on the one or more dielectric layers 315 The amount of electrical insulation provided between the first terminal 125 or the second side (back side) of the diode 100-100K (depending on the orientation) to form a corresponding physical and electrical contact between the one or more second conductors 320 is deposited on the second Polar body 100-100L. For device 300, a luminescent (or emitting) layer 325, optionally present, may be deposited, followed by deposition of stabilizing layer 335 and/or any lensing, dispersing or sealing layer 330 as appropriate. For example, the optionally present illuminating (or emitting) layer 325 can include a stokes shifting phosphor layer to produce a lamp or other that emits a desired color or other selected wavelength range or spectrum. Device. These various layers, conductors, and other deposited compounds are discussed in more detail below. For device 700, lensing, dispersing or sealing layer 330 is typically deposited on one or more second conductors 320 on a first side, and as appropriate The illuminating (or emitting) layer 325 present may then be deposited on the substrate 305 on the second side, followed by deposition of the stabilizing layer 335 and/or any lensing, dispersing or sealing layer 330 as appropriate. Depending on the location of the first and second conductors 310, 320, the carbon electrodes 322A, 322B may be applied after deposition of the respective first and second conductors or after deposition of any lensing, dispersing or sealing layer 330. These various layers, conductors, and other deposited compounds are discussed in more detail below.

Substrate 305 can be formed from any suitable material or include any suitable material such as, but not limited to, plastic, paper, cardboard, or coated paper or paperboard. Substrate 305 can comprise any flexible material that has strength that can withstand the intended conditions of use. In an exemplary embodiment, the substrate 305, 305A comprises a substantially optically transmissive polyester or plastic sheet, such as MacDermid Autotype, which is processed to achieve print acceptability and is available from MacDermid Corporation of Denver, Colorado, USA. A CT-5 or CT-75 or 7 mil polyester (Mylar) sheet, or Mylar such as Coveme acid treated. In another exemplary embodiment, substrate 305 comprises, for example, a polyimide film such as Kapton available from DuPont, Inc. of Wilmington Delaware, USA. Also in an exemplary embodiment, substrate 305 includes a material that can or is adapted to provide sufficient electrical insulation for the selected excitation voltage. Substrate 305 can comprise, for example, any one or more of the following: paper, coated paper, plastic coated paper, fiber paper, cardboard, advertising paper, advertising board, book, magazine, newspaper, wood board, plywood, and the like in any selected form. Paper or wood based products; plastic or polymeric materials (sheets, films, sheets, etc.) in any selected form; natural and synthetic rubber materials and in any chosen form Natural and synthetic fabrics in any chosen form, including polymeric nonwovens (woven, meltblown and spunbonded); extruded polyolefin films, including LDPE films; glass, ceramics and other sources in any chosen form Materials and products of bismuth or cerium oxide; concrete (curing), stone and other building materials and products; or any other products currently in existence or in the future. In a first exemplary embodiment, a substrate 305, 305A can be selected that provides a degree of electrical insulation (i.e., has one or more of sufficient deposition or coating on the first side (front) of the substrate 305 The first conductors 310 are electrically insulated (dielectric constant or insulating properties that are electrically insulated from each other or electrically isolated from other devices or system components). For example, although glass sheets or tantalum wafers are a relatively expensive option, they can also be used as substrate 305. However, in other exemplary embodiments, a plastic sheet or a plastic coated paper product is used to form the substrate 305, such as the polyester described above or a patented paper stock available from Sappi Co., Ltd. and 100 lb. of cover stock, or from other papers. Similar coated papers obtained by manufacturers (such as Mitsubishi Paper Mills, Mead), and other paper products. In another exemplary embodiment, a embossed plastic sheet or a plastic coated paper product having a plurality of grooves, also available from Sappi Co., Ltd., is used, wherein the grooves are used to form the conductor 310. In other exemplary embodiments, any type of substrate 305 can be used including, without limitation, a substrate having other sealing or encapsulating layers (such as plastic, lacquer, and vinyl) deposited onto one or more surfaces of substrate 305. Substrate 305, 305A may also comprise a laminate or other adhesive of any of the above materials.

In an exemplary embodiment, the relatively small size of the diodes 100-100L spread over the substrates 305, 305A provides relatively rapid heat dissipation. A heat sink is not required, and a wide variety of materials are suitable for use as the substrate 305, 305A, including materials having a relatively low quenching temperature. Such temperatures may include, for example, but are not limited to, 50 ° C or 50 ° C or higher, or 75 ° C or 75 ° C or higher, or 100 ° C, or 125 ° C or 150 ° C, or 200 ° C, or 300 ° C, and may be used, for example ( But not limited to) ISO 871:2006 standard measurement. The operating temperatures of the devices 300, 700 are also generally relatively low, for example, having an average operating temperature of less than about 150 ° C, or less than about 125 ° C, or less than about 100 ° C or less than about 75 ° C, or less than about 50. °C. The average operating temperature should generally be determined, for example, but not limited to, that the device 300, 700 has been turned on and warmed up, such as providing its maximum light output for at least about 10 minutes, and commercially available infrared thermometers can be used under typical environmental conditions (such as The operating temperature increment (and the arithmetic mean) is measured at the outermost surface of the apparatus 300, 700 at an ambient temperature of about 20 ° C to 30 ° C.

The exemplary substrates 305, 305A as illustrated in the various figures have a form factor that is generally substantially flat, such as comprising, for example, but not limited to, a selected material (eg, paper or plastic) that can be fed through the printer. a sheet, and which may have a shape including a surface roughness, a pocket, a channel or a groove on the first surface (or side) or a first surface that is substantially smooth within a predetermined tolerance (excluding the concave The type of hole, channel or groove. Those skilled in the art will appreciate that a variety of other shapes and surface types are available which are considered equivalent and within the scope of the present invention.

For specific examples of devices 300, 720, 730, one or more first conductors 310 are then coated or deposited (on the first side or surface of substrate 305), such as via a printing process, or applied to devices 700, 740, The 750 embodiment of the diode 100L is of a certain thickness, depending on the type of conductive ink or polymer, such as up to about 0.1 to 15 microns (eg, for a typical silver ink or nanoparticle silver ink, about 10 microns to 12 The micron wet film thickness, dried or cured film thickness is about 0.2 microns or 0.3 microns to 1.0 microns). In other exemplary embodiments, depending on the thickness of the coating, the first conductor 310 may also be sanded to smooth the surface and may also be calendered to compress conductive particles such as silver. In an exemplary method of fabricating exemplary devices 300, 700, 720, 730, 740, 750, 760, 770, such as via a printing or other deposition process, conductive ink, polymer or other conductive liquid or colloid (such as silver (Ag) ) ink or polymer, nanoparticle or nanofiber silver ink composition, carbon nanotube ink or polymer, or silver/carbon mixture, such as amorphous nanocarbon dispersed in silver ink (its particle size is Approximately 75 nm to 100 nm)) is deposited on the substrate 305 or deposited on the diode 100L, which may then be cured or partially cured (such as via an ultraviolet ( UV ) curing process) to form one or more first conductors 310. In another illustrative embodiment, a conductive compound or element such as a metal (eg, aluminum, copper, silver, gold, nickel) may be formed by sputtering, spin casting (or spin coating), vapor deposition, or electroplating. Or a plurality of first conductors 310. One or more composite first conductors 310 can also be produced using a combination of different types of conductors and/or conductive compounds or materials (eg, inks, polymers, elemental metals, etc.). Multiple layers and/or multiple types of metals or other conductive materials may be combined to form one or more first conductors 310, such as first conductor 310 comprising, for example, but not limited to, a gold plated layer on nickel. For example, vapor deposited aluminum or silver or a mixed carbon-silver ink can be used. In various exemplary embodiments, a plurality of first conductors 310 are deposited, and in other embodiments, the first conductors 310 can be deposited as a single conductive sheet or otherwise attached (eg, an aluminum sheet coupled to the substrate 305) ) (not separately stated). Also in various embodiments, the conductive ink or polymer that can be used to form the one or more first conductors 310 may be uncured or may only partially cure before depositing a plurality of diodes 100-100K, followed by a plurality of The polar body 100-100K is fully cured upon contact, such as to form an ohmic contact with a plurality of diodes 100-100K. In an exemplary embodiment, one or more first conductors 310 are fully cured prior to depositing a plurality of diodes 100-100K, wherein other compounds of the diode ink cause one or more first conductors 310 to some extent The dissolution, which is then re-cured upon contact with a plurality of diodes 100-100K, and for the device 700 embodiment, the one or more first conductors 310 are fully cured after deposition. Also for the device 700 embodiment, a conductive ink having a lower concentration of conductive particles may be used to form the one or more first conductors 310, thereby contributing to the first terminal 125 being resistant to moisture. The optically transmissive conductive material may also be used to form the one or more first conductors 310, depending on the particular embodiment selected.

Other conductive inks or materials may also be used to form one or more of first conductor 310, second conductor 320, third conductor (not separately illustrated), and any other conductors discussed below, such as copper, tin, aluminum, gold, Precious metals, carbon, carbon black, carbon nanotubes ("CNT"), single or double or multi-walled CNTs, graphite films, graphite film sheets, nano-graphite film sheets, nano-carbon and nano-carbon and silver Composition, nanoparticle and nanofiber silver composition having excellent or acceptable optical transmission, or other organic or inorganic conductive polymer, ink, colloid or other liquid or semi-solid material. In an exemplary embodiment, carbon black (having a particle size of about 100 nm) is added to the silver ink such that the resulting carbon concentration is in the range of about 0.025% to 0.5%, thereby increasing Ohmic contact and adhesion between the strong diodes 100-100L and the first conductor 310. In addition, the first conductor 310, the second conductor 320, and/or the third conductor may be equivalently formed using any other printable or coatable conductive material, and exemplary conductive compounds include: (1) from Conductive Compounds (Londonberry, NH, USA, AG-500, AG-800 and AG-510 silver conductive inks, which may also include other coatings UV-1006S ultraviolet curable dielectric (such as a portion of the first dielectric layer 125); (2) 7102 carbon conductor from DuPont (if overprinted 5000Ag), 7105 carbon conductor, 5000 silver conductor, 7144 carbon conductor (along with UV encapsulant), 7152 carbon conductor (together with 7165 encapsulant) and 9145 silver conductor; (3) from SunPoly's 128A silver conductive ink, 129A silver and carbon conductive ink, 140A conductive ink and 150A silver conductive ink; (4) PI-2000 series high conductivity silver ink from Dow Corning; (5) from Henkel/Emerson & Cumings Electrodag 725A; (6) Monarch M120 available from Cabot Corporation of Boston, Massachusetts, USA, which is used as a carbon black additive such as to be added to silver ink to form a mixture of carbon and silver ink; (7) Acheson 725A conductive Silver ink (available from Henkel) alone or Other silver nanofiber composition;., And (8) available from Gyeonggi-do, Korea of Inktec Inktek PA-010 or PA-030 fibers may be nanoparticles or screen printing of a silver conductive ink is obtained. These compounds can also be used to form other conductors (including the second conductor 320) and any other conductive traces or connectors as discussed below. Additionally, conductive inks and compounds are available from a variety of other sources.

A conductive polymer having substantially optical transparency can also be used to form one or A plurality of first conductors 310 and second conductors 320 and/or third conductors. For example, in addition to any other transmissive conductors discussed below and equivalents thereof, polyethylene-dioxythiophene may also be used, such as AGFA, Inc., under the trade designation "Orgacon" from Ridgefield Park, New Jersey, USA. Commercially available polyethylene-dioxythiophene. Other conductive polymers that can be used equivalently include, for example, without limitation, polyaniline and polypyrrole polymers. In another illustrative embodiment, various conductors, such as one or more second conductors 320, that are substantially optically transmissive or transparent, such as one or more second conductors 320, are formed using carbon nanotubes that have been suspended or dispersed in a polymerizable ionic liquid or other fluid. . It should be noted that for the device 300 embodiment, the one or more second conductors 320 are generally substantially optically transmissive to provide greater light emission or absorption on the first side of the device, and for the device 700 specific example, except at Light output is also required on one side, otherwise one or more of the second conductors 320 are generally not significantly optically transmissive to provide a relatively low electrical impedance. In some exemplary device 700 embodiments, the one or more second conductors 320 are highly opaque and reflective to act as a mirror and enhance light output from the second side of the device 700.

Optically transmissive conductive inks that have been used to form one or more second conductors 320 include transparent conductive inks available from Nth Degree Technologies Worldwide, Inc. of Tempe, Arizona, USA, and have been described in Mark D. Lowenthal et al. U.S. Provisional Patent Application Serial No. 61/447, the entire disclosure of which is incorporated herein in Have the same completeness as the full text in this article Full effect. Another transparent conductor is included in a solvent such as 1-butanol, cyclohexanol, glacial acetic acid (about 1% by weight) and polyvinylpyrrolidone (MW is about 1,000,000) (about 2% to 4% by weight, or More particularly, about 3% by weight of the silver nanofibers in the mixture (about 3% to 50% by weight, or more especially about 4% to 40% by weight, or more especially about 5% to 30% by weight, or More particularly from about 6% to 20% by weight, or especially especially from about 5% to 15% by weight, or especially especially from about 7% to 13% by weight, or especially especially from about 9% to 11% by weight, or more especially About 10% by weight). The other conductive ink may also comprise a plurality of other solvents (such as with from about 50% to about 65% by weight of propylene glycol and from about 1% to about 10% by weight of n-propanol or 1-methoxy-2-propanol) Mixed nanoparticle or nanofiber silver ink (such as Inktek PA-010 or PA-030 nanoparticle or nanofiber screenable silver conductive ink) (about 30% to 50% by weight). Another conductive ink may also comprise nanoparticle or nanofiber silver ink mixed with a plurality of other solvents as described above (such as Inktek PA-010 or PA-030 nanoparticle or nanofiber screenable silver conductive) Ink), the silver concentration is from about 0.30% to about 3.0% by weight.

Organic semiconductors (also known as π-conjugated polymers, conductive polymers or synthetic metals) are inherently semiconducting due to the π conjugate of carbon atoms along the polymer backbone. Its structure contains a one-dimensional organic backbone, thereby enabling conduction after n-type or p+-type doping. Well-studied classes of organic conductive polymers include poly(acetylene), poly(pyrrole), poly(thiophene), polyaniline, polythiophene, poly(p-phenylene sulfide), poly(p-phenylenevinyl) PPV) and PPV derivatives, poly(3-alkylthiophene), polyfluorene, polyfluorene, polycarbazole, poly camomile blue, polynitrogen 呯, poly (茀) and polynaphthalene. Other examples include polyaniline, polyaniline derivatives, polythiophenes, polythiophene derivatives, polypyrroles, polypyrrole derivatives, polybenzothiophenes, polybenzothiophene derivatives, polyparaphenylene, polyparaphenylene Derivatives, polyacetylene, polyacetylene derivatives, polydiacetylene, polydiacetylene derivatives, polyparaphenylene vinyl, polyparaphenylene vinyl derivatives, polynaphthalene, and polynaphthalene derivatives, polyiso The benzothiophene (PITN) and heteroaryl group may be, for example, a poly(arylene)vinyl group (ParV), a polyphenylene sulfide (PPS), a polyperylene naphthalene (PPN), or a polyphthalocyanine (thiophene, furan or pyrrole). PPhc) and the like, and derivatives thereof, copolymers thereof and mixtures thereof. The term derivative as used herein means that the polymer is formed from a monomer substituted with a side chain or group.

The method of polymerizing the conductive polymer is not particularly limited, and suitable methods include, for example, but not limited to, uv or other electromagnetic polymerization, thermal polymerization, electrolytic oxidation polymerization, chemical oxidation polymerization, and catalytic polymerization. The polymer obtained by the polymerization process is often neutral and non-conductive until it is doped. Thus, the polymer is p-doped or n-doped to convert it into a conductive polymer. The semiconducting polymer can be chemically doped or electrochemically doped. The substance used for doping is not particularly limited; a substance capable of accepting an electron pair such as Lewis acid is generally used. Examples include hydrochloric acid, sulfuric acid, organic sulfonic acid derivatives (such as p-sulfonic acid, polystyrenesulfonic acid, alkylbenzenesulfonic acid, camphorsulfonic acid, alkylsulfonic acid, sulfinic acid, etc.), ferric chloride, chlorination Copper and iron sulfate.

It should be noted that for the "reversed" device 300 configuration, the optically transmissive substrate 305 and the one or more first conductors 310 are selected to allow light to enter and/or exit through the second side of the substrate 305. In addition, when the second conductor 320 is also When transparent, light can be emitted or absorbed from either side of device 300 or on both sides of device 300.

The one or more first conductors 310 can have various textures, such as having a relatively smooth surface, or otherwise having a rough or pointed surface, or an engineered micro-embossed structure (eg, available from Sappi Co., Ltd.) to potentially The adhesion of other layers, such as dielectric layer 315, is improved and/or facilitates subsequent ohmic contact with diodes 100-100L. One or more first conductors 310 may also be corona treated prior to depositing the diode 100-100L, which tends to remove any oxide that may have formed and also facilitates subsequent and plural two The polar bodies 100-100L form an ohmic contact. Many variations of the manner in which one or more first conductors 310 can be formed are contemplated by those skilled in the art of electronics or printing, all of which are considered equivalent and within the scope of the present invention. By way of example, but not limitation, one or more first conductors 310 can also be deposited via sputtering or vapor deposition. Additionally, for various other specific examples, one or more first conductors 310 can be deposited in a single or continuous layer, such as via coating, printing, sputtering, or vapor deposition.

Thus, "depositing" as used herein includes any and all printing, coating, rolling, spraying, laminating, sputtering, electroplating, spin casting (or spin coating) of impact or non-impact type known in the art. ), vapor deposition, lamination, attachment, and/or other deposition processes. "Printing" includes any and all of the printing, coating, rolling, spraying, laminating, spin coating, laminating and/or attaching processes known in the art as impact or non-impact, and includes, for example, But not limited to) screen printing, inkjet printing, electro-optical printing, electro-ink printing, photoresist and other resist printing, thermal printing, laser printing, magnetic printing, moving Printing, fast drying printing, mixed lithography, Gravure and other intaglio printing. All such processes are considered herein as deposition processes and are available for use. An exemplary deposition or printing process does not require significant production control or limitations. No specific temperature or pressure is required. It is possible to use some kind of clean room or filtered air, but the extent may be consistent with the standards of known printing or other deposition processes. However, for consistency, such as to properly align (align) the layers that are sequentially deposited in each of the specific examples, relatively constant temperatures (with possible exceptions, as discussed below) and humidity may be required. In addition, the various compounds used may be included in various polymers, binders or other dispersing agents which may be thermally cured or dried, air dried under ambient conditions, or IR or uv cured.

It should also be noted that generally any coating of various compounds herein, such as via printing or other deposition, may be used, such as by using a resist coating or by otherwise modifying the "wetability" of the surface, for example By modifying the surface (such as the surface of the substrate 305, the surface of each of the first or second conductors (310, 320, respectively) and/or the surface of the diode 100-100L), for example, hydrophilic, hydrophobic or electrical (positive) Charge or negative charge) features to control surface properties or surface energy. Together with the characteristics of the deposited compound, suspension, polymer or ink, such as surface tension, the deposited compound can be adhered to the desired or selected location and effectively avoiding other areas.

By way of example, but not limitation, any plurality of diodes 100-100L are suspended in a liquid, semi-liquid or colloidal carrier using any evaporative or volatile organic or inorganic compound (such as water, alcohol, ether, etc.). Adhesive components (such as resins) and/or surfactants or other glidants may also be included. in In an exemplary embodiment, by way of example, but not limitation, a plurality of diodes 100-100L are suspended as described above in the Examples. Surfactants or glidants may also be used, such as octanol, methanol, isopropanol or deionized water, and binders may also be used, such as each containing substantially or relatively small nickel beads (eg, 1 micron). Anisotropic conductive adhesive (which provides conductivity, for example, after compression and curing, and which can be used to modify or enhance the formation of ohmic contacts), or any other uv, heat or air-curable adhesive or polymer, including discussed in more detail below. (and it can also be used with dielectric compounds, lenses, etc.).

In addition, each of the diodes 100-100L may be configured as, for example, a light emitting diode having any of various colors such as red, green, blue, yellow, amber, and the like. Light-emitting diodes 100-100L having different colors can then be mixed into the exemplary diode ink to produce a selected color temperature when energized in devices 300, 300A.

Dry or cured diode ink Example 1:

A composition comprising: a plurality of diodes 100-100 L; and a cured or polymerized resin or polymer.

Dry or cured diode ink Example 2:

A composition comprising: a plurality of diodes 100-100 L; and a cured or polymerized resin or polymer forming a film at least partially surrounding each of the diodes and having a thickness of between about 10 nm and 300 nm.

Dry or cured diode ink Example 3:

A composition comprising: a plurality of diodes 100-100 L; and at least a trace amount of a cured or polymerized resin or polymer.

Dry or cured diode ink Example 4:

A composition comprising: a plurality of diodes 100-100 L; a cured or polymerized resin or polymer; and at least traces of solvent.

Dry or cured diode ink Example 5:

A composition comprising: a plurality of diodes 100-100 L; at least traces of a cured or polymerized resin or polymer; and at least traces of solvent.

Dry or cured diode ink Example 6:

A composition comprising: a plurality of diodes 100-100 L; a cured or polymerized resin or polymer; at least traces of solvent; and at least trace amounts of surfactant.

Dry or cured diode ink Example 7:

The composition comprising: a plurality of diodes 100-100L; at least traces of a cured or polymerized resin or polymer; at least traces of solvent; At least trace amounts of surfactant.

The diode ink (suspended diode 100-100L and optionally inert particles) is then deposited on substrate 305A of a device 700 embodiment, such as by printing with a 280 mesh web of polyester or PTFE. Deposited on one or more of the first conductors 310 of the device 300 embodiment, and such that the volatile or evaporative components are dissipated, such as via heating, uv curing, or any drying process to leave the diode 100-100L substantially or At least partially contacting and adhering to the substrate 305A or the one or more first conductors 310. In an exemplary embodiment, the deposited diode ink is cured at about 110 ° C for typically 5 minutes or less. Dry or cured diode inks such as dried or cured diodes in Examples 1 and 2 typically comprise a plurality of diodes 100-100 L and cured or polymerized resins or polymers (at least in trace amounts) ) (which may generally hold or hold the diode 100-100L in place as described above) and form the film 295 as previously discussed. Although the volatile or evaporative components (such as the first and/or second solvent and/or surfactant) are substantially dissipated, trace amounts or more may be left, such as dried or cured diode ink embodiments. As explained in 3-6. As used herein, "trace" component is understood to mean that the amount of the initially present component of the diode ink is greater than zero but less than or equal to 5 compared to the initial deposition on first conductor 310 and/or substrate 305, 305A. The amount of %.

The density or concentration of the resulting diode 100-100L in the completed device (300, 300A, 300B, 300C, 300D, 700, 700A, 700B, 720, 730, 740, 750, 760, 770) (eg per square centimeter of dipole The number of bodies 100-100L) will be the thickness of the diode 100-100L in the diode ink Depending on the degree. When the dimensions of the diode 100-100L are in the range of 20 microns to 30 microns, very high density can be used but still only cover a small percentage of surface area (one advantage is that a greater degree of heat dissipation is allowed without additional need heat sink). For example, when using a diode 100-100L having a size in the range of 20 microns to 30 microns, 10,000 diodes in a square inch cover only about 1% of the surface area. Also for example, in an exemplary embodiment, for use in devices 300, 300A, 300B, 300C, 300D, 700, 700A, 700B, 720, 730, 740, 750, 760, 770, a plurality of diodes Density is available and within the scope of the invention, including (without limitation): from 2 to 10,000 diodes per square centimeter, 100-100 L; or more particularly from 5 to 10,000 diodes per square centimeter, 100-100 L; or more particularly 5 to 1,000 diodes per square centimeter, 100-100 L; or more specifically, 5 to 100 diodes per square centimeter, 100-100 L; or more specifically, 5 to 50 diodes per square centimeter, 100-100 L Or, more particularly, 5 to 25 diodes per square centimeter, 100-100 L; or more specifically, 10 to 8,000 diodes per square centimeter, 100-100 L; or more specifically, 15 to 5,000 dipoles per square centimeter 100-100L; or more particularly, 20 to 1,000 diodes per square centimeter, 100-100L; or more specifically, 25 to 100 diodes per square centimeter, 100-100L; or more specifically, 25 to 2 centimeters per square centimeter 50 diodes 100-100L.

The diodes 100-100L may also be deposited on the one or more first conductors 310 using other steps or a number of steps. Also by way of example, but not limitation, a binder may be deposited first, such as a methoxylated glycol ether acrylate monomer (which may also include a water soluble photoinitiator such as TPO ((2, 4, 6-) Three Terphenylene sulfonate, or an anisotropic conductive binder, followed by deposition of a diode 100-100L that has been suspended in a liquid or colloid as discussed above.

In an exemplary embodiment, for a specific example of apparatus 300, 720, 730, 760, the suspension medium of the diode 100-100K may also contain a dissolving solvent or other reactant, such as one or more dibasic esters, which are initially dissolved. Or re-wetting some of the first conductors 310 of the one or more first conductors 310. When depositing a plurality of diode 100-100K suspensions and the surface of one or more first conductors 310 subsequently becomes partially dissolved or uncured, the plurality of diodes 100-100K may be slightly or partially embedded in one The plurality of first conductors 310 also contribute to the formation of an ohmic contact and form an adhesive bond or adhesive coupling between the plurality of diodes 100-100K and the one or more first conductors 310. Since the solvating agent or reactant dissipates, such as via evaporation, the one or more first conductors 310 are hardened (or resolidified) upon substantial contact with the plurality of diodes 100-100K. In addition to the dibasic esters discussed above, exemplary solubilizing, wetting or solvating agents such as, but not limited to, also include propylene glycol monomethyl ether acetate (C ₆ H ₁₂ O ₃ ) as described above ( It is sold by Eastman under the name "PM acetate"), which is used in a suspension medium with 1-propanol (or isopropanol) at a molar ratio of about 1:8 (or 22:78); Monoesters, and mixtures thereof, such as dimethyl succinate, dimethyl adipate and dimethyl glutarate (different mixtures available from Invista under the product names DBE, DBE-2, DBE-3, DBE- 4. DBE-5, DBE-6, DBE-9 and DBE-IB are obtained). In an illustrative embodiment, DBE-9 is used. The molar ratio of solvent will vary based on the solvent chosen, with 1:8 and 1:12 being typical ratios. Various compounds or other agents may also be used to control the reaction: for example, a combination or mixture of 1-propanol and water may significantly inhibit dissolution or rewetting of one or more first conductors 310 via BE-9 until relatively in the curing process. At a later time, the various compounds of the diode ink have evaporated or otherwise dissipated and the thickness of the diode ink is less than the height of the diode 100-100K, so any dissolved material of the first conductor 310 (such as silver ink resin) And silver ink particles) are not deposited on the upper surface of the diode 100-100K (the diodes 100-100K can then make electrical contact with the second conductor 320).

Dielectric ink embodiment 1:

A composition comprising: a dielectric resin comprising from about 0.5% to about 30% methylcellulose resin; a first solvent comprising an alcohol; and a surfactant.

Dielectric ink example 2:

A composition comprising: a dielectric resin comprising from about 4% to about 6% methylcellulose resin; a first solvent comprising from about 0.5% to about 1.5% octanol; and a second solvent comprising about 3% Up to about 5% IPA; and surfactant.

Dielectric ink embodiment 3:

The composition comprising: from about 10% to about 30% of a dielectric resin; a first solvent comprising a glycol ether acetate; and a second solvent comprising a glycol ether; The third solvent.

Dielectric ink example 4:

The composition comprising: from about 10% to about 30% of a dielectric resin; a first solvent comprising from about 35% to 50% ethylene glycol monobutyl ether acetate; and a second solvent comprising about 20% to 35% dipropylene glycol monomethyl ether; and a third solvent comprising from about 0.01% to 0.5% toluene.

Dielectric ink example 5:

The composition comprising: from about 15% to about 20% of a dielectric resin; a first solvent comprising from about 35% to 50% ethylene glycol monobutyl ether acetate; and a second solvent comprising about 20% to 35% dipropylene glycol monomethyl ether; and a third solvent comprising from about 0.01% to 0.5% toluene.

Dielectric ink embodiment 6:

The composition comprising: from about 10% to about 30% of a dielectric resin; a first solvent comprising from about 50% to 85% dipropylene glycol monomethyl ether; and a second solvent comprising from about 0.01% to 0.5% toluene .

Dielectric ink example 7:

The composition comprising: from about 15% to about 20% of a dielectric resin; a first solvent comprising from about 50% to 90% ethylene glycol monobutyl ether acetate; and a second solvent comprising about 0.01% To 0.5% toluene.

Dielectric ink example 8:

The composition comprising: from about 15% to about 20% of a dielectric resin; a first solvent comprising from about 50% to 85% dipropylene glycol monomethyl ether; and the balance comprising a second solvent, the second solvent It comprises from about 0.01% to 8.0% propylene glycol or deionized water.

An insulating material (referred to as a dielectric ink, such as a dielectric ink described as dielectric ink Examples 1-8) is deposited on the diode 100-100L, such as via a printing or coating process, prior to deposition of the second conductor 320. An upper or lateral portion of the upper or diode 100-100L is formed to form an insulating or dielectric layer 315. The dielectric layer 315 has a wet film thickness of from about 30 microns to about 40 microns and a dried or cured film thickness of from about 5 microns to about 7 microns. The insulating or dielectric layer 315 can comprise any insulating or dielectric compound suspended in any of a variety of media as discussed above and below. In an exemplary embodiment, the insulating or dielectric layer 315 comprises a methylcellulose resin in an amount ranging from about 0.5% to 15%, or more particularly from about 1.0% to about 8.0%, or more particularly In the range of from about 3.0% to about 6.0%, or more particularly from about 4.5% to about 5.5%, such as E-3 "methocel" available from Dow Chemical; and a surfactant, The amount is in the range of about 0.1% to 1.5%, or more particularly in the range of about 0.2% to about 1.0%, or more particularly in the range of about 0.4% to about 0.6%, such as 0.5% BYK 381 from BYK Chemie GmbH. Suspending in the following solvent: the first solvent, in an amount ranging from about 0.01% to 0.5%, or more particularly from about 0.05% to about 0.25%, or more particularly from about 0.08% to about 0.12% , such as about 0.1% octanol; and a second solvent in an amount ranging from about 0.0% to 8%, or more particularly from about 1.0% to about 7.0%, or more particularly from about 2.0% to about 6.0% Within the range, or more particularly in the range of from about 3.0% to about 5.0%, such as about 4% IPA, the remainder is a third solvent, such as deionized water. Four to five coatings were deposited with the E-3 formulation to form an insulating or dielectric layer 315 having a total thickness of approximately 6 microns to 10 microns, with each coating cured at about 110 ° C for about 5 minutes. In other exemplary embodiments, dielectric layer 315 may be IR (infrared) cured, uv cured, or both. In other exemplary embodiments, different dielectric formulations may be applied in different layers to form an insulating or dielectric layer 315; for example, without limitation, coating is available from Henkel Corporation of Dusseldorf, Germany. The first layer of solvent-based transparent dielectric formation, such as Henkel BIK-20181-40A, Henkel BIK-20181-40B, and/or Henkel BIK-20181-24B, followed by the water-based E described above The -3 formulation forms a dielectric layer 315. In other exemplary embodiments, other dielectric compounds are commercially available from Henkel and can be used equivalently, such as in dielectric ink example 8. Dielectric layer 315 can be transparent, but can also include, for example, without limitation, relatively low concentrations of light diffusing, scattering, or reflective particles, as well as thermally conductive particles such as alumina. In various exemplary embodiments, the dielectric ink will also wet the upper surface of the diode 100-100L, causing at least some of the first terminal 125 or the second side (back) of the diode 100-100K (viewing orientation) The exposure is followed by subsequent contact with the second conductor 320.

唑啉、煙霧狀二氧化矽(諸如矽石粉)、二氧化矽粉； 以及改質尿素，諸如BYK® 420(可自BYK Chemie獲得)。可使用其他黏度調節劑，以及添加粒子以控制黏度，如Lewis等人之專利申請公開案第US 2003/0091647號中所述。亦可使用例如助流劑或界面活性劑，諸如辛醇及埃默拉爾德高效能材料公司(Emerald Performance Materials)之Foamblast 339。在其他例示性具體實例中，一或多種絕緣體135可為聚合物，諸如在去離子水中包含通常12%以下之PVA或PVB。 One or more exemplary solvents may be used in the exemplary dielectric inks such as, but not limited to, water; alcohols such as methanol, ethanol, n-propanol (including 1-propanol, 2-propanol (isopropanol) ), 1-methoxy-2-propanol), isobutanol, n-butanol (including 1-butanol, 2-butanol), n-pentanol (including 1-pentanol, 2-pentanol, 3 -pentanol), n-octanol (including 1-octanol, 2-octanol, 3-octanol); ethers such as methyl ethyl ether, diethyl ether, ethyl propyl ether and polyether; esters such as acetic acid Ethyl ester, dimethyl adipate, propylene glycol monomethyl ether acetate, dimethyl glutarate, dimethyl succinate, glycerol acetate, dibasic esters (eg Invista DBE-9); esters, such as Ethyl acetate; glycols such as ethylene glycol, diethylene glycol, polyethylene glycol, propylene glycol, dipropylene glycol, glycol ethers, glycol ether acetate, PM acetate (propylene glycol monomethyl ether acetate) , dipropylene glycol monomethyl ether, ethylene glycol monobutyl ether acetate; carbonate, such as propyl carbonate; glycerin, such as glycerin; acetonitrile, tetrahydrofuran (THF), dimethylformamide (DMF), N-methylformamide (NMF), dimethyl hydrazine (DMSO); Compound. Other solvent-based resins may be used in addition to the water-soluble resin. One or more thickeners may be used, such as clay, such as lithium bentonite clay, bentonite clay, organically modified clay; sugars and polysaccharides such as guar gum, santillac gum; cellulose and modified cellulose, such as hydroxymethyl Cellulose, methylcellulose, ethylcellulose, propylmethylcellulose, methoxycellulose, methoxymethylcellulose, methoxypropylmethylcellulose, hydroxypropylmethyl Cellulose, carboxymethyl cellulose, hydroxyethyl cellulose, ethyl hydroxyethyl cellulose, cellulose ether, cellulose ether, polyglucamine; polymer, such as acrylate and (meth) acrylate polymerization And copolymers, polyvinylpyrrolidone, polyethylene glycol, polyvinyl acetate (PVA), polyvinyl alcohol, polyacrylic acid, polyethylene oxide, polyvinyl butyral (PVB); diethylene glycol, Propylene glycol, 2-ethyl

Oxazoline, aerosolized cerium oxide (such as vermiculite powder), cerium oxide powder; and modified urea, such as BYK® 420 (available from BYK Chemie). Other viscosity modifiers can be used, as well as the addition of particles to control the viscosity, as described in US Patent Application Publication No. US 2003/0091647, the disclosure of which is incorporated herein. It is also possible to use, for example, a flow aid or a surfactant such as octanol and Foamblast 339 from Emerald Performance Materials. In other exemplary embodiments, the one or more insulators 135 can be a polymer, such as containing typically less than 12% PVA or PVB in deionized water.

After depositing the insulating or dielectric layer 315, one or more second conductors 320 are deposited (eg, via printed conductive ink, polymer or other conductor, such as a metal), which may be any type of conductor discussed above, conductive Ink or polymer, or may be an optically transmissive (or transparent) conductor, with the exposed or non-insulated portion of the diode 100-100L (generally the first terminal 125 of the diode 100-100L, the first set To form an ohmic contact. The one or more optically transmissive second conductors 320 have a wet film thickness of from about 6 microns to about 18 microns and a dried or cured film thickness of from about 0.1 microns to about 0.4 microns, and one or more optically opaque second conductors 320 (such as Acheson 725A conductive silver) typically has a wet film thickness of from about 14 microns to about 18 microns and a dried or cured film thickness of from about 5 microns to about 8 microns. For example, the optically transmissive second conductor can be deposited as a single continuous layer (forming a single electrode), such as for illumination or optoelectronic applications. For the reverse configuration described above, and for the device 700 embodiment, the second conductor 320 need not be optically transmissive (although it may be optically transmissive) to allow light from the device 300, 300A, 300B, 300C, 300D, 700, 700A, 700B , 720, 730, 740, 750, The top and bottom surfaces of 760, 770 enter or leave. The optically transmissive second conductor 320 can comprise any compound that: (1) has sufficient electrical conductivity to energize the device 300 or receive energy from its first or upper end portion (and may or may not be necessary, generally low enough) The resistance or impedance to reduce or minimize power loss and heat generation; and (2) at least a predetermined or selected transparency or transmittance for electromagnetic radiation of a selected wavelength, such as a portion of the visible spectrum. The choice of material forming the optically transmissive or non-transmissive second conductor 320 may vary depending on the selected application of the device 300, 700 and the use of one or more third conductors as the case may be. Depositing one or more second conductors 320 on the exposed and/or non-insulated portions of the diodes 100-100L, such as by using a printing or coating process known or to be known in the art of printing or coating, and It is also deposited on any insulating or dielectric layer 315 where appropriate control may be provided to achieve any selected alignment or alignment, as necessary or desired.

For example, an exemplary transparent conductive ink used to form one or more second conductors 320 can comprise from about 0.4% to 3.0% silver nanofibers (or 3.0% or more, in other embodiments), about 2% to 4% polyvinylpyrrolidone (MW is 1 million), 0.5% to 2% glacial acetic acid, and the remainder is 1-butanol and/or cyclohexanol.

In an exemplary embodiment, in addition to the conductors described above, carbon nanotubes (CNT), nanoparticle or nanofiber silver, polyethylene-dioxythiophene (eg, AGFA Orgacon), poly a combination of -3,4-extended ethylenedioxythiophene with polystyrenesulfonic acid (available from Baytron P and available from Bayer AG of Leverkusen, Germany), polyaniline or polypyrrole Polymer, indium tin oxide (ITO) and/or antimony tin oxide (ATO) (wherein ITO or ATO is typically suspended in the form of particles in any of the various binders, polymers or carriers previously discussed) An optically transmissive second conductor 320 is formed. In an exemplary embodiment, the carbon nanotubes are suspended in a volatile liquid containing a surfactant such as a carbon nanotube composition available from South West NanoTechnologies, Inc. of Norman, Oklahoma, USA. Additionally, one or more third conductors (not separately illustrated) having relatively low impedance or resistance are incorporated or may be incorporated into the respective transmissive second conductor 320. For example, to form one or more third conductors, a conductive ink or polymer printed on a corresponding portion or layer of the second conductive conductor 320 (eg, silver ink, CNT, or polyethylene-dioxythiophene polymerization) can be used. Forming one or more fine wires, or forming one or more fine wires (eg, having a grid or trapezoidal pattern) using conductive ink or polymer printed on a larger, unitary transparent second conductor 320 in a larger display ).

Other compounds that are equivalently used to form the substantially optically transmissive second conductor 320 include indium tin oxide (ITO) as described above, and other transmissive conductors currently known or likely to be known in the art, including One or more of the conductive polymers discussed above, such as polyethylene-dioxythiophene available under the trade name "Orgacon", and various transparent conductors based on carbon and/or carbon nanotubes. Representative transmissive conductive materials can be obtained, for example, from DuPont, such as 7162 and 7164 ATO translucent conductors. The transmissive second conductor 320 can also be combined with various binders, polymers or carriers, including the previously discussed binders, polymers or carriers, such as being curable under various conditions (such as exposure to ultraviolet radiation curable ( Uv can be cured)) adhesive.

Stabilization layer 335, as may be necessary or desired, may be deposited on second conductor 320 and used to protect second conductor 320 from illuminating (or emitting) layer 325 or any intervening conformal coating to enable second The conductivity of the conductor 320 is degraded. One or more relatively thin coatings, such as Nazdar 9727 transparent substrate or DuPont 5018 or infrared light curable resin, such as About 7% of polyvinyl butyral in the alcohol. In addition, heat dissipation and/or light scattering particles may also be included in the stabilization layer 335 as appropriate. Exemplary stabilization layers are typically from about 10 microns to 40 microns in dry or cured form.

Alternatively, carbon electrodes 322 (described as 322A and 322B) may be used to form contact with one or more first conductors 310 and one or more second conductors 320 outside of sealing or protective layer 330, as for each exemplary The specific examples illustrate and help protect one or more first conductors 310 and one or more second conductors 320 from corrosion and wear. In an exemplary embodiment, a carbon ink, such as Acheson 440A, is used having a wet film thickness of from about 18 microns to 20 microns and a dried or cured film thickness of from about 7 microns to about 10 microns.

Also as an alternative illustrated in FIGS. 102 and 103, a third conductive layer 312, as appropriate, may be used and may include one or more first conductors 310 and/or one or more second conductors 320 herein. Any of the electrically conductive materials described.

One or more luminescent (or emitting) layers 325 (eg, comprising one or more phosphor layers or coatings) may be deposited on the stabilizing layer 335 (or deposited on the second conductor 320 when the stabilizing layer 335 is not used) ), or deposited directly on the second side of substrate 305A of the device 700 embodiment. Multiple illuminating (or emitting) layers 325 can also be used, as illustrated, such as on one side of each of devices 300, 300A, 300C, 300D, 700, 700A, 720, 730, 740, 750, 760, 770 (or Launch) layer 325. In an exemplary embodiment, such as a specific embodiment of an LED, such as, but not limited to, one or more emissive layers 325 may be deposited on a device 300 embodiment, such as via a printing or coating process as discussed above. The entire surface of the stabilizing layer 335 (or deposited on the second conductor 320 when the stabilizing layer 335 is not used), or deposited directly on the second side of the substrate 305A of the device 700 embodiment, or both. The one or more emissive layers 325 can be any light that can or is adapted to emit light in the visible spectrum (or any selected frequency in response to light emitted from the dipoles 100-100L (or other electromagnetic radiation). The other electromagnetic radiation is displaced by a substance or compound that is displaced (eg, Stokes shift). For example, a yellow phosphor-based emissive layer 325 can be used with the blue-emitting diode 100-100L to produce substantially white light. The luminescent compounds include various phosphors that can be provided in any of a variety of forms and with any of a variety of dopants. The luminescent compound or particle forming the one or more emissive layers 325 can be used or suspended in the form of a polymer of various binders, and can also be combined with various binders such as phosphor binders available from DuPont or Conductive Compounds. It facilitates printing or other deposition processes and adheres the phosphor to the underlying layer and subsequent overlying layers. One or more emissive layers 325 may also be provided in a uv curable or thermally curable form.

A wide variety of equivalent luminescent or other light emissive compounds are available and within the scope of the invention, including (without limitation): (1) G1758, G2060, G2262, G3161, EG2762, EG 3261, EG3560, EG3759, Y3957, EY4156, EY4254 , EY4453, EY4651, EY4750, O5446, O5544, O5742, O6040, R630, R650, R6733, R660, R670, NYAG-1, NYAG-4, NYAG-2, NYAG-5, NYAG-3, NYAG-6, TAG -1, TAG-2, SY450-A, SY450-B, SY460-A, SY460-B, OG450-75, OG450-27, OG460-75, OG460-27, RG450-75, RG450-65, RG450-55 , RG450-50, RG450-45, RG450-40, RG450-35, RG450-30, RG450-27, RG460-75, RG460-65, RG460-55, RG460-50, RG460-45, RG460-40, RG460 -35, RG460-30 and RG460-27, available from Intematix, Fremont, California, USA; (2) 13C1380, 13D1380, 14C1220, and GG-84, available from Global Tungsten & Powders, Inc. of Towanda, Pennsylvania, USA; (3) FL63/S-D1, HPL63/F-F1, HL63/S-D1, QMK58/F-U1, QUMK58/F-D1, KEMK63/F-P1, CPK63/N-U1, ZMK58/N-D1 And UKL63/F-U1, available from Phosphor Technology Ltd. of Herts, England; (4) BYW01A/PTCW01AN, BYW01B/PTCW01BN, BUVOR02, BUVG01, BUVR02, BUVY02, BUVG02, BUVR03/PTCR03 and BUVY03, available from Phosphor Tech of Lithia Springs, Georgia, USA; and (5) Hawaii655, Maui535, Bermuda465 and Bahama560, Available from Lightscape Materials, Inc. of Princeton, New Jersey, USA. Additionally, colorants, dyes, and/or dopants may be included in any such luminescent (or emitting) layer 325, depending on the particular embodiment selected. In an illustrative embodiment, a yttrium aluminum garnet ("YAG") phosphor is available from Phosphor Technology Co., Ltd. and Global Tungsten & Powders, such as a 40% YAG uv curable resin (the wet film thereof) And a dried/cured film thickness of about 40 to 100 microns), or an infrared light curable resin-solvent system containing 70% YAG (such as about 5% polyvinyl butyral in about 95% cyclohexanol) (which The wet film thickness is from about 15 microns to 17 microns and the dried/cured film thickness is from about 13 microns to 15 microns). Additionally, the phosphor or other compound used to form the emissive layer 325 can include a dopant that emits within a particular spectrum, such as green or blue. Under these conditions, the emissive layer can be printed to define pixels of any given or selected color (such as RGB or CMYK) to provide a color display. Those skilled in the art will appreciate that any device 300 embodiment may also include the one or more emissive layers 325 coupled to or deposited on the stabilizing layer 335 or the second conductor 320.

Depending on the solvent used to form the one or more second conductors 320, one or more barrier layers 318 may be used as appropriate, as illustrated in FIG. 103, such as to prevent one or more second conductors 320. The compound penetrates the dielectric layer 315 to the one or more first conductors 310. In an exemplary embodiment, a viscosity modifier, such as an E-10 viscosity modifier or any other viscosity modifier discussed above, is deposited to form a cured or dried film or film thickness of from about 100 nm to 200 nm. One or more barrier layers 318 may also be formed using any of the materials used to form the protective or sealing coating 330 or stabilizing layer 335.

Device 300 may also include a protective or sealing coating 330 (which may also be combined with stabilizing layer 335 as appropriate), as appropriate, which may also include any type of lensing or light diffusing or dispersing structure or filtering A sheet, such as a substantially transparent plastic or other polymer to provide protection from various factors (such as weather, airborne corrosive materials, etc.), or such a sealing and/or protective function may be used by the emissive layer 325 for polymerization. (resin or other binder) is provided. For ease of illustration, Figures 76, 78-82, 87, 88, 91-98, 102, and 103 illustrate the polymer (resin or other adhesive) that forms the protective or sealing coating 330 using dashed lines to indicate substantial transparency. In an exemplary embodiment, a urethane-based material such as a specialty resin available from NAZDAR 9727 (www.nazdar.com) or a uv curable acrylate amine available from Henkel Corporation of Dusseldorf, Germany is used. The formate PF 455 BC) deposit protects or seals the coating 330 as one or more conformal coatings to a thickness of from about 10 microns to about 40 microns. In another exemplary embodiment, the protective coating 330 is achieved by the lamination device 300. Not separately described, but as described in the related U.S. Patent Application Serial No. 12/560,334, U.S. Patent Application Serial No. 12/560,340, U.S. Patent Application Serial No. 12/560,355, U.S. Patent Application Serial No. 12/560,364 And U.S. Patent Application Serial No. 12/560,371, the disclosure of which is hereby incorporated by reference in its entirety in the entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire disclosure Or other adhesives) may also be deposited directly onto one or more of the emissive layers 325 and other features to form any of the various embodiments of the various illumination devices 300.

Those skilled in the art will appreciate that any number of first conductors 310, insulators 315, second conductors 320, etc., can be utilized within the scope of the claimed invention. Additionally, a plurality of first conductors 310, one or more insulators (or dielectric layers) 315, and a plurality of second conductors 320 of any device 300, in addition to the orientation illustrated (and any incorporation and corresponding conditions, as appropriate) There may be multiple orientations and configurations, such as substantially parallel orientation, in the presence of one or more third conductors. For example, the plurality of first conductors 310 can be substantially parallel to each other, and the plurality of second conductors 320 can also be substantially parallel to each other. Subsequently, the plurality of first conductors 310 and the plurality of second conductors 320 can be perpendicular to each other (delimiting columns and rows) such that their overlapping regions can be used to define pixels ("pixels") and can be individually and independently addressed. Either or both of the plurality of first conductors 310 and the plurality of second conductors 320 may be constructed to have spaced and substantially parallel lines between predetermined widths (both defining columns or both defining rows) It may also be addressed by columns and/or rows, such as, but not limited to, sequential addressing of the columns in succession. Additionally, either or both of the plurality of first conductors 310 and the plurality of second conductors 320 may be constructed as a layer or sheet as described above.

As can be apparent from the present disclosure, exemplary devices 300, 300A, 300B, 300C, 300D, 700, 700A, 700B, 720, 730, 740, 750, 760, depending on the choice of composite material, such as substrate 305, The 770 can be designed and manufactured to be highly flexible and deformable, and may even be foldable, stretchable, and possibly wearable, rather than rigid. By way of example, and not limitation, exemplary devices 300, 300A, 300B, 300C, 300D, 700, 700A, 700B, 720, 730, 740, 750, 760, 770 may be included Includes flexible, foldable and wearable clothing or flexible or wallpaper lights. The exemplary devices 300, 300A, 300B, 300C, 300D, 700, 700A, 700B, 720, 730, 740, 750, 760, 770 may be rolled (such as a poster) or have a paper like this with this flexibility. Fold and fully functional when reopened. Also for example, the exemplary devices 300, 300A, 300B, 300C, 300D, 700, 700A, 700B, 720, 730, 740, 750, 760, 770 can have a variety of shapes and sizes due to the flexibility, and Can be configured for any of a variety of styles and other aesthetic goals. The exemplary devices 300, 300A, 300B, 300C, 300D, 700, 700A, 700B, 720, 730, 740, 750, 760, 770 also have significantly greater flexibility, fragility and brittleness ratios than prior art devices ( For example, a typical large screen TV is much smaller.

As indicated above, the plurality of diodes 100-100L can be configured (via material selection and corresponding doping) to be, for example, but not limited to, a photovoltaic (PV) diode or LED. Figure 84 is a block diagram of a first exemplary embodiment 350 in which a plurality of diodes 100-100L are constructed to form LEDs of any type or color. System 350 includes illumination devices 300A, 300C, 300D, 300C, 300D, 700A (and any device 720, 730, 740, 750, 760, 770 whose LEDs are LEDs), can be coupled to a power source 340 (such as an AC line or The interface circuit 355 of the DC battery pack and the controller 345 (which has the control logic circuit 360 and the memory 365 as the case exists) as the case may be. (Device 300A is generally identical to device 300 in other respects, but has a plurality of diodes 100-100L that are constructed to form LEDs, and for the specific examples of devices 300C, 300D, have two sides, and again, device 700A is otherwise Device 700 The same, but with a plurality of diodes 100-100L built into the LED. When one or more first conductors 310 and one or more second conductors 320 (or third conductors 312) are energized, such as by applying a respective voltage (eg, from power source 340), energy is supplied to the plurality of LEDs ( One or more of the diodes 100-100L) completely pass over the devices 300A, 300C, 300D, 300C, 300D, 700A, 720, 730, 740, 750, 760, 770 (when the conductor and the insulator are each formed into a single layer) And at a corresponding intersection (overlap region) of the first conductor 310 and the second conductor 320 that are energized, the intersections defining, for example, pixels, sheets or columns/rows depending on their orientation and configuration. Thus, by selectively energizing the first conductor 310 and the second conductor 320, the device 300A (and/or system 350) provides a pixel addressable dynamic display or illumination device or signage or the like. For example, the plurality of first conductors 310 can comprise respective complex columns, and the plurality of transmissive second conductors 320 can comprise respective complex rows, wherein each pixel is defined by the intersection or overlap of the respective columns with respective rows. When either or both of the plurality of first conductors 310 and the plurality of second conductors 320 can be constructed as illustrated in Figures 76-82, 87, 88, 91-98, 102, 103, for example, Powering the conductors 310, 320 will provide power to substantially all (or most) of the plurality of LEDs (diodes 100-100L), such as to illuminate a lighting device or static display, such as a signage. This pixel count can be quite high, well above typical high definition levels.

Continuing to refer to FIG. 84, the devices 300A, 300C, 300D, 300C, 300D, 700A, 720, 730, 740, 750, 760, 770 are coupled to the power source 340 via the interface circuit 355, and are also coupled to the controller 345 as appropriate. The power source 340 can be a DC power source (such as a battery pack or a photovoltaic cell) or an AC power source (such as Household or building electricity). The interface circuit 355 can be embodied in a variety of ways, such as a full wave rectifier or a half wave rectifier, an impedance matching circuit, a capacitor that reduces DC chopping, a switching power supply coupled to an AC line, and the like, and can include, for example, but not limited to, various controls Diode 100-100L energized components (not separately stated). When the controller 345 is constructed, such as for a specific example of the addressable illuminating display system 350 and/or the dynamic illuminating display system 350, the controller 345 can be known or soon to be known in electronic technology for controlling the diode 100- 100L energization (via various plurality of first conductors 310 and a plurality of transmissive second conductors 320), and typically includes control logic circuitry 360 (which may be a combinational logic circuit, finite state machine, processor, etc.) and memory 365 . Other input/output (I/O) circuits can also be used. When controller 345 is not constructed, such as for various illumination system 350 embodiments (which are typically not addressable and/or are non-dynamic illumination display system 350 specific examples), system 350 is typically coupled to an electrical switch or an electronic switch (not made) As stated separately, the electrical switch or electronic switch can comprise any suitable type of switch arrangement, such as for lighting system to turn on, off, and/or dim. Control logic circuit 360, memory 365 is discussed in more detail below after discussing Figures 100-103, 85, and 86.

The interface circuit 355 can be constructed as known in the art or may be known to be known, and can include impedance matching capability, voltage rectification circuitry, voltage conversion to interface the low voltage processor to, for example, a higher voltage control bus, in response to The signaling of control logic 360 turns on or off various switching mechanisms (e.g., transistors) and/or physical coupling mechanisms of various lines or connectors. In addition, the interface circuit 355 can also be adapted to receive and/or transmit signals from outside the system 350, such as via hardwired or RF signaling, for example, to receive Time information to control the dynamic display, or for example to control the brightness of the light output (dimmer). The interface circuit 355A can also be a stand-alone device (eg, a module) and can be reused, for example, by means 760, 770 that are configured to be snap-connected, screwed, latched, or otherwise coupled to the interface circuit 355A. Thus, the interface circuit 355A can be reused by the plurality of replacement devices 760, 770 over time.

For example, as illustrated in FIG. 100, exemplary system specific examples 800, 810 include device 760 (if diode 100-100K is used) or device 770 (if diode 100L is used) (in which a plurality of two) The polar body 100-100L is a light emitting diode), and the interface circuit 355 is adapted to match any of the various standard Edison sockets of the light bulb. Continuing by way of example, and not limitation, interface circuit 355 can be sized and shaped to conform to one or more standardized helical configurations, such as E12, E14, E26, and/or E27 spiral mount standards, such as a medium-sized screw seat ( E26) or candelabra screw base (E12), and/or other publications issued by, for example, the American National Standards Institute ("ANSI") and/or the Illuminating Engineering Society Various standards. In other exemplary embodiments, the interface circuit 355 can be sized and shaped to conform to, for example, but not limited to, a standard fluorescent light bulb socket or a dual plug socket, such as a GU-10 socket. Such exemplary system embodiments may also be equivalently considered as another type of device, particularly when having a form factor suitable for insertion into, for example, but not limited to, a shallow circular socket or a fluorescent socket.

For example, an LED-based "bulb" can be formed to have a similar A conventional incandescent light bulb design having a helical connector as part of the interface circuit 355, such as ES, E27, SES or E14, which can be adapted to interface with any power outlet type, such as (but not limited to) L1, PL-2 Pins, PL-4 pins, G9 halogen capsules, G4 halogen capsule lamps, GU10, GU5.3, bayonet, small bayonet or any other connector known in the art.

The apparatus 300A, 300C, 300D, 700 and the first system 350 can be used to form a variety of lighting devices or other lighting products for a variety of purposes, as bulbs and lamps, lamps, lighting fixtures, indoor and outdoor lighting, configured to Lamps with lampshade form factor, architectural lighting, work or work lighting, decorative or mood lighting, overhead lighting, security lighting, dimmable lighting, color lighting, theater and/or color variable lighting, display lighting and with this article And illumination of any of a variety of decorative or imaginative forms. Without being separately illustrated, the first system 350 generally also includes various mechanical structures in any desired shape or form within the system 350 to provide sufficient physical support for the devices 300A, 300C, 300D.

Referring to FIG. 100, exemplary system 800 includes device 760 and interface circuit 355A, and exemplary system 810 includes device 770 and interface circuit 355A. Interface circuit 355A is configured to fit into a standard Edison bulb spiral socket to couple to a standard AC power source (such as an AC bus) (not separately illustrated). The interface circuit 355A typically includes a rectifier circuit to convert the AC voltage to a DC voltage, and may also include an impedance matching circuit and various capacitors and/or resistors (and often including switches constructed using transistors) to reduce chopping of the DC voltage. Such as LED lighting and LED power supply are known in the field. Figure 102 and As illustrated in 103, device 760 includes a plurality of diodes 100-100K, and device 770 includes a plurality of diodes 100L. The corresponding differences in device structure and materials are discussed above and discussed in greater detail below. 100 is also used to illustrate the extremely thin and flexible form of the exemplary device (300, 300A, 300B, 300C, 300D, 300C, 300D, 700, 700A, 700B, 720, 730, 740, 750, 760, 770). Factor, which has been twisted and folded into a fancy decorative form.

Figure 101 is a plan view illustrating the printed layout of devices 760, 770. As illustrated, the devices 760, 770 are printed as flat sheets having a very thin form factor, and then die cut in region 716 to form a relatively narrow strip 717 (series coupled, as described above). Electrodes (illustrated as carbon electrodes 322A, 322B) are provided at each end. The devices 760, 770 are then crimped and the ends 718 of the light strips 717 are brought together and overlap each other in a ring shape, leading to the electrodes 322A and 322B to provide power to the devices 760, 770 via the interface circuit 355A, and the light bars 717 are present with each other. The interval is as illustrated in FIG.

Referring to Figure 102, device 760 is similar to other illustrated devices in which two additional layers, i.e., one or more third conductors 312 (which may also be deposited as a single layer using any of the transparent or opaque conductive inks and compounds discussed herein) And an additional dielectric layer (illustrated as 315A to distinguish it from another dielectric layer illustrated as 315B) between one or more third conductors 312 and one or more first conductors 310. One or more third conductors 312 are used to provide power (eg, voltage level) along the edge of the light strip 717 and to one or more second conductors 320 (which may be deposited as a layer of transparent conductive material as discussed above) ), and A method of reducing the total impedance, current level, and power consumption of device 760 is provided to effectively act as a parallel busbar along the length of each of the light bars 717.

Referring to Figure 103, device 770 is also similar to other illustrated devices in which three additional layers are added: (1) one or more third conductors 312 (which may also be deposited using any of the transparent or opaque conductive inks and compounds discussed herein) (2) another dielectric layer between one or more third conductors 312 and one or more second conductors 320 (illustrated as 315A to distinguish it from another dielectric layer designated 315B) And (3) one or more barrier layers 318 deposited between the dielectric layer 315B and the one or more second conductors 320 as described above. One or more third conductors 312 are used to provide power (eg, voltage level) along the edge of the light strip 717 and coupled to the one or more first conductors 310, and also provide a total impedance, current level of the reduction device 770. And the method of power consumption is also effective as a parallel busbar along the length of each of the light bars 717.

Any of a variety of light output levels may be provided by devices 300A, 300C, 300D, 300C, 300D, 700A, 720, 730, 740, 750, 760, 770, and will generally be based on the concentration of the diodes 100-100L used, Number of devices 300A, 300C, 300D, 300C, 300D, 700A, 720, 730, 740, 750, 760, 770 used in the first system 350, selected or allowed power consumption, and applied voltage and/or current levels And change. In an exemplary embodiment, devices 300A, 300C, 300D, 300C, 300D, 700A, 720, 730, 740, 750, 760, 770 can provide, for example, but not limited to, light in the range of about 25 lumens to 1300 lumens. Output, depending on power consumption, concentration or density of diode 100-100L, current level of diode 100-100L (that is, difficulty of driving diode 100-100L), total impedance level, etc. And set.

As indicated above, the plurality of diodes 100-100L can also be configured (via material selection and corresponding doping) to be photovoltaic (PV) diodes. 85 is a block diagram of a second exemplary embodiment 375 in which the diodes 100-100L are constructed to form a photovoltaic (PV) diode. System 375 includes devices 300B, 700B (which are otherwise otherwise identical to devices 300, 700 (or any other described device), but having a plurality of diodes 100-100L that form a photovoltaic (PV) diode) And including either or both of energy storage device 380 (such as a battery pack) or interface circuit 385 to transfer power or energy to another system (not separately illustrated), such as a powered device or electrical facility. (In other illustrative embodiments that do not include interface circuitry 385, other circuitry configurations can be used to provide energy or power directly to the energy usage device or system or energy distribution device or system.) Within system 375, device 300B, One or more first conductors 310 (or electrodes 322A) of 700B are coupled to form a first terminal (such as a negative or positive terminal), and one or more of the devices 300B, 700B are coupled to a second conductor 320 (or electrode 322B) A second terminal, such as a respective positive or negative terminal, is formed that can then be coupled to connect to either or both of energy storage device 380 or interface circuit 385. When light, such as daylight, is incident on the device 300B, 700B, the light can be concentrated on one or more photovoltaic (PV) diodes 100-100L, which then convert the incident photons into pairs of electron holes such that the first An output voltage is generated across the terminal and the second terminal and output to either or both of the energy storage device 380 or the interface circuit 385.

It should be noted that when the first conductor 310 has the phase-to-phase miscellaneous or comb-like structure illustrated in FIG. 77, the first conductor 310B can be used to pass the second conductor 320. Electrically, or similarly, the voltages generated on the first conductors 310A and 310B can be received.

86 is a flow chart illustrating an exemplary method embodiment for fabricating devices 300, 300A, 300B, 300C, 300D, 700, 700A, 700B, 720, 730, 740, 750, 760, 770, and provides a suitable overview. Beginning with an initial step 400, such as by printing a conductive ink or polymer or by vapor deposition, sputtering or coating a substrate (305) with one or more metals, followed by curing or partially curing the conductive ink or polymer, or possibly moving One or more first conductors (310) are deposited on the substrate (305) except for the metal deposited at unnecessary locations (depending on the implementation) (step 405). A plurality of diodes 100 that have typically been suspended in a liquid, colloid or other compound or mixture (which may also include a plurality of inert particles 292) (e.g., suspended in a diode ink) are also typically printed or coated. 100L is deposited on the one or more first conductors (step 410) to form an ohmic contact between the plurality of diodes 100-100L and the one or more first conductors (which may also involve, for example, but not limited to) Various chemical reactions, compression and/or heating). For the device 700 embodiment, as discussed above, steps 405 and 410 are performed in reverse order.

A dielectric or insulating material, such as a dielectric ink, is then deposited over or around the plurality of diodes 100-100L, such as around the perimeter of the diode 100-100L (and cured or heated) (step 415), forming an A plurality of insulators or dielectric layers 315. For a specific embodiment of device 760, one or more third conductors 312 and dielectric layer 315A may be deposited (as steps 405 and 415), followed by another step 405 and step 410, unless otherwise specified. For the particular embodiment of device 770, barrier layer 318 may also be deposited, which is also not separately illustrated. Next, one or more second conductors 320 (which may or may not be optically transmissive) are then deposited on the plurality of diodes 100-100L and in contact with the plurality of diodes 100-100L, such as deposited on The dielectric layer 315 and surrounding the upper surface of the diode 100-100L and cured (or heated) (step 420), also between the one or more second conductors (320) and the plurality of diodes 100-100L An ohmic contact is formed. In an illustrative embodiment, such as for an addressable display, a plurality (transmissive) second conductors 320 are oriented substantially perpendicular to the plurality of first conductors 310. For a specific embodiment of device 770, dielectric layer 315A (as step 415) may be deposited, followed by deposition of one or more third conductors 312 (as step 405), without being separately illustrated.

As a further alternative, a test may be performed before or during step 420 in which the non-functional or otherwise defective diode 100-100L is removed or deactivated. For example, for a PV diode, the surface (first side) of the partially completed device can be scanned with a laser or other source and when the region (or individual diodes 100-100L) does not provide the expected electrical response, Remove it using high-intensity laser or other removal techniques. Also for example, for a powered LED, the surface (first side) can be scanned with a light sensor, and when the area (or individual diodes 100-100L) does not provide the desired light output and/or capture Excess current (ie, current exceeding a predetermined amount) can also be removed using high intensity laser or other removal techniques. Depending on the implementation, such as depending on how the non-functional or defective diode 100-100L is removed, the test step can actually be performed after steps 425, 430 or 435 discussed below. The stabilizing layer 335 is then deposited on one or more second conductors 320 or other layers as illustrated for the various devices (step 425), and then stabilized An emissive layer 325 is deposited on the patterned layer (step 430). In a particular embodiment of device 700, layer 325 is typically deposited on the second side of substrate 305A, as described above. A plurality of lenses (not separately illustrated) that are also typically suspended in a polymer, binder or other compound or mixture to form a lens or lens particle ink or suspension are typically placed or deposited on the emissive layer via printing. Attaching, or attaching a pre-formed lens panel comprising a plurality of lenses suspended in the polymer to a first side of the partially completed device (such as via a lamination process), and then depositing a protective coating (and/or Color is selected (such as via printing) (step 355), and the method can end, returning to step 440.

Referring again to FIG. 84, control logic circuit 360 can be any type of controller, processor, or control logic circuit, and can be embodied as one or more processors to perform the functionality discussed herein. As the term processor is used herein, processor 360 may include the use of a single integrated circuit ("IC"), or may include the use of a plurality of integrated circuits or other components that are connected, arranged, or gathered together, such as a controller, Microprocessor, digital signal processor ("DSP"), parallel processor, multi-core processor, custom integrated circuit, special application integrated circuit ("ASIC"), field programmable gate array ("FPGA"), Adaptive computing ICs, related memory (such as RAM, DRAM, and ROM) and other ICs and components. Accordingly, the term processor as used herein shall be understood to mean equivalently and include a single IC, or custom integrated circuit, ASIC, processor, microprocessor, controller, FPGA, adaptive computing IC, or some other The configuration of the integrated circuit group that performs the functions discussed below, and associated memory, such as microprocessor memory or other RAM, DRAM, SDRAM, SRAM, MRAM, ROM, FLASH, EPROM, or E ² PROM. The processor and its associated memory can be adapted or configured (via stylized, FPGA interconnected or hardwired) to perform the methods of the present invention, such as selective pixel addressing for dynamic display embodiments, or such as for signage specific The instance performs column/row addressing. For example, the method may be programmed and stored as a set of program instructions or other code (or equivalent configuration or other program) in the processor and its associated memory (and/or memory 365) and other equivalent components. It is executed later when the processor is operational (ie, powered and active). Equivalently, when the control logic circuit 360 can be fully or partially constructed into an FPGA, a custom integrated circuit, and/or an ASIC, the FPGA, custom integrated circuit or ASIC can also be designed, configured, and/or hardened. Wired to perform the method of the present invention. For example, the control logic circuit 360 can be configured to form a processor, a controller, a microprocessor, a DSP, and/or an ASIC, collectively referred to as a "controller" or a "processor," which are respectively programmed, designed, and adapted. Or configured to perform the method of the present invention along with memory 365.

Control logic circuit 360 and its associated memory can be configured (via stylized, FPGA interconnect, or hardwired) to control a plurality of first conductors 310 and a plurality of second conductors 320 (and optionally one of The plurality of third conductors 312) are energized (applied voltage) to correspondingly control the information being displayed. For example, static or time-varying display information can be programmed and stored, configured, and/or hardwired into control logic circuit 360 and its associated memory (and/or memory 365) and other equivalent components. The set of program instructions (or equivalent configurations or other programs) is used to subsequently execute the form when control logic 360 is operational.

The memory 365, which may include a data repository (or database), may be embodied in a variety of forms, including any computer or other machine readable storage medium, memory device or other information storage currently known or available in the future. Or a communication storage or communication device, including but not limited to a memory volume circuit ("IC") or a memory portion of an integrated circuit (such as resident memory in a processor), which may be volatile or non-volatile Volatile, removable or non-removable memory, including (not limited to) RAM, FLASH, DRAM, SDRAM, SRAM, MRAM, FeRAM, ROM, EPROM or E ² PROM, or any other form of memory device, Such as magnetic hard drives, CD players, disk or tape drives, hard drives, other machine-readable storage or memory media such as floppy disks, CDROMs, CD-RWs, digital versatile discs (DVDs) or other optical memories Any other type of memory, storage medium or data storage device or circuit known or to be known, depending on the particular embodiment selected. Additionally, the computer readable medium includes any form of communication media that can embody computer readable instructions, data structures, program modules, or other data into a data signal or a modulated signal, such as an electromagnetic or optical carrier or other transport mechanism. Includes any information transmission media that can encode data or other information into signals, including electromagnetic, optical, acoustic, RF or infrared signals, either wired or wirelessly. Memory 365 can be adapted to store various lookup tables, parameters, coefficients, other information and materials, programs or instructions (of the software of the present invention), and other types of forms, such as database tables.

As indicated above, processor 360 is programmed to perform the method of the present invention using, for example, the software and data structures of the present invention. Accordingly, the systems and methods of the present invention may be embodied to provide such stylized or other instructions as discussed above (such as a set of instructions and/or elements embodied in a computer readable medium). Material). In addition, metadata can be used to define various data structures for lookup tables or databases. The software may be in the form of, for example, but not limited to, a source code or a target code. The source code can be further compiled into some form of instruction or object code (including combined language instructions or configuration information). The software, source code or metadata of the present invention may be embodied in any type of encoding, such as C, C++, SystemC, LISA, XML, Java, Brew, SQL, and variations thereof, or performing the functionality discussed herein. Any other type of stylized language, including various hardware-defined or hardware-modeled languages (such as Verilog, VHDL, RTL) and derived database files (such as GDSII). Therefore, "construction", "program construction", "software construction" or "software" as used in this context means and refers to any stylized language of any kind having any grammar or signature, which may or may be Interpret to provide the relevant functionality or method specified (when present or loaded into a processor or computer (including, for example, processor 360) and executed).

The software, metadata or other source code of the present invention, as well as any resulting bit file (object code, database or lookup table), can be embodied in any tangible storage medium, such as any computer or other machine readable storage medium. Computer readable instructions, data structures, program modules or other materials, such as those described above for memory 365, such as a floppy disk, CDROM, CD-RW, DVD, magnetic hard drive, optical drive, or Any other type of data storage device or media.

In addition to the controller 345 illustrated in FIG. 84, those skilled in the art will appreciate that there are numerous equivalent configurations, arrangements, types, and types of control circuits known in the art that are within the scope of the present invention.

Although the present invention has been described in connection with specific embodiments, these specific examples are merely illustrative and not restrictive. In the description herein, numerous specific details are set forth, such as examples of electronic components, electronic and structural connections, materials, and structural variations, to fully understand the specific embodiments of the invention. However, those skilled in the art should understand that the specific embodiments of the invention may be practiced without one or more specific details or other devices, systems, assemblies, components, materials, parts, and the like. In other instances, well-known structures, materials, or operations are not specifically shown or described in detail to avoid obscuring aspects of the specific embodiments of the invention. Those skilled in the art will appreciate that other or equivalent method steps can be used, or can be combined with other steps, or can be performed in a different order, and any and all of them are within the scope of the claimed invention. In addition, the drawings are not to scale and should not be construed as limiting.

References to "a specific example", "an embodiment", or a particular "specific" or "a" It is not necessarily included in all specific examples, and in addition, does not necessarily refer to the same specific example. In addition, the particular features, structures, or characteristics of any particular embodiment may be combined and combined in any suitable manner with any one or more other embodiments in any suitable combination, including the use of the selected features without the use of other features. In addition, many modifications may be made to adapt a particular application, situation or material to the basic scope and spirit of the invention. It is to be understood that various changes and modifications may be made to the embodiments of the invention described and illustrated herein.

It should also be understood that one or more of the elements depicted in the figures may be constructed in a different or complete manner, or even in some cases may be removed or rendered inoperable, depending on the particular application. Integrally formed component combinations are also within the scope of the invention, particularly for specific examples in which individual components are separated or unclear or difficult to discern. Also, as used herein, the term "coupled" (including its various forms, such as "coupled") means and includes any direct or indirect electrical, structural or magnetic coupling, connection or attachment, or direct or indirect electrical. The suitability or ability of a structural or magnetic coupling, connection or attachment, including integrally formed components and components coupled via or via another component.

As used herein for the purposes of the present invention, the term "LED" and its plural forms are understood to include any electroluminescent diode or other type of carrier-injection or bonding system capable of generating radiation in response to an electrical signal. , including but not limited to, various semiconductor or carbon-based structures, luminescent polymers, organic LEDs, etc. that respond to current or voltage illuminance, including any visible or other spectrum (such as ultraviolet or infrared), any bandwidth Or any color or color temperature radiation. Also as used herein for the purposes of the present invention, the term "photodiode (or PV)" and its plural forms are understood to include any photodiode or capable of responding to incident energy (such as light or other electromagnetic waves). Other types of carrier-injection or bonding based systems of electrical signals, such as voltages, including, but not limited to, various semiconductor- or carbon-based structures that provide electrical signals in response to light generation, including visible or other spectra ( Light of any bandwidth or spectrum, such as ultraviolet or infrared light.

The dimensions and values disclosed herein are not to be construed as being strictly limited to the stated The exact value. In fact, unless otherwise stated, each such size means the stated value and the functional equivalents surrounding the value. For example, the size disclosed as "40mm" means "about 40mm".

All documents cited in the [Embodiment] are hereby incorporated by reference in their entireties in their entireties in the the the the the the the the To the extent that any meaning or definition of a term in the present invention is inconsistent with any meaning or definition of the same term in the literature, the meaning or definition of the term in the present invention shall prevail.

In addition, any signal arrows in the drawings/drawings should be considered as illustrative only and not limiting, unless specifically stated otherwise. Combinations of the components of the steps are also considered to be within the scope of the invention, especially if it is unclear or foreseeable to be able to separate or combine. Unless otherwise indicated, the term "or" as used herein and throughout the scope of the appended claims generally means "and/or" and has the meaning of the connection and the transition (not limited to the meaning of "exclusive or"). . &quot;an&quot; and &quot;the&quot; as used in the <RTIgt; The meaning of "in" and "in" are used in the context of the application and the scope of the appended claims.

The above description of the specific examples of the invention, including the description of the invention, or the invention, is not intended to be exhaustive or to limit the invention. From the above, it can be observed that many variations, modifications and substitutions are contemplated and may be made without departing from the novel aspects of the invention. The spirit and scope of the mind is reached. It should be understood that the limitations of the particular methods and devices described herein are not to be construed as a limitation. Of course, all such modifications are intended to be covered by the scope of the patent application.

100‧‧‧ first diode

100A‧‧‧Secondary

100B‧‧‧third diode

100C‧‧‧Fourth dipole

100D‧‧‧ fifth diode

100E‧‧‧ sixth diode

100F‧‧‧ seventh diode

100G‧‧‧ eighth diode

100H‧‧‧ ninth polar body

100K‧‧‧12th polar body

100L‧‧‧Eleventh Diode

100I‧‧‧12th Diode

100J‧‧‧13th Diode

102A‧‧‧metal layer

102B‧‧‧metal layer

103‧‧‧reflective layer

105‧‧‧Substrate

105A‧‧‧Substrate

106‧‧‧ Sapphire

107‧‧‧Surface texture

108‧‧‧Other layers

109‧‧‧ reflector

110‧‧‧n+ type GaN layer

111‧‧‧Smooth surface

112‧‧‧Outer surface texture

113‧‧‧ stripes

114‧‧‧ vertex

115‧‧‧p+ type GaN layer

116‧‧‧ lens shape

117‧‧‧Other geometric shapes

118‧‧‧Super-ring, honeycomb or waffle shape

119‧‧‧metal layer

120‧‧‧metal layer

120A‧‧‧metal layer

120B‧‧‧ metal layer

121‧‧‧ hexagonal side

122‧‧‧metal layer

124‧‧‧Extension extension

125‧‧‧First terminal

126‧‧‧Metal contact extensions

127‧‧‧second terminal

128‧‧‧Contacts

129‧‧‧metal layer

130‧‧‧Guide

131‧‧‧Guide structure

132‧‧‧Guide structure

133‧‧‧Guide structure

134‧‧‧Guide structure

135‧‧‧ dielectric layer

135A‧‧‧passivation layer

136‧‧‧Guide structure

140‧‧‧Lighting area

145‧‧‧buffer layer

150‧‧‧ wafer

150A‧‧‧ wafer

155‧‧‧Ditch

160‧‧‧ holding device

162‧‧‧Ray beam

165‧‧‧Adhesive

170‧‧‧ Wafer Adhesive Solvent

175‧‧‧ utensils

180‧‧‧Back

185‧‧ ‧ Quantum Well Area

186‧‧‧ relatively shallow trench

187‧‧‧GaN mesa structure

187A‧‧‧GaN mesa structure

187B‧‧‧GaN mesa structure

187C‧‧‧GaN mesa structure

187D‧‧‧GaN mesa structure

187E‧‧‧GaN mesa structure

188‧‧‧Ditch

190‧‧ 二 二 layer

191‧‧‧Area

192‧‧‧ area

193‧‧‧Area

195‧‧‧Polycrystalline GaN

200‧‧‧Starting steps

205‧‧‧ Release of the diode step

211‧‧‧Center Guide Hole Ditch

215‧‧‧Steps to add the diode in the first solvent to the binder

220‧‧‧Add one or more second solvent steps

225‧‧‧Adjust any weight percentage step with an added third solvent (eg deionized water)

230‧‧‧ Mixing a plurality of diodes, a first solvent, an adhesive, a second solvent and any added third solvent in an air atmosphere at room temperature (25 ° C) for 25-30 minutes

235‧‧‧Return steps

240‧‧‧Starting steps

245‧‧‧Steps of growing or depositing oxide layers on semiconductor wafers

250‧‧‧Steps to etch the oxide layer to form a grid or other pattern

255‧‧‧Steps for growing or depositing buffer layers and illuminating or light absorbing regions

260‧‧‧Steps for etching and illuminating or absorbing regions to form the mesa structure of each diode

265‧‧‧Steps of etching the wafer to form vias in the substrate of each diode

270‧‧‧Steps of depositing one or more metallization layers to form metal contacts and vias for each diode

275‧‧‧Steps of etching monolithic trenches between diodes

280‧‧‧Steps for growing or depositing a passivation layer

285‧‧‧Steps of depositing or growing bumps or protruding metal structures on metal joints

290‧‧‧Return steps

292‧‧‧Inert particles

295‧‧‧ film

300‧‧‧ device

300A‧‧‧ device

300B‧‧‧ device

300C‧‧‧ device

300D‧‧‧ device

305‧‧‧Substrate

305A‧‧‧Base

310‧‧‧First conductor

310A‧‧‧Conductor

310B‧‧‧Conductor

312‧‧‧Conductor

315‧‧‧Insulated dielectric layer

315A‧‧‧ dielectric layer

315B‧‧‧ dielectric layer

318‧‧ ‧ barrier layer

320‧‧‧Conductors

322A‧‧‧carbon joints

322B‧‧‧carbon joints

325‧‧‧Lighting (or emission) layer

330‧‧‧Protective layer

335‧‧‧Stabilization layer

340‧‧‧Power supply

345‧‧‧ controller

350‧‧‧Lighting system

355‧‧‧Interface circuit

355A‧‧‧Interface circuit

360‧‧‧Control logic

365‧‧‧ memory

375‧‧‧ system

380‧‧‧ Energy storage device

385‧‧‧Interface circuit

400‧‧‧Starting steps

405‧‧‧Steps of depositing one or more first conductors on the substrate

410‧‧ A step of depositing a diode having a plurality of diodes on at least one of the first conductors

415‧‧‧Steps of depositing dielectric layers on and/or around a plurality of diodes using dielectric ink

420‧‧‧Steps of depositing one or more second conductors to contact a plurality of diodes

425‧‧‧Steps of depositing a stabilizing layer on one or more second conductors

427‧‧‧Steps of depositing a protective coating on the first side of the stabilizing layer

430‧‧‧Steps of depositing an emissive layer on the stabilizing layer or on the second side of the substrate

435‧‧‧Deposition of lensing and / or protective coating steps

440‧‧‧Return steps

500‧‧‧Starting steps

505‧‧‧Steps for growing or depositing GaN substrates on sapphire or other wafers

510‧‧‧Steps for growing or depositing luminescence or light absorption regions

515‧‧‧Steps of etching the illuminating or light absorbing region to form one or more mesas of each diode

520‧‧‧Steps of etching through GaN or other substrates to form one or more deep vias and singulation trenches

525‧‧‧Seed seed layer

530‧‧‧Steps for depositing metals to form deep holes

535‧‧‧Deposition of metal joints

540‧‧‧Deposition current distribution metal steps

545‧‧‧Steps for growing or depositing a passivation layer

550‧‧‧Steps for depositing bumps or protruding metal structures on metal contacts

555‧‧‧ Attachment of holding wafer steps

560‧‧‧Removing sapphire or other wafers to singulate diodes

565‧‧‧Steps for depositing metal contacts on the second side (back side) of each diode

570‧‧‧Return steps

600‧‧‧Starting steps

605‧‧‧Steps for growing or depositing GaN substrates on sapphire or other wafers

610‧‧‧Steps for growing or depositing luminescence or light absorption regions

615‧‧‧Deposition of metal joints

620‧‧‧Steps of etching the illuminating or light absorbing region to form one or more mesas

625‧‧‧Deposition of metal joints

630‧‧‧Steps of etching through GaN or other substrates to form one or more deep vias

635‧‧‧Steps for depositing metals to form deep holes

640‧‧‧Deposition or patterning interconnection steps

645‧‧‧ Etching the singulation channel step

650‧‧‧Steps for growing or depositing passivation layers

655‧‧‧Steps for depositing bumps or protruding metal structures on metal contacts

660‧‧‧ Attaching a holding wafer step

665‧‧‧Removing sapphire or other wafers to singulate diodes

670‧‧‧Steps for depositing metal contacts on the second side (back side) of each diode

675‧‧‧Return steps

700‧‧‧ device

700A‧‧‧ device

700B‧‧‧ device

711‧‧‧First area

712‧‧‧Second area

713‧‧‧ third area

714‧‧‧ busbar

716‧‧‧ area

717‧‧‧Light strips

718‧‧‧End of light bar

720‧‧‧ device

730‧‧‧ device

740‧‧‧ device

750‧‧‧ device

760‧‧‧ device

770‧‧‧ device

800‧‧‧ system

810‧‧‧ system

810‧‧‧ system

1 is a perspective view illustrating an exemplary first diode embodiment.

2 is a plan view (or top view) illustrating an exemplary first diode embodiment.

3 is a cross-sectional view illustrating an exemplary first diode embodiment.

4 is a perspective view illustrating an exemplary second diode embodiment.

Figure 5 is a plan (or top view) illustrating an exemplary second diode embodiment.

Figure 6 is a perspective view illustrating an exemplary third diode embodiment.

7 is a plan view (or top view) illustrating an exemplary third diode embodiment.

Figure 8 is a perspective view illustrating an exemplary fourth diode embodiment.

9 is a plan view (or top view) illustrating an exemplary fourth diode embodiment.

Figure 10 is a cross-sectional view illustrating an exemplary second, third, and/or fourth diode embodiment.

Figure 11 is a perspective view illustrating an exemplary fifth and sixth diode embodiment.

Figure 12 is a plan view (or top view) illustrating an exemplary fifth and sixth diode embodiment.

Figure 13 is a cross-sectional view illustrating an exemplary fifth diode embodiment.

Figure 14 is a cross-sectional view illustrating an exemplary sixth diode embodiment.

Figure 15 is a perspective view illustrating an exemplary seventh diode embodiment.

Figure 16 is a plan (or top view) illustrating an exemplary seventh diode embodiment.

Figure 17 is a cross-sectional view illustrating an exemplary seventh diode embodiment.

Figure 18 is a perspective view illustrating an exemplary eighth diode embodiment.

19 is a plan view (or top view) illustrating an exemplary eighth diode embodiment.

Figure 20 is a cross-sectional view illustrating an exemplary eighth diode embodiment.

Figure 21 is a perspective view illustrating an exemplary twelfth polar body embodiment.

Figure 22 is a cross-sectional view illustrating an exemplary twelfth polar body embodiment.

Figure 23 is a perspective view illustrating an exemplary eleventh dipole embodiment.

Figure 24 is a cross-sectional view illustrating an exemplary eleventh dipole embodiment.

Figure 25 is a cross-sectional view showing a portion of a composite GaN heterostructure and metal layer illustrating the geometry and texture of the outer and/or inner surfaces of the composite GaN heterostructure.

Figure 26 is a cross-sectional view of a wafer having an oxide layer such as hafnium oxide.

Figure 27 is a cross-sectional view of a wafer having an oxide layer etched into a grid pattern.

28 is a plan view (or top view) of a wafer having an oxide layer etched into a grid pattern.

29 is a cross-sectional view of a wafer having a buffer layer (such as aluminum nitride or tantalum nitride), a grid pattern of hafnium oxide layer, and a gallium nitride (GaN) layer.

30 is a cross-sectional view of a substrate having a buffer layer and a composite GaN heterostructure (n+-type GaN layer, quantum well region, and p+-type GaN layer).

31 is a cross-sectional view of a substrate having a buffer layer and a first mesa-etched composite GaN heterostructure.

32 is a cross-sectional view of a substrate having a buffer layer and a second mesa-etched composite GaN heterostructure.

Figure 33 is a cross-sectional view of a substrate having a buffer layer, mesa-etched composite GaN heterostructure, and an etched substrate for via connection.

Figure 34 is a cross-sectional view of a substrate having a buffer layer, a mesa-etched composite GaN heterostructure, a metallization layer forming an ohmic contact with the p+ type GaN layer, and a metallization layer forming the via.

35 is a cross-sectional view of a substrate having a buffer layer, a mesa-etched composite GaN heterostructure, a metallization layer that forms an ohmic contact with the p+ type GaN layer, a metallization layer that forms the via, and a laterally etched trench.

36 is a composite GaN heterostructure having a buffer layer, mesa etching, a metallization layer forming an ohmic contact with a p+ type GaN layer, a metallization layer forming a via hole, a laterally etched trench, and a passivation layer (such as tantalum nitride) A cross-sectional view of the substrate.

37 is a composite GaN heterostructure having a buffer layer, mesa etching, a metallization layer forming an ohmic contact with a p+ type GaN layer, a metallization layer forming a via hole, a laterally etching trench, a passivation layer, and forming a protrusion or a convex A cross-sectional view of a substrate of a metallization layer of a bulk structure.

38 is a cross-sectional view of a substrate having a composite GaN heterostructure (n+-type GaN layer, quantum well region, and p+-type GaN layer).

Figure 39 is a cross-sectional view of a substrate having a third mesa-etched composite GaN heterostructure.

40 is a cross-sectional view of a substrate having a mesa-etched composite GaN heterostructure, an etched substrate for via connection, and a laterally etched trench.

41 is a cross-sectional view of a substrate having a mesa-etched composite GaN heterostructure, an ohmic contact with an n+-type GaN layer, and a metallization layer through the via and a laterally etched trench.

42 is a composite GaN heterostructure having a mesa etching, an ohmic contact with an n+ type GaN layer, a metallization layer forming a through via, a metallization layer forming an ohmic contact with the p+ type GaN layer, and a trench for lateral etching. A cross-sectional view of the substrate.

43 is a mesa-etched composite GaN heterostructure, a metallization layer forming an ohmic contact with an n+-type GaN layer, forming a through-via, a metallization layer forming an ohmic contact with the p+-type GaN layer, and a laterally-etched trench; A cross-sectional view of a substrate of a passivation layer such as tantalum nitride.

44 is a mesa-etched composite GaN heterostructure, a metallization layer forming an ohmic contact with the n+-type GaN layer, forming a through-via, a metallization layer forming an ohmic contact with the p+-type GaN layer, and a laterally-etched trench, A cross-sectional view of a passivation layer, such as tantalum nitride, and a substrate forming a metallization layer of a protruding or bump structure.

45 is a buffer layer, a composite GaN heterostructure (n+ type GaN layer, a quantum well region, and a p+ type GaN layer) and an ohmic layer with a p+ type GaN layer. A cross-sectional view of a substrate contacting a metallization layer.

Figure 46 is a cross-sectional view of a substrate having a buffer layer, a fourth mesa-etched composite GaN heterostructure, and a metallization layer that forms an ohmic contact with the p+ type GaN layer.

47 is a cross-sectional view of a substrate having a buffer layer, a mesa-etched composite GaN heterostructure, a metallization layer that forms an ohmic contact with the p+ type GaN layer, and a metallization layer that forms an ohmic contact with the n+ type GaN layer.

48 is a cross-sectional view of a substrate having a buffer layer, a mesa-etched composite GaN heterostructure, a metallization layer that forms an ohmic contact with the n+ type GaN layer, and a laterally etched trench.

49 is a composite GaN heterostructure having a buffer layer, mesa etching, a metallization layer forming an ohmic contact with the p+ type GaN layer, a metallization layer forming an ohmic contact with the n+ type GaN layer, and a metallization having a surrounding through via hole. A cross-sectional view of the substrate of the laterally etched trench of the layer.

50 is a composite GaN heterostructure having a buffer layer, mesa etching, a metallization layer forming an ohmic contact with the p+ type GaN layer, a metallization layer forming an ohmic contact with the n+ type GaN layer, and a metallization having a surrounding through via hole. A cross-sectional view of a laterally etched trench of a layer, a passivation layer (such as tantalum nitride), and a substrate forming a metallization layer of a protruding or bump structure.

51 is a cross-sectional view of a substrate having a buffer layer, a fifth mesa-etched composite GaN heterostructure, and a metallization layer that forms an ohmic contact with the p+ type GaN layer.

52 is a composite GaN heterostructure having a buffer layer, mesa etching, a metallization layer forming an ohmic contact with a p+ type GaN layer, and for a center via hole A cross-sectional view of a substrate joined to an etched GaN heterostructure.

53 is a cross section of a substrate having a buffer layer, a mesa-etched composite GaN heterostructure, a metallization layer forming an ohmic contact with the p+ type GaN layer, and a metallization layer forming a center via and forming an ohmic contact with the n+ type GaN layer. Figure.

54 is a composite layer GaN heterostructure having a buffer layer, mesa etching, a metallization layer forming an ohmic contact with the p+ type GaN layer, a metallization layer forming a center via hole and forming an ohmic contact with the n+ type GaN layer, and a first passivation layer A cross-sectional view of a substrate (such as tantalum nitride).

55 is a metallization layer having a buffer layer, mesa-etched composite GaN heterostructure, ohmic contact with a p+ type GaN layer, a metallization layer forming a center via hole and forming an ohmic contact with the n+ type GaN layer, and a first passivation layer A cross-sectional view of a substrate (such as tantalum nitride) and a metallization layer forming a protruding or bump structure.

56 is a composite layer GaN heterostructure having a buffer layer, mesa etching, a metallization layer forming an ohmic contact with the p+ type GaN layer, a metallization layer forming a center via hole and forming an ohmic contact with the n+ type GaN layer, and a first passivation layer A cross-sectional view of a substrate (such as tantalum nitride), a metallization layer that forms a protruding or bump structure, and a lateral (or surrounding) etched trench.

57 is a composite layer GaN heterostructure having a buffer layer, a mesa etching, a metallization layer forming an ohmic contact with the p+ type GaN layer, a metallization layer forming a center via hole and forming an ohmic contact with the n+ type GaN layer, and a first passivation layer Cross-section of a substrate such as tantalum nitride, a metallization layer forming a protruding or bump structure, a lateral (or surrounding) etched trench, and a second passivation layer (such as tantalum nitride) Sectional view.

Figure 58 is a cross-sectional view of a substrate having a buffer layer, a sixth mesa-etched composite GaN heterostructure, and a metallization layer that forms an ohmic contact with the p+ type GaN layer.

59 is a cross-sectional view of a substrate having a buffer layer, a mesa-etched composite GaN heterostructure, a metallization layer that forms an ohmic contact with the p+ type GaN layer, and a metallization layer that forms an ohmic contact with the n+ type GaN layer.

60 is a composite GaN heterostructure having a buffer layer, mesa etching, a metallization layer forming an ohmic contact with the p+ type GaN layer, a metallization layer forming an ohmic contact with the n+ type GaN layer, and the other in contact with the p+ type GaN layer. A cross-sectional view of a substrate of a metallization layer.

61 is a composite GaN heterostructure having a buffer layer, mesa etching, a metallization layer forming an ohmic contact with a p+ type GaN layer, a metallization layer forming an ohmic contact with the n+ type GaN layer, and other contact with the p+ type GaN layer. A cross-sectional view of a metallization layer and a substrate forming a metallization layer of a protruding or bump structure.

62 is a composite GaN heterostructure having a buffer layer, mesa etching, a metallization layer forming an ohmic contact with a p+ type GaN layer, a metallization layer forming an ohmic contact with the n+ type GaN layer, and other contact with the p+ type GaN layer. A cross-sectional view of a metallization layer, a metallization layer forming a protruding or bump structure, and a substrate of a passivation layer such as tantalum nitride.

63 is a composite GaN heterostructure having a buffer layer, mesa etching, a metallization layer forming an ohmic contact with the p+ type GaN layer, a metallization layer forming an ohmic contact with the n+ type GaN layer, and the other in contact with the p+ type GaN layer. A cross-sectional view of a metallization layer, a metallization layer forming a protruding or bump structure, a passivation layer (such as tantalum nitride), and a lateral (or surrounding) etched trench.

Figure 64 is a cross-sectional view showing an exemplary embodiment of an exemplary diode wafer adhered to a holding device.

Figure 65 is a cross-sectional view showing an exemplary embodiment of an exemplary diode wafer adhered to a holding device.

Figure 66 is a cross-sectional view showing an exemplary twelfth polar body embodiment of the adhesion to the holding device.

Figure 67 is a cross-sectional view showing an exemplary twelfth polar body embodiment adhered to a holding device prior to back metallization.

Figure 68 is a cross-sectional view showing an exemplary embodiment of an exemplary diode adhered to a holding device.

Figure 69 is a cross-sectional view showing an exemplary eleventh dipole embodiment of the adhesion to the holding device.

Figure 70 is a flow chart illustrating an exemplary first method embodiment for fabricating a diode.

Figure 71 is divided into Figures 71A and 71B for a flow chart illustrating an exemplary second method embodiment for fabricating a diode.

Figure 72, divided into Figures 72A and 72B, is a flow chart illustrating an exemplary third method embodiment for fabricating a diode.

Figure 73 is divided into Figures 73A and 73B for a flow chart illustrating an exemplary fourth method embodiment for fabricating a diode.

Figure 74 is a view showing the adhesion to the holding device and suspended in the adhesive-containing solvent. A cross-sectional view of an exemplary polished and polished diode wafer embodiment in a vessel.

Figure 75 is a flow chart illustrating an exemplary embodiment of an exemplary method for making a diode suspension.

Figure 76 is a perspective view of an exemplary first device embodiment.

Figure 77 is a plan (or top) view of an exemplary first electrode structure illustrating a first conductive layer of an exemplary device embodiment.

Figure 78 is a first cross-sectional view of an exemplary first device embodiment.

Figure 79 is a second cross-sectional view of an exemplary first device embodiment.

Figure 80 is a perspective view of an exemplary second device embodiment.

Figure 81 is a first cross-sectional view of an exemplary second device embodiment.

Figure 82 is a second cross-sectional view of an exemplary second device embodiment.

Figure 83 is a second cross-sectional view of an exemplary diode coupled to a first conductor.

Figure 84 is a block diagram of a first exemplary embodiment of the system.

Figure 85 is a block diagram of a second exemplary embodiment of the system.

Figure 86 is a flow chart illustrating an exemplary embodiment of an exemplary method for fabricating a device.

Figure 87 is a cross-sectional view of an exemplary third device embodiment illuminated from both sides.

Figure 88 is a cross-sectional view of an exemplary fourth device embodiment illuminated from both sides.

Figure 89 is a more detailed partial cross-sectional view of an exemplary first device embodiment.

Figure 90 is a more detailed partial cross-sectional view of an exemplary second device embodiment.

Figure 91 is a perspective view of an exemplary fifth device embodiment.

Figure 92 is a cross-sectional view of an exemplary fifth device embodiment.

Figure 93 is a perspective view of an exemplary sixth device embodiment.

Figure 94 is a cross-sectional view of an exemplary sixth device embodiment.

Figure 95 is a perspective view of an exemplary seventh device embodiment.

Figure 96 is a cross-sectional view of an exemplary seventh device embodiment.

Figure 97 is a perspective view of an exemplary eighth device embodiment.

Figure 98 is a cross-sectional view of an exemplary eighth device embodiment.

Figure 99 is a plan (or top) view of an exemplary second electrode structure illustrating a first conductive layer of an exemplary device embodiment.

Figure 100 is a perspective view of a specific example of the third and fourth exemplary systems.

Figure 101 is a plan view (or top view) of an exemplary ninth and tenth device embodiment.

Figure 102 is a cross-sectional view of an exemplary ninth device embodiment.

Figure 103 is a cross-sectional view of an exemplary tenth device embodiment.

Figure 104 is a perspective view illustrating an exemplary first surface geometry of an exemplary illuminating or light absorbing region.

Figure 105 is a perspective view illustrating an exemplary second surface geometry of an exemplary illuminating or light absorbing region.

Figure 106 is a perspective view illustrating an exemplary third surface geometry of an exemplary illuminating or light absorbing region.

Figure 107 is an illustrative fourth illustration of an exemplary illuminating or light absorbing region A perspective view of the surface geometry.

Figure 108 is a perspective view illustrating an exemplary fifth surface geometry of an exemplary illuminating or light absorbing region.

Figure 109 is a photograph of a specific example of an energized exemplary device for illumination.

Figure 110 is a scanning electron micrograph of an exemplary second diode embodiment.

Figure 111 is a scanning electron micrograph of a plurality of exemplary second diode embodiments.

100‧‧‧ first diode

105‧‧‧Substrate

110‧‧‧n+ type GaN layer

115‧‧‧p+ type GaN layer

120A‧‧‧metal layer

120B‧‧‧ metal layer

121‧‧‧ hexagonal side

130‧‧‧Guide

Claims (15)

A diode comprising: a luminescent or light absorbing region having a diameter between about 20 microns and 30 microns and a height between 2.5 microns and 7 microns, the illuminating or light absorbing region further at first The surface includes a mesa region; a first terminal centrally coupled to the mesa region of the light emitting or light absorbing region on the first surface, the first terminal having a height between 1 micrometer and 8 micrometers; a plurality of second terminals spaced apart and coupled to the light emitting or light absorbing region at a periphery of the first surface, wherein a height of each of the plurality of second terminals is between 0.5 micrometers and 2 micrometers between. The dipole of claim 1 wherein the mesa region has a height of from 0.5 micrometers to 2 micrometers and a diameter of between 6 micrometers and 22 micrometers. The dipole of claim 1, wherein the mesa region further comprises a metal layer forming an alloy, the metal layer forming the alloy being deposited before the first terminal and comprising nickel or nickel and gold, the height being 20 to 30 angstroms and coupled to the second terminal. The diode of claim 1, wherein the first terminal further comprises a central metal layer having a height of 0.5 micrometers to 1.5 micrometers and a diameter of 6 micrometers to 10 micrometers, the central metal layer being coupled to the light or light The mesa area of the absorption zone. The dipole of claim 4, wherein the first terminal further comprises a height of 4 micrometers to 6 micrometers and a width of 4 micrometers to 11 A mold metal formed between the micrometers and the mesa region of the illuminating or light absorbing region and the central metal layer. The dipole of claim 1, wherein each of the plurality of second terminals comprises a via metal having a width between 2 microns and 4 microns and a length between 6 microns and Between 11 microns. The dipole of claim 1 wherein the dipole has a lateral dimension between 10 microns and 50 microns and a height between 5 microns and 25 microns. The dipole of claim 1, wherein the diode is substantially hexagonal in the lateral direction, and the diameter measured between the opposing faces is between 10 micrometers and 50 micrometers, and the height is between Between 5 microns and 25 microns. The dipole of claim 1, wherein the illuminating or light absorbing region of the diode is substantially hexagonal, square, triangular, rectangular, lobed, star-shaped or super-annular. The dipole of claim 1, wherein the illuminating or light absorbing region of the diode has a surface texture comprising: a plurality of rings, or a plurality of substantially curved trapezoids, or a plurality of parallel stripes , or star pattern. The dipole of claim 1 wherein the dipole is substantially hexagonal in the lateral direction and wherein the height of each side of the dipole is less than 10 microns. The dipole of claim 1, wherein the junction of the first terminal and the plurality of second terminals are separated by a height of 1 micrometer to 7 Micron. A dipole according to claim 12, wherein each side of the diode has a substantially S-shaped curvature and terminates at a bending point. The dipole of claim 1, wherein the dipole comprises at least one inorganic semiconductor selected from the group consisting of germanium, gallium arsenide (GaAs), gallium nitride (GaN), GaP, InAlGaP, AlInGaAs, InGaNAs, and AlInGaSb. A dipole according to claim 1, wherein the dipole comprises at least one organic semiconductor selected from the group consisting of π conjugated polymers, poly(acetylene), poly(pyrrole), poly(thiophene). , polyaniline, polythiophene, poly(p-phenylene sulfide), poly(p-phenylene vinylene) (PPV) and PPV derivatives, poly(3-alkylthiophene), polyfluorene, polyfluorene, polyfluorene Azole, polyglycyrrhizin, polyazabarium, poly(fluorene), polynaphthalene, polyaniline, polyaniline derivative, polythiophene, polythiophene derivative, polypyrrole, polypyrrole derivative, polybenzothiophene, polyphenylene And thiophene derivatives, poly-p-phenylene, poly-p-phenylene derivatives, polyacetylene, polyacetylene derivatives, polydiacetylene, polydiacetylene derivatives, poly-p-phenylene vinyl, poly-p-phenylene Vinyl derivatives, polynaphthalenes, polynaphthalene derivatives, polyisothianaphthene (PITN), heteroaryl groups of thiophene, furan or pyrrole, poly(arylene), vinyl (ParV), polyphenylene sulfide PPS), polyperinaphthalene (PPN), polyphthalocyanine (PPhc), and derivatives thereof, copolymers thereof, and mixtures thereof.