KR102156532B1 - Light emitting, power generating or other electronic apparatus and method of manufacturing same - Google Patents

Abstract

An exemplary printable composition of a liquid or gel suspension of diodes comprises a plurality of diodes, a first solvent and/or a viscosity modifier. An exemplary device includes a plurality of diodes; At least a trace amount of the first solvent; And a polymeric or resin film at least partially surrounding each diode of the plurality of diodes. Various exemplary diodes have a lateral dimension of about 10-50 μm and a height of about 5-25 μm. Other aspects may also include a plurality of substantially chemically inert particles, having a size range of about 10 to about 50 μm.

Description

Light emission, power generation or other electronic device and its manufacturing method {LIGHT EMITTING, POWER GENERATING OR OTHER ELECTRONIC APPARATUS AND METHOD OF MANUFACTURING SAME}

Copyright notice and permission matters

Some of the disclosures of this patent document contain matters subject to copyright protection. The copyright holder does not object to the copying of this patent document or patent disclosure as contained in the patent office patent file or record, but retains the copyright in all cases otherwise. The following notice applies to this document and the following data, content and drawings thereof: Copyright © 2010-2011, NthDegree Technologies Worldwide, Inc.

Cross-reference of related applications

This application is a conversion of U.S. Provisional Patent Application No. 61/379,225 (Inventor: William Johnstone Ray et al., name: "Printable Composition of a Liquid or Gel Suspension of Diodes") filed on September 1, 2010, and has priority over this. And the above application is to be assigned to the general public, the entire contents of which are incorporated herein by reference together with the claimed priority to all generally disclosed subject matter with the same effect as set forth in its entirety.

This application is a conversion of US Provisional Patent Application No. 61/379,284 (Inventor: William Johnstone Ray et al., name: "Light Emitting, Photovoltaic and Other Electronic Apparatus") filed on September 1, 2010, and claims priority thereto. And the above application is generally assigned, the entire contents of which are incorporated herein by reference with the same effect as set forth in the entirety of the application, along with the claimed priority for all generally disclosed subject matter.

This application is a US Provisional Patent Application No. 61/379,830 (inventor: William Johnstone Ray et al., name: "Printable Composition of a Liquid ot Gel Suspension of Diodes and Method of Making Same") filed on September 3, 2010. It is a conversion and claims priority thereto, the application being assigned to the general public, the entire contents of which are incorporated herein by reference with the claimed priority to all generally disclosed subject matter with the same effect as set forth in its entirety.

This application is a conversion of US Provisional Patent Application No. 61/379,820 (inventor: William Johnstone Ray et al., name: "Light Emitting, Photovoltaic and Other Electronic Apparatus") filed on September 3, 2010, and claims priority thereto. And the above application is to be assigned to the general public, the entire contents of which are incorporated herein by reference together with the claimed priority for all generally disclosed subject matter, having the same effect as described in the entirety thereof.

This application is a serial application in part of U.S. Patent Application No. 11/756,616 (Inventor: William Johnstone Ray et al., title: "Method of Manufacturing Addressable and Static Electronic Displays") filed May 31, 2007, and priority is given to it. Claims, the above application is to be assigned to the general public, the entire contents of which are incorporated herein by reference with the same effect as set forth in its entirety, with the priority claimed for all generally disclosed subject matter.

This application is part of U.S. Patent Application No. 12/601,268, filed on November 22, 2009 (Inventor: William Johnstone Ray et al., entitled "Method of Manufacturing Addressable and Static Electronic Displays, Power Generating and Other Electronic Apparatus") It is a serial application and claims priority, which is filed on May 31, 2007 in U.S. Patent Application No. 11/756,616 (Inventor: William Johnstone Ray et al., Title: "Method of Manufacturing Addressable and Static Electronic Displays" ), and claims priority to it, which also claims priority to U.S. Patent Application No. 11/756,616, filed May 31, 2007. 35 USC of PCT/US2008/65237 (Inventor: William Johnstone Ray et al., name: "Method of Manufacturing Addressable and Static Electronic Displays, Power Generating and Other Electronic Apparatus") It is a U.S. domestic phase application under Section 371 and claims priority to it, the applications being generally assigned, the entire contents of which have the same effect as set forth in the entirety of this specification, together with the claimed priority for all generally disclosed subject matter. Is cited by reference.

This application is also a partial serial application of U.S. Patent Application No. 13/149,681, filed May 31, 2011 (Inventor: William Johnstone Ray et al., title: "Addressable or Static Light Emitting or Electronic Apparatus"), and Priority is claimed, and the above application is filed on May 31, 2007, and on July 5, 2011, U.S. Patent Application No. 11/756,619 issued under U.S. Patent No. US 7,972,031 B2 (inventor: William Johnstone Ray et al. : "Addressable or Static Light Emitting or Electronic Apparatus") is part of a series of applications and claims priority thereto, and the above applications are generally transferred, the entire contents of which have the same effect as described in the full text of the application and all general disclosed subject matter It is incorporated herein by reference together with the priority claimed for.

This application is a partial serial application of US Patent Application No. 12/601,271 filed on November 22, 2009 (Inventor: William Johnstone Ray et al., name: "Addressable or Static Light Emitting, Power Generating or Other Electronic Apparatus") Priority is claimed on this, which is part of U.S. Patent Application No. 11/756,619, filed May 31, 2007 (Inventor: William Johnstone Ray et al., Title: "Addressable or Static Light Emitting or Electronic Apparatus") It is a serial application and claims priority thereto, which is International Application No. PCT/US2008 filed May 30, 2008, claiming priority to U.S. Patent Application No. 11/756,619 filed May 31, 2007 /65230 (Inventor: William Johnstone Ray et al., name: "Addressable or Static Light Emitting, Power Generating or Other Electronic Apparatus") 35 USC It is a U.S. domestic phase application under Section 371 and claims priority to it, the applications being generally assigned, the entire contents of which have the same effect as set forth in the entirety of this specification, together with the claimed priority for all generally disclosed subject matter. Is cited by reference.

This application also has the following patent applications, namely (1) U.S. Patent Application No. 13/223,279, filed August 31, 2011 (Inventor: Mark D. Lowenthal et al., entitled "Printable Composition of a Liquid or Gel Suspension of Diodes"); (2) US patent application Ser. No. 13/223,289 filed Aug. 31, 2011 (Inventor: Mark D. Lowenthal et al., name: "Light Emitting, Power Generating or Other Electronic Apparatus"); (3) U.S. Patent Application No. 13/223,286 filed August 31, 2011 (Inventor: Mark D. Lowenthal et al., name: "Method of Manufacturing a Printable Composition of a Liquid or Gel Suspension of Diodes"); (4) U.S. Patent Application No. 13/223,293 filed August 31, 2011 (Inventor: Mark D. Lowenthal et al., name: "Method of Manufacturing a Light Emitting, Power Generating or Other Electronic Apparatus"); (5) US patent application Ser. No. 13/223,294, filed Aug. 31, 2011 (Inventor: Mark D. Lowenthal et al., entitled “Diode For a Printable Composition”); (6) US patent application Ser. No. 13/223,297, filed Aug. 31, 2011 (Inventor: Mark D. Lowenthal et al., entitled “Diode For a Printable Composition”); And (7) U.S. Patent Application No. 13/223,302 filed on August 31, 2011 (Inventor: Mark D. Lowenthal et al., name: "Printable Composition of a Liquid or Gel Suspension of Two-Terminal Integrated Circuits and Apparatus" ), and claims priority thereto, and the above applications are generally assigned, the entire contents of which have the same effect as described in the entirety of the application, and are incorporated herein by reference together with the claimed priority for all generally disclosed subject matter. Is cited.

Technical field

FIELD OF THE INVENTION The present invention relates generally to light-emitting and photovoltaic technologies, and in particular, to compositions of light-emitting or photovoltaic diodes or other two-terminal integrated circuits that are printable and suspended in liquid or gel; And to a method for producing a composition of a light emitting, photovoltaic or other diode or two-terminal integrated circuit suspended in a liquid or gel.

Lighting devices with light-emitting diodes ("LEDs") typically require fabrication of LEDs on semiconductor wafers using integrated circuit processing steps. The resulting LED is substantially flat and relatively large, with a width of about 200 mu m or more. Each of these LEDs is typically a two-terminal device having two metal terminals on the same side of the LED in order to provide ohmic contact to the p-type and n-type portions of the LED. The LED wafer is then divided into individual LEDs, typically through a mechanical process such as sawing. The individual LEDs are then placed in a reflective casing, and bonding wires are individually attached to each of the two metal terminals of the LED. Because this process is time consuming, labor intensive and expensive, the LED-based lighting units produced are generally too expensive for many consumer applications.

Similarly, energy generating devices such as photovoltaic panels also typically require fabrication of photovoltaic diodes on semiconductor wafers or other substrates using integrated circuit processing steps. The obtained wafer or other substrate is then packaged and assembled to produce a photovoltaic panel. Because this process is also time-consuming, labor-intensive and expensive, the photovoltaic devices produced are too expensive for widespread use, without third-party subsidies or other government subsidies.

Many techniques are being attempted to manufacture new types of diodes or other semiconductor devices for light emitting or energy generating purposes. For example, it has been proposed that a graphic can be formed by printing quantum dots functionalized or capped by organic molecules so as to be miscible with an organic resin and a solvent, and emit light when the graphic is pumped with a second light. A number of approaches are also being implemented for device formation, using semiconductor nanoparticles, such as particles ranging from about 1.0 nm to about 100 nm (1/10 μm). Another approach is to use a larger scale silicon powder dispersed in a solvent-binder carrier, and use a colloidal suspension of the obtained silicon powder to form an active layer in the printing transistor. Another different approach uses very flat AlInGaP LED structures formed on a GaAs wafer, each LED having a breakaway photoresist anchor for each of the two neighboring LEDs on the wafer, each The LEDs are then picked and placed to form the final device.

Other approaches are self-assembly of a "lock and key" fluid that holds trapezoidal diodes in a solvent and then pours them onto a substrate with trapezoidal holes matching them, holding the trapezoidal diodes in place and holding them in place. I am using However, trapezoidal diodes in the solvent are not suspended and dispersed in the solvent. Instead, the trapezoidal diodes settle rapidly and become an agglomerate of diodes adhering to each other, which cannot be maintained or dispersed as a suspension in the solvent, and require active sonication or stirring immediately before use. These trapezoidal diodes in a solvent cannot be used as diode-based inks that can be used as storage, packaging or other inks, and are also not suitable for printing process applications.

None of these approaches use a liquid or gel containing a two-terminal integrated circuit or other semiconductor device (the two-terminal integrated circuit or other semiconductor device is substantially dispersed and suspended in the liquid or gel medium, e.g. For example, forming ink, the two-terminal integrated circuit is suspended as particles, the semiconductor device is complete and functional, and can be formed into an apparatus or system in a non-inert atmospheric environment using a printing process) .

LED-based devices and photovoltaic devices according to these recent development of diode-based technologies are still too complex and expensive to achieve commercial practicality. Consequently, there is a need for a light emitting and/or photovoltaic device designed to be less expensive in terms of inserted members and ease of manufacture. In addition, there is a need for a method of producing LED-based lighting devices and solar panels that can be widely used and adopted by consumers and commerce by manufacturing such light emitting or solar power devices using less expensive and more robust processes. . Thus, liquid or gel suspensions of fully functional diodes or other two-terminal integrated circuits that can be printed to manufacture LED-based devices and photovoltaic devices, printing for manufacturing such LED-based devices and photovoltaic devices. Various needs exist for a method, and for a final printed LED-based device and a photovoltaic device.

The present exemplary embodiments provide a liquid or gel suspension and dispersion of “diode ink”, ie, diodes or other two-terminal integrated circuits that can be printed, for example via screen printing or flexographic printing. do. As will be described in more detail below, the diodes themselves before being included in the diode ink composition may function to emit light when energized (if implemented as an LED) or (implemented as a photovoltaic diode). If so, they are finished semiconductor devices that can function to provide power when exposed to a light source. The exemplary method also includes a method of making a diode ink dispersing and suspending a plurality of diodes in a solvent and a viscous resin or polymer mixture, as discussed in more detail below, and printing the diode ink to an LED-based device. And a photovoltaic device. Exemplary devices and systems formed by printing such diode inks are also described.

While the present disclosure focuses on diodes of a two-terminal integrated circuit type, those skilled in the art have found that other types of semiconductor devices can be equally substituted to form what is more broadly referred to as “semiconductor device ink”. And, it will be appreciated that all such modifications are equivalent and within the scope of this disclosure. Thus, any reference to "diode" in this specification is made using any two-terminal integrated circuit of any kind, such as resistors, inductors, capacitors, RFID circuits, sensors, piezoelectric devices, and the like, and two terminals or electrodes. It will be understood to mean and include any other integrated circuit capable of operating.

An exemplary aspect includes a plurality of diodes; A first solvent; And it provides a composition comprising a viscosity modifier.

In an exemplary embodiment, the first solvent is water; Alcohols, such as methanol, ethanol, N-propanol (including 1-propanol, 2-propanol (isopropanol), and 1-methoxy-2-propanol), butanol (1-butanol, 2-butanol (isobutanol) Including), pentanol (including 1-pentanol, 2-pentanol, 3-pentanol), octanol, N-octanol (including 1-octanol, 2-octanol, and 3-octanol) , Tetrahydrofurfuryl alcohol, cyclohexanol, terpineol; Ethers such as methyl ethyl ether, diethyl ether, ethyl propyl ether, and polyethers; Esters such as ethyl acetate, dimethyl adipate, propylene glycol monomethyl ether acetate, dimethyl glutarate, dimethyl succinate, glycerin acetate; Glycols such as ethylene glycol, diethylene glycol, polyethylene glycol, propylene glycol, dipropylene glycol, glycol ether, glycol ether acetate; Carbonates such as propylene carbonate; Glycerol, such as glycerin; Acetonitrile, tetrahydrofuran (THF), dimethyl formamide (DMF), N-methyl formamide (NMF), dimethyl sulfoxide (DMSO); And at least one solvent selected from the group consisting of mixtures thereof. The first solvent may be present in an amount of, for example, about 0.3% to 50% or 60% by weight.

In various exemplary embodiments, each diode of the plurality of diodes has a diameter of about 20 to 30 μm and a height of about 5 to 15 μm; Has a diameter of about 10 to 50 μm and a height of about 5 to 25 μm; Each has a width and length of about 10 to 50 μm and a height of about 5 to 25 μm; Each has a width and length of about 20 to 30 μm and a height of about 5 to 15 μm. The plurality of diodes may be, for example, a light emitting diode or a photovoltaic diode.

Exemplary compositions may further comprise a plurality of substantially optically clear and chemically inert particles having a size range of about 10 to about 50 μm and present in an amount of about 0.1% to 2.5% by weight. Another exemplary composition may further comprise a plurality of substantially optically transparent and chemically inert particles having a size range of about 10 to about 30 μm and present in an amount of about 0.1% to 2.5% by weight. .

In an exemplary embodiment, the viscosity modifier is clay, for example hectorite clay, garamite clay, organo-modified clay; Saccharides and polysaccharides such as guar gum, xanthan gum; Cellulose and modified cellulose, such as hydroxy methylcellulose, methylcellulose, ethyl cellulose, propyl methylcellulose, methoxy cellulose, methoxy methylcellulose, methoxy propyl methylcellulose, hydroxy propyl methylcellulose, carboxy methylcellulose, Hydroxy ethylcellulose, ethyl hydroxyl ethylcellulose, cellulose ether, cellulose ethyl ether, chitosan; Polymers, such as acrylate and (meth)acrylate polymers and copolymers; Glycols such as ethylene glycol, diethylene glycol, polyethylene glycol, propylene glycol, dipropylene glycol, glycol ether, glycol ether acetate; Fumed silica, silica powder; Denatured urea; And at least one viscosity modifier selected from the group consisting of mixtures thereof. The viscosity modifier may be present in an amount of, for example, about 0.30% to 5% by weight, or about 0.10% to 3% by weight.

The composition may further include a second solvent different from the first solvent. The second solvent is present, for example, in an amount of about 0.1% to 60% by weight.

In an exemplary embodiment, the first solvent is N-propanol, isopropanol, dipropylene glycol, diethylene glycol, propylene glycol, 1-methoxy-2-propanol, 1-octanol, ethanol, tetrahydrofurfuryl alcohol or cyclo Hexanol or mixtures thereof, and is present in an amount of about 5% to 50% by weight; The viscosity modifier comprises a methoxy propyl methylcellulose resin or a hydroxy propyl methylcellulose resin or a mixture thereof, and is present in an amount of about 0.10% to 5.0% by weight; The second solvent is N-propanol, isopropanol, dipropylene glycol, diethylene glycol, propylene glycol, 1-methoxy-2-propanol, 1-octanol, ethanol, tetrahydrofurfuryl alcohol or cyclohexanol, or Mixture, and is present in an amount of about 0.3% to 50% by weight.

In another exemplary embodiment, the first solvent is N-propanol, isopropanol, dipropylene glycol, diethylene glycol, propylene glycol, 1-methoxy-2-propanol, 1-octanol, ethanol, tetrahydrofurfuryl alcohol Or cyclohexanol or a mixture thereof, and is present in an amount of about 5% to 30% by weight; The viscosity modifier comprises a methoxy propyl methylcellulose resin or a hydroxy propyl methylcellulose resin or a mixture thereof, and is present in an amount of about 1.0% to 3.0% by weight; The second solvent is N-propanol, isopropanol, dipropylene glycol, diethylene glycol, propylene glycol, 1-methoxy-2-propanol, 1-octanol, ethanol, tetrahydrofurfuryl alcohol or cyclohexanol, or A mixture and is present in an amount of about 0.2% to 8.0% by weight; The remaining amount of the composition further comprises water.

In another exemplary embodiment, the first solvent is N-propanol, isopropanol, dipropylene glycol, diethylene glycol, propylene glycol, 1-methoxy-2-propanol, 1-octanol, ethanol, tetrahydrofurfuryl alcohol Or cyclohexanol or a mixture thereof, and is present in an amount of about 40% to 60% by weight; The viscosity modifier comprises a methoxy propyl methylcellulose resin or a hydroxy propyl methylcellulose resin or a mixture thereof, and is present in an amount of about 0.10% to 1.5% by weight; The second solvent is N-propanol, isopropanol, dipropylene glycol, diethylene glycol, propylene glycol, 1-methoxy-2-propanol, 1-octanol, ethanol, tetrahydrofurfuryl alcohol or cyclohexanol, or Mixture, and is present in an amount of about 40% to 60% by weight.

An exemplary method of making the composition includes mixing the plurality of diodes with the first solvent; Adding a mixture of the first solvent and the plurality of diodes to the viscosity modifier; Adding the second solvent; It may include mixing the plurality of diodes, the first solvent, the second solvent, and the viscosity modifier in air for about 25 to 30 minutes. The exemplary method may further include releasing the plurality of diodes from the wafer, and the step of releasing the plurality of diodes from the wafer may include, for example, etching the back side of the wafer, or It further includes grinding and polishing the back surface, or laser lift-off from the back surface of the wafer.

In various exemplary embodiments, the composition is substantially from about 50 cps to about 25,000 cps at about 25°C, or from about 100 cps to about 25,000 cps at about 25°C, or from about 1,000 cps to about 10,000 cps at about 25°C, or about It has a viscosity of about 10,000 cps to about 25,000 cps at 25°C.

In various exemplary embodiments, each diode of the plurality of diodes may include GaN, wherein the GaN portion of each diode of the plurality of diodes is substantially hexagonal, square, triangular, rectangular, and lobed. ), radial (stellate) or toroidal (toroidal). In an exemplary embodiment, the light emission or light absorption region of each diode of the plurality of diodes is a group consisting of a plurality of circular rings, a plurality of substantially curved trapezoids, a plurality of parallel stripes, a radial pattern, and a combination thereof It can have a surface texture selected from.

In an exemplary embodiment, each diode of the plurality of diodes has a first metal terminal on a first side of the diode, a second metal terminal on a second, rear side of the diode, and the first and second Each of the two terminals is about 1 to 6 μm in height. In another exemplary embodiment, each diode of the plurality of diodes has a diameter of about 20 to 30 μm and a height of 5 to 15 μm, and each diode of the plurality of diodes has a first surface on the first side. Having a plurality of metal terminals and one second metal terminal on the first surface, the contact portion of the second metal terminal is about 2 to 5 μm in height from the contact portions of the first plurality of metal terminals As far apart as possible. In an exemplary embodiment, each of the first metal terminals of the first plurality of metal terminals has a height of about 0.5 to 2 μm, and the second metal terminal has a height of about 1 to 8 μm. In another exemplary embodiment, each diode of the plurality of diodes has a diameter of about 10 to 50 μm and a height of 5 to 25 μm, and each diode of the plurality of diodes has a first surface on the first side. Having a plurality of metal terminals and one second metal terminal on the first surface, the contact portion of the second metal terminal is about 1 to 7 μm in height from the contact portions of the first plurality of metal terminals As far apart as possible.

In another exemplary embodiment, each diode of the plurality of diodes includes at least one metal via structure extending from at least one p+ or n+ GaN layer on the first side of the diode to the second, rear side of the diode. (metal via structure). The metal via structure includes, for example, a central via, a peripheral via, or a perimeter via.

In various exemplary aspects, each diode of the plurality of diodes has an arbitrary dimension of less than about 30 μm. In another exemplary aspect, the diode has a diameter of about 20 to 30 μm and a height of about 5 to 15 μm; Or has a diameter of about 10 to 50 μm and a height of about 5 to 25 μm; Is substantially hexagonal laterally and has a diameter of about 10 to 50 µm and a height of about 5 to 25 µm as measured opposing face-to-face; Is substantially hexagonal laterally and has a diameter of about 20 to 30 µm and a height of about 5 to 15 µm, measured face-to-face; Each has a width and length of about 10 to 50 μm and a height of about 5 to 25 μm; Each has a width and length of about 20 to 30 μm and a height of about 5 to 15 μm. In various exemplary aspects, the sides of each diode of the plurality of diodes are less than about 10 μm in height. In another exemplary aspect, the sides of each diode of the plurality of diodes are about 2.5 to 6 μm in height. In another exemplary aspect, the sides of each diode of the plurality of diodes are substantially S-shaped and terminate at a bend point.

In various exemplary embodiments, the viscosity modifier further comprises an adhesive viscosity modifier. The viscosity modifier, when dried or cured, may form a polymer or resin lattice or structure substantially around the periphery of each diode of the plurality of diodes. The composition may be, for example, opaque to the naked eye when wet and almost optically transparent when dried or cured. The composition may have a contact angle greater than about 25 degrees or greater than about 40 degrees. The composition may have a relative evaporation rate of less than 1, wherein the evaporation rate is compared with the evaporation rate of butyl acetate as 1. A method of using the composition may include printing the composition over a substrate or on a first conductor coupled to the substrate.

In an exemplary embodiment, each diode of the plurality of diodes is at least one inorganic selected from the group consisting of silicon, gallium arsenide (GaAs), gallium nitride (GaN), GaP, InAlGaP, InAlGaP, AlInGaAs, InGaNAs, and AlInGASb. Includes semiconductors. In another exemplary embodiment, each diode of the plurality of diodes is a π-conjugated polymer, poly(acetylene), poly(pyrrole), poly(thiophene), polyaniline, polythiophene, poly(p-phenylene). Sulfide), poly(para-phenylene vinylene) (PPV) and PPV derivatives, poly(3-alkylthiophene), polyindole, polypyrene, polycarbazole, polyazulene, polyazepine, poly(fluorene), Polynaphthalene, polyaniline, polyaniline derivative, polythiophene, polythiophene derivative, polypyrrole, polypyrrole derivative, polytianaphthene, polytianaphthane derivative, polyparaphenylene, polyparaphenylene derivative, polyacetylene, polyacetylene derivative , Polydiacetylene, polydiacetylene derivative, polyparaphenylene vinylene, polyparaphenylene vinylene derivative, polynaphthalene, polynaphthalene derivative, polyisotianaphthene (PITN), polyheteroarylene vinylene (ParV) (Wherein, the heteroarylene group is thiophene, furan or pyrrole), polyphenylene-sulfide (PPS), polyperinaphthalene (PPN), polyphthalocyanine (PPhc), and derivatives thereof, copolymers thereof, and And at least one organic semiconductor selected from the group consisting of mixtures thereof.

Another exemplary aspect is a plurality of diodes; A first solvent; And it provides a composition comprising a viscosity modifier; Here, the composition has a viscosity of substantially about 100 cps to about 25,000 cps at about 25°C. Another exemplary aspect is a plurality of diodes (each diode of the plurality of diodes has an arbitrary dimension less than about 50 μm); A first solvent; A second solvent different from the first solvent; And it provides a composition comprising a viscosity modifier; Here, the composition has a viscosity of substantially about 50 cps to about 25,000 cps at about 25°C. Another exemplary aspect includes a plurality of diodes of any dimension less than about 50 μm; And a viscosity modifier to provide a composition viscosity of substantially about 100 cps to about 20,000 cps at about 25°C. Another exemplary aspect is a plurality of diodes; From the group consisting of N-propanol, isopropanol, dipropylene glycol, diethylene glycol, propylene glycol, 1-methoxy-2-propanol, 1-octanol, ethanol, tetrahydrofurfuryl alcohol, cyclohexanol, and mixtures thereof A first solvent selected; A viscosity modifier selected from the group consisting of methoxy propyl methylcellulose resin, hydroxy propyl methylcellulose resin, and mixtures thereof; And a second solvent different from the first solvent (the second solvent is N-propanol, isopropanol, dipropylene glycol, diethylene glycol, propylene glycol, 1-methoxy-2-propanol, 1-octanol, ethanol, tetra Hydrofurfuryl alcohol, cyclohexanol, and mixtures thereof).

Another exemplary aspect is a plurality of diodes; At least a trace amount of the first solvent; And a polymeric or resin film at least partially surrounding each diode of the plurality of diodes. In an exemplary embodiment, the polymeric or resin film includes a methylcellulose resin having a thickness of about 10 nm to 300 nm. In another exemplary embodiment, the polymeric or resin film comprises a methoxy propyl methylcellulose resin or a hydroxy propyl methylcellulose resin, or a mixture thereof. The device may further comprise at least a trace amount of a second solvent different from the first solvent.

In an exemplary embodiment, the polymeric or resinous film may be selected from clay, such as hectorite clay, karamite clay, organo-modified clay; Saccharides and polysaccharides such as guar gum, xanthan gum; Cellulose and modified cellulose, such as hydroxy methylcellulose, methylcellulose, ethyl cellulose, propyl methylcellulose, methoxy cellulose, methoxy methylcellulose, methoxy propyl methylcellulose, hydroxy propyl methylcellulose, carboxy methylcellulose, Hydroxy ethylcellulose, ethyl hydroxyl ethylcellulose, cellulose ether, cellulose ethyl ether, chitosan; Polymers, such as acrylate and (meth)acrylate polymers and copolymers; Glycols such as ethylene glycol, diethylene glycol, polyethylene glycol, propylene glycol, dipropylene glycol, glycol ether, glycol ether acetate; Fumed silica, silica powder; Denatured urea; And cured, dried or polymerized viscosity modifiers selected from the group consisting of mixtures thereof.

An exemplary device further comprises a plurality of particles that are substantially optically transparent and chemically inert (each inert particle of the plurality of substantially optically transparent and chemically inert particles is about 10 to about 50 μm). Can do; Here, the polymeric or resin film further at least partially surrounds each inert particle of the plurality of substantially optically transparent and chemically inert particles.

An exemplary device includes a substrate; One or more first conductors coupled to the first terminal; At least one dielectric layer coupled to the one or more first conductors; And one or more second conductors coupled to the second terminal and to the dielectric layer. In an exemplary aspect, at least one diode of the plurality of diodes has a first terminal coupled to at least one second conductor and a second terminal coupled to at least one first conductor. In another exemplary aspect, the first portion of the plurality of diodes has a first terminal coupled to at least one first conductor and a second terminal coupled to at least one second conductor, the plurality of diodes The second portion of thes has a first terminal coupled to at least one second conductor and a second terminal coupled to at least one first conductor. The exemplary apparatus may further include an interface circuit coupled to the one or more first conductors and the one or more second conductors, the interface circuit being further coupled to a power source.

In various exemplary aspects, the one or more first conductors may include: a first electrode comprising a first busbar and a first plurality of elongated conductors extending from the first busbar; And a second electrode including a second bus bar and a second plurality of rectangular conductors extending from the second bus bar. The second plurality of rectangular conductors may be interdigitated with the first plurality of rectangular conductors. The one or more second conductors may further be coupled to the second plurality of rectangular conductors.

In various exemplary aspects, the device is foldable and bendable. The device may be substantially flat and may have a total thickness of less than about 3 mm. The device can be die cut and folded into a selected shape. The device may have an average surface area concentration of the plurality of diodes of about 25 to 50,000 diodes/cm 2. In various exemplary aspects, the apparatus does not include a heat sink or a heat sink component.

In another exemplary aspect, an apparatus comprises: a substrate; A plurality of diodes (each diode of the plurality of diodes has a first terminal and a second terminal, and each diode of the plurality of diodes has an arbitrary dimension less than about 50 μm); A film substantially surrounding each diode of the plurality of diodes (the film comprises a polymer or resin having a thickness of about 10 nm to 300 nm); One or more first conductors coupled to the first first plurality of terminals; A first dielectric layer coupled to the one or more first conductors; And one or more second conductors coupled to the first second plurality of terminals.

In another exemplary aspect, an apparatus comprises: a substrate; One or more first conductors; A dielectric layer coupled to the one or more first conductors; One or more second conductors; A plurality of diodes (each diode of the plurality of diodes has an arbitrary dimension of less than about 50 μm, and a first portion of the plurality of diodes is in the one or more first conductors and in the one or more second conductors. Coupled in a forward bias orientation, at least one of the plurality of diodes coupled in a reverse bias orientation to the one or more first conductors and to the one or more second conductors); And a film substantially surrounding each diode of the plurality of diodes (the film includes a polymer or resin having a thickness of about 10 nm to 300 nm).

In various exemplary embodiments, the diode includes a light emitting or light absorbing region having a diameter of about 20 and 30 μm and a height of about 2.5 to 7 μm; A first terminal coupled to the light emitting area on a first surface (the first terminal has a height of about 1 to 6 μm); And a second terminal coupled to the light emitting area on a second surface opposite the first surface (the second terminal has a height of about 1 to 6 μm).

In another exemplary aspect, the diode comprises: a light emitting or light absorbing region having a diameter of about 6 and 30 μm and a height of about 1 to 7 μm; A first terminal coupled to the light emitting area on a first surface (the first terminal has a height of about 1 to 6 μm); And a second terminal coupled to the light-emitting area on a second surface opposite the first surface (the second terminal has a height of about 1 to 6 μm); Here, the diode has a diameter of about 10 to 50 μm and a height of about 5 to 25 μm, measured in a lateral direction, and a face-to-surface, where each side of the diode has a height of about It is less than 10 μm, has a substantially S-shaped curvature and ends at a curved point.

In another exemplary aspect, the diode comprises: a light emitting or light absorbing region having a diameter of about 6 and 30 μm and a height of about 1 to 7 μm; A first terminal coupled to the light emitting area on a first surface (the first terminal has a height of about 1 to 6 μm); And a second terminal coupled to the light-emitting area on a second surface opposite the first surface (the second terminal has a height of about 1 to 6 μm); Here, the diode has a width and length of about 10 to 50 μm and a height of about 5 to 25 μm, wherein each side of the diode is less than about 10 μm in height, has a substantially S-shaped curvature and a curved point Ends in

In various exemplary aspects, the diode includes a light emitting or light absorbing region having a diameter of about 6 and 30 μm and a height of about 2.5 to 7 μm; A first terminal coupled to the light emitting area on a first surface (the first terminal has a height of about 3 to 6 μm); And a second terminal coupled to the light emitting area on a second surface opposite the first surface (the second terminal has a height of about 3 to 6 μm); Here, the diode has a width and length of about 10 to 30 μm and a height of about 5 to 15 μm, wherein each side of the diode is less than about 10 μm in height, has a substantially S-shaped curvature and a curved point Ends in

In another exemplary aspect, the diode comprises: a light emitting or light absorbing region having a diameter of about 20 and 30 μm and a height of about 2.5 to 7 μm; A first plurality of terminals separated from and coupled to the light-emitting area around the first surface (each first terminal of the first plurality of terminals has a height of about 0.5 to 2 μm); And one second terminal (the second terminal has a height of 1 to 8 μm) coupled to the mesa region of the light-emitting region on the first surface.

In another exemplary aspect, the diode includes: a light emitting or light absorbing region having a mesa region (the mesa region has a height of 0.5 to 2 μm and a diameter of about 6 to 22 μm); A plurality of first terminals coupled to the light emitting region on the first surface and to the mesa region apart from each other (each first terminal of the first plurality of terminals has a height of about 0.5 to 2 μm) Have); And one second terminal (the second terminal has a height of 1 to 8 μm) coupled to the mesa area of the light emitting area on the first surface; Here, the diode has a lateral dimension of about 10 to 50 μm and a height of about 5 to 25 μm.

In another exemplary aspect, the diode comprises: a light emitting or light absorbing region having a diameter of about 20 and 30 μm and a height of about 2.5 to 7 μm; A plurality of first terminals (each of the first terminals having a height of about 0.5 to 2 μm) separated from and coupled to the light emitting area around the first surface; And a second terminal (the second terminal has a height of 3 to 6 μm) coupled to the mesa area of the light emitting area on the first surface; Here, the diode is substantially hexagonal in the lateral direction, has a diameter of about 20 to 30 μm and a height of about 5 to 15 μm, wherein each side of the diode is less than about 10 μm in height, and is substantially S-shaped It has curvature and ends at the bent point

In another exemplary aspect, the diode includes: a light emitting or light absorbing region having a mesa region (the mesa region has a height of 0.5 to 2 μm and a diameter of about 6 to 22 μm); A plurality of first terminals coupled to the light emitting region on the first surface and to the mesa region apart from each other (each first terminal of the first plurality of terminals has a height of about 0.5 to 2 μm) Have); And one second terminal centrally coupled to the mesa region of the light-emitting region on the first surface (the second terminal has a height of 1 to 8 μm, and the second metal terminal has one contact part) , The one contact portion of the second terminal is separated from the contact portions of the first plurality of metal terminals by about 1 to 7 μm in height); Here, the diode is almost hexagonal in the lateral direction, has a diameter of about 10 to 50 μm and a height of about 5 to 25 μm, wherein each side of the diode is less than about 15 μm in height, and is substantially S-shaped It has a curvature and ends at a bent point.

An exemplary method for preparing a liquid or gel suspension of printing diodes includes adding a viscosity modifier to a plurality of diodes in a first solvent; And mixing the plurality of diodes, the first solvent, and the viscosity modifier to form a liquid or gel suspension of the plurality of diodes.

In yet another exemplary aspect, an exemplary method of preparing a liquid or gel suspension of a printing diode includes adding a second solvent (the second solvent is different from the first solvent) to a plurality of diodes in a first solvent; Adding a viscosity modifier to the plurality of diodes, the first solvent and the second solvent; Adding a plurality of chemically inert particles to the plurality of diodes, the first solvent, the second solvent, and the viscosity modifier; When the plurality of diodes, the first solvent, the second solvent, the viscosity modifier, and a plurality of chemically inert particles are at least about 100 centipoise (cps) measured at about 25°C And mixing to form a liquid or gel suspension of the plurality of diodes.

In another exemplary embodiment, an exemplary method of preparing a liquid or gel suspension of a printing diode includes a viscosity modifier in a plurality of diodes, a first solvent and a second solvent (the second solvent is different from the first solvent). Where each diode of the plurality of diodes has a lateral dimension of about 10 to 50 μm and a height of about 5 to 25 μm; A plurality of chemically almost inert particles are added to the plurality of diodes, the first solvent, the second solvent, and the viscosity modifier, wherein each particle of the plurality of chemically almost inert particles is Dimensions range from about 10 μm to about 70 μm); When the plurality of diodes, the first solvent, the second solvent, the viscosity modifier, and the plurality of chemically inert particles are at least about 1,000 centipoise (cps) at a viscosity measured at about 25°C And mixing to form a liquid or gel suspension of the plurality of diodes.

In an exemplary aspect, a method of manufacturing an electronic device comprises: depositing one or more first conductors; And depositing a plurality of diodes suspended in a mixture of a first solvent and a viscosity modifier.

In another exemplary embodiment, the method comprises depositing a plurality of diodes suspended in a mixture of a first solvent and a viscosity modifier on a first side of an optically transmissive substrate, wherein each diode of the plurality of diodes is on the first side. Having a first plurality of terminals and one second terminal on the first side, each diode of the plurality of diodes having a lateral dimension of about 10 to 50 μm and a height of 5 to 25 μm); Depositing one or more first conductors coupled to the first terminal; Depositing at least one dielectric layer coupled to the one or more first conductors; Depositing one or more second conductors coupled to the second terminal; And depositing a first phosphor layer on the second side of the optically transmissive substrate.

In another exemplary aspect, a method includes depositing one or more first conductors on a first side of a substrate; Depositing a plurality of diodes suspended in a mixture of a first solvent and a viscosity modifier over the one or more first conductors, wherein each diode of the plurality of diodes has a first terminal on the first side and a first terminal on the second side. Having two terminals, each diode of the plurality of diodes has a lateral dimension of about 10 to 50 μm and a height of 5 to 25 μm); Depositing at least one dielectric layer over the plurality of diodes and the one or more first conductors; Depositing at least one optically transmissive second conductor over the dielectric layer; And depositing a first phosphor layer.

In another exemplary aspect, the composition comprises: a plurality of two-terminal integrated circuits, wherein each two-terminal integrated circuit of the plurality of two-terminal integrated circuits has an arbitrary dimension less than about 75 μm; A first solvent; A second solvent different from the first solvent; And a viscosity modifier; Here, the composition has a viscosity of substantially about 50 cps to about 25,000 cps at about 25°C. In various exemplary embodiments, the plurality of two-terminal integrated circuits are selected from the group consisting of diodes, light emitting diodes, photovoltaic diodes, resistors, inductors, capacitors, RFID integrated circuits, sensor integrated circuits, and piezoelectric integrated circuits. It includes a two-terminal integrated circuit.

In another exemplary aspect, an apparatus comprises: a substrate; A plurality of two-terminal integrated circuits (each two-terminal integrated circuit of the plurality of two-terminal integrated circuits has an arbitrary dimension less than about 75 μm); At least a trace amount of the first solvent; A film substantially surrounding each diode of the plurality of diodes (the film includes a methylcellulose resin and has a thickness of about 10 nm to 300 nm); One or more first conductors coupled to the plurality of two-terminal integrated circuits; A first dielectric layer coupled to the one or more first conductors; And one or more second conductors coupled to the plurality of two-terminal integrated circuits.

In another exemplary aspect, the composition comprises: a plurality of two-terminal integrated circuits, wherein each two-terminal integrated circuit of the plurality of two-terminal integrated circuits has an arbitrary dimension less than about 75 μm; A first solvent; A second solvent different from the first solvent; A plurality of chemically substantially inert particles having a size range of about 10 to about 100 μm and present in an amount of about 0.1% to 2.5% by weight; And a viscosity modifier; Here, the composition has a viscosity of substantially about 50 cps to about 25,000 cps at about 25°C.

A number of other advantages and features of the invention will be readily apparent from the following detailed description, claims, and accompanying drawings of the invention and its aspects.

The present invention provides a light emitting and/or photovoltaic device that is easy to manufacture and is less expensive.

Objects, features, and advantages of the present invention will be more readily recognized when referring to the following description in conjunction with the accompanying drawings, and in various drawings, the same reference numerals are used to indicate the same members, and reference numerals with alphabet letters are various It is used in the drawings to represent a further type, illustration or variant of a member aspect selected.
(Or “FIG”) 1 is a perspective view showing an exemplary first diode embodiment.
Figure 2 (or “FIG”) is a plan (or top) view illustrating the exemplary first diode embodiment.
(Or “FIG”) 3 is a cross-sectional view illustrating the exemplary first diode embodiment.
(Or “FIG”) 4 is a perspective view illustrating an exemplary second diode embodiment.
Figure 5 (or “FIG”) is a plan (or top) view illustrating the exemplary second diode embodiment.
(Or “FIG”) 6 is a perspective view showing an exemplary third diode embodiment.
FIG. (or “FIG”) 7 is a plan (or top) view of the exemplary third diode embodiment.
(Or “FIG”) 8 is a perspective view showing an exemplary fourth diode embodiment.
FIG. (or “FIG”) 9 is a plan (or top view) view of the exemplary fourth diode embodiment.
(Or “FIG”) 10 is a cross-sectional view illustrating an exemplary second, third and/or fourth diode embodiment.
(Or “FIG”) 11 is a perspective view showing exemplary fifth and sixth diode embodiments.
FIG. (or “FIG”) 12 is a plan (or top) view illustrating the exemplary fifth and sixth diode embodiments.
Fig. (or "FIG") 13 is a cross-sectional view of the fifth exemplary diode embodiment.
Fig. (or “FIG”) 14 is a cross-sectional view illustrating the sixth exemplary diode embodiment.
Fig. (or “FIG”) 15 is a perspective view illustrating a seventh exemplary diode embodiment.
Fig. (or “FIG”) 16 is a plan (or top) view showing the seventh exemplary diode embodiment.
FIG. (or “FIG”) 17 is a cross-sectional view illustrating the seventh exemplary diode embodiment.
Fig. (or “FIG”) 18 is a perspective view illustrating an exemplary eighth diode aspect.
FIG. (or “FIG”) 19 is a plan (or top) view showing the eighth exemplary embodiment of the diode.
(Or “FIG”) 20 is a cross-sectional view illustrating the eighth exemplary embodiment of the diode.
(Or “FIG”) 21 is a perspective view showing an exemplary tenth diode aspect.
(Or “FIG”) 22 is a cross-sectional view illustrating the tenth exemplary embodiment of the diode.
(Or “FIG”) 23 is a perspective view illustrating an eleventh exemplary diode embodiment.
(Or “FIG”) 24 is a cross-sectional view illustrating the exemplary eleventh diode embodiment.
FIG. (or “FIG”) 25 is a cross-sectional view showing some of the composite GaN heterostructures and metal layers illustrating any geometry and texture of the outer and/or inner surface of the composite GaN heterostructure.
(Or “FIG”) 26 is a cross-sectional view of a wafer having an oxide layer such as silicon dioxide.
(Or “FIG”) 27 is a cross-sectional view of a wafer having an oxide layer etched in a lattice pattern.
(Or “FIG”) 28 is a plan (or top) view of a wafer having an oxide layer etched in a lattice pattern.
FIG. (or “FIG”) 29 is a cross-sectional view of a wafer having a buffer layer (eg, aluminum nitride or silicon nitride), a silicon dioxide layer in a lattice pattern, and gallium nitride (GaN) layers.
(Or “FIG”) 30 is a cross-sectional view of a substrate having a buffer layer and a composite GaN heterostructure (n+ GaN layer, quantum well region, and p+ GaN layer).
(Or “FIG”) 31 is a cross-sectional view of a substrate having a buffer layer and a first mesa-etched GaN heterostructure.
(Or “FIG”) 32 is a cross-sectional view of a substrate having a buffer layer and a second mesa-etched composite GaN heterostructure.
(Or “FIG”) 33 is a cross-sectional view of a substrate with a buffer layer, a mesa-etched composite GaN heterostructure, and an etched substrate for via connections.
Figure (or "FIG") 34 is a cross-sectional view of a substrate having a buffer layer, a mesa-etched composite GaN heterostructure, a metallization forming ohmic contact with the p+ GaN layer, and a metallization forming vias to be.
Figure (or "FIG") 35 shows a buffer layer, a mesa-etched composite GaN heterostructure, a metallization forming ohmic contact with the p+ GaN layer, a metallization forming vias, and lateral etched trenches. It is a cross-sectional view of the substrate.
(Or “FIG”) 36 shows a buffer layer, a mesa-etched complex GaN heterostructure, a metallization forming ohmic contact with the p+ GaN layer, a metallization forming vias, lateral etched trenches, and It is a cross-sectional view of a substrate with passivation layers (eg, silicon nitride).
Figure (or "FIG") 37 is a buffer layer, a mesa-etched complex GaN heterostructure, a metallization portion forming ohmic contact with the p+ GaN layer, a metallization portion forming vias, side etched trenches, passivation A cross-sectional view of a substrate having layers and a metallization forming a protrusion or bump structure.
Figure (or “FIG”) 38 is a cross-sectional view of a substrate having a complex GaN heterostructure (n+ GaN layer, quantum well region, and p+ GaN layer).
(Or “FIG”) 39 is a cross-sectional view of a substrate having a third mesa-etched composite GaN heterostructure.
Figure (or “FIG”) 40 is a cross-sectional view of a substrate with mesa-etched composite GaN heterostructure, an etched substrate for via connection, and lateral etched trenches.
FIG. (or “FIG”) 41 is a cross-sectional view of a substrate having a mesa-etched composite GaN heterostructure, a metallization forming ohmic contact with the n+ GaN layer and forming through vias, and lateral etched trenches.
FIG. (or "FIG") 42 is a mesa-etched complex GaN heterostructure, a metallization part forming ohmic contact with the n+ GaN layer and formed through vias, a metallization part forming ohmic contact with the p+ GaN layer , And lateral etched trenches.
Figure (or "FIG") 43 is a mesa-etched complex GaN heterostructure, a metallization part forming ohmic contact with the n+ GaN layer and formed through vias, a metallization part forming ohmic contact with the p+ GaN layer , A cross-sectional view of a substrate with lateral etched trenches, and passivation layers (eg, silicon nitride).
FIG. (or "FIG") 44 is a mesa-etched complex GaN heterostructure, a metallization part forming ohmic contact with the n+ GaN layer and formed through vias, a metallization part forming ohmic contact with the p+ GaN layer , A cross-sectional view of a substrate having lateral etched trenches, passivation layers (eg silicon nitride), and metallization forming a protrusion or bump structure.
(Or “FIG”) 45 is a cross-sectional view of a substrate having a buffer layer, a complex GaN heterostructure (n+ GaN layer, quantum well region, and p+ GaN layer), and a metallization portion forming ohmic contact with the p+ GaN layer to be.
(Or “FIG”) 46 is a cross-sectional view of a substrate having a buffer layer, a fourth mesa-etched composite GaN heterostructure, and a metallization forming ohmic contact with the p+ GaN layer.
(Or "FIG") 47 shows a buffer layer, a mesa-etched composite GaN heterostructure, a metallization portion forming ohmic contact with the p+ GaN layer, and a metallization portion forming ohmic contact with the n+ GaN layer. It is a cross-sectional view of a substrate.
Figure (or “FIG”) 48 is a cross-sectional view of a substrate having a buffer layer, a mesa-etched composite GaN heterostructure, a metallization forming ohmic contact with the n+ GaN layer, and lateral etched trenches.
Figure (or "FIG") 49 shows a buffer layer, a mesa-etched composite GaN heterostructure, a metallization part forming ohmic contact with the p+ GaN layer, a metallization part forming ohmic contact with the n+ GaN layer, and A cross-sectional view of a substrate having lateral etched trenches with metallization formed through outer vias.
Figure (or "FIG") 50 is a buffer layer, a mesa-etched composite GaN heterostructure, a metallization portion forming ohmic contact with the p+ GaN layer, a metallization portion forming ohmic contact with the n+ GaN layer, and A cross-sectional view of a substrate having lateral etched trenches having a metallization portion formed through outer vias, passivation layers (eg, silicon nitride), and a metallization portion forming a protrusion or bump structure.
(Or “FIG”) 51 is a cross-sectional view of a substrate having a buffer layer, a fifth mesa-etched composite GaN heterostructure, and a metallization forming ohmic contact with the p+ GaN layer.
Figure (or "FIG") 52 shows a substrate having a buffer layer, a mesa-etched composite GaN heterostructure, a metallization forming ohmic contact with the p+ GaN layer, and an etched GaN heterostructure for central via connection. It is a cross-sectional view.
Figure (or "FIG") 53 shows a buffer layer, a mesa-etched composite GaN heterostructure, a metallization forming ohmic contact with the p+ GaN layer, and a center via forming an ohmic contact with the n+ GaN layer. A cross-sectional view of a substrate having a metallization portion.
Figure (or "FIG") 54 shows a buffer layer, a mesa-etched composite GaN heterostructure, a metallization forming ohmic contact with the p+ GaN layer, a center via, and a metal forming ohmic contact with the n+ GaN layer. It is a cross-sectional view of a substrate having an image portion and a first passivation layer (eg, silicon nitride).
Figure (or "FIG") 55 is a buffer layer, a mesa-etched composite GaN heterostructure, a metallization forming ohmic contact with the p+ GaN layer, a center via, and a metal forming ohmic contact with the n+ GaN layer It is a cross-sectional view of a substrate having a metallization portion forming an image portion, a first passivation layer (eg, silicon nitride), and a protrusion or bump structure.
Figure (or "FIG") 56 is a buffer layer, a mesa-etched complex GaN heterostructure, a metallization forming ohmic contact with the p+ GaN layer, a center via, and a metal forming ohmic contact with the n+ GaN layer It is a cross-sectional view of a substrate having an embossed portion, a first passivation layer (eg, silicon nitride), a metallization forming a protrusion or bump structure, and lateral (or outer) etched trenches.
Fig. (or "FIG") 57 is a buffer layer, a mesa-etched composite GaN heterostructure, a metallization part forming ohmic contact with the p+ GaN layer, a center via, and a metal forming ohmic contact with the n+ GaN layer With an enhancement, a first passivation layer (e.g., silicon nitride), a metallization forming a protrusion or bump structure, lateral (or outer) etched trenches, and a second passivation layer (e.g., silicon nitride) It is a cross-sectional view of the substrate.
(Or “FIG”) 58 is a cross-sectional view of a substrate having a buffer layer, a sixth mesa-etched composite GaN heterostructure, and a metallization forming ohmic contact with the p+ GaN layer.
(Or "FIG") 59 shows a buffer layer, a mesa-etched composite GaN heterostructure, a metallization portion forming ohmic contact with the p+ GaN layer, and a metallization portion forming ohmic contact with the n+ GaN layer. It is a cross-sectional view of a substrate.
Figure (or "FIG") 60 is a buffer layer, a mesa-etched complex GaN heterostructure, a metallization portion forming ohmic contact with the p+ GaN layer, a metallization portion forming ohmic contact with the n+ GaN layer, and A cross-sectional view of a substrate having an additional metallization portion for contact with the p+ GaN layer.
Figure (or "FIG") 61 is a buffer layer, a mesa-etched complex GaN heterostructure, a metallization portion forming ohmic contact with the p+ GaN layer, a metallization portion forming ohmic contact with the n+ GaN layer, the A cross-sectional view of a substrate having an additional metallization for contact with the p+ GaN layer, and a metallization forming a protrusion or bump structure.
FIG. (or "FIG") 62 shows a buffer layer, a mesa-etched composite GaN heterostructure, a metallization part forming ohmic contact with the p+ GaN layer, a metallization part forming ohmic contact with the n+ GaN layer, the A cross-sectional view of a substrate with additional metallization for contact with the p+ GaN layer, metallization to form a protrusion or bump structure, and passivation layers (eg, silicon nitride).
Figure (or "FIG") 63 is a buffer layer, a mesa-etched composite GaN heterostructure, a metallization portion forming ohmic contact with the p+ GaN layer, a metallization portion forming ohmic contact with the n+ GaN layer, the Cross-sectional view of a substrate with additional metallization for contact with the p+ GaN layer, metallization forming a protrusion or bump structure, passivation layers (e.g. silicon nitride), and lateral (or outer) etched trenches .
(Or “FIG”) 64 is a cross-sectional view illustrating an exemplary diode wafer aspect attached to a support device.
(Or “FIG”) 65 is a cross-sectional view illustrating an exemplary diode wafer aspect attached to a support device.
(Or “FIG”) 66 is a cross-sectional view illustrating an exemplary tenth diode embodiment attached to a support device.
(Or “FIG”) 67 is a cross-sectional view illustrating an exemplary tenth diode aspect prior to back metallization attached to a support device.
(Or “FIG”) 68 is a cross-sectional view illustrating an exemplary diode embodiment attached to a support device.
(Or “FIG”) 69 is a cross-sectional view illustrating an exemplary eleventh diode embodiment attached to a support device.
(Or “FIG”) 70 is a flow chart illustrating a first exemplary aspect of a method of manufacturing a diode.
FIG. 71 (or “FIG”), divided into FIGS. 71A and 71B, is a flow chart illustrating a second exemplary embodiment of a method of manufacturing a diode.
Figure 72 (or “FIG”) 72 divided into Figures 72A and 72B is a flow chart illustrating a third exemplary embodiment of a method of manufacturing a diode.
Figure 73 (or "FIG") divided into Figures 73A and 73B is a flow chart illustrating a fourth exemplary embodiment of a method of manufacturing a diode.
(Or “FIG”) 74 is a cross-sectional view illustrating an exemplary grounded and polished diode wafer embodiment attached to a support device and suspended in a dish with an adhesive solvent.
FIG. (or “FIG”) 75 is a flow chart illustrating an exemplary embodiment of a method of manufacturing a diode suspension.
(Or “FIG”) 76 is a perspective view of an exemplary first device aspect.
(Or “FIG”) 77 is a plan (or top) view illustrating an exemplary first electrode structure of a first conductive layer for an exemplary device aspect.
(Or “FIG”) 78 is a first cross-sectional view of an exemplary first device aspect.
(Or “FIG”) 79 is a second cross-sectional view of an exemplary first device aspect.
(Or “FIG”) 80 is a perspective view of an exemplary second device aspect.
(Or “FIG”) 81 is a first cross-sectional view of an exemplary second device aspect.
(Or “FIG”) 82 is a second cross-sectional view of an exemplary second device aspect.
(Or “FIG”) 83 is a second cross-sectional view of an exemplary diode coupled to a first conductor.
(Or “FIG”) 84 is a block diagram of a first exemplary system aspect.
(Or “FIG”) 85 is a block diagram of a second exemplary system aspect.
(Or “FIG”) 86 is a flow chart illustrating an exemplary aspect of a method of manufacturing a device.
(Or “FIG”) 87 is a cross-sectional view of a third exemplary device embodiment for providing light emission from two sides.
(Or “FIG”) 88 is a cross-sectional view of a fourth exemplary device embodiment for providing light emission from two sides.
(Or “FIG”) 89 is a more detailed partial cross-sectional view of an exemplary first device aspect.
(Or “FIG”) 90 is a more detailed partial cross-sectional view of an exemplary second device aspect.
(Or “FIG”) 91 is a perspective view of a fifth exemplary device aspect.
(Or “FIG”) 92 is a cross-sectional view of a fifth exemplary device aspect.
(Or “FIG”) 93 is a perspective view of a sixth exemplary device aspect.
(Or “FIG”) 94 is a cross-sectional view of a sixth exemplary device aspect.
(Or “FIG”) 95 is a perspective view of an exemplary seventh device aspect.
(Or “FIG”) 96 is a cross-sectional view of a seventh exemplary device aspect.
(Or “FIG”) 97 is a perspective view of an eighth exemplary device aspect.
(Or “FIG”) 98 is a cross-sectional view of an eighth exemplary device aspect.
(Or “FIG”) 99 is a plan (or top) view illustrating an exemplary second electrode structure of a first conductive layer for an exemplary device aspect.
(Or “FIG”) 100 is a perspective view of third and fourth exemplary system aspects.
(Or “FIG”) 101 is a top (or top) view of an exemplary ninth and tenth device aspect.
(Or “FIG”) 102 is a cross-sectional view of an exemplary ninth device aspect.
(Or “FIG”) 103 is a cross-sectional view of a tenth exemplary device aspect.
(Or “FIG”) 104 is a perspective view illustrating an exemplary first surface geometry of an exemplary light emitting or absorbing region.
(Or “FIG”) 105 is a perspective view illustrating an exemplary second surface geometry of an exemplary light emitting or absorbing region.
(Or “FIG”) 106 is a perspective view illustrating an exemplary third surface geometry of an exemplary light emitting or absorbing region.
(Or “FIG”) 107 is a perspective view illustrating an exemplary fourth surface geometry of an exemplary light emitting or absorbing region.
(Or “FIG”) 108 is a perspective view showing a fifth exemplary surface geometry of an exemplary light emitting or absorbing region.
(Or “FIG”) 109 is a photograph of an exemplary device embodiment that is illuminated.
(Or “FIG”) 110 is a scanning electron micrograph of an exemplary second diode embodiment.
(Or “FIG”) 111 is a scanning electron micrograph of a plurality of exemplary second diode embodiments.

Detailed description of exemplary aspects

While the present invention allows for a number of different forms of aspects, in this specification certain exemplary aspects thereof will be shown and described in the drawings, the description of which should be considered as an embodiment of the principles of the invention and to illustrate the invention. It is to be understood that it is not intended to be limited to certain aspects. In this regard, before describing in detail at least one aspect consistent with the present invention, the present invention is not limited to the detailed configurations and component arrangements as described above and below in the field thereof, illustrated in the drawings, or described in the Examples. It should be understood that it does not. Methods and apparatus consistent with the present invention may be of other aspects and may be implemented and performed in a variety of ways. In addition, phrases and terms used in this specification as well as in the abstract contained below are for the purpose of description and should not be regarded as limiting.

Exemplary aspects of the invention include diodes 100, 100A, 100B, 100C, 100D, 100E, 100F, 100G, 100H, 100I, 100J, 100K, 100L that are printable and may be referred to as “diode ink” equivalently herein. A liquid and/or gel dispersion and suspension of (collectively referred to herein and in the drawings as “diode 100 to 100L”), wherein “diode ink” is a diode or other two-terminal integrated circuit such as exemplary diodes 100 to 100L. It should be understood that it means and refers to a liquid and/or gel suspension of. As described in more detail below, the diodes 100 to 100L before being included in the diode ink composition itself may function to emit light when excited (if implemented as an LED) or (if implemented as a photovoltaic diode). E) are finished semiconductor devices that can function to provide power when exposed to a light source. An exemplary method of the present invention also includes a method of manufacturing a diode ink in which a plurality of diodes 100 to 100L are dispersed and suspended in a solvent and a viscous resin or polymer mixture, as discussed in more detail below, wherein the diode 100-100L or other two-terminal integrated circuits remain dispersed and suspended at room temperature (25°C) or refrigerated conditions (5-10°C) for a considerable period of time, for example 1 month or longer, In the case, it is maintained as a more gel-like composition and a refrigeration-induced gel-like composition, and the liquid or gel suspension can be printed to produce LED-based devices and photovoltaic devices. The present technical content focuses on the two-terminal integrated circuit type diodes 100 to 100L, but those skilled in the art have equivalently replaced other types of semiconductor devices and are more broadly referred to as “semiconductor device ink”, For example, any type of transistor (field effect transistor (FET), metal oxide semiconductor field effect transistor (MOSFET), junction field effect transistor (JFET), bipolar junction transistor (BJT), etc.)), diac ), triacs, silicon controlled rectifiers, etc. can be formed without limitation.

The diode ink (or semiconductor device ink) is any of a variety of products discussed in more detail below, for example, apparatus 300, 300A, 300B 300C, 300D, 700, 700A, 700B, 720, 730, 740, 750, Signage for packaging products, such as consumer products, personal products, business products, industrial products, agricultural products, architectural products, etc., which can be deposited, printed or applied to form 760, 770 aspects or systems 350, 375, 800, 810 It can be deposited, printed or applied to any product of any kind, including a signage or indicia, or to form any product of any kind.

Degree 1 is a perspective view showing an exemplary first diode 100 embodiment. 2 is a plan view (or top view) illustrating the exemplary embodiment of the first diode 100. 3 is a cross-sectional view (through the 10-10' plane of FIG. 2) illustrating the exemplary first diode 100 embodiment. 4 is a perspective view showing an exemplary second diode 100A embodiment. 5 is a plan (or top view) view of the exemplary second diode 100A embodiment. 6 is a perspective view showing an exemplary third diode 100B embodiment. 7 is a plan (or top) view illustrating the exemplary third diode 100B embodiment. 8 is a perspective view showing an exemplary fourth diode 100C embodiment. 9 is a plan view (or top view) showing the embodiment of the fourth exemplary diode 100C. 10 is a cross-sectional view (through the 20-20' plane of FIGS. 5, 7 and 9) illustrating exemplary second, third and/or fourth diode 100A, 100B, 100C embodiments. 11 is a perspective view showing exemplary fifth and sixth diodes 100D and 100E embodiments. 12 is a plan view (or top view) showing an embodiment of the exemplary fifth and sixth diodes 100D and 100E. 13 is a cross-sectional view (through the 40-40' plane of FIG. 12) illustrating the exemplary fifth diode 100D aspect. 14 is a cross-sectional view (through the 40-40' plane of FIG. 12) illustrating the exemplary sixth diode 100E embodiment. 15 is a perspective view showing an exemplary seventh diode 100F embodiment. 16 is a plan (or top view) diagram illustrating the exemplary seventh diode 100F embodiment. 17 is a cross-sectional view (through the 42-42' plane of FIG. 16) illustrating the exemplary seventh diode 100F embodiment. 18 is a perspective view illustrating an exemplary eighth diode 100G embodiment. 19 is a plan view (or top view) showing the eighth exemplary embodiment of the diode 100G. FIG. 20 is a cross-sectional view (through the 43-43′ plane of FIG. 19) illustrating the exemplary eighth diode 100G embodiment. 21 is a perspective view illustrating an exemplary tenth diode 100K embodiment. 22 is a cross-sectional view (through the 47-47' plane of FIG. 21) illustrating the exemplary tenth diode 100K embodiment. 23 is a perspective view showing an eleventh exemplary embodiment of the diode 100L. Fig. 24 is a cross-sectional view (through the 48-48' plane of Fig. 23) illustrating the exemplary eleventh diode 100L embodiment. Cross-sectional views of embodiments of the ninth, twelfth and thirteenth diodes 100H, 100I and 100J are shown in Figs. 44, 50 and 66, respectively, as exemplary portions of exemplary manufacturing processes. 110 is a scanning electron micrograph of an exemplary second diode 100A embodiment. 111 is a scanning electron micrograph of an embodiment of a plurality of exemplary second diodes 100A.

1, 2, 4 to 9, 11, 12, 15, 16, 18, 19, 21, and 23 in perspective and plan (or top) views by omitting the example of the outer passivation layer 135, such a passivation layer 135 Provides a view of the outer base layers and structures covered by (and thus not visible). The passivation layer 135 is illustrated in cross-sectional views of FIGS. 3, 10, 13, 14, 17, 20, 22, 24, 44, 50, 57, 62, 63, and 66 to 69, and are manufactured by those skilled in the electronic art. It will be appreciated that diodes 100-100L generally comprise at least one such passivation layer 135. Additionally, in FIGS. 1 to 69, 74, 76 to 85, and 87 to 103, those skilled in the art will also recognize that the various drawings are for the purpose of description and description and are not drawn to scale.

As described in more detail below, the exemplary first to thirteenth diode aspects 100 to 100L include the shapes, materials, dopings and other compositions of substrates 105 and wafers 150, 150A that may be used; A manufacturing shape of the light emitting region of the diode; The depth and location of vias 130, 131, 132, 133, 134, 136 (eg, shallow or "blind", deep or "through", center, perimeter and perimeter); Having a first terminal 125 or both a first terminal 125 and a second terminal 127 on the first (top or front) side; The use and size of the rear (second surface) metallization portion 122 to form the first terminal 125 or the second terminal 127; The shape, size and location of the other contact metals are generally different; Other features may also differ in shape or location, as described in more detail below. Exemplary methods for fabricating the exemplary diodes 100-100L and variations in the method are also described below. One or more of the above exemplary diodes 100-100L are also available and commercially available from NthDegree Technologies Worldwide, Inc. of Tempe, Arizona, USA.

With reference to Figures 1-24, exemplary diodes 100-100L may be, for example, but not limited to, a more complex substrate, such as but not limited to, a silicon wafer or including a silicon substrate (“SOI”) 105 over an insulator or A highly-doped n+ (n plus) or p+ (p plus) substrate 105, which may be a wafer, e.g., a substrate 105 such as a highly-doped n+ or p+ silicon substrate, or nitride on a sapphire 106 wafer It is formed using a gallium (GaN) substrate 105, 150A (illustrated in FIGS. 11 to 20). As discussed in more detail below, other types of substrates (and/or wafers forming or having substrates), including, but not limited to, Ga, GaAs, GaN, SiC, SiO ₂ , sapphire, organic semiconductors, etc. ) 105 can be used equally. Thus, reference to the substrate 105 or 105A refers to n+ or p+ silicon, n+ or p+ GaN, for example, n+ or p+ silicon substrate 150 formed using a silicon wafer or n+ or p+ GaN 105A fabricated on a sapphire wafer (Fig. 11-20 and 38-50) are to be understood as broadly encompassing any type of substrate. In the aspects illustrated in Figures 21-24, substrates 105, 105A (and buffer layer 145) will be ignored after substrate removal during fabrication (leaving the composite GaN heterostructure in place, as discussed in more detail below). Remaining to a degree or not, for example, but not limited to, substrate 105 or 105A can be used. When implemented using silicon, the substrate 105 typically has a <111> or <110> crystal structure or orientation, but other crystal structures may be equally used. An optional buffer layer 145 is typically fabricated over a silicon substrate 105 such as aluminum nitride or silicon nitride to facilitate subsequent fabrication of GaN layers having different lattice constants.

GaN layers are fabricated over the buffer layer 145, for example via epitaxial growth, to form a complex GaN heterostructure, generally exemplified by n+ GaN layer 110, quantum well region 185 and p+ GaN layer 115. In other aspects, a composite GaN heterostructure (n+ GaN layer 110, quantum well region 185 and p+ GaN layer 115) is placed over GaN substrate 105 (or sapphire 106 as illustrated in FIGS. 15-17 as more specific options). The buffer layer 145 may or may not be used as in the case of manufacturing) directly on the wafer 105A. To form the light emitting (or absorbing) region 140, there may be multiple p+, n+, other GaN layers with a wide range of dopants and possibly non-GaN layers with any of various dopants, potentially by multiple quantum wells. And the n+ GaN layer 110, quantum well region 185 and p+ GaN layer 115 are examples only, and provide a generalized or simplified description of a complex GaN heterostructure or any other semiconductor structure forming one or more light-emitting (or absorbing) regions 140. Will be understood by those skilled in the electronics field. In addition, the positions of the n+ GaN layer 110 and p+ GaN layer 115 may be the same as in the use of p+ silicon or GaN substrate 105 or may be reversed equally, to form one or more light emitting (or absorbing) regions 140 Other compositions and materials (many of which are described below) may be used, and those skilled in the electronics will appreciate that all such variations are within the scope of the present disclosure. Although described for GaN as a series of exemplary materials having different compounds, dopants and structures for forming the light-emitting or light-absorbing region 140, it is noted that any other suitable semiconductor material can equally be used and is within the scope of the art. Those skilled in the art will recognize. In addition, any reference to GaN should not be construed as “pure” GaN, and may be used to form light-emitting or light-absorbing regions 140, including any intermediate non-GaN layers, and/or light-emitting or light-absorbing regions 140. It will be understood by those skilled in the art that all of the various other compounds, dopants and layers that are allowed to be deposited are meant and included.

In addition, a number of various diodes (diodes 100 to 100L) that can or use silicon and GaN as the selected semiconductor are discussed, but note that other inorganic or organic semiconductors can be used equally and are within the scope of the present disclosure. Should be. Examples of inorganic semiconductors include silicon, germanium, and mixtures thereof; Titanium dioxide, silicon dioxide, zinc oxide, indium-tin oxide, antimony-tin oxide, and mixtures thereof; Compounds of at least one divalent metal (zinc, cadmium, mercury and lead) and at least one divalent non-metal (oxygen, sulfur, selenium and tellurium), for example zinc oxide, cadmium selenide, cadmium sulfide, selenium Mercury and a mixture thereof, II-VI semiconductor; Compounds of at least one trivalent metal (aluminum, gallium, indium and thallium) and at least one trivalent non-metal (nitrogen, phosphorus, arsenic and antimony), such as gallium arsenide, indium phosphide, and mixtures thereof III- V semiconductor; And Group IV semiconductors including hydrogenated silicon, carbon, germanium and alpha-tin and combinations thereof.

In addition to the GaN light-emitting/absorption region 140 (e.g., a GaN heterostructure deposited on a substrate 105 such as n+ or p+ silicon or a GaN (105) 150 on a silicon wafer or a sapphire (106) wafer 150A), the plurality of 100 to 100L of diodes are a semiconductor device, material or compound of any type, for example, silicon, gallium arsenide (GaAs), gallium nitride (GaN), or GaP, InAlGaP, InAlGaP, AlInGaAs, InGaNAs, AlInGASb. It may be composed of any inorganic or organic semiconductor material, including limitedly. Further, in addition, the wafer used to fabricate the two-terminal integrated circuit may be of any type or type, such as, for example, but not limited to, silicon, GaAs, GaN, sapphire, silicon carbide.

Accordingly, the scope of the present disclosure is to include, but is not limited to, any LED or photovoltaic semiconductor made using any kind of semiconductor substrate known or known in the art. It is to be understood to include epitaxial or compound semiconductors.

In various exemplary embodiments, the n+ or p+ substrate 105 conducts a current flowing to the n+ GaN layer 110 as illustrated. It should be noted again that any of the exemplified various layers of the light-emitting or light-absorbing region 140 can be equally reversed, or have a different order, such as the positions of the exemplified n+ and p+ GaN layers 110, 115 being reversed. The current flow path also passes through the metal layer forming one or more vias 130 (this provides an electrical bypass of a very thin (about 25Å) buffer layer 145 between the n+ or p+ substrate 105 and the n+ GaN layer 110. Can also be used). Additional types of vias 131-134 and 136 that provide other connections to the conductive layers are described below. One or more metal layers 120, exemplified as two (or more) individually deposited metal layers 120A and 120B (which may also be used to form vias 130, 131, 132, 133, 134, 136) are used to form the p+ Provides ohmic contact with the GaN layer 115, a second additional metal layer 120B, such as die metal, is used to form a "bump" or protruding structure, and the metal layers 120A, 120B are the first electricity for various diodes 100-100L. A terminal (or contact) 125 or a second terminal 127 is formed. Additional metal layers may also be used as discussed below. For the exemplary diode 100, 100A, 100B, 100C aspects shown, the electrical terminal 125 is the above-mentioned during manufacturing for subsequent power (voltage) supply (for LED applications) or acceptance (for solar applications). The n+ or p+ substrate 105 may be the only ohm metal terminal formed over the diodes 100, 100A, 100B, 100C, and provides a second electrical terminal for the diodes 100, 100A, 100B, 100C for power supply or reception. Used. The electrical terminal 125 and the n+ or p+ substrate 105 are on opposite sides, which are the top (first side) and the bottom (or rear, second side) of diodes 100, 100A, 100B, and 100C, respectively, and not on the same side. It should be noted. As an option for these diodes 100, 100A, 100B, 100C aspects, and as shown in other exemplary diode aspects, on the second, back side of the diode (e.g., diodes 100D, 100F, 100G, 100J). Metal layer 122 is used to form an optional second ohmic metal terminal 127. As an option for the diode 100K embodiment illustrated in FIGS. 21 and 22, a metal layer 122 is used to form a second, first ohmic metal terminal 125 on the back, and then flip or flip the diode 100K for use. As another option illustrated in FIGS. 23 and 24 for the exemplary diode 100L, both the first terminal 125 and the second terminal 127 are on the same first (top) side of the diode 100L. Silicon nitride passivation 135 (or any other equivalent passivation) is used in particular for electrical insulation, environmental stability and possibly further structural integrity. Although not illustrated separately, as discussed below, in the manufacturing process, a plurality of trenches 155 are formed along the sides of the diodes 100 to 100L, which separate the diodes 100 to 100L from each other on the wafers 150 and 150A (singulate). ) And is also used to separate the diodes 100-100L from the rest of the wafers 150 and 150A.

1 to 24 also show various shapes and shape factors of one or more light emitting (or light absorbing) regions 140 exemplified as GaN heterostructures (n+ GaN layer 110, quantum well region 185, and p+ GaN layer 115), substrate 105 and And/or some of the various shapes and form factors of the complex GaN heterostructure. Also, as illustrated, exemplary diodes 100-100L are nearly hexagonal in the xy plane (as discussed in more detail below, concave or convex curved or arcuate) to provide greater device density for silicon wafers. Other diode shapes and shapes such as having sides 121 (or having both to form a more complex S shape), square, circle, oval, oval, rectangular, triangular, octagonal, annular, etc. are equivalent and claimed. It is considered to be within the scope of the invention. Further, as illustrated in the exemplary embodiments above, the hexagonal sides 121 may be convex (Figs. 1, 2, 4, 5) or concave (Figs. 6 to 9) slightly curved or arcuate, so that the It is also possible to avoid sticking or sticking of the diodes 100 to 100L to each other when suspended in a liquid. Additionally, for fabrication of devices 300, 300A, 300B, 300C, 300D, 700, 700A, 700B, 720, 730, 740, 750, 760, 770, individual dies (individual diodes 100 to 100L) may have their sides or Diodes 100 to 100L of relatively small thickness are used so as not to stand on the edges 121. In addition, as exemplified in the above exemplary embodiments, the hexagonal side surfaces 121 are slightly curved or arcuately convex at the center or center of each side 121 and concave at the periphery/side to be more complex S-shaped Overlapping double "S" shape) to obtain relatively sharp or protruding vertices 114 (Figs. 11 to 24), whereby diodes 100 to 100L stick together or stick together when released from the wafer and suspended in a liquid. Can be avoided, and they can repel each other when rolling or moving against another diode. Variations from the planar surface topology for diodes 100-100L (ie, non-planar surface topology) also help prevent dies from sticking together when suspended in a liquid or gel. Over and over again, in the case of manufacturing devices 300, 300A, 300B, 300C, 300D, 700, 700A, 700B, 720, 730, 740, 750, 760, 770 (compared to lateral dimensions (diameter or width/length)) Diodes 100-100L (or light emitting regions of diodes 100K and 100L) of relatively small thickness or height tend to prevent individual dies (individual diodes 100-100L) from standing on their sides or edges 121 .

Various shapes and shape factors of the light emission (or light absorption) region 140 (n+ GaN layer 110, quantum well region 185, and p+ GaN layer 115) are also illustrated, and FIGS. 1 to 3 show substantially annular or disk type light emission (or absorption). ) Region 140 (n+ GaN layer 110, quantum well region 185, and p+ GaN layer 115), and FIGS. 4 and 5 are substantially torus-type (or toroidal) emission (or absorption) region 140 ( n+ GaN layer 110, quantum well region 185 and p+ GaN layer 115), a second metal layer 120B extending into the center of the toroid (also potentially providing a reflective surface). In Figures 6 and 7, the light-emitting (or light absorption) region 140 (n+ GaN layer 110, quantum well region 185 and p+ GaN layer 115) has a substantially annular inner (lateral) surface and a substantially leaf-shaped outer (lateral) surface. On the other hand, in FIGS. 8 and 9, the light emission (or light absorption) region 140 (n+ GaN layer 110, quantum well region 185 and p+ GaN layer 115) has a substantially annular inner (lateral) surface, but the outer (lateral) surface is substantially It is radial or star-shaped. 11 to 24, one or more light emitting (or absorbing) regions 140 have a substantially hexagonal (lateral) surface (which may or may not extend outside the die) and is (at least partially) substantially annular. Alternatively, it may have an oval-shaped inner (lateral) surface. In other exemplary aspects not separately shown, there may be multiple light-emitting (or light-absorbing) regions 140 that may be continuous or spaced apart on the die. These various settings of one or more light-emitting (or light-absorbing) regions 140 (n+ GaN layer 110, quantum well region 185 and p+ GaN layer 115) with an annular inner surface (for LED applications) and (for LED applications) For power generation applications) it is implemented to increase light absorption. As discussed in more detail below, the inner and/or outer surface of any of the n+ GaN layers 110 or p+ GaN layers 115 may have any of a variety of surface textures or surface geometries, such as but not limited to.

In an exemplary embodiment, the first terminal 125 (or the second terminal 127 of the diode 100K) is comprised of one or more metal layers 120A, 120B and has a bump or protruding structure, (n+ or p+ silicon by the first conductor 310 or 310A). After electrical contact is made to the substrate 105 (or the second terminal formed by the metal layer 122, or the second terminal formed by the metal layer 128), a significant portion of the diodes 100-100L is covered with one or more insulating or dielectric layers. And at the same time provide sufficient structure for contact with the electrical terminal 125 by one or more other conductive layers, such as the second conductor 320 discussed below. In addition, in addition to the curvature of the side surfaces 121 and the thickness (height) of the side surfaces 121, the bump or protrusion structure of the terminal 125 is also potentially manufactured devices 300, 300A, 300B, 300C, 300D, 700, 700A, 700B. , At 720, 730, 740, 750, 760, 770, rotation of the diode 100-100L in the diode ink and its subsequent orientation (top up (forward bias) or bottom up (reverse bias)). It can be one of many factors that influence it.

11 to 22, exemplary diodes 100D, 100E, 100F, 100G, 100K show some additional optional features in various combinations. As shown, the metal layer 120B forming the bump or protruding structure, which is typically made of die metal, is not substantially circular in circumference but substantially elliptical (or ovoid) (substantially hexagonal in FIG. 21), but Other shape and form factors are also within the scope of this disclosure. In addition, the metal layer 120B forming the bump or protruding structure can be used in the manufacture of devices 300, 300A, 300B, 300C, 300D, 700, 700A, 700B, 720, 730, 740, 750, 760, 770. Objectives, for example, to facilitate the formation of electrical contact with the second conductor 320 and to facilitate the flow of insulating dielectric 315 (and/or first conductor 310) from terminal 125 (metal layer 120B or metal 122) It may have two or more rectangular extensions 124 to provide a. The elliptical shape factor may allow additional light emission (or light absorption) in the light emission (or light absorption) region 140 along the long axis surfaces of the elliptical metal layer 120B forming the bump or protrusion structure. The metal layer 120A forming ohmic contact with the p+ GaN layer 115, which may be deposited as a multilayer in multiple steps, is also shown as curved metal contact extensions 126 in FIGS. 11, 12, 15, 16, 18 and 19. With rectangular extensions over the p+ GaN layer 115 for selected aspects, this facilitates current conduction to the p+ GaN layer 115 while simultaneously allowing a potential for light emission or absorption by the light emitting (or absorbing) region 140. (Also don't block excessively). A myriad of other shapes of the metal contact extensions 126, such as a lattice pattern, other curved shapes, and the like, can equally be used. Although not illustrated separately, these rectangular metal contact extensions may also be used in other aspects illustrated in FIGS. 1 to 10 and 21 to 24. As described in more detail below, additional seed layers or reflective metal layers may also be used.

In the fabricated diodes 100, 100A, 100B, 100C, the above-described peripheral (i.e., off-center) relatively shallow or "blind" that extends through the buffer layer 145 into the substrate 105 but does not extend relatively deeply or through the substrate 105. "In addition to via 130, additional types of via structures 131, 132, 133, 134, 136 are illustrated in FIGS. 11 to 22. As illustrated in Figure 13 (and Figures 44, 66), a central (or centrally located) relatively deep "through" via 131 extends completely through the substrate 105, creating an ohmic contact with the n+ GaN layer 110. Used to conduct current (or to create other electrical contacts) between the and second (upper) side metal layer 122 and the n+ GaN layer 110. As illustrated in FIG. 22, the central (or centrally located) relatively less deep or shallower “through” via 136 extends completely through the composite GaN heterostructures 115, 185, 110, and the n+ GaN layer 110 It is used to create an ohmic contact of and to conduct current (or to create other electrical contacts) between the second (double) side metal layer 122 and the n+ GaN layer 110. As illustrated in FIG. 14, a central (or centrally located) relatively shallow or blind via 132, also referred to as a "blind" via 132, extends through the buffer layer 145 into the substrate 105 and in ohmic contact with the n+ GaN layer 110. And to conduct current (or to create other electrical contacts) between the n+ GaN layer 110 and the substrate 105. 15-17 and 49-50, the outer relatively deep or through via 133 is the second, rear side of the diode 100F along the sides 121 (although covered by the passivation layer 135) from the n+ GaN layer 110. (This includes the second (dorsal) side metal layer 122 also around the sides of the substrate 105 entirely in this embodiment), creating an ohmic contact with the n+ GaN layer 110, and the second (back) side metal It is used to conduct current (or create other electrical contact) between layer 122 and n+ GaN layer 110. 18-20, the surrounding relatively deep through-via 134 extends completely through the substrate 105, creating ohmic contact with the n+ GaN layer 110, and with the second (back) side metal layer 122 It is used to conduct current (or create other electrical contacts) between the n+ GaN layers 110. In aspects not using the second (back) side metal layer 122, these through via structures 131, 133, 134, 136 are conductor 310A (devices 300, 300A, 300B, 300C, 300D, 720, 730, 760), and to conduct current between conductor 310A and the n+ GaN layer 110 (or to create other electrical contacts). These through-via structures 131, 133, 134, 136 are subjected to back grinding and polishing or singulation of diodes through laser lift-off (discussed below with reference to Figs. 64 and 65), followed by diode 110D, It may be exposed on the second, back side of 100F, 100G, 100K, and may remain exposed (as shown in Figure 66), or may be covered by a second (back) side metal layer 122 (also said metal layer Can form electrical contact with).

Through-via structures 131, 133, 134, 136 are significantly narrower than conventional vias known in the art. The through-via structures 131, 133, and 134 have a depth (height extending through the substrate 105) of about 7 to 9 μm, and the through-via structure 136 has a depth (height extending through the composite GaN heterostructure) of about 2 To 4 μm, and about 3 to 5 μm in width compared to the width of 30 μm or more of a conventional via.

Any second (back) side metal layer 122 forming second terminal or contact 127 or first terminal 125 (diode 100K) is also illustrated in FIGS. 11 to 13, 17, 18, 20 to 22, 66, and 68 Has been. This second terminal or contact 127 facilitates current conduction to the n+ GaN layer 110 through, for example, but not limited to, various through-via structures 131, 133, 134, 136, and/or electrical connection with conductor 310A. It can be used to facilitate forming a contact.

21-22, the exemplary diode 100K illustrates some additional optional features. Figure 22 illustrates in cross section fabrication layers for how the exemplary diode 100K is fabricated; Exemplary diode 100K is then flipped or flipped to be upright as illustrated in FIG. Emits light through 110 (in LED aspects). Thus, the first terminal 125 is formed from the second (back) side metal 122, and the orientations of the n+ GaN layer 110 and p+ GaN layer 115 are similarly reversed (compared to other aspects 100 to 100J) and (n+ GaN layer 110 is now the top layer in FIG. 21), the second terminal 127 is formed from one or more metal layers 120B. Substrates 105, 105A or buffer layer 145 are illustrated or not illustrated very little, and are substantially removed in the manufacturing process, and complex GaN heterostructures (p+ GaN layer 115, quantum well region 185, and p+ GaN layer 115), and Potentially some additional GaN layers or substrates are also left in place. The sides or edges 121 are used to prevent individual diodes 100K from standing on the sides or edges 121 of the devices 300, 300A, 300B, 300C, 300D, 720, 730, 760 during manufacturing. , In exemplary embodiments as 10 μm or less, or more particularly about 2 to 8 μm, or more particularly about 2 to 6 μm, or more particularly about 2 to 4 μm, or more particularly 2.5 to 3.5 μm, or about 3 μm. , Relatively thinner (or less thick) than the other illustrated aspects.

The second (back) side metal 122 forming the first terminal 125 is relatively thick, in exemplary embodiments, from about 3 to 6 μm, or from 4.5 to about 5.5 μm, or about 5 μm, so that the height of the diode 100K is about 11 To 15 μm, or 12 to 14 μm, or about 13 μm, and allows deposition of dielectric layer 315 and contact with the second conductor 320, including, but not limited to, about 14 μm long and about 6 short axis. It has an oval shape as with ㎛. The second (back) side metal 122 forming the first terminal 125 also does not extend across the entire back side for ease of back side alignment and diode 100K singulation. The second terminal 127 formed from the metal layer(s) 120B is also generally about 3 to 6 μm thick, or 4.5 to about 5.5 μm thick, or about 5 μm thick, in exemplary embodiments. In addition, as illustrated, insulating (passivation) layer 135A is also used to electrically insulate or isolate metal layer 120B from via 136 and, as illustrated by 135A, from deposition of passivation (nitride) layer 135 around the periphery. It can be deposited as a separate step. In exemplary embodiments, the width of the diode 100K (not vertex to vertex, but generally face to face across a hexagonal shape) is, for example, but not limited to, about 10 to 50 μm, or more particularly about 20 to 30 Μm, or more particularly about 22 to 28 μm, or more particularly about 25 to 27 μm, or more particularly about 25.5 to 26.5 μm, or more particularly about 26 μm. Although not illustrated separately, a metal layer 120A may also be included in manufacturing the second terminal 127. In the diode 100K fabrication process (and other exemplary diode 100-100L aspects), the top GaN layer (as illustrated in Figure 25, illustrated as a p+ GaN layer 115, but may be other types of GaN layers) is an ohmic contact. To facilitate the formation of (also potentially providing light reflection for the n+ GaN layer 110), a very thin optically reflective metal layer (illustrated as silver layer 103 in FIG. 25), and/or nickel about 100Å thick. It may be metallized and alloyed with an optically transmissive metal layer such as gold or nickel-gold-nickel (not illustrated separately), some of which are removed by other GaN layers, for example during GaN mesa formation.

23 and 24, an eleventh exemplary diode 100L embodiment is other illustrated diodes 100 to 100K in that it has both a first terminal 125 and a second terminal 127 on the same (top or top) side of diode 100L. It is different from all aspects. When used in the exemplary device 700, 700A, 700B, 740, 750, 770 aspects, the light is substantially optically transparent through the (bottom) n+ GaN layer 110, typically as illustrated in Figures 80-82. Through the phosphorus substrate 305A, it will emit light (for LED aspects) or absorb (for solar power aspects). As a result of having both a first terminal 125 and a second terminal 127 on the same (top or top) side of diode 100L, this exemplary diode 100L does not use any second (double) side metal 122 and is generally None of the various via structures discussed are required. Substrates 105, 105A or buffer layer 145 are illustrated or not illustrated very little, and are also substantially removed in the manufacturing process, and complex GaN heterostructures (p+ GaN layer 115, quantum well region 185, and p+ GaN layer 115), and potential As a result, some additional GaN is also left in place. The sides or edges 121 are also relatively thinner (or less) than other illustrated embodiments, at about 2 to 4 μm, or more particularly 2.5 to 3.5 μm, or about 3 μm, in exemplary embodiments. Thick), and also prevents individual diodes 100L from standing on their sides or edges 121 during device 700, 700A, 700B, 740, 750, 770 manufacturing. Although not illustrated separately, in the diode 100L fabrication process (and other exemplary diode 100-100K aspects), the upper GaN layer (as illustrated in FIG. 25, exemplified as a p+ GaN layer 115, but other types of GaN layers may be Is a very thin optically reflective metal layer (illustrated as silver layer 103 in FIG. 25) to facilitate formation of ohmic contacts (also potentially providing light reflection for the n+ GaN layer 110), and/or It may also be metallized and alloyed with an optically transmissive metal layer such as nickel-gold or nickel-gold-nickel (not illustrated separately) about 100Å thick, some of which may be incorporated into other GaN layers, for example during GaN mesa formation. Removed by

As illustrated in Figures 23 and 24, GaN mesa (p+ GaN layer 115 and quantum well layer 185) typically provides room over the top surface of n+ GaN layer 110 for metal contacts 128 (three are illustrated). To do this, it is atypically shaped like a triangle with flat vertices (e.g. formed by providing a plurality (three) carve-out portions from a hexagonal or annular shape), which is a diode Second terminals 127 are formed on the upper or upper surface of 100L. The GaN mesa, in various exemplary embodiments, generally has a height of about 0.5 to 1.5 μm, or more particularly 0.8 to 1.2 μm, or more particularly 0.9 to 1.1 μm, or more particularly about 1.0 μm. The metal contact portion 128 is approximately 0.75 to 1.5 µm in height, or more particularly about 0.9 to 1.1 µm in height, or more particularly about 1.0 µm in height, via metal, for example, titanium of about 100Å, aluminum of 500 nm, 500 nm. It may be formed from nickel, and gold of 100 nm, and may be about 2.5 to 3.5 μm in width (measured radially). The first terminal 125 formed from the metal layers 120A and 120B, in various exemplary aspects, allows deposition of the first conductor 310A at the contact with the metal contact 128, and the first terminal 125 and the second conductor 320 (FIGS. 82) to allow deposition of the dielectric layer 315 after contacting, similar to the GaN mesas, but molded smaller, generally about 4 to 8 μm, or more particularly 5 to 7 μm, or more particularly about It has a height of 6 μm. In this exemplary embodiment, the first terminal 125 formed from the metal layers 120A and 120B is also passivated 135, which not only provides insulation and protection from contact of the first conductor 310, but also the first terminal 125 It can act to help the structural integrity of the printer, and helps to protect it from various forces applied in the printing process. In exemplary embodiments, the width of the diode 100L (not vertex to vertex, but generally face-to-face across a hexagonal shape) is about 10 to 50 μm, or more particularly about 20 to 30 μm, or more particularly about 22 to 28 μm, or more particularly about 25 to 27 μm, or more particularly about 25.5 to 26.5 μm, or more particularly about 26 μm. The height of the diode 100L, in exemplary embodiments, is generally about 8 to 15 μm, or more particularly 9 to 12 μm, or more particularly about 10.5 to 11.5 μm.

More generally, the size of two-terminal devices can be larger, such as about 10 to 75 μm in diameter (also measured in width or length, face-to-face depending on shape), and about 5 to 25 μm in height. It should be noted.

25 is a cross-sectional view through a portion of a complex GaN heterostructure (or GaN mesa) (n+ GaN layer 110, quantum well region 185, p+ GaN layer 115) and metal layers 120A and 120B, and the outside of the complex GaN heterostructure and /Or any geometry and texture of the inner surfaces, for example the surfaces of the p+ GaN layer 115 or n+ GaN layer 110 or additional silver or mirror layer 103. Any of the various features illustrated in FIG. 25 may be applied as an option for any of the various exemplary diodes 100-100L. 1 to 24, the outer and/or inner surfaces of the composite GaN heterostructure may be relatively smooth. As illustrated in FIG. 25, any of the various exterior and/or interior surfaces of the composite GaN heterostructure can be fabricated to have any of a variety of textures, geometries, mirrors, reflectors, or other surface treatments. For example, but not limited to, the outer (top or top) surface (illustrated as n+ GaN layer 110) of the complex GaN heterostructure reduces internal reflection and reduces light extraction, for example within diode 100-100L aspects. To increase, it can be etched to provide a surface roughness 112 (illustrated as a jagged cone or pyramidal structure). Additionally, the outer surfaces of the composite GaN heterostructure (eg, the surfaces of the p+ GaN layer 115 or n+ GaN layer 110) can also be, for example, but not limited to, dome or lens shape 116; Toroidal, honeycomb, or waffle shape 118; It can be masked and etched or fabricated to have various geometrical structures such as stripe 113, or other geometries (eg, hexagonal, triangular, etc.) 117. In addition, the side surfaces 121 may also include various mirrors or reflectors 109 such as a dielectric reflector (eg, SiO ₂ /Si ₃ N ₄ ) or a metallic reflector. A wide range of surface treatments and reflectors are described, for example, in U.S. Patent No. 7,704,763 issued on April 27, 2010 (Fujii et al.), U.S. Patent No. 7,897,420 issued March 1, 2011 (Chu et al.), 2010. US Patent Application Publication No. 2010/0295014 A1 (Kang et al.), published on November 25, 2010, and US Patent No. 7,825,425 (Shum), issued on November 2, 2010, all of which are described herein Is cited by reference. Additional surface textures and geometries are illustrated in FIGS. 104-108.

Continuing with reference to Figure 25, the inner surfaces of the composite GaN heterostructure (or more generally diodes 100 to 100L) can also be fabricated to have any of a variety of textures, geometries, mirrors, reflectors, or other surface treatments. have. As illustrated, for example and without limitation, the reflective layer 103 provides light reflection towards the exposed surface of the diodes 100 to 100L by using a silver layer applied in the manufacturing process (prior to the manufacture of metal layers 102A, 102B). And can be used to increase light extraction, the silver layer can be smooth (111) or have a textured surface (107). Also, for example and without limitation, the inner surface of the composite GaN heterostructure may be smooth or may have a textured surface by using an additional layer 108, which may be, for example, a diffusible n-type InGaN material. Additionally, any of these various arbitrary surface geometries and textures may be used alone or in combination with each other, such as a double-diffusing structure having both the outer surface texture 112 and the inner surface texture 107 and/or the reflective layer 103. Can be used. Regardless of any surface treatment that may or may not be used, various arbitrary layers may also be used for additional reasons to provide better ohmic contact using an n-type InGaN material for layer 108.

Diodes 100-100L generally have all dimensions less than about 450 μm, more specifically all dimensions less than about 200 μm, more specifically all dimensions less than about 100 μm, and more specifically all dimensions less than 50 μm . In the exemplary embodiments shown, the diodes 100 to 100L are generally about 10 to 50 μm wide, or more specifically about 20 to 30 μm wide, and about 5 to 25 μm high, or more particularly 5 to 15 μm high. , Or diameter (measured face-to-face rather than end-to-end) of about 25 to 28 μm and height of 10 to 15 μm. In exemplary embodiments, the height of the diodes 100-100L excluding the metal layer 120B or 122 forming the bump or protrusion structure (i.e., the height of the sides 121 comprising the GaN heterostructure) is, according to the above embodiment, about 2 To 15 μm, or more specifically about 2 to 4 μm, or more specifically 7 to 12 μm, or more specifically 8 to 11 μm, or more specifically 9 to 10 μm, or more specifically Although less than 10 to 30 μm, the height of the metal layer 120B forming the bump or protruding structure is generally about 3 to 7 μm. Since the dimensions of the diodes are processed to be within the tolerances selected during the device manufacturing process, the dimensions of the diodes can be, for example, but not limited to, an optical microscope (which may also include software for measurement), a scanning electron microscope. (SEM), or Fraunhofer diffraction to measure the particle size (and particle size distribution) while the particles are present in a dilute solution, which can be, for example, diode ink or any other liquid or gel, using Horiba LA-920. (Fraunhofer diffraction) and light scattering can be used to measure. Any size or other measurement of diodes 100-100L should be taken as the average (e.g., centroid and/or median) of a plurality of diodes 100-100L, and will vary considerably depending on the mode selected (e.g., diode 110-100J, or 100K, or 100L will generally all have different individual values).

Diodes 100-100L can be fabricated using any semiconductor fabrication techniques currently known or to be developed in the future. Figures 26-66 illustrate a number of exemplary manufacturing methods of exemplary diodes 100-100L, and show several additional exemplary diodes 100H, 100I and 100J (cross-section). Those skilled in the art are aware that many of the various steps of manufacturing the diode 100 to 100L may occur in any of various orders, omitted or included in other orders, and create a number of diode structures, as well as those illustrated. You will recognize that you can. For example, Figures 38-44 illustrate the fabrication of diode 100H including both center and peripheral through (or dip) vias 131 and 134, respectively, in the presence or absence of any second (dorsal) side metal layer 122. While illustrating the combination of features of 100D and 100G, FIGS.45-50 illustrate the fabrication of diode 100I including an outer via 133 in the presence or absence of any second (dorsal) side metal layer 122, which Or it can be combined with other illustrated fabrication steps to include peripheral through vias 131 and 134, for example to form a diode 100F.

26, 27 and 29 to 37 are cross-sectional views illustrating an exemplary method of manufacturing diodes 100, 100A, 100B, and 100C according to the teachings of the present invention, and FIGS. 26 to 29 illustrate manufacturing at the wafer level 150, and 30 to 37 illustrate the manufacturing of the diodes 100, 100A, 100B, and 100C levels. Various illustrated fabrication steps can also be used to form other diodes 100D-100L, and FIGS. 26-32 can be applied to any of diodes 100-100L depending on the substrate 105, 105A selected. 26 and 27 are cross-sectional views of a wafer 150 (eg, a silicon wafer) having a silicon dioxide (or “oxide”) layer 190. Fig. 28 is a plan (or top) view of a silicon wafer 150 having a silicon dioxide layer 190 etched in a lattice pattern. The oxide layer 190 (typically about 0.1 μm thick) is deposited or grown on the wafer 150, as shown in FIG. 26. As illustrated in FIG. 27, through appropriate or standard mask and/or photoresist layers and etching as known in the art, portions of the oxide layer 190 are removed, and as illustrated in FIG. 190 remains a grid pattern (also referred to as "street").

29 shows a buffer layer 145, a silicon dioxide (or "oxide") layer 190, and GaN layers (in an exemplary embodiment, typically grown or deposited epitaxially to a thickness of about 1.25 to 2.50 μm, but with a smaller or greater thickness. Is a cross-sectional view of a wafer 150 (e.g., a silicon wafer) having a wafer 150 (e.g., a silicon wafer) having, also within the scope of the present disclosure, polycrystalline GaN 195 over the oxide 190, and n+ GaN forming a complex GaN heterostructure as mentioned above. Layer 110, quantum well region 185 and p+ GaN layer 115 are illustrated. As indicated above, a buffer layer 145 (eg, aluminum nitride or silicon nitride and generally about 25Å thick) is deposited over the silicon wafer 150 to facilitate subsequent GaN deposition. Polycrystalline GaN 195 grown or deposited on the oxide 190 is stressed and/or strained in the complex GaN heterostructure (n+ GaN layer 110, quantum well region 185 and p+ GaN layer 115) (e.g., thermal Due to mismatch), and usually has a single crystal structure. Other equivalent methods within the scope of the present invention for providing such stress and/or strain reduction include, for example, roughening the surface of the silicon wafer 150 and/or the buffer layer 145 in selected areas so that the corresponding GaN regions are It includes, but is not limited to, not having a single crystal, or etching trenches in the silicon wafer 150 so that there are no continuous GaN crystals throughout the wafer 150. These street forming and stress reduction fabrication steps may be omitted if other exemplary fabrication methods are used, for example, other substrates such as GaN (substrate 105) 150A on a sapphire wafer. GaN deposition or growth to form composite GaN heterostructures can be provided through any selected process known in the art, known in the art, and/or may be owned by the device manufacturer. In an exemplary embodiment, a composite GaN heterostructure composed of an n+ GaN layer 110, a quantum well region 185 and a p+ GaN layer 115 is, for example, but not limited to, Blue Photonics, Inc. of Walnut, CA. Inc.) and other vendors.

30 is a cross-sectional view of a substrate 105 having a buffer layer 145 and a composite GaN heterostructure (n+ GaN layer 110, quantum well region 185 and p+ GaN layer 115), according to the teachings of the present invention, illustrating the fabrication of a single diode 100-100L. To illustrate, a much smaller portion of the wafer 150 (eg region 191 of FIG. 29) is illustrated. Through suitable or standard mask and/or photoresist layers and etching as known in the art, a composite GaN heterostructure (n+ GaN layer 110, quantum well region 185 and p+ GaN layer 115) is shown in Figures 31 and 32. Etched to form a GaN mesa structure 187 as illustrated, and FIG. 32 illustrates a GaN mesa structure 187A having relatively more angled faces, which can potentially facilitate light generation and/or absorption. Other GaN mesa structures 187 can also be implemented, such as partially or substantially toroidal GaN mesa structures 187, as illustrated in FIGS. 10, 13, 14, 17, 20, 22, 39-44, and 66. After the GaN mesa etching, also through suitable or standard mask and/or photoresist layers and etching as known in the art, performing a (shallow or blind) via etching, as illustrated in FIG. A relatively shallow trench 186 is fabricated in the silicon substrate 105 through the layers and buffer layer 145.

Metal contact 120A to p+ GaN layer 115, as illustrated in FIG. 34, by then depositing metallization layers through appropriate or standard mask and/or photoresist layers and etching as also known in the art. And form via 130. In exemplary embodiments, several metal layers are deposited, a first or a first comprising two metal layers of gold (about 50 to 200 each), typically after nickel, to form an ohmic contact to the p+ GaN layer 115. The initial layer was deposited and then annealed at about 450 to 500° C. under an oxidizing atmosphere of about 20% oxygen and 80% nitrogen, raising the nickel to the top with the nickel oxide layer, and relatively good ohmic contact with the p+ GaN layer 115. To form a metal layer (as part of 120A). As another example, in the diode 100L fabrication process (and other exemplary diode 100-100K aspects), the top GaN layer (as illustrated in FIG. 25, exemplified as a p+ GaN layer 115, but other types of GaN layers may also be used). Is a very thin optically reflective metal layer (illustrated as silver layer 103 in FIG. 25) to facilitate formation of ohmic contacts (also potentially providing light reflection for the n+ GaN layer 110), and/or It may also be metallized and alloyed with an optically transmissive metal layer such as nickel-gold or nickel-gold-nickel (not illustrated separately) about 100Å thick, some of which may be incorporated into other GaN layers, for example during GaN mesa formation. Removed by Another metallization layer can also be deposited, for example to form a thicker interconnect metal for the contour and full metal layer 120A (eg, for current distribution) and to form vias 130. In another exemplary embodiment (illustrated in FIGS. 45-50), the metal contacts 120A forming ohmic contacts to the p+ GaN layer 115 may be formed before GaN mesa etching, after GaN mesa etching, via etching, or the like. Corresponding materials, including a number of other metallization processes and metal layers 120A and 120B, are also within the scope of this disclosure, and different manufacturing facilities often use different processes and material selections. For example, but not limited to, either or both of the metal layers 120A and 120B, after depositing titanium to form a sticky or seed layer, typically 50 to 200Å thick, 2 to 4 μm of nickel, and a thin layer of gold Or "flash" (a "flash" of gold is a layer of about 50 to 500Å thickness), 3 to 5 μm of aluminum is deposited, followed by nickel (about 0.5 μm, physical vapor deposition or plating) and a “flash of gold” ", or by depositing titanium followed by gold followed by nickel (usually 3 to 5 μm thick for 120B) followed by gold, or aluminum followed by nickel followed by gold, etc. have. In addition, the height of the metal layer 120B forming the bump or protruding structure may also be such that the obtained diodes 100 to 100L have a substantially uniform height and form factor, in exemplary embodiments, the thickness of the substrate 105 (e.g. For example, it may vary from about 3.5 to 5.5 μm, depending on GaN of about 7 to 8 μm versus silicon of about 10 μm).

For each subsequent singulation of diodes 100-100L from wafer 150, suitable or standard mask and/or photoresist layers as known in the art, as illustrated in Figures 35 and other Figures 40 and 48. And through etching, trenches 155 are formed around each diode 100-100L (eg, as illustrated in FIGS. 2, 5, 7 and 9). The trenches 155 are generally about 3 to 5 μm in width and 10 to 12 μm in depth. In addition, as illustrated in FIG. 36, using suitable or standard mask and/or photoresist layers and etching as known in the art, for example, but not limited to, plasma enhanced chemical vapor deposition of silicon nitride ( PECVD), followed by photoresist and etching steps to remove undesired areas of silicon nitride, a nitride passivation layer 135 is grown or deposited to a thickness of generally about 0.35 to 1.0 μm. In other exemplary aspects, the sidewalls of these singulating trenches may or may not be passivated. Then, through appropriate or standard mask and/or photoresist layers and etching as known in the art, a bump or protruding structure, typically having a height of 3 to 5 μm, is formed, as illustrated in FIG. 37. Forming a metal layer 120B having. In an exemplary embodiment, the formation of the metal layer 120B is performed in several steps using a metal seed layer, followed by further metal deposition using an electroplating or lift off process, removing the resist, and removing the seed layer. Wash the area. In addition to the subsequent singulation of the diodes from wafer 150 (in this case diodes 100, 100A, 100B, 100C), as described below, diodes 100, 100A, 100B, 100C are otherwise completed, and these finished diodes 100, It should be noted that 100A, 100B, 100C has only one metal contact or terminal (first terminal 125) on the top surface of each diode 100, 100A, 100B, 100C. Optionally, as described below and mentioned above with reference to other exemplary diodes, a second (back) side metal layer 122 may be fabricated, for example to form the second terminal 127.

38 to 44 illustrate another exemplary manufacturing method of diodes 100 to 100L, FIG. 38 illustrates manufacturing at the wafer 150A level, and FIGS. 39 to 44 illustrate manufacturing at the diode 100 to 100L level. 38 is a cross-sectional view of a wafer 150A having a substrate 105 and having a complex GaN heterostructure (n+ GaN layer 110, quantum well region 185, and p+ GaN layer 115). In this exemplary embodiment, a relatively thick layer of GaN is grown or deposited on the sapphire 106 (of the sapphire wafer 150A) (to form the substrate 105) and then a GaN heterostructure (n+ GaN layer 110, quantum well region 185, And a p+ GaN layer 115).

39 is a cross-sectional view of a substrate 105 with a third mesa-etched composite GaN heterostructure, to illustrate the fabrication of a single diode (e.g., diodes 100H, 100K), a much smaller portion of the wafer 150A (e.g. For example, the area 192 of FIG. 38 is illustrated. GaN mesa by etching the composite GaN heterostructure (n+ GaN layer 110, quantum well region 185 and p+ GaN layer 115) through appropriate or standard mask and/or photoresist layers and etching as known in the art. Form structure 187B. After the GaN mesa etch, also via appropriate or standard mask and/or photoresist layers and etch as known in the art, via trench (through or deep) and singulation trench, as illustrated in FIG. By performing etching, one or more relatively deep via trenches 188 are fabricated through the non-mesa portion (n+ GaN layer 110) of the GaN heterostructure, and through the sapphire 106 of the GaN substrate 105 to the wafer 150A, and , To prepare the singulation trenches 155 described above. As illustrated, a central via trench 188 and a plurality of peripheral via trenches 188 are formed. For the diode 100K aspect, shallow or blind via etch may be performed at the center of the mesa structure 187B without forming any peripheral vias or trenches.

Further, as illustrated in FIG. 41, an ohmic contact with the n+ GaN layer 110 is achieved by depositing metallization layers via appropriate or standard mask and/or photoresist layers and etching as known in the art. Forming a central through-via 131 and a plurality of peripheral through-vias 134. In exemplary aspects, through vias 131 and 134 can be formed by depositing multiple metal layers. For example, titanium and tungsten are sputtered to cover the sides and bottom of the trench 188, a seed layer is formed, and then plated with nickel to form solid metal vias 131 and 134.

In addition, as illustrated in FIG. 42, metallization layers are then deposited via appropriate or standard mask and/or photoresist layers and etching as known in the art to establish ohmic contact with the p+ GaN layer 115. To form a metal layer 120A provided. In exemplary aspects, several metal layers may be deposited as described above to form ohmic contacts to metal layer 120A and p+ GaN layer 115. In addition, as illustrated in FIG. 43, plasma enhanced chemistry of, for example, but not limited to, silicon nitride or silicon oxynitride using suitable or standard mask and/or photoresist layers and etching as known in the art. Following deposition (PECVD), a nitride passivation layer 135 is generally grown or deposited to a thickness of about 0.35 to 1.0 μm by photoresist and etching steps to remove unwanted areas of silicon nitride. Subsequently, as illustrated in FIG. 44, through appropriate or standard mask and/or photoresist layers and etching as known in the art, a metal layer 120B having a bump or protruding structure is formed. In an exemplary embodiment, also as described above, the formation of the metal layer 120B is performed in several steps using a metal seed layer, followed by further metal deposition using an electroplating or lift off process, and removing the resist. And washing the area of the seed layer. In addition to the subsequent singulation of the diodes (diode 100H in this case) from wafer 150A, as described below, the diode 100H is completed differently, and these finished diodes 100H are only one over the top surface of each diode 100H. It should be noted that it has a metal contact or terminal (first terminal 125). Also, as an option, a second (back) side metal layer 122 may be fabricated, for example to form the second terminal 127, as described below and mentioned above with reference to other exemplary diodes.

45 to 50 illustrate another exemplary method of manufacturing diodes 100 to 100L, FIG. 45 illustrates manufacturing at the wafer 150 or 150A level, and FIGS. 46 to 50 illustrate manufacturing at the level of diodes 100 to 100L do. 45 shows a buffer layer 145, a composite GaN heterostructure (n+ GaN layer 110, quantum well region 185, and p+ GaN layer 115), and a metallization portion (metal layer 120A) forming ohmic contact with the p+ GaN layer. It is a cross-sectional view of the substrate 105. As mentioned above, the buffer layer 145 is typically manufactured when the substrate 105 is silicon (for example, using a silicon wafer 150), and may be omitted for other substrates such as a GaN substrate 105. Additionally, sapphire 106 is illustrated as an option, such as in the case of thick GaN substrate 105 grown or deposited over a sapphire wafer 150A. Also, as mentioned above, the metal layer 119 (as a seed layer for the subsequent deposition of the metal layer 120A) is not in a later step of diode fabrication, but in a further step, the GaN heterostructure (n+ GaN layer 110, both Well region 185, and p+ GaN layer 115) after deposition or growth. For example, metal layer 119 may be a nickel and gold flash with a total thickness of about several hundred Å, or to facilitate the formation of ohmic contacts (and potentially provide light reflection for the n+ GaN layer 110), Metallized and alloyed with a very thin optically reflective metal layer (illustrated as silver layer 103 in FIG. 25), and/or an optically transmissive metal layer such as nickel-gold or nickel-gold-nickel of about 100Å thickness, Some of it is removed by other GaN layers, for example during GaN mesa formation.

46 is a cross-sectional view of a substrate having a buffer layer, a fourth mesa-etched composite GaN heterostructure, and a metallization (metal layer 119) forming ohmic contact with the p+ GaN layer, and a single diode (e.g., diode To illustrate the fabrication of 100I), a much smaller portion of the wafer 150 or 150A (eg, region 193 in FIG. 45) is illustrated. The composite GaN heterostructure (n+ GaN layer 110, quantum well region 185 and p+ GaN layer 115) is formed (metal layer 119) through appropriate or standard mask and/or photoresist layers and etching as known in the art. With) etching to form the GaN mesa structure 187C (with metal layer 119). After the GaN mesa etch, also through suitable or standard mask and/or photoresist layers known or known in the art, as illustrated in FIG. 47, by depositing a metallization (optional processes and Using the above-described metals such as titanium and aluminum, followed by annealing), forming a metal layer 120A, and also forming a metal layer 129 having ohmic contact with the n+ GaN layer 110.

After the metallization, also through suitable or standard mask and/or photoresist layers and etching known or known in the art, as illustrated in FIG. 48, the non-mesa portion of the GaN heterostructure ( n+ GaN layer 110) and relatively deeply through or into the substrate 105 (e.g., through the GaN substrate 105 to the sapphire 106 of the wafer 150A, or as described above) of the silicon substrate 105 Partially) singulation trench etching is performed, and the singulation trench 155 described above is fabricated.

In addition, as illustrated in FIG. 49, metallization layers are deposited in the trench 155 through appropriate or standard mask and/or photoresist layers and etching as known in the art, thereby forming a through or deep outer via 133. To provide conduction around the entire outer or lateral outer periphery of the diode 100I, which also forms an ohmic contact with the n+ GaN layer 110. In exemplary aspects, the through outer via 133 may be formed by depositing multiple metal layers. For example, titanium and tungsten are sputtered to cover the faces and bottom of the trench 155, a seed layer is formed, and then plated with nickel to form a solid metal outer via 133.

Again, as illustrated in FIG. 50, plasma enhanced chemical vapor deposition of silicon nitride (eg, but not limited to) using suitable or standard mask and/or photoresist layers and etching as known in the art ( PECVD), followed by photoresist and etching steps to remove undesired areas of silicon nitride, a nitride passivation layer 135 is grown or deposited to a thickness of generally about 0.35 to 1.0 μm. Then, through appropriate or standard mask and/or photoresist layers and etching as known in the art, a metal layer 120B having a bump or protruding structure, as illustrated in FIG. 50, is formed as described above. . In addition to the subsequent singulation of the diodes (diode 100I in this case) from wafer 150 or 150A, as described below, diode 100I is completed differently, and these finished diode 100I are only one above the top surface of each diode 100I. It should be noted that it has a metal contact or terminal (also a first terminal 125). Also, as an option, a second (back) side metal layer 122 may be fabricated, for example to form the second terminal 127, as described below and mentioned above with reference to other exemplary diodes.

51 to 57, 67 and 68 illustrate another exemplary method of manufacturing a diode 100K following the manufacturing at the level of the wafer 150 or 150A illustrated in FIG. 45. 51 is a cross-sectional view of a substrate having a buffer layer, a fifth mesa-etched composite GaN heterostructure 187D, and a metallization forming ohmic contact with the p+ GaN layer. As mentioned above, the buffer layer 145 is typically manufactured when the substrate 105 is silicon (eg, using a silicon wafer 150), and may be omitted for other substrates such as a GaN substrate 105. Additionally, sapphire 106 is illustrated as an option, such as in the case of thick GaN substrate 105 grown or deposited on sapphire wafer 150A, in which case the buffer layer 145 can be omitted. Further, as mentioned above, the metal layer 119 (as a seed layer for the subsequent deposition of the metal layer 120A) is not in a later stage of diode fabrication, but in a further stage, a GaN heterostructure (n+ GaN layer 110, quantum well). It is deposited after deposition or growth of region 185, and p+ GaN layer 115). For example, metal layer 119 may be a nickel and gold flash with a total thickness of about several hundred Å, or to facilitate the formation of ohmic contacts (and potentially provide light reflection for the n+ GaN layer 110), Metallized and alloyed with a very thin optically reflective metal layer (illustrated as silver layer 103 in FIG. 25), and/or an optically transmissive metal layer such as nickel-gold or nickel-gold-nickel of about 100Å thickness, Some of it is removed by other GaN layers, for example during GaN mesa formation. The composite GaN heterostructure (n+ GaN layer 110, quantum well region 185 and p+ GaN layer 115) is formed (metal layer 119) through appropriate or standard mask and/or photoresist layers and etching as known in the art. With) etched to have a toroidal shape (with metal layer 119) of about 14 μm in general inner annular diameter and about 26 μm in general hexagonal diameter outside (measured face-to-face). The GaN mesa structures form 187D.

After the GaN mesa etch (187D), also through suitable or standard mask and/or photoresist layers and etching known or known in the art, forming a blind or shallow via trench as illustrated in FIG. Thus, a relatively shallow central via trench 211 in the non-mesa portion (n+ GaN layer 110) of the GaN heterostructure is fabricated. As illustrated, an annular central via trench 211 having a depth of about 2 μm and a diameter of 6 μm is formed.

The metallization layers are then deposited to form a central via 136, as illustrated in FIG. 53, through suitable or standard mask and/or photoresist layers and etching as known in the art, which also Make an ohmic contact with the n+ GaN layer 110. In exemplary aspects, the central via 136 is formed by depositing several metal layers (eg, via metal). For example, by sputtering or plating a portion of the trench 211 by sputtering or plating about 100Å of titanium and about 1.5-2 μm of aluminum, and then alloying at about 550° C., the n+ GaN layer 110 A solid metal via 136 with a maximum diameter of about 10 μm is formed over the top of the. Also, as illustrated in FIG. 54, plasma of, for example, but not limited to, silicon nitride or silicon oxynitride, using suitable or standard mask and/or photoresist layers and etching as known in the art. After enhanced chemical vapor deposition (PECVD), by photoresist and etching steps to remove the undesired area of silicon nitride, the first nitride passivation layer 135A has a thickness of generally about 0.35 to 1.0 μm, more particularly about 0.5 μm and It is grown or deposited to a maximum diameter of about 18 μm.

Further, as illustrated in FIG. 55, metallization layers are then deposited via an etch and suitable or standard mask and/or photoresist layers as known in the art, typically formed using die metal. Forming a metal layer 120B with bump or protruding structures for contact with the p+ GaN layer 115. In exemplary aspects, it is possible to deposit several metal layers as described herein above to form metal layers 120A and/or 120B for contact to the p+ GaN layer 115, which is used herein for simplicity. Will not repeat. In an exemplary embodiment, the metal layer 120B is generally hexagonal in shape, has a diameter of about 22 μm (measured face-to-face), about 100Å of nickel, about 4.5 μm of aluminum, about 0.5 μm of nickel. , And about 100 nm of gold.

After the metallization, as illustrated in FIG. 56, also through suitable or standard mask and/or photoresist layers and etching known or known in the art, using the methods described above, GaN hetero Through a portion of the structure (in the n+ GaN layer 110, but not completely), a singulation trench etch is performed in an exemplary embodiment generally to a depth of about 2 μm, making the singulation trench 155 described above.

Then, as illustrated in FIG. 57, for example, but not limited to, by plasma enhanced chemical vapor deposition (PECVD) of silicon nitride or silicon oxynitride, the second nitride passivation layer 135 is generally about 0.35 to 1.0 μm, or more particularly. It is grown or deposited to a thickness of about 0.5 μm. Subsequently, using suitable or standard mask and/or photoresist layers and etch as known in the art, removing unwanted areas of silicon nitride, for example cleaning the top of metal layer 102B, which 2 will form terminal 127.

Subsequent substrate removal, singulation and fabrication of the second (back) side metal layer 122 are described below with reference to FIGS. 64, 65, 67 and 68.

58 to 63 and 69 illustrate another exemplary method of manufacturing a diode 100L following the manufacturing at the level of the wafer 150 or 150A illustrated in FIG. 45. 58 is a cross-sectional view of a substrate having a buffer layer, a sixth mesa-etched composite GaN heterostructure 187E, and a metallization forming ohmic contact with the p+ GaN layer. As mentioned above, the buffer layer 145 is typically manufactured when the substrate 105 is silicon (eg, using a silicon wafer 150), and may be omitted for other substrates such as a GaN substrate 105. Additionally, sapphire 106 is illustrated as an option, such as in the case of thick GaN substrate 105 grown or deposited on a sapphire wafer 150A, in which case the buffer layer 145 can be omitted. Further, as mentioned above, the metal layer 119 (as a seed layer for the subsequent deposition of the metal layer 120A) is not in a later stage of diode fabrication, but in a further stage, a GaN heterostructure (n+ GaN layer 110, quantum well). It is deposited after deposition or growth of region 185, and p+ GaN layer 115). For example, metal layer 119 may be a nickel and gold flash with a total thickness of about several hundred Å, or to facilitate the formation of ohmic contacts (and potentially provide light reflection for the n+ GaN layer 110), Metallization with a very thin optically reflective metal layer (illustrated as silver layer 103 in FIG. 25), and/or an optically transmissive metal layer such as nickel, nickel-gold or nickel-gold-nickel from about 100Å to about 2.5 nm thick and It can be alloyed, and then some of them are removed by other GaN layers, for example during GaN mesa formation. In an exemplary embodiment, about 2-3 nm, or more particularly, about 2.5 nm of nickel or nickel and gold is deposited and alloyed at 500° C. to form the metal layer 119 in the p+ GaN layer 115. The composite GaN heterostructure (n+ GaN layer 110, quantum well region 185 and p+ GaN layer 115) is formed (metal layer 119) through appropriate or standard mask and/or photoresist layers and etching as known in the art. With) etched, resulting in a first radius of about 8 μm for the cut-out area leaving room for contact 128 (with metal layer 119) and a second radius of about 11 μm for triangular vertices/faces. Having a planarized triangular shape discussed above, forming a GaN mesa structure 187E about 1 μm deep.

After the GaN mesa etch 187E, also, as illustrated in FIG. 59, depositing first metallization layers through suitable or standard mask and/or photoresist layers and etching as known in the art. To form a contact 128, which also forms an ohmic contact with the n+ GaN layer 110. In exemplary aspects, several via metal layers are deposited to form a contact 128 used as the second terminal 127. For example, but not limited to, by sputtering or plating about 100Å of titanium, about 500 nm of aluminum, 500 nm of nickel, and 100 nm of gold, as illustrated in FIG. 23, each having a thickness of about 1.1 μm and measured radially A solid metal contact portion 128 having a width of about 3 μm and extending around the periphery of the n+ GaN layer 110 is formed.

After the deposition of the contacts 128, further metallization is deposited through appropriate or standard mask and/or photoresist layers known or known in the art, as illustrated in FIG. 60 (optional process And metals described above, such as titanium and aluminum, and then annealed), forming a metal layer 120A as part of the ohmic contact for the p+ GaN layer 115. For example, in an exemplary embodiment, about 200 nm of silver (which forms a reflective or mirror layer), 200 nm of nickel, about 500 nm of aluminum, and 200 nm of nickel are sputtered or plated to obtain a thickness of about 1.1 μm and a diameter of about 8 A µm, centrally located metal layer 120A is formed.

In addition, additional metallization layers are then formed, typically using die metal, via appropriate or standard mask and/or photoresist layers and etching as known in the art, as illustrated in FIG. 61. Deposited to form a metal layer 120B with bump or protruding structures for contact to the p+ GaN layer 115. In exemplary embodiments, several metal layers may be deposited as described herein above to form metal layers 120A and/or 120B for contact to the p+ GaN layer 115, which is repeated herein for brevity. Won't be. In an exemplary embodiment, the metal layer 120B has a first radius of about 6 μm for the cut-out area (for contacts 128) after alloying at 550° C. for about 10 minutes in a nitrogen environment, and triangular vertices/faces. Having a second radius of about 9 μm for (they are each about 3.7 μm wide), generally having a planarized triangular shape illustrated in FIG. 23, plus a height of about 1.1 μm of the metal layer 120A, about 5 μm. For a total height of, about 200 nm of silver (also forming a reflective or mirror layer over the p+ GaN layer 115), about 200 nm of nickel, about 200 nm of aluminum, about 250 nm of nickel, about 200 nm of aluminum, about 250 nm. Of nickel, and about 100 nm of gold, each of which is added as a continuous layer. It should be noted that this provides a separation of approximately 5 μm in height between the first terminal 125 and the second terminal 127.

Subsequently, as illustrated in FIG. 62, for example, but not limited to, by plasma enhanced chemical vapor deposition (PECVD) of silicon nitride or silicon oxynitride, the second nitride passivation layer 135 is generally about 0.35 to 1.0 μm, or more particularly. It is grown or deposited to a thickness of about 0.5 μm. Subsequently, using suitable or standard mask and/or photoresist layers and etch as known in the art, removing unwanted areas of silicon nitride, for example cleaning the top of metal layer 102B, which 1 will form terminal 125.

After the passivation, also, as illustrated in FIG. 63, the GaN heterogeneity, using the methods described above, through appropriate or standard mask and/or photoresist layers and etching known or known in the art. Through a portion of the structure (in the n+ GaN layer 110, but not completely), a singulation trench etch is performed in an exemplary embodiment generally to a depth of about 2 to 3.5 μm, making the singulation trench 155 described above.

Subsequent substrate removal and singulation is described below with reference to FIGS. 64, 65, 67 and 69.

Many variations of the methodology for the manufacture of diodes 100-100L can readily become apparent in light of the teachings of this disclosure, all of which are considered equivalent and within the scope of this disclosure. In other exemplary aspects, such trench 155 formation and (nitride) passivation layer formation may be performed earlier or later in the device manufacturing process. For example, the trench 155 may be formed later after the metal layer 120B is formed during manufacture, leaving the substrate 105 exposed, or a second passivation may be subsequently formed. Further, for example, the trench 155 may be formed earlier in manufacture, for example following the deposition of the (nitride) passivation layer 135 after a GaN mesa etch. In the latter example, the passivated trench 155 may be filled with oxide, photoresist, or other material to maintain planarity during the remainder of the device manufacturing process (photoresist mask and etch or unshielded etch process may be used to After removing the areas, the layer can be deposited) and filled with resist (also potentially recharged after forming the metal contact 120A). In another example, silicon nitride 135 deposition (after mask and etching steps) may be performed after GaN mesa etch and before metal contact 120A deposition.

FIG. 64 is a cross-sectional view illustrating an exemplary silicon wafer 150 aspect with a plurality of diodes 100-100L attached to a support device 160 (eg, a holding, handle or holder wafer). 65 is a cross-sectional view illustrating an exemplary diode sapphire wafer 150A aspect attached to a support device 160. As illustrated in Figs. 64 and 65, the diode wafers 150 and 150A containing a plurality of non-deformed diodes 100 to 100L (generally illustrated without any important detailed features for purposes of explanation) are prepared by using the manufactured diode 100 A diode wafer 150 having to 100L is attached to a support device 160 (eg, a wafer holder) on the first side of the diode wafer 150, 150A using any known commercially available wafer adhesive or wafer bond 165. As illustrated and described above, a singulation or singulation trench 155 between each diode 100-100L is formed during wafer processing, for example through etching, and adjoins each diode 100-100L without mechanical processes such as sawing. It is used to separate the diode from 100 to 100L. As illustrated in Figure 64, the diode wafer 150 is still attached to the support device 160, while the second, back surface 180 of the diode wafer 150 is, for example, but not limited to, to expose the trench 155, or subsequently etched. Etching (e.g., wet or dry etching) to a certain level (illustrated by dashed lines), mechanical grinding and polishing, or both can be performed to leave some additional substrate that can be removed via . When sufficiently etched or ground and polished or both have been performed (and/or have any additional etching), each individual diode 100-100L is released from each other while still attached to the supporting device 160 with adhesive 165 and any It is also released from the remaining diode wafer 150. As illustrated in FIG. 65, while the diode wafer 150A is still attached to the support device 160, the second, back side 180 of the diode wafer 150A is exposed to laser light (illustrated as one or more laser beams 162), which is then The GaN substrate 105 is cleaved from the sapphire 106 of the wafer 150A (illustrated by the dotted line) (also referred to as laser lift-off), and then any further chemical-mechanical polishing and any necessary etching (e.g. , Wet or dry etching), each individual diode 100-100L is released from each other and also released from the wafer 150A while still being attached to the support device 160 with the adhesive 165. In this exemplary aspect, the wafer 150A can then be ground and/or polished and reused.

Also, to prevent releasing of non-diode fragments from the wafer edge into the diode (100-100L) fluid during the diode release process generally discussed below, an epoxy bead (not separately illustrated) was placed around the periphery of the wafer 150. Apply.

66 is a cross-sectional view illustrating an exemplary diode 100J embodiment attached to a support device. After singulation of the diodes 100-100K (as described above with reference to FIGS. 64 and 65), the second, backside of the diodes 100-100K, while the diodes 100-100K are still attached to the support device 160 with adhesive 165. Is exposed. As illustrated in FIG.66, a second, backside metallization was then deposited (angled to avoid filling trench 155), e.g. via evaporation, and a second, backside metal layer 122 and diode Form a 100J aspect. Further, as illustrated, the diode 100J makes an ohmic contact with the n+ GaN layer 110 for current conduction between the n+ GaN layer 110 and the second, back metal layer 122, and an ohmic contact with the second, back metal layer 122. Having one center through-via has 131. The exemplary diode 100D is very similar to the exemplary diode 100J having a second, back metal layer 122 to form a second terminal 127. As mentioned above, the second, backside metal layer 122 (or substrate 105 or any of the various through vias 131, 133, 134) is used to excite the diodes 100 to 100K by the device 300, 300A, 300B, 300C, It can be used to make electrical connections with the first conductor 310 in 300D, 720, 730, 760.

67 is a cross-sectional view illustrating an exemplary tenth diode aspect prior to back metallization attached to a support device 160. As illustrated in FIG. 67, the exemplary diode in the process is singulated, any substrates 105, 105A are removed as described above, and also an n+ GaN layer by an etching step (e.g., wet or dry etching). The surfaces of 110 and vias 136 are exposed, leaving a composite GaN heterostructure of about 2 to 6 μm (or more particularly about 2 to 4 μm, or more particularly about 3 μm) deep. Then, as shown in FIG. 68, using suitable or standard mask and/or photoresist layers and etching as known in the art, for example via sputtering, plating or evaporation, a second, backside Metallization is deposited on to form a second, back metal layer 122 and a diode 100K aspect. In an exemplary embodiment, the metal layer 122 is generally about 12 to 16 μm wide for the major axis, about 4 to 8 μm wide and 4 to 6 μm deep for the minor axis, or more particularly generally, as illustrated in FIG. 21. It is an elliptical shape with a width of about 14 μm for the long axis, about 6 μm in width and 5 μm in depth for the minor axis, and is composed of about 100Å titanium, about 4.5 μm aluminum, about 0.5 μm nickel, and 100 nm gold. . Also, as illustrated for diode 100K, what was originally a relatively shallow center via is now an ohmic contact with n+ GaN layer 110 for current conduction between n+ GaN layer 110 and second, back metal layer 122 , Is through-via 136 with contact with the back metal layer 122. As mentioned above, for this exemplary diode 100K embodiment, the diode 100K is then flipped or flipped over, and the second, back metal layer 122 forms a first terminal 125, and the device 300 is used to excite the diode 100K. , 300A, 300B, 300C, 300D, 720, 730, can be used to make electrical connections with the second conductor 320 in 760.

69 is a cross-sectional view illustrating an exemplary eleventh diode 100L aspect attached to a support device. As illustrated in FIG. 69, the exemplary diode 100L is singulated and any substrates 105, 105A are removed as described above, and also exposes the surface of the n+ GaN layer 110 by an etching step, and about 2-6. The composite GaN heterostructures are left to a depth of μm (or more particularly about 3 to 5 μm, or more particularly about 4 to 5 μm, or more particularly about 4.5 μm).

After singulation of the diodes 100-100L, they can be used, for example, to form the diode ink discussed below with reference to FIGS. 74 and 75.

It should also be noted that various surface geometries and/or textures can be made for any of the various diodes 100-100L to help reduce internal reflections and increase light extraction when implemented as an LED. Any of these various surface geometries may have any of the various surface textures discussed above with reference to FIG. 25. 104 is a perspective view showing an exemplary first surface geometry of an exemplary light emitting or light absorbing region, implemented as a plurality of concentric rings or toroidal shapes on the top light emitting (or light absorbing) surface of diode 100K. This geometry is typically etched into the second, back side of the diode 100K before or after the addition of the back metal 122, via suitable or standard mask and/or photoresist layers and etching known or known in the art. . 105 is a perspective view showing an exemplary second surface geometry of an exemplary light emitting or light absorbing region, implemented as a shape of a plurality of substantially curved trapezoids on the top light emitting (or light absorbing) surface of diode 100K. This geometry is typically also etched in the second, backside of the diode 100K before or after the addition of the backside metal 122, via suitable or standard mask and/or photoresist layers and etching, also known or known in the art. do.

FIG. 106 is a perspective view showing an exemplary third surface geometry of an exemplary light emitting or light absorbing region, implemented as a shape of a plurality of substantially curved trapezoids on the bottom (or bottom) light emitting (or light absorbing) surface of the diode 100L. to be. 107 is a perspective view showing a fourth exemplary surface geometry of an exemplary light emitting or absorbing region, implemented as a substantially star or radial shape on the bottom (or bottom) light emitting (or absorbing) surface of diode 100L. FIG. 108 is a perspective view showing a fifth exemplary surface geometry of an exemplary light emitting or light absorbing region, implemented as a plurality of substantially parallel bars or stripes on the bottom (or bottom) light emitting (or light absorbing) surface of diode 100L. . These geometries are also typically used as part of the substrate removal process and/or the diode singulation process discussed above with reference to FIG. 69, with suitable or standard masks and/or photoresists known or known in the art. The second, backside of diode 100L is etched through layers and etching.

70, 71, 72 and 73 are flow charts illustrating exemplary first, second, third and fourth method aspects of diodes 100-100L, respectively, and provide a useful overview. It should be noted that many of the steps of these methods may be performed in any of a variety of orders, and steps of one exemplary method may be used in other exemplary methods. Thus, each of the above methods will generally be referred to as the fabrication of any diode 100-100L, rather than the fabrication of a particular diode 100-100L aspect, and those of skill in the art would appreciate that these steps may be applied to any selected diode 100-100L aspect. It will be appreciated that it can be "mixed and matched" to make.

Referring to FIG. 70, starting from the start step 240, an oxide layer is grown or deposited on a semiconductor wafer such as a silicon wafer (step 245). The oxide layer is etched to form, for example, a lattice or other pattern (step 250). The buffer layer and the light emitting or light absorbing regions (eg, GaN heterostructures) are grown or deposited (step 255) and then etched to form a mesa structure of each of the diodes 100-100L (step 260). The wafer 150 is then etched to form via trenches in the substrate 105 for each diode 100-100L (step 265). One or more layers of metallization are then deposited to form metal contacts and vias for each diode 100-100L (step 270). The singulation trenches are then etched between the diodes 100-100L (step 275). The passivation layer is then grown or deposited (step 280). The bump or protruding metal structure can then be deposited or grown on the metal contact (step 285), and the method can be terminated (transfer step 290). It should be noted that many of these manufacturing steps may be performed with different elements and components, and the method may include other variations and sequences of the steps discussed above.

Referring to FIG. 71, starting from the start step 500, a relatively thick layer of GaN (eg, 7-8 μm) is grown or deposited on a wafer such as a sapphire wafer 150A (step 505). Grow or deposit (step 510) a light emitting or absorbing region (e.g., a GaN heterostructure) and then etched (on the first side of each diode 100-100L) to form a mesa structure for each diode 100-100L. To form (step 515). The wafer 150 is then etched to form one or more through or deep via trenches and singulation trenches in the substrate 105 for each diode 100-100L (step 520). One or more layers of metallization are then deposited, typically by depositing a seed layer (step 525) and then performing additional metal deposition using any of the methods described above, thereby depositing a central, peripheral or outer through via (respectively). 131, 134, 133), and through vias for each diode 100-100L. Metal is also deposited to form one or more metal contacts to the GaN heterostructure (e.g., the p+ GaN layer 115 or the n+ GaN layer 110) (step 535), and any additional current distribution metal (e.g. , 120A, 126) are formed (step 540). The passivation layer is then grown or deposited (step 545) to etch or remove areas as described and illustrated above. Then, a bump or protruding metal structure 120B is deposited or grown over the metal contact(s) (step 550). Then, the wafer 150A is attached to a support wafer (step 555), and the sapphire or other wafer is removed (eg, through laser cleaving) to singulate or individualize the diodes 100 to 100L (step 560). . The second, back metal layer 122 may then be formed by depositing a metal over the second, back side of the diodes 100-100L (step 565), and the method may be terminated (transfer step 570). It should be noted that many of these manufacturing steps may be performed with different elements and components, and the method may include other variations and sequences of the steps discussed above.

Referring to FIG. 72, starting from the start step 600, a relatively thick layer of GaN (eg, 7-8 μm) is grown or deposited on a wafer 150, such as a sapphire wafer 150A (step 605). Grow or deposit light emitting or light absorbing regions (eg, GaN heterostructures) (step 610). Metal is deposited to form one or more metal contacts to the GaN heterostructure (eg, the p+ GaN layer 115 as illustrated in FIG. 45) (step 615). Then, by etching the light-emitting or light-absorption region (for example, the GaN heterostructure) having the metal contact layer 119 (on the first surface of each diode 100 to 100L) for each diode 100 to 100L A mesa structure is formed (step 620). Metal is deposited to form one or more metal contacts to the GaN heterostructure (eg, n+ metal contact layer 129 and the n+ GaN layer 110 as illustrated in FIG. 47) (step 625). The wafer 150A is then etched to form one or more through or deep via trenches and/or singulation trenches in the substrate 105 for each diode 100-100L (step 630). Then, one or more metallization layers are deposited using any of the metal deposition methods described above, for each diode 100-100L, which may be a center, peripheral, or outer through via (131, 134, 133, respectively). A through via is formed (step 635). Metal is also deposited to form one or more metal contacts in the GaN heterostructure (e.g., the p+ GaN layer 115 or the n+ GaN layer 110), and any additional current distribution metals (e.g., 120A, 126 ) Is formed (step 640). If the singulation trench has not been manufactured in advance (in step 630), the singulation trench is etched (step 645). The passivation layer is then grown or deposited (step 645) to etch or remove areas as described and illustrated above. Then, a bump or protruding metal structure 120B is deposited or grown over the metal contact(s) (step 655). Subsequently, the wafers 150 and 150A are attached to the support wafer (step 660), and the sapphire or other wafer is removed (for example, through laser cleaving or backside grinding and polishing) to singulate the diodes 100 to 100L. Or individualize (step 665). The second, back conductive (e.g., metal) layer 122 may then be formed by depositing a metal on the second, back side of the diodes 100-100L (step 670), and the method may be terminated ( Return step 675). It should also be noted that many of these manufacturing steps may be performed with different members and components, and the method may include other variations and sequences of the steps discussed above.

Referring to Fig.73, starting from the start step 611, a relatively thick GaN layer (e.g., 7-8 μm) is grown or deposited on a wafer 150 such as a sapphire wafer 150A or on a buffer layer 145 of a silicon wafer 150 ( Step 611). Grow or deposit light emitting or light absorbing regions (eg, GaN heterostructures) (step 616). Metal is deposited to form one or more metal bonds to the GaN heterostructure (eg, the p+ GaN layer 115 as illustrated in FIG. 45) (step 621). Then, the light-emitting or light-absorbing region (e.g., the GaN heterostructure) having the metal contact layer 119 is etched (on the first surface of each diode 100 to 100L) to provide a mesa for each diode 100 to 100L. The structure is formed (step 626). Subsequently, in the case of the diode 100K embodiment, the GaN heterostructure is etched to form a center via trench for each diode 100K (step 631), otherwise step 631 may be omitted. One or more metallization layers are then deposited using any of the metal deposition methods described above to form a center via 136 for each diode 100K or a metal contact 128 for diode 100L (step 636). Then, for the diode 100K aspect, the passivation layer 135A can be grown or deposited (step 641) to etch or remove the areas as described and illustrated above, otherwise step 641 can be omitted. In addition, metal is deposited to form one or more metal contacts, such as metal layer 120B or metal layers 120A and 120B, to the GaN heterostructure (eg, the p+ GaN layer 115) (step 646). If the singulation trench has not been manufactured beforehand, the singulation trench is etched (step 651). The passivation layer is then grown or deposited (step 656) to etch or remove areas as described and illustrated above. It should be noted that steps 656 and 651 are performed in the reverse order for diode 100L fabrication, performing passivation and then etching the singulation trench. Subsequently, the wafers 150 and 150A are attached to the support wafer (step 661), and the silicon, sapphire or other wafer is removed (for example, through laser cleaving or backside grinding and polishing) to thereby remove the diodes 100 to 100L. Singulate or singulate (step 666) and remove any additional GaN, for example via etching. Subsequently, for the diode 100K embodiment, metal is deposited on the second, backside of the diode 100K to form a second, backside conductive (e.g., metal) layer 122 (step 671), and the method ends. (Return step 676). It should also be noted that many of these manufacturing steps may be performed with different members and components, and the method may include other variations and sequences of the steps discussed above. For example, steps 611 and 612 may be performed by a specific vendor.

FIG. 74 shows that the diode wafers 150 and 150A are no longer coupled together (the second side of the diode wafers 150 and 150A is grounded or polished, cleaved (laser lift-off) and/or etched to singulation (individualization). Because it completely exposes the trench 155), individual diodes 100 to 100 L, attached to the support device 160 by wafer adhesive 165 and suspended or impregnated in the dish 175 with wafer adhesive solvent 170 (also generally arbitrary It is a cross-sectional view showing (illustrated without important detailed features). As an exemplary method of using a polytetrafluoroethylene (PTFE or Teflon) dish 175, any suitable dish 175 can be used, such as a Petri dish. The wafer adhesion solvent 170 is any including, but not limited to, a 2-dodecene wafer bond remover available, for example, from Brewer Science, Inc., Rolla, Mo. Commercially available wafer adhesion solvents or wafer bond removers, or any other relatively long chain alkanes or alkenes or short chain heptanes or heptenes. Diodes 100-100L attached to the support device 160 can be immersed in the wafer adhesion solvent 170 for about 5 to about 15 minutes, typically at room temperature (e.g., about 65°F to 75°F) or higher, and is also illustrated. It can be sonicated in various aspects. Since the wafer adhesion solvent 170 dissolves the adhesive 165, the diodes 100-100L separate from the adhesive 165 and the support device 160, and most or generally sink to the bottom of the dish 175 individually or as a group or cluster. When all or most of the diodes 100 to 100L are released from the support device 160 and settle at the bottom of the dish 175, the support device 160 and a portion of the currently used wafer adhesion solvent 170 are removed from the dish 175. Subsequently, additional wafer adhesion solvent 170 is added (about 120 to 140 ml), and a mixture of wafer adhesion solvent 170 and diode 100 to 100 L is typically at room temperature or higher for about 5 to 15 minutes (e.g., After shaking using a sonicator or impeller mixer), 100 to 100L of the diodes are again precipitated on the bottom of the dish 175. Subsequently, this process is generally repeated at least once, so that when all or most of the diodes 100 to 100L have precipitated on the bottom of the dish 175, some of the currently used wafer adhesion solvent 170 is removed from the dish 175, and then added. (About 120 to 140 ml) of the wafer adhesion solvent 170 was added, and then the mixture of the wafer adhesion solvent 170 and the diode 100 to 100 L was shaken at room temperature or higher for about 5 to 15 minutes, and then the diodes 100 to 100 L were shaken. It precipitates again on the bottom of the dish 175, and a part of the remaining wafer adhesion solvent 170 is removed. At this stage, generally a sufficient amount of any residual wafer adhesive 165 is removed from the diodes 100-100L, or the wafer bonding solvent 170 process is repeated so that the printing or functionalization of the diodes 100-100L is no longer potentially impeded.

Removal of wafer adhesion solvent 170 (having dissolved wafer adhesive 165), or any of the other solvents, solutions, or other liquids discussed below, can be accomplished by any of a variety of methods. For example, wafer adhesion solvent 170 or other liquids may be removed by vacuum, aspiration, suction, pumping, etc., for example via a pipette. Also, for example, wafer adhesion solvent 170 or other liquids may be prepared by using a mixture of diodes 100 to 100L and wafer adhesion solvent 170 (or other liquids), for example using a screen or porous silicon membrane having an appropriate opening or pore size. It can be removed by filtration. It should also be mentioned that the various fluids used in this diode ink (and dielectric ink discussed below) are all filtered to remove particles larger than about 10 μm.

Diode Ink Example 1:

A plurality of diodes 100 to 100L; And

menstruum

Composition comprising a.

Substantially all or most of the wafer adhesion solvent 170 is removed. In an exemplary embodiment, for example, a solvent, more particularly a polar solvent such as isopropyl alcohol ("IPA") is added to the mixture of wafer adhesion solvent 170 and diode 100-100L, followed by IPA, wafer adhesion solvent 170 and diode A mixture of 100 to 100 L is generally shaken at room temperature (higher temperatures can be used equally) for about 5 to 15 minutes, then the diodes 100 to 100 L are again settled on the bottom of the dish 175, and the IPA and wafer adhesion A portion of the mixture of solvent 170 is removed. Additional IPA was added (120-140 mL) and the process was repeated two or more times, i.e. a mixture of IPA, wafer adhesion solvent 170 and 100 to 100 L diodes was generally shaken at room temperature for about 5 to 15 minutes. Next, 100 to 100L of the diodes are re-precipitated on the bottom of the dish 175, a part of the mixture of IPA and wafer adhesion solvent 170 is removed, and additional IPA is added. In an exemplary embodiment, the resulting mixture is about 100 to 110 ml of IPA with 100 to 100 L of approximately 9 million to 10 million diodes (100 to 100 L of approximately 9.7 million diodes per 150 4 inch wafers) from a 4 inch wafer, It is then transferred to another larger container, such as a PTFE bottle, which may include further washing of the diodes in the bottle, for example by additional IPA. One or more solvents such as, but not limited to, water; Alcohols such as methanol, ethanol, N-propanol ("NPA") (including 1-propanol, 2-propanol (IPA), 1-methoxy-2-propanol), butanol (1-butanol, 2- Butanol (including isobutanol)), pentanol (including 1-pentanol, 2-pentanol, 3-pentanol), octanol, N-octanol (1-octanol, 2-octanol, 3- Octanol), tetrahydrofurfuryl alcohol (THFA), cyclohexanol, terpineol; Ethers such as methyl ethyl ether, diethyl ether, ethyl propyl ether, and polyethers; Esters such as ethyl acetate, dimethyl adipate, propylene glycol monomethyl ether acetate, dimethyl glutarate, dimethyl succinate, glycerin acetate; Glycols such as ethylene glycol, diethylene glycol, polyethylene glycol, propylene glycol, dipropylene glycol, glycol ether, glycol ether acetate; Carbonates such as propylene carbonate; Glycerol, such as glycerin; Acetonitrile, tetrahydrofuran (THF), dimethyl formamide (DMF), N-methyl formamide (NMF), dimethyl sulfoxide (DMSO); And mixtures thereof may be used equally. The resulting mixture of diodes 100 to 100L and a solvent (e.g. IPA) is the first embodiment of the diode ink as Example 1 above, and can be provided as a standalone composition for use in, for example, subsequent modification or printing. have. In other exemplary embodiments discussed below, the resulting mixture of diodes 100-100L and a solvent (e.g. IPA) is an intermediate mixture that is further modified to form a printing diode ink as described below.

In various exemplary embodiments, the selection of the first (or second) solvent is based on at least two characteristics or properties. The first property of the solvent is the ability to dissolve or solubilize in a viscosity modifier or adhesive viscosity modifier such as hydroxy propyl methylcellulose resin, methoxy propyl methylcellulose resin, or other cellulose resin or methylcellulose resin. A second characteristic or characteristic is its evaporation rate, which must be slow enough to allow sufficient screen retention (for screen printing) of the diode ink or to satisfy other printing parameters. In various exemplary embodiments, an exemplary evaporation rate is less than 1 (<1, which is a relative rate compared to butyl acetate), or more specifically 0.0001 to 0.9999.

Diode Ink Example 2:

A plurality of diodes 100 to 100L; And

Viscosity modifier

Composition comprising a.

Diode Ink Example 3:

A plurality of diodes 100 to 100L; And

Solvating agent

Composition comprising a.

Diode Ink Example 4:

A plurality of diodes 100 to 100L; And

Wetting solvent

Composition comprising a.

Diode Ink Example 5:

A plurality of diodes 100 to 100L;

menstruum; And

Viscosity modifier

Composition comprising a.

Diode Ink Example 6:

A plurality of diodes 100 to 100L;

menstruum; And

Adhesive viscosity modifier

Composition comprising a.

Diode Ink Example 7:

A plurality of diodes 100 to 100L;

menstruum; And

Viscosity modifier

Composition comprising a.

Here, the composition is opaque when wet and almost optically transmissive or transparent when dried.

Diode Ink Example 8:

A plurality of diodes 100 to 100L;

A first polar solvent;

Viscosity modifiers; And

Second non-polar solvent (or rewetting agent)

Composition comprising a.

Diode Ink Example 9:

A plurality of diodes 100 to 100L (each diode of the plurality of diodes 100 to 100L has an arbitrary dimension of less than 450 μm); And

menstruum

Composition comprising a.

Diode Ink Example 10:

A plurality of diodes 100 to 100L; And

At least one substantially non-insulating carrier or solvent

Composition comprising a.

Diode Ink Example 11:

A plurality of diodes 100 to 100L;

menstruum; And

Viscosity modifier

Composition comprising a.

Here, the composition has a dewetting or contact angle of more than 25 degrees or more than 40 degrees.

With reference to Diode Ink Examples 1-11, there are a wide variety of exemplary diode ink compositions within the scope of the present invention. In general, as in Example 1, a liquid suspension of diodes (100 to 100L) was prepared with a plurality of diodes (100 to 100L) and a first solvent (e.g., IPA or N-propanol discussed above, 1-Methyl). Oxy-2-propanol, dipropylene glycol, 1-octanol (or more generally, N-octanol), or diethylene glycol discussed above; As in Example 2, the liquid suspension of diodes 100 to 100L may be a plurality of diodes 100 to 100L and a viscosity modifier (discussed below, these may be adhesive viscosity modifiers as in Example 6. ); As in Examples 3 and 4, the liquid suspension of the diodes 100 to 100L was prepared with a plurality of diodes 100 to 100L and a solvating or wetting solvent (e.g., one of the second solvents discussed below). , For example, dibasic esters). More particularly, as in Examples 2, 5, 6, 7 and 8, the liquid suspension of the diodes 100 to 100L is formed by a plurality of diodes 100 to 100L (and/or a plurality of diodes 100 to 100L). And a first solvent (eg, N-propanol, 1-octanol, 1-methoxy-2-propanol, dipropylene glycol, terpineol, or diethylene glycol)), and at room temperature (about 25° C.) A viscosity modifier (or equivalently, a viscosity modifier) to provide a diode ink having a viscosity of 1,000 centipoise (cps) to 25,000 cps (or about 20,000 cps to 60,000 cps at a refrigeration temperature (e.g., 5 to 10°C)) Compounds, viscous reagents, viscous polymers, viscous resins, viscous binders, thickeners, and/or rheology modifiers) or adhesive viscosity modifiers (discussed in more detail below), such as, but not limited to, E-10 viscosity described below. Contains modulators. Depending on the viscosity, the resulting composition may be referred to as a liquid or gel suspension of a diode or other two-terminal integrated circuit, and any reference to a liquid or gel in this specification means and includes others. Will make sense.

In addition, the final viscosity of the diode ink will generally depend on the type of printing process used, and may also depend on the diode composition such as silicon substrate 105 or GaN substrate 105. For example, a diode ink for screen printing in which 100 to 100L of diodes have a silicon substrate 105 is about 1,000 centipoise (cps) to 25,000 cps at room temperature, or more specifically about 6,000 centipoise (cps) to 15,000 cps at room temperature, Or more specifically about 6,000 centipoise (cps) to 15,000 cps at room temperature, or more specifically about 8,000 centipoise (cps) to 12,000 cps at room temperature, or more specifically about 9,000 centipoise (cps) at room temperature To 11,000 cps. In another example, the diode ink for screen printing in which the diodes 100 to 100L have a GaN substrate 105 is about 10,000 centipoise (cps) to 25,000 cps at room temperature, or more specifically about 15,000 centipoise (cps) to 22,000 cps at room temperature. , Or more specifically, about 17,500 centipoise (cps) to 20,500 cps at room temperature, or more specifically, about 18,000 centipoise (cps) to 20,000 cps at room temperature. In addition, for example, a diode ink for flexographic printing in which 100 to 100L of diodes have a silicon substrate 105 is about 1,000 centipoise (cps) to 10,000 cps at room temperature, or more specifically, about 1,500 centipoise (cps) at room temperature. To 4,000 cps, or more specifically about 1,700 centipoise (cps) to 3,000 cps at room temperature, or more specifically about 1,800 centipoise (cps) to 2,200 cps at room temperature. In addition, for example, a diode ink for flexographic printing in which diodes 100 to 100L have a GaN substrate 105 is about 1,000 centipoise (cps) to 10,000 cps at room temperature, or more specifically, about 2,000 centipoise (cps) at room temperature. To 6,000 cps, or more specifically about 2,500 centipoise (cps) to 4,500 cps at room temperature, or more specifically about 2,000 centipoise (cps) to 4,000 cps at room temperature.

Viscosity can be measured in a wide variety of ways. For comparison purposes, the various ranges of viscosities specified and/or claimed herein were determined using a Brookfield viscometer (available from Brookfield Engineering Laboratories, Middleboro, Mass.). , In a water jacket at about 25° C., about 200 pascals (or in particular, in a water jacket at about 25° C., using a spindle SC4-27 at a speed of about 10 rpm (or in particular, but not limited to, more generally 1 to 30 rpm for refrigerated fluids)) More generally 190 to 210 Pascals).

(As viscosity modifier) one or more thickeners, such as but not limited to clays such as hectorite clay, karamite clay, organo-modified clay; Saccharides and polysaccharides such as guar gum, xanthan gum; Cellulose and modified cellulose, such as hydroxy methylcellulose, methylcellulose, ethyl cellulose, propyl methylcellulose, methoxy cellulose, methoxy methylcellulose, methoxy propyl methylcellulose, hydroxy propyl methylcellulose, carboxy methylcellulose, Hydroxy ethylcellulose, ethyl hydroxyl ethylcellulose, cellulose ether, cellulose ethyl ether, chitosan; Polymers, such as acrylate and (meth)acrylate polymers and copolymers; Glycols such as ethylene glycol, diethylene glycol, polyethylene glycol, propylene glycol, dipropylene glycol, glycol ether, glycol ether acetate; Fumed silica (eg Cabosil), silica powder and modified urea such as BYK® 420 (available from BYK Chemie GmbH); And mixtures thereof may be used. Other viscosity modifiers, as described in US Patent Application Publication No. 2003/0091647 to Lewis et al., as well as particle additives for viscosity control, can be used. Polyvinyl pyrrolidone, polyethylene glycol, polyvinyl acetate (PVA), polyvinyl alcohol, polyacrylic acid, polyethylene oxide, polyvinyl butyral (PVB); Other viscosity modifiers discussed below with reference to oilfield inks, including but not limited to diethylene glycol, propylene glycol, 2-ethyl oxazoline, may also be used.

Referring to Diode Ink Example 6, the liquid suspension of diodes 100-100L may further comprise an adhesive viscosity modifier, ie any of the aforementioned viscosity modifiers with additional adhesion. These adhesive viscosity modifiers are the first conductor (e.g., printing) during manufacture (e.g., printing) of the device (300, 300A, 300B, 300C, 300D, 700, 700A, 700B, 720, 730, 740, 750, 760, 770). For example, 310A) or the adhesion of diodes (100-100L) to substrates 305, 305A are both provided, followed by devices 300, 300A, 300B, 300C, 300D, 700, 700A, 700B, 720, 730, 740 , 750, 760, 770) further provides an infrastructure (eg, polymerizable) (when dried or cured) for holding the diodes 100 to 100L in place. While providing this adhesion, this viscosity modifier should also have some ability to dewett from the contacts of the diodes 100-100L, for example terminals 125 and/or 127. This adhesion, viscosity, and dewetting are the reasons why methylcellulose, methoxypropyl methylcellulose or hydroxy propyl methylcellulose resins are used in various exemplary embodiments, among other things. Other suitable viscosity modifiers can also be selected empirically.

Additional properties of the viscosity modifier or adhesive viscosity modifier are also useful and are within the scope of the present disclosure. First, this viscosity modifier should prevent the suspended diodes (100 to 100L) from sedimenting at the selected temperature. Second, these viscosity modifiers are applied to diodes (100 to 100L) in a uniform manner in the manufacturing process of devices (300, 300A, 300B, 300C, 300D, 700, 700A, 700B, 720, 730, 740, 750, 760, 770). Orient and help print the diodes (100-100L). Third, in some embodiments, the viscosity modifier should also function to buffer or protect the diode (100-100L) during the printing process, and in other aspects, the glass that serves to protect the diode 100-100L during the printing process. Inert particles such as beads are added (diode ink examples 17-19 discussed below).

Referring to diode ink Examples 3, 4 and 8, the liquid suspension of the diodes (100 to 100L) was added with a second solvent (Example 8) or a solvating agent (Example 3) or a wetting solvent (Example 4). And a number of embodiments are discussed in more detail below. This (first or second) solvent (as illustrated in FIG. 83, through the substrate 105, through-via structures 131, 133, 134, and/or the second, back metal layer 122) Ohmic contact between the conductor (e.g. 310A, which can be made of a conductive polymer such as silver ink, carbon ink or a mixture of silver ink and carbon ink) and diode 100-100L, and diode in subsequent device manufacturing In order to facilitate printing and drying of the ink, it is selected as a wetting agent (equivalently a solvating agent) or a rewetting agent, such as a non-polar resin solvent comprising, but not limited to, one or more dibasic esters. For example, when the diode ink is printed over the first conductor 310, the wetting agent or solvating agent partially dissolves the first conductor 310; When the wetting or solvating agent is subsequently extinguished, the first conductor 310 is re-strengthened again and makes contact with the diodes 100-100L.

The residue of the liquid or gel suspension of the diodes 100-100L is generally another third solvent, for example deionized water, and all ratios described herein are those of the liquid or gel suspension of the diodes 100-100L. It is assumed that the residue is such a third solvent (e.g. water) and all proportions described are by weight and not by volume or some other measure. It should also be noted that the various diode ink suspensions can all be mixed in a conventional atmospheric configuration, without requiring any particular composition of air or other contained or filtered environment.

Solvent selection can also be based on the polarity of the solvent. In an exemplary embodiment, diodes (100-100L) and other conductors (e.g., 310) during fabrication of devices 300, 300A, 300B, 300C, 300D, 700, 700A, 700B, 720, 730, 740, 750, 760, 770 ) To facilitate dewetting and at the same time be dissolved or solubilized in the viscosity modifier, a first solvent such as an alcohol may be selected as a polar or hydrophilic solvent.

Another useful property of the exemplary diode ink is illustrated by Example 7. For this exemplary aspect, the diode ink can be opaque when wetted in the printing process to aid in various printing processes such as registration. However, when dried or cured, the dried or cured diode ink is substantially optically transmissive at a selected wavelength, for example, so as not to substantially interfere with the emission of visible light generated by the diodes 100 to 100L, or It is transparent. However, in other exemplary aspects, the diode ink may also be substantially optically transmissive or transparent.

Another method of identifying an exemplary diode ink is based on the size of the diodes 100-100L as illustrated in Example 9, wherein the diodes 100-100L generally have dimensions less than about 450 μm, more specifically For example, any dimension is less than about 200 μm, more specifically, any dimension is less than about 100 μm, more specifically, any dimension is less than 50 μm, and more specifically, any dimension is less than 30 μm. In the exemplary embodiments shown, the diodes 100-100L are generally about 10 to 50 μm wide, or more specifically about 20 to 30 μm wide, and about 5 to 25 μm high, or a diameter (vertex to apex). (Measured face to face) about 25 to 28 μm and 8 to 15 μm in height or 9 to 12 μm in height. In some exemplary embodiments, the height of the diode 100-100L excluding the metal layer 120B forming the bump or protruding structure (i.e., the height of the side 121 including the GaN heterostructure) is about 5-15 μm, or more specifically Is 7 to 12 μm, or more specifically 8 to 11 μm, or more specifically 9 to 10 μm, or more specifically less than 10 to 30 μm, and the height of the metal layer 120B forming the bump or protruding structure is It is generally about 3 to 7 μm.

In other exemplary embodiments, the height of the diode (e.g., 100L) excluding the metal layer 120B forming the bump or protruding structure and the back metal 122 (i.e., the height of the side 121 including the GaN heterostructure) is about 10 Less than μm, or more specifically less than about 8 μm, or more specifically about 2 to 6 μm, or more specifically about 3 to 5 μm, or more specifically about 4.5 μm, The height of the metal layer 120B to be formed is generally about 3 to 7 μm, or more specifically about 5 to 7 μm, and the overall height of the diode 100L is less than about 15 μm, or more specifically less than about 12 μm, or more specifically Specifically, it is about 9 to 11 μm, or more specifically about 10 to 11 μm, or more specifically about 10.5 μm.

In other exemplary embodiments, the height of the diode (e.g., 100K) excluding the metal layer 120B forming the bump or protruding structure and the back metal 122 (i.e., the height of the side 121 including the GaN heterostructure) is about 10. Less than µm, or more specifically less than about 8 µm, or more specifically about 2 to 6 µm, or more specifically about 2 to 4 µm, or more specifically about 3.0 µm, The height of the metal layer 120B and the back metal 122 to be formed is generally about 3 to 7 μm, or more specifically about 4 to 6 μm, or more specifically about 5 μm, and the total height of the diode 100K is less than about 15 μm, Or more specifically less than about 14 μm, or more specifically about 12 to 14 μm, or more specifically about 13 μm. In other exemplary aspects, the height of the diode 100K including the metal layer 120B but not including the height of the back metal 122 forming the bump or protruding structure is about 5 to 10 μm.

This diode ink can also be confirmed by its electrical properties as illustrated in Example 10. In this exemplary embodiment, diodes 100-100L are suspended in at least one substantially non-insulating carrier or solvent, as opposed to an insulating binder, for example.

This diode ink can also be confirmed by its surface properties, as illustrated in Example 11. In this exemplary embodiment, the diode ink has a dewetting or contact angle of greater than 25 degrees or greater than 40 degrees, depending on the surface energy of the substrate used in the measurement (eg, 34 to 42 dynes).

Diode Ink Example 12:

A plurality of diodes 100 to 100L;

A first solvent comprising about 5% to 50% of N-propanol, terpineol or diethylene glycol, ethanol, tetrahydrofurfuryl alcohol, and/or cyclohexanol, or mixtures thereof;

A viscosity modifier comprising about 0.75% to 5.0% of a methoxy propyl methylcellulose resin, or a hydroxy propyl methylcellulose resin, or other cellulose or methylcellulose resin, or a mixture thereof;

A second solvent (or rewetting agent) comprising about 0.5% to 10% of a non-polar resin solvent such as a dibasic ester; And

Residual amount containing a third solvent such as water

Composition comprising a.

Diode Ink Example 13:

A plurality of diodes 100 to 100L;

A first solvent comprising about 15% to 40% of N-propanol, terpineol or diethylene glycol, ethanol, tetrahydrofurfuryl alcohol, and/or cyclohexanol, or mixtures thereof;

A viscosity modifier comprising about 1.25% to 2.5% of a methoxy propyl methylcellulose resin, or a hydroxy propyl methylcellulose resin, or other cellulose or methylcellulose resin, or a mixture thereof;

A second solvent (or rewetting agent) comprising about 0.5% to 10% of a non-polar resin solvent such as a dibasic ester; And

Residual amount containing a third solvent such as water

Composition comprising a.

Diode Ink Example 14:

A plurality of diodes 100 to 100L;

A first solvent comprising about 17.5% to 22.5% of N-propanol, terpineol or diethylene glycol, ethanol, tetrahydrofurfuryl alcohol, and/or cyclohexanol or mixtures thereof;

A viscosity modifier comprising about 1.5% to 2.25% of a methoxy propyl methylcellulose resin, or a hydroxy propyl methylcellulose resin, or other cellulose or methylcellulose resin, or a mixture thereof;

A second solvent (or rewetting agent) comprising about 0.0% to 6.0% of at least one dibasic ester; And

Residual amount containing a third solvent such as water

A composition comprising, wherein the viscosity of the composition is substantially from about 5,000 cps to about 20,000 cps at 25°C.

Diode Ink Example 15:

A plurality of diodes 100 to 100L;

A first solvent comprising about 20% to 40% of N-propanol, terpineol or diethylene glycol, ethanol, tetrahydrofurfuryl alcohol, and/or cyclohexanol, or mixtures thereof;

A viscosity modifier comprising about 1.25% to 1.75% of a methoxy propyl methylcellulose resin, or a hydroxy propyl methylcellulose resin, or other cellulose or methylcellulose resin, or a mixture thereof;

A second solvent (or rewetting agent) comprising about 0% to 6.0% of at least one dibasic ester; And

Residual amount containing a third solvent such as water

A composition comprising, wherein the viscosity of the composition is substantially from about 1,000 cps to about 5,000 cps at 25°C.

Diode Ink Example 16:

A plurality of diodes 100 to 100L having a diameter (width and/or length) of about 10 to 50 μm and a height of 5 to 25 μm;

menstruum; And

Viscosity modifier

Composition comprising a.

Diode Ink Example 17:

A plurality of diodes 100 to 100L;

menstruum;

Viscosity modifiers; And

At least one mechanical stabilizer or spacer

Composition comprising a.

Diode Ink Example 18:

A plurality of diodes 100 to 100L having a diameter (width and/or length) of about 10 to 50 μm and a height of 5 to 25 μm;

menstruum;

Viscosity modifiers; And

A plurality of inert particles having a size range of about 10 to 50 μm

Composition comprising a.

Diode Ink Example 19:

A plurality of diodes 100 to 100L having a diameter (width and/or length) of about 20 to 30 μm and a height of about 9 to 15 μm;

menstruum;

Viscosity modifiers; And

A plurality of nearly optically transparent and chemically inert particles with a size range of about 15 to about 25 μm

Composition comprising a.

Diode Ink Example 20:

A plurality of diodes 100 to 100L having a diameter (width and/or length) of about 10 to 50 μm and a height of 5 to 25 μm;

A first solvent containing alcohol;

A second solvent containing glycol;

A viscosity modifier comprising about 0.10% to 2.5% of a methoxy propyl methylcellulose resin, or a hydroxy propyl methylcellulose resin, or other cellulose or methylcellulose resin, or a mixture thereof; And

A plurality of nearly optically transparent and chemically inert particles with a size range of about 10 to about 50 μm

Composition comprising a.

Diode Ink Example 21:

A plurality of diodes 100 to 100L having a diameter (width and/or length) of about 10 to 50 μm and a height of 5 to 25 μm;

A mixture of at least a first solvent and a second solvent different from the first solvent (N-propanol, isopropanol, dipropylene glycol, diethylene glycol, propylene glycol, 1-methoxy-2-propanol, N-octanol, ethanol, About 15% to 99.99% of at least two solvents selected from the group consisting of tetrahydrofurfuryl alcohol, cyclohexanol, and mixtures thereof); And

Viscosity modifier comprising about 0.10% to 2.5% of methoxy propyl methylcellulose resin, or hydroxy propyl methylcellulose resin, or other cellulose or methylcellulose resin, or mixtures thereof

Composition comprising a.

Diode Ink Example 22:

A plurality of diodes 100 to 100L having a diameter (width and/or length) of about 10 to 50 μm and a height of 5 to 25 μm;

A mixture of at least a first solvent and a second solvent different from the first solvent (N-propanol, isopropanol, dipropylene glycol, diethylene glycol, propylene glycol, 1-methoxy-2-propanol, N-octanol, ethanol, About 15% to 99.99% of at least two solvents selected from the group consisting of tetrahydrofurfuryl alcohol, cyclohexanol, and mixtures thereof);

A viscosity modifier comprising about 0.10% to 2.5% of a methoxy propyl methylcellulose resin, or a hydroxy propyl methylcellulose resin, or other cellulose or methylcellulose resin, or a mixture thereof;

About 0.01% to 2.5% of a plurality of substantially optically transparent and chemically inert particles having a size range of about 10 to about 50 μm

Composition comprising a.

Diode Ink Example 23:

A plurality of diodes 100 to 100L having a diameter (width and/or length) of about 10 to 50 μm and a height of 5 to 25 μm;

A mixture of at least a first solvent and a second solvent different from the first solvent (N-propanol, isopropanol, dipropylene glycol, diethylene glycol, propylene glycol, 1-methoxy-2-propanol, N-octanol, ethanol, About 15% to 50.0% of at least two solvents selected from the group consisting of tetrahydrofurfuryl alcohol, cyclohexanol, and mixtures thereof);

A viscosity modifier comprising about 1.0% to 2.5% of a methoxy propyl methylcellulose resin, or a hydroxy propyl methylcellulose resin, or other cellulose or methylcellulose resin, or a mixture thereof;

About 0.01% to 2.5% of a plurality of substantially optically transparent and chemically inert particles having a size range of about 10 to about 50 μm; And

Residual amount containing a third solvent such as water

Composition comprising a.

Diode Ink Example 24:

A plurality of diodes 100 to 100L having a diameter (width and/or length) of about 10 to 50 μm and a height of 5 to 25 μm;

From the group consisting of N-propanol, isopropanol, dipropylene glycol, diethylene glycol, propylene glycol, 1-methoxy-2-propanol, N-octanol, ethanol, tetrahydrofurfuryl alcohol, cyclohexanol, and mixtures thereof A first solvent comprising about 15% to 40% of the selected solvent;

A second solvent different from the first solvent (N-propanol, isopropanol, dipropylene glycol, diethylene glycol, propylene glycol, 1-methoxy-2-propanol, N-octanol, ethanol, tetrahydrofurfuryl alcohol, cyclo Containing about 2% to 10% of a solvent selected from the group consisting of hexanol and mixtures thereof);

A third solvent different from the first and second solvents (N-propanol, isopropanol, dipropylene glycol, diethylene glycol, propylene glycol, 1-methoxy-2-propanol, N-octanol, ethanol, tetrahydrofurfuryl Containing about 0.01% to 2.5% of a solvent selected from the group consisting of alcohol, cyclohexanol, and mixtures thereof);

A viscosity modifier comprising about 1.0% to 2.5% of a methoxy propyl methylcellulose resin, or a hydroxy propyl methylcellulose resin, or other cellulose or methylcellulose resin, or a mixture thereof; And

Residual amount containing a third solvent such as water

Composition comprising a.

Diode Ink Example 25:

A plurality of diodes 100 to 100L having a diameter (width and/or length) of about 10 to 50 μm and a height of 5 to 25 μm;

From the group consisting of N-propanol, isopropanol, dipropylene glycol, diethylene glycol, propylene glycol, 1-methoxy-2-propanol, N-octanol, ethanol, tetrahydrofurfuryl alcohol, cyclohexanol, and mixtures thereof A first solvent comprising about 15% to 30% of the selected solvent;

A second solvent different from the first solvent (N-propanol, isopropanol, dipropylene glycol, diethylene glycol, propylene glycol, 1-methoxy-2-propanol, N-octanol, ethanol, tetrahydrofurfuryl alcohol, cyclo Containing about 3% to 8% of a solvent selected from the group consisting of hexanol and mixtures thereof);

A third solvent different from the first and second solvents (N-propanol, isopropanol, dipropylene glycol, diethylene glycol, propylene glycol, 1-methoxy-2-propanol, N-octanol, ethanol, tetrahydrofurfuryl Containing about 0.01% to 2.5% of a solvent selected from the group consisting of alcohol, cyclohexanol, and mixtures thereof);

A viscosity modifier comprising about 1.25% to 2.5% of a methoxy propyl methylcellulose resin, or a hydroxy propyl methylcellulose resin, or other cellulose or methylcellulose resin, or a mixture thereof;

About 0.01% to 2.5% of a plurality of substantially optically transparent and chemically inert particles having a size range of about 10 to about 50 μm; And

Residual amount of third solvent such as water

Composition comprising a.

Diode Ink Example 26:

A plurality of diodes 100 to 100L having a diameter (width and/or length) of about 10 to 50 μm and a height of 5 to 25 μm;

From the group consisting of N-propanol, isopropanol, dipropylene glycol, diethylene glycol, propylene glycol, 1-methoxy-2-propanol, N-octanol, ethanol, tetrahydrofurfuryl alcohol, cyclohexanol, and mixtures thereof A first solvent comprising about 40% to 60% of the selected solvent;

A second solvent different from the first solvent (N-propanol, isopropanol, dipropylene glycol, diethylene glycol, propylene glycol, 1-methoxy-2-propanol, N-octanol, ethanol, tetrahydrofurfuryl alcohol, cyclo Including about 40% to 60% of a solvent selected from the group consisting of hexanol and mixtures thereof); And

Viscosity modifier comprising about 0.10% to 1.25% of methoxy propyl methylcellulose resin, or hydroxy propyl methylcellulose resin, or other cellulose or methylcellulose resin, or mixtures thereof

Composition comprising a.

Diode Ink Example 27:

A plurality of diodes 100 to 100L having a diameter (width and/or length) of about 10 to 50 μm and a height of 5 to 25 μm;

From the group consisting of N-propanol, isopropanol, dipropylene glycol, diethylene glycol, propylene glycol, 1-methoxy-2-propanol, 1-octanol, ethanol, tetrahydrofurfuryl alcohol, cyclohexanol and mixtures thereof A first solvent comprising about 40% to 60% of the selected solvent;

A second solvent different from the first solvent (N-propanol, isopropanol, dipropylene glycol, diethylene glycol, propylene glycol, 1-methoxy-2-propanol, 1-octanol, ethanol, tetrahydrofurfuryl alcohol, cyclo Including about 40% to 60% of a solvent selected from the group consisting of hexanol and mixtures thereof);

A viscosity modifier comprising about 0.10% to 1.25% of methoxy propyl methylcellulose resin, or hydroxy propyl methylcellulose resin, or other cellulose or methylcellulose resin, or mixtures thereof; And

About 0.01% to 2.5% of a plurality of substantially optically transparent and chemically inert particles having a size range of about 10 to 50 μm

Composition comprising a.

Referring to Diode Ink Examples 12 to 27, in an exemplary embodiment, another alcohol, N-propanol ("NPA") (and/or N-octanol (e.g., 1-octanol ( Or any of various secondary or tertiary octanol isomers), 1-methoxy-2-propanol, terpineol, diethylene glycol, dipropylene glycol, tetrahydrofurfuryl alcohol, or cyclohexanol) Replaces all or most of the above IPA In the case of diodes 100-100L, which are generally or mostly deposited on the bottom of the vessel, remove the IPA, add NPA, and shake the mixture of IPA, NPA and diodes 100-100L at room temperature. After allowing or mixing, 100-100L of diodes are re-precipitated to the bottom of the vessel, part of the mixture of IPA and NPA is removed, and additional NPA (approximately 120-140 ml) is added, this NPA addition and IPA and NPA The mixture removal process of the mixture is generally repeated twice, mainly NPA, 100 to 100 L of diodes, traces or otherwise small amounts of IPA, and also generally traces or otherwise small amounts of potentially residual wafer adhesive and wafer adhesion solvent 170. A mixture is produced In an exemplary embodiment, the residual or trace amount of IPA remaining is less than about 1%, more typically about 0.4% In addition, in an exemplary embodiment, the final proportion of NPA in the exemplary diode ink is: If present, about 0.5% to 50%, or more specifically about 1.0% to 10%, or more specifically about 3% to 7%, or in other aspects, more specifically, depending on the type of printing to be used. For example about 15% to 40%, or more specifically about 17.5% to 22.5%, or more specifically about 25% to about 35% Terpineol and/or diethylene glycol with or in place of NPA When used as, the typical concentration of terpineol is about 0.5% to 2.0%, and diethylene glycol Typical concentrations of Cole are about 15% to 25%. The IPA, NPA, rewetting agent, deionized water (and other compounds and mixtures used to form exemplary diode inks) are used up to about 25 μm or less to remove particle contaminants of a larger or equal scale than 100 to 100 L diodes. It may be filtered.

Then, substantially a mixture of NPA or other first solvent and 100 to 100L of diodes is added, and a viscosity modifier such as methoxy propyl methylcellulose resin, hydroxy propyl methylcellulose resin, or other cellulose or methylcellulose resin is added. Simply mix or stir. In an exemplary embodiment, E, available from The Dow Chemical Company (www.dow.com) and Hercules Chemical Company, Inc. (www.herchem.com) Using -3 and E-10 methylcellulose resins, from about 0.10% to 5.0%, or more specifically about 0.2% to 1.25%, or more specifically about 0.3% to 0.7%, or More specifically about 0.4% to 0.6%, or more specifically about 1.25% to 2.5%, or more specifically 1.5% to 2.0%, or more specifically 2.0% or less. In an exemplary embodiment, about 3.0% E-10 formulation is used, which is diluted with deionized and filtered water to produce the final ratio in the finished composition. Other viscosity modifiers may equally be used, including those discussed above and those discussed below in connection with dielectric inks. Viscosity modifiers provide sufficient viscosity for the diodes 100-100L, so they remain substantially dispersed in suspension and do not precipitate out of the liquid or gel suspension, especially under refrigeration.

Then, as mentioned above, it is possible to add a second solvent (or a first solvent in the case of Examples 3 and 4), generally a non-polar resin solvent such as one or more dibasic esters. In an exemplary embodiment, a mixture of two dibasic esters is from about 0.0% to about 10%, or more specifically from about 0.5% to about 6.0%, or more specifically from about 1.0% to about 5.0%, or even more. Specifically, it is used to reach a final ratio of about 2.0% to about 4.0%, or more specifically about 2.5% to about 3.5%, for example, dimethyl glutarate, or about 2/3 of dimethyl glutarate. A mixture of about 1/3 of dimethyl succinate is used in a final ratio of about 3.73% (e.g., DBE-5 or DBE available from Invista USA, Wilmington, Delaware, respectively). Using -9, they also have traces or otherwise small amounts of impurities, for example about 0.2% dimethyl adipate and 0.04% water). If necessary or desired, a third solvent such as deionized water is used to control the relative proportions and reduce the viscosity. In addition to the dibasic ester, other second solvents that can be used equally include, for example, but not limited to, water; Alcohol such as methanol, ethanol, N-propanol (including 1-propanol, 2-propanol (isopropanol), 1-methoxy-2-propanol), isobutanol, butanol (1-butanol, 2-butanol Including), pentanol (including 1-pentanol, 2-pentanol, and 3-pentanol), N-octanol (including 1-octanol, 2-octanol, and 3-octanol), tetrahydrofur Furyl alcohol, cyclohexanol; Ethers such as methyl ethyl ether, diethyl ether, ethyl propyl ether, and polyethers; Ethers such as ethyl acetate, dimethyl adipate, propylene glycol monomethyl ether acetate (and dimethyl glutarate and dimethyl succinate as mentioned above); Glycols such as ethylene glycol, diethylene glycol, polyethylene glycol, propylene glycol, dipropylene glycol, glycol ether, glycol ether acetate; Carbonates such as propylene carbonate; Glycerol, such as glycerin; Acetonitrile, tetrahydrofuran (THF), dimethyl formamide (DMF), N-methyl formamide (NMF), dimethyl sulfoxide (DMSO); And mixtures thereof. In an exemplary embodiment, the molar ratio of the amount of the first solvent to the amount of the second solvent is at least about 2 to 1 range, more specifically at least about 5 to 1 range, more specifically at least about 12 to 1 range, or Above; In other cases, the functionality of the two solvents may be combined in a single component with one polar or non-polar solvent used in the exemplary embodiment. In addition, in addition to the dibasic esters discussed above, exemplary solvating agents, wetting agents or solubilizing agents include, for example, but not limited to, with 1-propanol (or isopropanol) to form a suspension medium, as also mentioned below. Propylene glycol monomethyl ether acetate (C ₆ H ₁₂ O ₃ ) used in an approximate 1:8 molar ratio (or 22:78 by weight) (sold under the trade name “PM Acetate” by Eastman), and Various dibasic esters, and mixtures thereof, such as dimethyl succinate, dimethyl adipate and dimethyl glutarate (these are trade names DBE, DBE-2, DBE-3, DBE-4, DBE-5 from Invista, Available as various mixtures under DBE-6, DBE-9 and DBE-IB). In an exemplary embodiment, DBE-9 is being used. The molar ratio of solvents will vary based on the solvents selected, with 1:8 and 1:12 being typical ratios.

With reference to diode ink examples 17-20, 22, 25 and 27, one or more mechanical stabilizers or spacers, such as chemically inert particles and/or optically transparent particles, such as typically silicates or borosilicates. It includes, but is not limited to, a glass bead consisting of. In various exemplary embodiments, about 0.01% to 2.5% of glass spheres or beads having an average size or size range of about 10 to 30 μm, or more particularly about 12 to 28 μm, or more particularly about 15 to 25 μm, Or more particularly about 0.05% to 1.0%, or more particularly about 0.1% to 0.3% by weight. These particles are because the diodes 100 to 100L are initially held in place only through a relatively thin film of dried or cured diode ink (Figs. 89 and 90), for example a sheet spacer while the printed sheets are being fed to the printing press. By acting as a mechanical stability and/or space during the printing process. In general, the concentration of inert particles is sufficiently low so that the number of inert particles per unit area (after deposition, of the device area) is less than the density of diodes 100 to 100L per unit area. The inert particles provide mechanical stability and space, so that when the conductive layer 310 and/or the dielectric layer 315 is deposited, the diodes 100 to 100L are separated when the printed sheets slide together while being fed to the printing press. Because it tends to prevent it from being lost, it provides stability similar to that of a ball bearing. After the conductive layer 310 and/or dielectric layer 315 is deposited, the diodes 100-100L are effectively held or fixed in place, and the likelihood of escaping is significantly reduced. The inert particles are also held or fixed in place, but do not perform additional functions in the finished devices 300, 700, 720, 730, 740, 750, 760, 770 and are effectively electrically and chemically inert. A cross-section of the plurality of inert particles 292 is illustrated in FIG. 94 and not separately illustrated in other drawings, but may be included in any of the other illustrated devices.

Diode Ink Examples 20-27 are illustrated to provide further more specific examples of diode ink compositions effective in the manufacture of various device 300, 700, 720, 730, 740, 750, 760, 770 aspects. Diode ink Example 20 and other examples with cellulose or methylcellulose resins such as hydroxy propyl methylcellulose resins are also non-limiting with additional solvents not otherwise mentioned, such as water or 1-methoxy-2-propanol. Can be included as.

In general, various diode inks are mixed in the above-described order, but various first solvents, viscosity modifiers, second solvents, and third solvents (e.g. water) may be added in other orders or mixed together, It should be noted that both and all are within the scope of this disclosure. For example, deionized water (as a third solvent) is added first, followed by 1-propanol and DBE-9, then a viscosity modifier, and then an additional, for example, if required to control the relative ratio and viscosity. Water can also be added.

Subsequently, substantially a mixture of a first solvent (e.g. NPA), 100 to 100 L diodes, a viscosity modifier, a second solvent, and a third solvent (e.g. water) (if present) is added to the mixture, for example air. Mixing or shaking is performed using an impeller mixer for about 25 to 30 minutes at room temperature under atmospheric atmosphere at a relatively low speed to avoid incorporation. In an exemplary embodiment, the final volume of the diode ink is typically about 1/2 to 1 L (per wafer) containing 100 to 100 L of diodes from 9 to 10 million, and the concentration of diodes 100 to 100 L is, for example, as described below. Depending on the concentration required for the selected printing LED or photovoltaic device, it can be adjusted up or down as required, and exemplary viscosity ranges for different types of printing or different types of diodes 100 to 100L are described above. First solvents such as NPA also act as preservatives and tend to inhibit bacterial and fungal growth for storage of the final diode ink. When other first solvents are to be used, a separate preservative, inhibitor or fungicide may also be added. In an exemplary embodiment, additional surfactants or defoaming agents for printing may be used as an option, but are not required for proper functionalization and exemplary printing.

The concentration of diodes 100 to 100L can be adjusted according to the device requirements. For example, in the case of a lighting application, a low surface brightness lamp may use about 25 diodes 100 to 100L per 1 cm 2 using a diode ink of about 12,500 diodes/ml (cm 3) diode at a concentration of 100 to 100 L of diodes. . In another exemplary embodiment, one wafer 150 may contain 100-100L of about 7.2 million diodes for about 570 ml of diode ink. Each 1 ml of diode ink can be used to cover about 500 cm 2 in printing, and 570 ml of diode ink covers about 28.8 m 2. Also, for example for a very high surface brightness lamp, a concentration of about 50,000 diodes/ml (cm 3) of 100 to 100 L would be required to use 100 to 100 L of about 100 diodes per cm 2.

75 is a flow chart illustrating an exemplary method aspect of making a diode ink, and provides a useful overview. The method starts from the start step 200 and releases the diodes 100-100L from the wafers 150 and 150A (step 205). As discussed above, this step attaches the wafer on the first diode side to the wafer holder with wafer bond adhesive using laser lift-off, and grinds and/or polishes the second, back side of the wafer and/or Etch to expose singulation trenches, remove any additional substrate or GaN, if required or specified, and dissolve the wafer bond adhesive in a solvent such as IPA or another solvent such as NPA or any other solvents described above. It includes releasing diodes 100 to 100L. When using IPA, the method includes an optional step 210 of transferring 100-100L of diodes to a (first) solvent such as NPA. The method then adds 100 to 100 L of diodes in a first solvent to a viscosity modifier such as methylcellulose (step 215), and one or more second solvents, for example one or two dibasic esters, e.g. For example, dimethyl glutarate and/or dimethyl succinate are added (step 220). Any weight ratio can be adjusted using a third solvent such as deionized water (step 225). Then, in step 230, the method comprises a plurality of diodes 100-100L, a first solvent, a viscosity modifier, a second solvent (and a plurality of chemically and electrically inert particles, e.g., glass beads), and any further desorption. The ionized water is mixed for about 25 to 30 minutes at room temperature (about 25° C.) under an atmospheric atmosphere, and the final viscosity is about 1,000 cps to about 25,000 cps. Thereafter, the method may be terminated (return step 235). It should also be noted that steps 215, 220, and 225 can occur in other orders as described above and can be repeated as needed and any additional mixing steps can be used.

76 is a perspective view of an exemplary device 300 aspect. 77 is a plan (or top) view illustrating an exemplary electrode structure of a first conductive layer for an exemplary device aspect. 78 is a first cross-sectional view (through the 30-30' plane of FIG. 76) of an exemplary device 300 aspect. 79 is a second cross-sectional view (through the 31-31' plane of FIG. 76) of an exemplary device 300 aspect. 80 is a perspective view of an exemplary second device 700 aspect. 81 is a first cross-sectional view (through the 88-88' plane of FIG. 80) of an exemplary second device 700 aspect. 82 is a first cross-sectional view (through the 87-87' plane of FIG. 80) of an exemplary second device 700 aspect. 83 is a second cross-sectional view of exemplary diodes 100J, 100K, 100D and 100E coupled to first conductor 310A. 87 is a cross-sectional view of an exemplary third device 300C embodiment for providing light emission from two sides. 88 is a cross-sectional view of an exemplary fourth device 300D aspect for providing light emission from two sides. 89 is a more detailed partial cross-sectional view of an exemplary first device aspect. 90 is a more detailed partial cross-sectional view of an exemplary second device aspect. 91 is a perspective view of a fifth exemplary device 720 aspect. 92 is a cross-sectional view (through the 57-57' plane of FIG. 91) of an exemplary fifth device 720 aspect. 93 is a perspective view of a sixth exemplary device 730 aspect. FIG. 94 is a cross-sectional view (through the 58-58' plane of FIG. 93) of an exemplary sixth device 730 aspect. 95 is a perspective view of an exemplary seventh device 740 aspect. 96 is a cross-sectional view (through the 59-59' plane of FIG. 95) of an exemplary seventh device 740 aspect. 97 is a perspective view of an eighth exemplary device 750 aspect. FIG. 98 is a cross-sectional view (through the 61-61' plane of FIG. 97) of an exemplary eighth device 750 aspect. FIG. 99 is a plan (or top) view illustrating an exemplary second electrode structure of a first conductive layer for an exemplary device aspect. FIG. 101 is a top (or top) view of exemplary ninth and tenth devices 760, 770 aspects, typically used with the system 800, 810 aspects illustrated in FIG. 100; FIG. 102 is a cross-sectional view (through the 63-63' plane of FIG. 101) of an exemplary ninth device 760 aspect. FIG. 103 is a cross-sectional view (through the 63-63' plane of FIG. 101) of an exemplary tenth device 770 aspect. 109 is a photograph of an exemplary embodiment 300A of emitting light.

76 to 79, in the device 300, one or more first conductors 310 are deposited over a substrate 305 on the first side, followed by a plurality of diodes 100 to 100K (the second terminal 127 to the conductor 310). Coupling), dielectric layer 315, second conductor(s) 320 (typically transparent conductors coupling to the first terminals), optionally followed by stabilization layer 335, light emitting (or light emitting) layer 325, and protection A layer or coating 330 is deposited. In this device 300 aspect, when an optically opaque substrate 305 and first conductor(s) 310 are used, light is primarily emitted or absorbed through the upper first side of the device 300, and the optically transmissive substrate 305 and the first conductor (S) When 310 is used, light is emitted or absorbed from both sides of the device 300, especially if it is excited with AC voltage to excite diodes 100-100K having a first or second orientation.

80-83, in device 700, a plurality of diodes 100L are deposited over a first side of a substrate 305 (which is optically transmissive and thus referred to herein as substrate 305A), followed by one or more first conductors. S 310 (coupling the second terminal 127 to the conductor 310), dielectric layer 315, second conductor(s) 320 (coupling to the first terminals) (this may be optically transmissive or may be optically transmissive) Not), and optionally a stabilizing layer 335 and a protective layer or coating 330 are then deposited. An optional luminescent (or light emitting) layer 325, before or after any of the deposition steps on the first side of the substrate 305, along with any other protective layer or coating 330, the second side of the substrate 305. Can be applied to. In this device 700 aspect, where at least one optically opaque second conductor 320 is used, light is primarily emitted or absorbed through the substrate 305A of the device 700 on the second side, and at least one optically transmissive second conductor 320 In this case, light is emitted or absorbed on both sides of the device 700.

The various devices 300, 700, 720, 730, 740, 750, 760, 770 aspects can be printed as flexible sheets of LED-based lighting or other luminaires, for example, they are architectural shapes, etc. Curled, folded in any of a variety of shapes and designs of any kind, including, but not limited to, folded and creased origami shapes, Edison bulb shapes, fluorescent bulb shapes, chandelier shapes of artistic or fancy design. ), twisted, spiraled, flattened, knotted, creased, and otherwise molded, one such curled and folded Edison bulb shape is a system It is illustrated in FIG. 100 as 800 and 810. The various apparatus 300, 700 embodiments can also be combined in various ways, for example back-to-back, to have light emitted or absorbed from both sides of the obtained device. . For example and without limitation, two devices 300 may be combined back-to-back on the second side of each substrate 305 to form a device 300C aspect, or printing device 300 on both sides of the substrate 305 To form the device 300D aspect, which are illustrated in cross-sectional views in FIGS. 87 and 88, respectively. In addition, for example, but not limited to, the two devices 700 are also combined back-to-back on the non-substrate 305, the first side, to provide light emission from both sides of the device obtained. You may.

91 and 92, in device 720, a first conductor 310 is deposited as one or more layers over a substrate 305 on the first side, followed by a carbon contact 322A for coupling to the conductor 310, followed by a plurality of Diodes 100 to 100K (coupling the second terminal 127 to the conductor 310), a dielectric layer 315, and a second conductor 320 (generally a transparent coupling to the first terminals) deposited as one or more layers. Conductors) are deposited, followed by a carbon contact 322B for coupling to said conductor 320, optionally followed by a stabilizing layer 335, a light emitting (or light emitting) layer 325, and a protective layer or coating 330. In this device 300 embodiment, the light is mainly emitted or absorbed through the upper first side of the device 720, and when an optically transmissive substrate 305 and first conductor 310 are used, especially if excited with an AC voltage, the light is transmitted to the device. Emitted or absorbed from both sides of 720.

93 and 94, in the device 730, a substantially optically transmissive first conductor 310 is deposited as one or more layers over the optically transmissive substrate 305A on the first side, followed by a carbon contact 322A for coupling to the conductor 310. Is deposited, followed by a plurality of diodes 100-100K having a plurality of inert particles 292 (coupling the second terminal 127 to the conductor 310), a dielectric layer 315, and a second conductor deposited as one or more layers. 320 (typically transparent conductors coupling to the first terminals) is deposited, followed by a carbon contact 322B for coupling to the conductor 320, optionally followed by a stabilizing layer 335, a first light emission (or light emission) ) A layer 325, and a protective layer or coating 330 are deposited, followed by a second light emitting (or light emitting) layer 325, and a protective layer or coating 330 on the second side of the substrate 305A. In this device 730 aspect, light is emitted or absorbed through the top first side and the bottom second side of the device 730. In addition, the use of the second light emitting (or light emitting) layer 325 may also shift the wavelength of light emitted through the second surface (in addition, the first light emitting (or light emitting) layer 325 may Shifts the spectrum of the emitted light through the first side).

95 and 96, in the device 740, a plurality of diodes 100L are deposited on the first side of the substrate 305 (which is optically transmissive and is also referred to herein as the substrate 305A), followed by a first conductor 310. A second conductor 320 deposited as one or more layers (coupling the conductor 310 to the second terminal 127) and then carbon contact 322A, a dielectric layer 315 for coupling to the conductor 310, and also as one or more layers. Coupling to the first terminals) is deposited, followed by a carbon contact 322B for coupling to the conductor 320, optionally followed by a stabilizing layer 335 and a protective layer or coating 330. An optional luminescent (or light emitting) layer 325, before or after any of the deposition steps on the first side of the substrate 305, along with any other protective layer or coating 330, the second side of the substrate 305. Can be applied to. In this device 740 aspect, light is primarily emitted or absorbed through the substrate 305A of the device 740 on the second side (and also has an arbitrary shift in wavelength from the first luminous (or light emitting) layer 325), If more than one optically transmissive second conductor 320 is used, light is emitted or absorbed on both sides of the device 740.

97 and 98, in device 750, a plurality of diodes 100L are deposited on the first side of a substrate 305 (which is optically transmissive, and is also referred to herein as substrate 305A), followed by a first conductor 310. A substantially optically transmissive agent deposited as one or more layers (coupling the conductor 310 to the second terminal 127) and then carbon contacts 322A, dielectric layer 315, and also as one or more layers for coupling to the conductor 310. 2 conductor 320 (coupling to the first terminals) is deposited, followed by carbon contact 322B for coupling to the conductor 320, and optionally then a stabilizing layer 335, any first light emitting (or light emitting) layer 325 , And a protective layer or coating 330 are deposited. An optional second emissive (or light emitting) layer 325 is formed of the substrate 305A together with any other protective layer or coating 330 before or after any of the deposition steps on the first side of the substrate 305. Can be applied on two sides. In this device 750 aspect, light is emitted or absorbed through both the top first side and the bottom second side of the device 750, and also any of the wavelengths from the first and second emitting (or light emitting) layers 325. Have a move.

Devices 760 and 770 will be described in more detail below with reference to FIGS. 100-103, which also differ from other illustrated devices in that they also use a third conductor 312 which is typically deposited as one or more layers. Additionally, device 770 also illustrates the use of barrier layer 318, which is discussed in more detail below.

As mentioned above, the devices 300, 700, 720, 730, 740, 750, 760, 770 are by depositing (e.g., printing) a plurality of layers on a substrate 305, i.e., devices 300, 720, 730, For 750, one or more first conductors 310 are deposited on the substrate 305 as a layer or plurality of conductors 310, followed by diodes 100-100L (with a wet film thickness of about 18-20 μm or more) in a liquid or gel suspension. As (i.e., diode ink), evaporating or dispersing the liquid/gel portion of the suspension, and for devices 700, 740, 750, diodes 100 to 100L (about 18 to 20 μm or more wet film Thickness) as a liquid or gel suspension on the first side of the optically transmissive substrate 305A (i.e., diode ink), evaporating or dispersing the liquid/gel portion of the suspension, and then one or more first conductors 310 It is formed by depositing.

When the liquid or gel suspension of the diodes 100 to 100L is dried or cured, the components of the diode ink (in particular, the viscosity modifier or adhesive viscosity modifier as mentioned above) are around the diodes 100 to 100L, FIGS. 89 and 90 A relatively thin film, coating, lattice or mesh, exemplified as Membrane 295 in, is typically about 50 nm to about 300 nm thick (when fully cured or dried), depending on the concentration of the viscosity modifier used (e.g., low concentration viscosity. About 50-100 nm for the modulator, and about 200-300 nm for the high concentration viscosity modifier), helping to keep them in place on the substrate 305 or the first conductor(s) 310. The deposited film 295 may be continuous as illustrated in FIG. 89 to surround the diodes 100-100L, or discontinuous as illustrated in FIG. 90 leaving gaps and only partially surrounding the diodes 100-100L. It can be wrapped. Terminals 125 and 127 are typically coated with a diode ink film 295, but generally there is sufficient surface roughness of terminals 125 and 127 so that film 295 does not interfere with the manufacture of electrical connections to the first and second conductors 310 and 320. Does not. Membrane 295 is typically a cured or dried form of a viscosity modifier, and potentially also a first or second as mentioned below with reference to small or trace amounts of various solvents, e.g., cured or dried diode ink embodiments. Contains 2 solvents. Further, as discussed in more detail below, viscosity modifiers can also be used to form the barrier layer 318 discussed below with reference to FIG. 103.

For device 300, diodes 100-100K are physically and electrically coupled to one or more first conductors 310A, and for device 700, diode 100K is physically coupled to substrate 305, and subsequently one or more first conductors. Diodes 100-100L are in the first orientation (first terminal 125 in the top direction) because they are coupled to conductors 310 and are deposited suspended in any orientation in a liquid or gel in both device 300 and 700 embodiments. , May be in a second orientation (first terminal 125 in the lower direction), or possibly in a third orientation (first terminal 125 is in the lateral direction). In addition, diodes 100-100L are generally very irregularly separated within devices 300, 700, because they are deposited while suspended in a liquid or gel. Additionally, as mentioned above, in exemplary embodiments, the diode ink has a size range of about 10 to 30 μm, or more particularly about 12 to 28 μm, or more particularly about 15 to 25 μm, Chemically inert conventional optically transmissive particles, such as glass beads.

In a first top orientation or direction, as illustrated in FIG. 83, the first terminal 125 (metal layer 120B forming a bump or protruding structure for diodes 100-100J or metal layer 122 of diode 100K) is oriented upwards and , Diodes 100-100K are second terminal 127 (this may be metal layer 120B for diode 100K), or back metal layer 122 as illustrated for diode 100J, or diode 100D (any back metal layer of diode 100J). 122), or to one or more first conductors 310A via a central via 131 as illustrated for, or a peripheral via 134 (not illustrated separately), or a substrate 105 as illustrated for diode 100E. . In the second bottom orientation or direction, as illustrated in FIGS.78 and 79, the first terminal 125 is oriented downward, and the diodes 100-100K are the first terminal 125 (e.g., a bump for diodes 100-100J or It may be coupled or coupled to one or more of the first conductors 310A via a metal layer 120B or a metal layer 122 of a diode 100K forming the protruding structure.

In the case of the diode 100L, the diode 100L may be oriented in a first top orientation or direction in which both the first terminal 125 and the second terminal 127 are oriented upward, as illustrated in FIGS. 81 and 82, or is not illustrated separately, Both the first terminal 125 and the second terminal 127 may be oriented in a second lower orientation or direction in which they are oriented downward. For this bottom orientation, the first terminal 125 may be in electrical contact with one or more of the first conductors 310, while the second terminal 127 is more likely to be in the dielectric layer 135 and does not contact the second conductor 320, It should be noted that diode 100L becomes electrically insulated and non-functional when it has a second orientation, which may be desirable in many aspects.

As long as the diodes 100-100L are deposited suspended in a liquid or gel in any 360-degree orientation with an intermediate spacing between them, exactly where on the substrate 305A or one or more of the first conductors 310 and in any orientation. It is not known in advance for sure (e.g., within a non-defect rate of 4-6 sigma on average for the highest quality manufacturing). More precisely, there will be statistical distributions for both the spacing of the diodes 100-100L from each other and the orientation of the diodes 100-100L (first top or second bottom). What can be said with great certainty is that at least one diode 100-100L of potentially millions of diodes 100-100L terminates in a second orientation because it is deposited while dispersed or suspended in a liquid or gel.

Thus, the distribution and orientation of diodes 100 to 100L in devices 300, 700, 720, 730, 740, 750, 760, and 770 can be statistically described. For example, prior to deposition, it is not known or determinable that any particular diode 100-100L will be placed on the substrate 305A or one or more of the first conductors 310 exactly where and in what orientation and will remain in place, but on average A number of diodes 100-100L will be present in a specific orientation in a specific concentration of diodes 100-100L per unit area (eg, without limitation, 25 diodes 100-100L per unit area).

Thus, diodes 100-100L can effectively be considered deposited with irregular spacing in a random or pseudo-random orientation, or are deposited, and can be directed upward in a first orientation (top of the first terminal 125) (this is typically (Depending on the polarity of the applied voltage) is the forward bias voltage direction for diode 100 to 100J and reverse bias direction for diode 100K), can be directed downwards in the second orientation (bottom of the first terminal 125) (this is typical In the case of diode 100 to 100J (depending on the polarity of the applied voltage), the reverse bias voltage direction and the forward bias direction for the diode 100K). Similarly, it can be facing up in the first orientation (top of the first and second terminals 125, 127) (this is typically the forward bias voltage direction for diode 100L), or it can be facing down in the second orientation. (Bottom of the first and second terminals 125, 127) (this is usually the reverse bias voltage direction for diode 100L (depending on the polarity of the applied voltage)) For diode 100L, as mentioned above and in more detail below. As described, diode 100L in the second orientation is typically not sufficiently electrically coupled and non-functional. It is also possible to deposit or terminate diodes 100-100L in a third orientation (diode side 121 bottom and another diode side 121 top).

Fluid dynamics, viscosity or rheology of diode ink, screen mesh count, screen mesh opening, screen mesh material (surface energy of the screen mesh material), printing speed, interlocking or comb-like structures of the first conductor 310 ) Orientation (the branches are perpendicular to the direction of movement of the substrate 305 through the printing press), the surface air paper of the substrate 305 or the first conductor(s) 310 on which the diodes 100 to 100L are deposited, the shape of the diodes 100 to 100L And the size, the printing or deposition density of the diodes 100-100L, the shape, size and/or thickness of the diode side 121, and the sonication or other mechanical vibration of the liquid or gel suspension of the diodes 100-100L before curing or drying of the diode ink. It appears to affect the dominance of one first, second or third orientation over another first, second or third orientation. For example, the diode side 121 is less than about 10 μm in height (or vertical thickness, perpendicular to the first or second orientation), more particularly less than about 8 μm in height, so that the diodes 100 to 100L have a relatively thin side or edge. In this case, the proportion of diodes 100 to 100L having the third orientation is significantly reduced.

Similarly, hydrodynamics, higher viscosity, and lower mesh counts and other factors mentioned above provide some control over the orientation of diodes 100-100L, resulting in diodes 100-100L in the first or second orientation. Allows you to adjust or adjust the ratio of for a given field. For example, the above-listed factors can be adjusted to increase the occupancy of the first orientation, such that 80% to 90% or more of the first orientation of the diodes 100 to 100L is obtained. In addition, for example, the factors listed above can be adjusted to balance the occupancy of the first and second orientations, such that an approximately or substantially equal distribution of the first and second orientations of the diodes 100 to 100L, For example, it is possible to obtain a diode 100 to 100L 40% to 60% in a first orientation and a diode 100 to 100L 60% to 40% in a second orientation.

Although the proportion of diodes 100-100L coupled to first conductor 310A or substrate 305 in a first top orientation or direction is quite high, statistically at least one diode 100-100L is likely to have a second bottom orientation or orientation. It should be noted that significant, statistically diodes 100-100L also exhibit irregular spacing, so that some diodes 100-100J will be relatively closer apart, and at least some diodes 100-100J will be much further apart.

Stated another way, depending on the polarity of the applied voltage, a fairly high proportion of diodes 100-100L will be coupled or coupled in a first forward bias orientation or direction, but statistically at least one diode 100-100L will be Will have a second reverse bias orientation or direction. In addition, when the light-emitting or light-absorbing regions 140 are oriented differently, according to the polarity of the applied voltage, those skilled in the art know that the first orientation will have a reverse bias orientation and the second orientation will have a forward bias orientation. Will recognize.

For example, conventional electronics manufacturing in which electrical elements such as diodes are placed to surface mount in a predetermined orientation in a predetermined position on a circuit board using a pick and place machine within a selected tolerance level. In contrast, in any particular case, in devices 300 and 700, there is no such predetermined or specific location (in the xy plane) and orientation (z-axis) for diodes 100-100L (i.e., at least one diode 100-100L). 100L will be in the second orientation in devices 300, 700).

This means that all of these diodes (e.g. LEDs) have a single orientation with respect to the voltage rail, i.e. their corresponding anodes are coupled to a higher voltage and their cathodes are coupled to a lower voltage. It deviates considerably from the existing ringed device structure. As a result of the statistical orientation, depending on the ratio of the diodes 100-100L with the first or second orientation, and according to various diode characteristics such as tolerance for reverse bias, diodes 100-100L are AC without further switching of voltage or current. Or it can be excited using DC voltage or current.

77 and 99, the first plurality of conductors 310 may be used, so that the first (first) conductor electrode or contact portion 310A and the second (first) conductor electrode or contact portion 310B are interlocked or comb-shaped electrode structure At least two separate electrode structures illustrated as may be formed. As illustrated in FIG. 77, conductors 310A and 310B are illustrated as having the same width and different widths in FIGS. 76 and 78, all such variations being within the scope of the present disclosure. For the exemplary device 300 embodiment, as illustrated in FIG. 78, this diode ink or suspension (having diodes 100-100K) is deposited over conductor 310A. A second transparent conductor 320 (optically transmissive, discussed below) is subsequently deposited (over the dielectric layer as discussed below) to create a separate electrical contact with conductor 310B. Although not illustrated separately, as an option, the exemplary device 700 embodiment may have these 310A, 310B electrical connections: the diode ink or suspension (with 100L diode) is deposited on the substrate 305A, and at least one conductor 310A and 310B (As a cross or comb structure) can be deposited and a dielectric layer 315 can be deposited over conductor 310A. A second conductor 320, which does not need to be optically transmissive, is subsequently deposited (over the dielectric layer 315 as discussed below), and can also have an interlocking or comb-shaped structure, as illustrated in FIG. 78 for device 300. As such, a separate electrical contact with conductor 310B can be created. 80-82 for device 700, to illustrate another structural alternative, the second terminal 127 is coupled to one or more first conductors 310, and the first terminal 125 is one or more second conductors. Are coupled to s 320. 81 and 91-98 also illustrate another structural option applicable to any of the device 300, 700, 720, 730, 740, 750, 760, 770 aspects, wherein the carbon electrodes 322A and 322B are Coupled to the first conductor 310 and the second conductor 320, respectively, and extending from the protective sheath 330 to provide electrical connections or couplings to the devices 300 and 700, respectively.

It should be noted that if the first conductor 310 has the interlocking or comb-shaped structure illustrated in FIG. 77, the second conductor 320 can be energized using the first conductor 310B. The interlocking or comb structure of the first conductor provides electrical current balancing such that substantially all current paths through the first conductor 310A, diodes 100-100L, second conductor 320, and first conductor 310B are within a predetermined range. This reduces resistance and heat generation by minimizing the distance the current must travel through the second transparent conductor, and generally provides current to all or most of the 100 to 100L diodes in parallel within a range of current levels. do.

In addition, the plurality of interlocking or comb-shaped structures for the first conductor 310 may be in series to produce a total device voltage, such as but not limited to, a typical household voltage with a desired plurality of diodes 100 to 100 J forward voltage. It can also be coupled. For example, as illustrated in FIG. 99, for a first region 711 (having diodes 100 to 100L coupled in parallel), conductor 310B is a second region 712 (this also has diode 100 coupled in parallel). Can be coupled or deposited as an integral layer with conductor 310A of (having 100 to 100L), and for the second region 712 (with diodes 100 to 100L coupled in parallel), the conductor 310B has a third region 713 (which is also It can be coupled or deposited as an integral layer with conductor 310A of its diodes 100-100L coupled in parallel), so that the first, second and third regions 711, 712, 713 are coupled in series and , These regions each have diodes 100-100L coupled in parallel. This continuous connection is also used in the system 800, 810 and device 760, 770 aspects illustrated in FIGS. 100-103.

Also, as illustrated in FIG. 99, the excitation of any of the interlocking or comb-shaped electrode structures can be performed by applying a voltage level to the busbar 714 coupled to all of the respective branches 310A, 310B. have. The busbar 714 is typically sized to have a relatively low sheet resistance or impedance.

For relatively smaller areas or other fields such as graphic arts, such current balancing and impedance matching (sheet resistance matching) structures are unnecessary, and simpler structures such as the layer structures illustrated in FIGS. 91 to 98, 102 and 103 The first and second conductors 310 and 320 can be used. For example, such a stacked structure may be used when the sheet resistance of the first and second conductors 310 and 320 combined with the diodes 100 to 100L is a relatively or relatively small percentage of the total resistance of the first and second conductors 310 and 320. I can. Further, as illustrated in FIGS. 102 and 103, the third conductive layer 312 provides parallel busbar connections along relatively long strips of devices 300, 700, 720, 730, 740, 750, 760, 770, for example. It can also be used to do.

One or more dielectric layers 315 are then deposited over diodes 100-100L, with a first terminal 125 in a first orientation or a second, backside of diodes 100-100K when in a second orientation (or the GaN of diode 100L). Heterostructure) to provide electrical insulation between one or more of the first conductors 310 (coupled to the diodes 100-100L) and one or more second conductors 320 deposited over one or more dielectric layers 315 Left to be exposed in a sufficient amount to and, depending on the orientation, in such a way as to create corresponding physical and electrical contact with the second, back side of the first terminal 125 or diodes 100-100K. For the device 300, then any light emitting (or light emitting) layer 325 may be deposited followed by any stabilizing layer 335 and/or any lensing, dispersing or sealing layer 330. For example, any such light emitting (or light emitting) layer 325 may include a stroke transition phosphor layer to make a lamp or other device emitting a desired color or other selected wavelength range or spectrum. These various layers, conductors and other deposited compounds are discussed in more detail below. For device 700, a lance, dispersion, or sealing layer 330 is generally deposited over one or more second conductors on the first side, and then any luminescent (or light emitting) layer 325 is applied to the substrate 305 on the second side. It may be deposited thereon, followed by any stabilizing layer 335 and/or any lancet, dispersion or sealing layer 330. Depending on the position of the first and second conductors 310, 320, carbon electrodes 322A, 322B may be applied after deposition of the corresponding first and second conductors or after any deposition of the lance, dispersion or sealing layer 330. These various layers, conductors and other deposited compounds are discussed in more detail below.

Substrate 305 can be formed or comprised from any suitable material such as, for example, but not limited to, plastic, paper, cardboard, or coated paper or cardboard. The substrate 305 may comprise any flexible material having strength to withstand the intended use conditions. In an exemplary embodiment, the substrates 305, 305A are substantially optically transmissive polyester or plastic sheets, e.g., treated with print receptiveness and are MacDermid Autotype, Inc., Denver, CO, USA. Autotype, Inc.) commercially available CT-5 or CT-7 5 or 7 mil polyester (Mylar) sheets, or Coveme acid treated Mylar. In another exemplary embodiment, the substrate 305 also includes a polyimide film, such as Kapton, commercially available from DuPont, Inc. of Wilmington, Delaware. In addition, in an exemplary aspect, the substrate 305 includes a material having a dielectric constant suitable for or capable of providing sufficient electrical insulation for an excitation voltage that may be selected. Substrate 305 is also, for example, any one or more of the following: paper, coated paper, plastic coated paper, fiber paper, cardboard, poster paper, poster board, book, magazine, newspaper, woodblock, plywood, and any Other paper or wood products in selected form; Plastic or polymeric materials in any selected form (sheet, film, plank, etc.); Natural or synthetic rubber materials and products in any selected form; Natural and synthetic fabrics (carded, meltblown, and spunbond nonwovens) in any selected form, including polymeric nonwovens; Extruded polyolefin films, including LDPE films; Glass, ceramic, and other silicon or silica-derived materials and articles in any selected form; Concrete (hardened), masonry, and other building materials and products; Or any other product that exists or will be created in the future. In a first exemplary embodiment, the electrical insulation of one or more first conductors 310 (to each other or to other devices or devices) that provides some degree of electrical insulation (i.e., deposited or applied over the first (front) side of the substrate 305 Substrates 305, 305A may be selected (having a dielectric constant or insulating property sufficient to provide electrical insulation for system members). For example, although it is a relatively expensive option, a glass sheet or a silicon wafer can also be used as the substrate 305. However, in other exemplary embodiments, a plastic sheet or plastic-coated paper product, such as the aforementioned polyester or safi, patent stock available from Sappi, Ltd. and 100 lb. Cover stock, or similar coated paper from other paper makers such as Mitsubishi Paper Mills, Mead, and other paper products are used to form the substrate 305. In another exemplary embodiment, an embossed plastic sheet or plastic-coated paper product having a plurality of grooves, also available from Safi, Limited, is used, which grooves are used to form conductor 310. In further exemplary embodiments, any type of substrate 305 may be used, including, but not limited to, those having an additional sealing or encapsulating layer (e.g., plastic, lacquer and vinyl) deposited on one or more surfaces of the substrate 305. I can. Substrates 305 and 305A may also include laminates or other combinations of any of the above materials.

In an exemplary embodiment, a relatively small sized diode 100-100L scattered over the substrates 305, 305A provides relatively fast heat dissipation without requiring a heat sink, and a substrate comprising materials having a relatively low flash-ignition temperature. It offers the availability of a wide range of materials suitable for 305, 305A. These temperatures may include, but are not limited to, for example 50° C. or higher, or 75° C. or higher, or 100° C., or 125° C., or 150° C., or 200° C., or 300° C. For example, but not limited to, it can be measured using the ISO 871:2006 standard. The devices 300, 700 also generally have a relatively lower operating temperature, for example less than about 150°C, or less than about 125°C, or less than about 100°C or less than about 75°C, or less than about 50°C. Have. This average operating temperature should generally be measured, for example, but not limited to, after the devices 300, 700 are turned on and warmed up to provide their maximum light output for at least about 10 minutes, and on the outermost surfaces of the devices 300, 700. It can be measured in increments (also arithmetically averaged) using a commercial infrared thermometer under conventional ambient conditions, such as an ambient temperature of about 20-30°C.

Exemplary substrates 305, 305A as shown in the various figures have a substantially flat form factor in a generic sense, for example, but not limited to, can be supplied through a printing press, and surface roughness, cavities, channels or grooves A sheet of a selected material (e.g., paper or plastic) that may have a topology over the containing first surface (or side), or substantially smooth (also cavities, channels or grooves) within certain tolerances. Has a first surface). Those skilled in the art will appreciate that a myriad of additional shapes and surface topologies are available, considered equivalent, and within the scope of the present disclosure.

The one or more first conductors 310 are then, for example, through a printing process, depending on the type of conductive ink or polymer, for example about 0.1 to 15 μm in thickness (e.g., conventional silver or nanoparticle silver Applied in the case of ink with a wet film thickness of about 10 to 12 μm, a dried or cured film thickness of about 0.2 or 0.3 to 1.0 μm), and for the device 300, 720, 730 aspect (on the first side or surface of the substrate 305) Or deposited, or applied over the diode 100L for the device 700, 740, 750 embodiment. In other exemplary aspects, depending on the applied thickness, the first conductor 310 may be sanded to smooth the surface, and may also be calendered to compress conductive particles such as silver. In the exemplary manufacturing method of this exemplary device 300, 700, 720, 730, 740, 750, 760, 770, conductive ink, polymer, or other conductive liquid or gel (e.g. silver (Ag) ink or polymer, nano Particles or nanofiber silver ink compositions, carbon nanotube inks or polymers, or silver/carbon mixtures such as amorphous nanocarbons (having a particle size of about 75 to 100 nm) are substrates, for example through printing or other deposition processes. 305 or diode 100L and then cured or partially cured (eg via an ultraviolet (uv) curing process) to form one or more first conductors 310. In another exemplary embodiment, one or more agents may be formed. 1 The conductors 310 may be formed by sputtering, spin casting (or spin coating), vapor deposition, or electroplating of a conductive compound or element such as a metal (eg, aluminum, copper, silver, gold, nickel). Combinations of different types of conductors and/or conductive compounds or materials (eg, inks, polymers, elemental metals, etc.) can also be used to create one or more composite first conductors 310. Multiple layers and/or types of Metals or other conductive materials may be combined to form one or more first conductors 310, such as, for example, but not limited to, a gold plate over nickel. Silver, or a mixed carbon-silver ink may be used In various exemplary embodiments, a first plurality of conductors 310 may be deposited, and in other aspects, the first conductor 310 may be deposited as a single conductive sheet. Or can be attached (eg, an aluminum sheet coupled to the substrate 305) (not separately illustrated). Also, in various aspects, a conductive ink that can be used to form one or more first conductors 310 Or do not cure the polymer prior to deposition of a plurality of diodes 100-100K or only partially cure Then, it may be completely cured while in contact with the plurality of diodes 100 to 100K, for example to create an ohmic contact with the plurality of diodes 100 to 100K. In an exemplary embodiment, the one or more first conductors 310 are completely cured prior to deposition of a plurality of diodes 100-100K, and other compounds of the diode ink that provide some dissolution of the one or more first conductors 310 are subsequently Typically cured again upon contact with the plurality of diodes 100-100K, and for the device 700 aspect, the one or more first conductors 310 are completely cured after deposition. In addition, for the device 700 aspect, to facilitate dewetting from the first terminal 125, a conductive ink having a low concentration of conductive particles may also be used to form the one or more first conductors 310. Depending on the selected aspect, an optically transmissive conductive material may also be used to form the one or more first conductors 310.

Other conductive inks or materials such as copper, tin, aluminum, gold, precious metals, carbon, carbon black, carbon nanotubes ("CNT"), single or double or multi-walled CNTs, graphene, graphene plates, Nanographene plates, nanocarbon and nanocarbon and silver compositions, nanoparticles and nanofiber compositions with good or acceptable light transmission, or other organic or inorganic conductive polymers, inks, gels or other liquid or semi-solid materials are also one or more. It can be used to form the first conductors 310, the second conductor(s) 320, the third conductor (not illustrated separately), and any other conductors discussed below. In an exemplary embodiment, in order to enhance ohmic contact and adhesion between the diodes 100-100L and the first conductor 310, carbon black (with a particle diameter of about 100 nm) is applied such that the final carbon concentration is in the range of about 0.025% to 0.5%. Is added to the ink. Additionally, any other printable or coatable conductive materials may equally be used to form the first conductor(s) 310, the second conductor(s) 320 and/or the third conductor, and exemplary conductive compounds include , (1) from Conductive Compounds (Lonbury, N.H.), which may also contain an additional coating UV-1006S UV curable dielectric (e.g., part of the first dielectric layer 125). AG-500, AG-800 and AG-510 are conductive inks; (2) 7102 carbon conductor from DuPont (when overprinting 5000 Ag), 7105 carbon conductor, 5000 silver conductor, 7144 carbon conductor (with UV encapsulant), 7152 carbon conductor), and 9145 Silver conductor; (3) 128A silver conductive ink, 129A silver and carbon conductive ink, 140A conductive ink, and 150A silver conductive ink from SunPoly, Inc.; (4) PI-2000 series high conductivity silver ink from Dow Corning, Inc.; (5) Electrodag 725A from Henkel/Emerson &Cumings; (6) Monarch M120 available from Cabot Corporation, Boston, Massachusetts, for use as a carbon black additive to silver inks to form carbon and silver ink mixtures; (7) Acheson 725A conductive silver ink (available from Henkel) alone or in combination with additional silver nanofibers; And (8) Inktek PA-010 or PA-030 nanoparticles or nanofiber silver screen-printable conductive ink available from Inktec. located in Gyeonggi-do, Korea. As discussed below, these compounds can also be used to form the second conductor(s) 320 and other conductors including any other conductive traces or connections. Additionally, conductive inks and compounds can be obtained from a wide variety of other sources.

A substantially optically transmissive conductive polymer may also be used to form one or more of the first conductors 310 and also the second conductor(s) 320 and/or the third conductor. For example, polyethylene-dioxythiophenes such as polyethylene-dioxythiophene sold under the trade name "Orgacon" from AGFA Corp. of Ridgefield Park, NJ, as well as other permeable conductors discussed below. Any of these and their equivalents can be used. Other conductive polymers that can be used equally include, but are not limited to, polyaniline and polypyrrole polymers, for example. In another exemplary embodiment, carbon nanotubes suspended or dispersed in a polymerizable ionic liquid or other fluid are used to form various conductors that are substantially optically transmissive or transparent, such as one or more second conductors 320. For the device 300 aspect, the one or more second conductors 320 are generally substantially optically transmissive to provide greater light emission or absorption on the first side of the device, and for the device 700 aspect, one or more second conductors It should be noted that s 320 are generally not perceptibly optically transmissive to provide a relatively lower electrical impedance, unless the light output on the first side is also desired. In some exemplary device 700 aspects, one or more of the second conductors 320 are highly opaque and reflective to act as a mirror and increase light output from the second side of the device 700.

The optically transmissive conductive ink used to form the one or more second conductors 320 includes a transparent conductive ink commercially available from NHD Technologies Worldwide, Inc. of Tempe, Arizona, USA, which is 2 in 2011. It is described in US Provisional Patent Application No. 61/447,160 (Mark D. Lowenthal et al.) of the name "Metallic Nanofiber ink, Substantially Transparent Conductor, and Fabrication Method" filed on May 28, the entire contents of which are described in the full text. It is incorporated herein by reference with the same effect as what has been made. In another transparent conductor, a mixture of solvents such as 1-butanol, cyclohexanol, ice-cold acetic acid (about 1% by weight), and polyvinyl pyrrolidone (about 1,000,000 MW) (about 2% to 4% by weight) , Or more particularly about 3% by weight) of silver nanofibers (about 3% to 50% by weight, or more particularly about 4% to 40% by weight, or more particularly about 5% to 30% by weight, or more particularly about 6 % To 20% by weight, or more particularly about 5% to 15% by weight, or more particularly about 7% to 13% by weight, or more particularly about 9% to 11% by weight, or more particularly about 10% by weight). . Another conductive ink is nanoparticles or nanoparticles mixed with a plurality of other solvents, such as about 50% to 65% by weight of propylene glycol and about 1% to 10% by weight of n-propanol or 1-methoxy-2-propanol Nanofiber silver ink (eg, Inktek PA-010 or PA-030 nanoparticles or nanofiber silver screen printable conductive ink) may contain about 30% to 50% by weight. Another conductive ink is a nanoparticle or nanofiber silver ink (e.g. Inktek PA-010 or PA-030 nanoparticle or nanofiber silver screen printable conductive ink mixed with a plurality of other solvents as mentioned above. ) (Silver concentration of about 0.30% to 3.0% by weight) may be included.

Organic semiconductors, variously referred to as π-conjugated polymers, conducting polymers, or synthetic metals, are essentially semiconductors due to the π-conjugation between carbon atoms along the polymer backbone. Their structures contain a one-dimensional organic skeleton that enables electrical conduction after n- or p+ type doping. A well-studied class of organic conductive polymers include poly(acetylene), poly(pyrrole), poly(thiophene), polyaniline, polythiophene, poly(p-phenylene sulfide), poly(para-phenylene vinylene) ( PPV) and PPV derivatives, poly(3-alkylthiophene), polyindole, polypyrene, polycarbazole, polyazulene, polyazepine, poly(fluorene) and polynaphthalene. Other examples include polyaniline, polyaniline derivative, polythiophene, polythiophene derivative, polypyrrole, polypyrrole derivative, polytianaphthene, polytianaphthane derivative, polyparaphenylene, polyparaphenylene derivative, polyacetylene, polyacetylene derivative , Polydiacetylene, polydiacetylene derivative, polyparaphenylene vinylene, polyparaphenylene vinylene derivative, polynaphthalene, and polynaphthalene derivative, polyisothianaphthene (PITN), polyheteroarylene vinylene (ParV) ) (Here, the heteroarylene group may be, for example, thiophene, furan or pyrrole), polyphenylene-sulfide (PPS), polyperinaphthalene (PPN), polyphthalocyanine (PPhc), and the like, and Derivatives, copolymers thereof, and mixtures thereof. The term derivative as used herein refers to a polymer prepared from monomers substituted with side chains or groups.

The polymerization method of the conductive polymers is not particularly limited, and the available methods include, but are not limited to, uv or other electromagnetic polymerization, thermal polymerization, electrolytic oxidation polymerization, chemical oxidation polymerization, and catalytic polymerization. The polymers obtained by this polymerization method are often neutral and not conductive until doped. Thus, the polymer is converted into a conductive polymer by p-doped or n-doped treatment. The semiconductor polymer can be chemically or electrochemically doped. The material used for doping is not particularly limited, and in general, a material capable of accepting an electron pair, such as Lewis acid, is used. Examples thereof include hydrochloric acid, sulfuric acid, organic sulfonic acid derivatives such as parasulfonic acid, polystyrenesulfonic acid, alkylbenzenesulfonic acid, camphorsulfonic acid, alkylsulfonic acid, sulfosalicylic acid, etc., ferric chloride, copper chloride, and Contains iron sulfate.

For the "reverse" fabrication of the device 300, the substrate 305 and one or more first conductors 310 are selected to be optically transmissive such that light is introduced and/or emitted through the second side of the substrate 305. Additionally, if the second conductor(s) 320 is also transparent, light can be emitted or absorbed from both sides of the device 300.

For one or more of the first conductors 310, various textures with, for example, a relatively smooth surface, or, conversely, a rough or pointed surface, or a processed micro-embossed structure (e.g., available from Safi, Limited) are It may be provided, potentially promoting adhesion of other layers (eg, dielectric layer 315) and/or facilitating subsequent formation of ohmic contact with diodes 100-100L. One or more of the first conductors 310 may be provided with a corona treatment prior to the deposition of the diodes 100-100L, which removes any formable oxides and facilitates the subsequent formation of an ohmic contact with the plurality of diodes 100-100L. There may be a tendency to do. Those skilled in the electronic or printing arts will recognize that a number of variations in the methods by which one or more of the first conductors 310 can be formed and all such variations are considered equivalent and are within the scope of the present disclosure. For example, one or more of the first conductors 310 may also be deposited through sputtering or vapor deposition without limitation. Additionally, for various other aspects, one or more of the first conductors 310 may be deposited as a single or continuous layer, for example via coating, printing, sputtering, or vapor deposition.

Consequently, as used herein, "deposition" means any and all printing, coating, rolling, spraying, layering, sputtering, plating, spin casting, impacted or non-impacted, known in the art ( Or spin coating), deposition, lamination, affixing and/or other deposition processes. “Printing” includes any and all printing, coating, rolling, spraying, lamination, spin coating, laminating and/or affixing processes known in the art, in impact or non-impact, specifically, eg For example, screen printing, inkjet printing, electro-optical printing, electronic ink printing, photoresist and other resist printing, thermal printing, laser jet printing, magnetic printing, pad printing, flexographic printing, hybrid offset lithography, gravure and other intaglios. Includes, but is not limited to, printing. All of these processes can be considered and used herein as deposition processes. The above exemplary deposition or printing processes do not require significant manufacturing controls or restrictions. No specific temperature or pressure is required. Some clean room or filtered air may be useful, but potentially at a level consistent with the standards of known printing or other deposition processes. However, a relatively constant temperature (there are possible exceptions discussed below) and humidity may be desirable, for example, for consistency for proper alignment (matching) of the various layers deposited in succession forming various aspects. Additionally, the various compounds used may be contained in various polymers, binders or other dispersants that can be heat cured or dried, air dried at ambient conditions, or IR or uv cured.

In addition, in the present specification, when various compounds are generally applied through printing or other deposition, for example, a resist coating is used, or otherwise, for example, the surface of the substrate 305, various first or second conductors (respectively 310, 320) and/or the surface properties or surface energy by modifying the hydrophilic, hydrophobic or electrical (positive or negatively charged) properties of surfaces such as the surface of diodes 100 to 100L to modify the "wetability" of these surfaces. It should be noted that it can also be controlled. Together with the properties of the compound, suspension, polymer or ink to be deposited, such as surface tension, it is possible to allow the deposited compounds to adhere to the desired or selected location and to be effectively repelled from other areas or areas.

For example, the plurality of diodes 100 to 100L may contain any evaporative or volatile organic such as water, alcohol, ether, etc., which may also contain, but are not limited to, sticky components such as resins and/or surfactants or other flow aids. Or it is suspended in a liquid, semi-liquid or gel carrier using an inorganic compound. In an exemplary embodiment, for example and without limitation, a plurality of diodes 100-100L are suspended as described above in the embodiment. Surfactants or flow aids such as octanol, methanol, isopropanol, or deionized water can also be used, and substantially or relatively small nickel beads (e.g. 1 μm) (which provide conduction after compression and curing, e.g. For example, it may act to enhance or enhance the creation of ohmic contacts), or any other UV, thermal or air curable binder or polymer, including those discussed in more detail below (which may also be used with dielectric compounds, lenses, etc.). A binder such as an anisotropic conductive binder containing) may also be used.

In addition, various diodes 100 to 100L may be configured as light emitting diodes having various colors such as red, green, blue, yellow, and amber. Then, light-emitting diodes 100-100L having different colors can be mixed in an exemplary diode ink such that a selected color temperature is generated when excited in devices 300, 300A.

Dried or Cured Diode Ink Example 1:

A plurality of diodes 100 to 100L; And

Cured or polymerized resin or polymer

Composition comprising a.

Dried or Cured Diode Ink Example 2:

A plurality of diodes 100 to 100L; And

Cured or polymerized resin or polymer forming a film at least partially surrounding each diode and having a thickness of about 10 nm to 300 nm

Composition comprising a.

Dried or Cured Diode Ink Example 3:

A plurality of diodes 100 to 100L; And

At least traces of cured or polymerized resins or polymers

Composition comprising a.

Dried or Cured Diode Ink Example 4:

A plurality of diodes 100 to 100L;

Cured or polymerized resins or polymers; And

At least a trace amount of solvent

Composition comprising a.

Dried or Cured Diode Ink Example 5:

A plurality of diodes 100 to 100L;

At least trace amounts of cured or polymerized resins or polymers; And

At least a trace amount of solvent

Composition comprising a.

Dried or Cured Diode Ink Example 6:

A plurality of diodes 100 to 100L;

Cured or polymerized resins or polymers;

At least a trace amount of solvent; And

At least a trace amount of surfactant

Composition comprising a.

Dried or Cured Diode Ink Example 7:

A plurality of diodes 100 to 100L;

At least trace amounts of cured or polymerized resins or polymers;

At least a trace amount of solvent; And

At least a trace amount of surfactant

Composition comprising a.

This diode ink (suspended diode 100-100L and optional inert particles) is then followed by using, for example, a 280 mesh polyester or PTFE-coated screen, on the substrate 305A for the device 700 embodiment, or on the device 300 embodiment. In the case of, the diodes 100-100L are substantially or at least partially deposited on the one or more first conductors 310, and the volatile or evaporative components are extinct through, for example, heating, uv curing or any drying process, thereby substantially or at least partially forming the substrate 305A or One or more of the first conductors 310 are in contact and are left attached. In an exemplary embodiment, the deposited diode ink is cured at about 110° C., typically for 5 minutes or less. Dried or Cured Diode Ink As in Examples 1 and 2, the remaining dried or cured diode ink is generally a plurality of diodes 100 to 100 L and a cured or polymerized resin or polymer (at least in trace amounts) (this is As can generally hold or hold the diodes 100-100L in place), forming film 295 as discussed above. As illustrated in Dried or Cured Diode Ink Examples 3-6, volatile or evaporative components (e.g., first and/or second solvents and/or surfactants) are almost destroyed, but in trace amounts or This amount may remain. As used herein, "trace amounts" of components should be understood to be an amount greater than 0% and less than 5% of the components originally present in the diode ink when initially deposited on the first conductor 310 and/or substrates 305, 305A.

In the finished device (300, 300A, 300B, 300C, 300D, 700, 700A, 700B, 720, 730, 740, 750, 760, 770), for example, diode 100 as the number of diodes 100 to 100 L per 1 cm 2 The final density or concentration of to 100L will vary depending on the concentration of diodes 100 to 100L in the diode ink. When diodes 100-100L are in the size range of 20-30 μm, very high densities are available, which still cover only a small percentage of the surface area (one of the above advantages is that it does not require a separate heat sink. It allows for greater heat dissipation). For example, if diodes 100-100L in the size range of 20-30 μm are used, 10,000 diodes within 1 square inch cover only about 1% of the surface area. Also, for example, in an exemplary embodiment, for use in devices 300, 300A, 300B, 300C, 300D, 700, 700A, 700B, 720, 730, 740, 750, 760, 770, 2 to 10,000/ Diodes 100-100L of cm2; Or more specifically, 5 to 10,000 diodes 100 to 100L/cm 2; Or more specifically, 5 to 1,000 diodes 100 to 100L / cm2; Or more specifically, 5 to 100 diodes 100 to 100L/cm2; Or more specifically, 5 to 50 diodes 100 to 100L/cm 2; Or more specifically, 5 to 25 diodes 100 to 100L per square centimeter; Or more specifically, 10 to 8,000 diodes 100 to 100L/cm 2; Or more specifically, 15 to 5,000 diodes 100 to 100L/cm 2; Or more specifically, 20 to 1,000 diodes 100 to 100L / cm2; Or more specifically, 25 to 100 diodes 100 to 100L/cm2; Or more specifically, a wide range of diode densities are available and are within the scope of the present disclosure, including but not limited to 25 to 50 diodes 100 to 100L/cm 2.

Additional steps or multiple step processes may be used to deposit diodes 100-100L over one or more of the first conductors 310. In addition, a binder such as, for example, but not limited to, a methoxylated glycol ether acrylate monomer (which may also include a water soluble photoinitiator such as TPO (triphosphene oxide)) or an anisotropic conductive binder is first deposited, followed by It is possible to deposit 100-100L of diodes suspended in the liquid or gel discussed above.

In an exemplary embodiment, for device 300, 720, 730, 760 embodiments, the suspension medium for diodes 100-100K is with one or more dibasic esters that initially dissolve or rewet a portion of the one or more first conductors 310. The same dissolving solvent or other reactive reagents may also be included. When a suspension of a plurality of diodes 100-100K is deposited, and then the surface of one or more first conductors 310 is partially dissolved or uncured, the plurality of diodes 100-100K is slightly in the one or more first conductors 310. Alternatively, it may be partially buried, which also helps to form an ohmic contact and creates an adhesive bond or an adhesive coupling between the plurality of diodes 100-100K and the one or more first conductors 310. When the dissolving or reactive reagent disappears through evaporation or the like, the one or more first conductors 310 are substantially in contact with the plurality of diodes 100 to 100K and re-solidified (or re-cured). In addition to the dibasic esters discussed above, exemplary dissolution, wetting or solvating reagents, as also mentioned above, include, for example, a molar ratio of approximately 1:8 with 1-propanol (or isopropanol) to form a suspension medium ( Or propylene glycol monomethyl ether acetate (C ₆ H ₁₂ O ₃ ) (sold by Eastman under the trade name “PM Acetate”) used as 22:78 by weight), and various dibasic esters, and mixtures thereof, For example, dimethyl succinate, dimethyl adipate and dimethyl glutarate (these are the product names DBE, DBE-2, DBE-3, DBE-4, DBE-5, DBE-6, DBE-9 and DBE- from Invista). (Available as various mixtures under IB). In an exemplary embodiment, DBE-9 is used. The molar ratio of solvents will vary based on the solvents selected, with 1:8 and 1:12 being typical ratios. Various compounds or other reagents can also be used to control this reaction.For example, a mixture or mixture of 1-propanol and water is relatively later in the curing process, and various compounds in the diode ink evaporate or disappear and the diode Dissolution or rewetting of one or more of the first conductors 310 can be clearly inhibited by DBE-9 until the thickness of the ink becomes smaller than the height of the diodes 100 to 100K, so that any dissolved It can prevent material (e.g., silver ink resin and silver ink particles) from depositing on the top surface of the diode 100-100K (this can then form electrical contact with the second conductor(s) 320). ).

Oilfield Ink Example 1:

A dielectric resin comprising about 0.5% to about 30% of a methylcellulose resin;

A first solvent containing alcohol; And

Surfactants

Composition comprising a.

Dielectric Ink Example 2:

Dielectric resin comprising about 4% to about 6% methylcellulose resin;

A first solvent comprising about 0.5% to about 1.5% octanol;

A second solvent comprising about 3% to about 5% IPA; And

Surfactants

Composition comprising a.

Oilfield Ink Example 3:

About 10% to about 30% dielectric resin;

A first solvent comprising glycol ether acetate;

A second solvent containing glycol ether; And

Third solvent

Composition comprising a.

Dielectric Ink Example 4:

About 10% to about 30% dielectric resin;

A first solvent comprising about 35% to 50% ethylene glycol monobutyl ether acetate;

A second solvent comprising about 20% to 35% dipropylene glycol monomethyl ether; And

Third solvent containing about 0.01% to 0.5% toluene

Composition comprising a.

Oilfield Ink Example 5:

About 15% to about 20% dielectric resin;

A first solvent comprising about 35% to 50% ethylene glycol monobutyl ether acetate;

A second solvent comprising about 20% to 35% dipropylene glycol monomethyl ether; And

Third solvent containing about 0.01% to 0.5% toluene

Composition comprising a.

Oilfield Ink Example 6:

About 10% to about 30% dielectric resin;

A first solvent comprising about 50% to 85% dipropylene glycol monomethyl ether; And

A second solvent comprising about 0.01% to 0.5% toluene

Composition comprising a.

Oilfield Ink Example 7:

About 15% to about 20% dielectric resin;

A first solvent comprising about 50% to 90% ethylene glycol monobutyl ether acetate; And

A second solvent comprising about 0.01% to 0.5% toluene

Composition comprising a.

Dielectric Ink Example 8:

About 15% to about 20% dielectric resin;

A first solvent comprising about 50% to 85% dipropylene glycol monomethyl ether; And

The residual amount containing propylene glycol or a second solvent containing about 0.01% to 8.0% of deionized water

Composition comprising a.

The insulating material (referred to as dielectric ink, such as those described as dielectric ink examples 1 to 8) is then applied to the diode 100 prior to deposition of the second conductor(s) 320, for example through a printing or coating process. To 100L or over the peripheral or lateral portions of the diode 100 to 100L to form an insulating or dielectric layer 315. The dielectric layer 315 has a wet film thickness of about 30 to 40 μm, and a dried or cured film thickness of about 5 to 7 μm. The insulating or dielectric layer 315 may be composed of any of insulating or dielectric compounds suspended in any of a variety of media as discussed above and below. In an exemplary embodiment, the insulating or dielectric layer 315 is about 0.5% to 15%, or more specifically about 1.0% to about 8.0%, or more specifically about 3.0% to about 6.0%, or more specifically Methylcellulose resin in an amount ranging from about 4.5% to about 5.5%, for example E-3 "methocel" available from Dow Chemical, from about 0.1% to 1.5%, or more specifically about 0.2% From about 0.01% to about 1.0%, or more specifically, with surfactant in an amount ranging from about 0.4% to about 0.6%, for example 0.5% BYK 381 from BYK Chemie GmbH. 0.5%, or more specifically about 0.05% to about 0.25%, or more specifically about 0.08% to about 0.12% of the first solvent in an amount ranging from about 0.1% octanol, and about 0.0% A second solvent in an amount ranging from about 8%, or more specifically about 1.0% to about 7.0%, or more specifically about 2.0% to about 6.0%, or more specifically about 3.0% to about 5.0%, For example, about 4% IPA, and the balance of the third solvent, such as in a suspension of deionized water. With the above E-3 formulation, 4 to 5 coatings are deposited to produce an insulating or dielectric layer 315 having a total thickness of 6 to 10 μm, each coating being cured at about 110° C. for about 5 minutes. In other exemplary aspects, the dielectric layer 315 can be IR (infrared) cured, uv cured, or both. In addition, in other exemplary embodiments, different dielectric formulations may be applied as different layers to form the insulating or dielectric layer 315, for example, but not limited to, available from Henkel Corporation, Dusseldorf, Germany. After applying a first layer of possible solvent-based transparent dielectrics, for example Henkel BIK-20181-40A, Henkel BIK-20181-40B, and/or Henkel BIK-20181-24B, the aqueous E-3 formulation described above was applied. Apply to form the dielectric layer 315. In other exemplary embodiments, other dielectric compounds are commercially available from Henkel, and they can be used equivalently as in dielectric ink example 8. The dielectric layer 315 may be transparent, but may comprise light diffusing, scattering or reflective particles, as well as thermally conductive particles, such as, but not limited to, aluminum oxide in a relatively low concentration. In various exemplary embodiments, the dielectric ink is also dewetted from the top surface of the diodes 100-100L so that at least a portion of the first terminal 125 or the second, backside of the diode 100-100K (depending on the orientation) is a second conductor. Will remain exposed for subsequent contact with (s) 320.

One or more exemplary solvents such as, but not limited to, water; Alcohols such as methanol, ethanol, N-propanol (including 1-propanol, 2-propanol (isopropanol), 1-methoxy-2-propanol), isobutanol, N-butanol (1-butanol, 2- Butanol), N-pentanol (including 1-pentanol, 2-pentanol, and 3-pentanol), N-octanol (including 1-octanol, 2-octanol, and 3-octanol) ; Ethers such as methyl ethyl ether, diethyl ether, ethyl propyl ether, and polyethers; Esters such as ethyl acetate, dimethyl adipate, propylene glycol monomethyl ether acetate, dimethyl glutarate, dimethyl succinate, glycerin acetate, dibasic esters (eg Invista DBE-9); Esters such as ethyl acetate; Glycols such as ethylene glycol, diethylene glycol, polyethylene glycol, propylene glycol, dipropylene glycol, glycol ether, glycol ether acetate, PM acetate (propylene glycol monomethyl ether acetate), dipropylene glycol monomethyl ether, ethylene glycol Monobutyl ether acetate; Carbonates such as propylene carbonate; Glycerol, such as glycerin; Acetonitrile, tetrahydrofuran (THF), dimethyl formamide (DMF), N-methyl formamide (NMF), dimethyl sulfoxide (DMSO); And mixtures thereof may be used in exemplary dielectric inks. In addition to the water-soluble resin, other solvent-based resins may also be used. One or more thickeners, for example clays such as hectorite clay, karamite clay, organo-modified clay; Saccharides and polysaccharides such as guar gum, xanthan gum; Cellulose and modified cellulose, such as hydroxy methylcellulose, methylcellulose, ethyl cellulose, propyl methylcellulose, methoxy cellulose, methoxy methylcellulose, methoxy propyl methylcellulose, hydroxy propyl methylcellulose, carboxy methylcellulose, Hydroxy ethylcellulose, ethyl hydroxyl ethylcellulose, cellulose ether, cellulose ethyl ether, chitosan; Polymers such as acrylate and (meth)acrylate polymers and copolymers, polyvinyl pyrrolidone, polyethylene glycol, polyvinyl acetate (PVA), polyvinyl alcohol, polyacrylic acid, polyethylene oxide, polyvinyl butyral (PVB); Diethylene glycol, propylene glycol, 2-ethyl oxazoline, fumed silica (e.g. Cabosil), silica powder and modified urea, e.g. BYK® 420 (available from BYK Chemie) Can be used. Other viscosity modifiers, as described in US Patent Application Publication No. 2003/0091647 to Lewis et al., as well as particle additives for viscosity control, can be used. Flow aids or surfactants such as octanol and Emerald Performance Materials Foamblast 339 can also be used. In other exemplary embodiments, the one or more insulators 135 can be a polymer, such as typically comprising less than 12% PVA or PVB in deionized water.

After deposition of the insulating or dielectric layer 315, one or more second conductor(s) 320, which may be any type of conductor, conductive ink or polymer discussed above, or which may be an optically transmissive (or transparent) conductor (e.g. For example, through printing of a conductive ink, polymer, or other conductor such as a metal), the exposed or non-insulated portions of the diode 100-100L (typically the first for the diode 100-100L in the first orientation) Form an ohmic contact with terminal 125). The at least one optically transmissive second conductor(s) 320 has a wet film thickness of about 6 to 18 μm and a dried or cured film thickness of about 0.1 to 0.4 μm, and the at least one optically opaque second conductor(s) 320 (eg, Acheson 725A conductive silver) typically has a wet film thickness of about 14 to 18 μm and a dried or cured film thickness of about 5 to 8 μm. For example, the optically transmissive second conductor can be deposited as a single continuous layer (forming a single electrode), for example for lighting or photovoltaic applications. In the case of the above-mentioned reverse manufacturing, in the device 700 aspect, the second conductor(s) 320 is not required, although it may be optically transmissive, which is the device 300, 300A, 300B, 300C, 300D, 700, 700A, 700B, 720, Light can be introduced or emitted from both the upper and lower surfaces of 730, 740, 750, 760, and 770. The optically transmissive second conductor(s) 320 has (1) a conductivity sufficient to excite or receive energy from the first or upper portions of the device 300 (and generally, if necessary or desirable, power). Have sufficiently low resistance or impedance to reduce or minimize losses and heat generation); (2) can be composed of any compound having at least a predetermined or selected level of transparency or transmittance to electromagnetic radiation of a selected wavelength(s), for example for portions of the visible spectrum. The choice of materials to form the optically transmissive or opaque second conductor(s) 320 may depend on the selected field of devices 300, 700 and the availability of any one or more third conductors. One or more second conductor(s) 320 are known or may be known in the printing or coating arts, for example, if necessary or desirable, providing adequate control for any selected alignment or registration. By using a printing or coating process, the diodes 100-100L are deposited over exposed and/or non-insulated portions and/or over any of the insulating or dielectric layer 315.

For example, an exemplary transparent conductive ink used to form one or more second conductors 320 is about 0.4 to 3.0% silver nanofibers (or more in other embodiments), polyvinyl pyrrolidone (1,000,000 MW). It may contain about 2 to 4%, ice-cold acetic acid 0.5 to 2%, the balance being 1-butanol and/or cyclohexanol.

In an exemplary embodiment, in addition to the conductors described above, carbon nanotubes (CNT), nanoparticles or nanofiber silver, polyethylene-dioxythiophene (e.g., AGFA Orgacon), poly-3,4-ethylenedioxythiophene and Blends of polystyrenesulfonic acids (sold as Baytron P, available from Bayer AG, Leverkusen, Germany), polyaniline or polypyrrole polymer, indium tin oxide (ITO) and/or antimony tin oxide (ATO) ( Typically, ITO or ATO) suspended as particles in any of the various binders, polymers or carriers discussed above may be used to form the optically transmissive second conductor(s) 320. In an exemplary embodiment, the carbon nanotubes are suspended in a volatile liquid with a surfactant, such as a carbon nanotube composition available from SouthWest NanoTechnologies, Inc. of Norman, Oklahoma, USA. . Additionally, one or more third conductors (not illustrated separately) having a relatively lower impedance or resistance may be incorporated or incorporated into the corresponding transmissive second conductor(s) 320. For example, a conductive ink or polymer (e.g. silver ink, CNT or polyethylene-dioxythiophene) printed on the corresponding compartment or layer of the permeable second conductor(s) 320 to form one or more third conductors. Polymers) can be used to form one or more fine wires, or one or more fine wires (e.g., gratings) printed over a larger integral, transparent second conductor(s) 320 Or a ladder pattern).

Other compounds that can be used equally to form the substantially optically transmissive second conductor(s) 320 include indium tin oxide (ITO) as mentioned above, the conductive polymers discussed above, for example available under the trade name "Orgacon". Other permeable conductors currently known or may be known in the art are included, including possible polyethylene-dioxythiophene and various carbon and/or carbon nanotube based transparent conductors. Representative transmissive conductive materials are available from DuPont, such as, for example, 7162 and 7164 ATO translucent conductors. The transparent second conductor(s) 320 may also be used in combination with various binders, polymers or carriers including those discussed above, such as binders that can be cured under various conditions such as exposure to ultraviolet radiation (uv curable). have.

An optional stabilizing layer 335 may be deposited over the second conductor(s) 320 if necessary or desired, for example a light emitting (or light emitting) layer 325 or any intervening ball coats may be applied to the second conductor ( S) It is used to protect the second conductor(s) 320 in order to prevent deteriorating the conductivity of the 320. (Regarding Protective Coating 330) A relatively thin coating of one or more of the inks, compounds or coatings discussed below, for example Nazdar 9727 transparent substrate or infrared curable such as DuPont 5018 or about 7% polyvinylbutyral in cyclohexanol. Resin can be used. Additionally, heat dissipating and/or light scattering particles may optionally be included in the stabilizing layer 335. Exemplary stabilizing layers are typically about 10 to 40 μm in dried or cured form.

Optionally, a carbon electrode 322 (illustrated as 322A and 322B) is sealed or sealed to one or more first conductors 310 and one or more second conductor(s) 320 as illustrated for various exemplary embodiments. It can be used to form a contact outside the protective layer 330 and helps to protect the one or more first conductors 310 and one or more second conductor(s) 320 from corrosion and abrasion. In an exemplary embodiment, a carbon ink such as Acheson 440A is used having a wet film thickness of about 18-20 μm and a dried or cured film thickness of about 7-10 μm.

In addition, as an option illustrated in FIGS. 102 and 103, any third conductive layer 312 can be used, which is described herein for one or more first conductors 310 and/or one or more second conductor(s) 320. May include any of the conductive materials described in.

One or more luminescent (or light emitting) layers 325 (e.g., comprising one or more phosphor layers or coatings) will be deposited over the stabilizing layer 335 (or over the second conductor(s) 320 if no stabilizing layer 335 is used). Or, for the device 700 aspect, it may be deposited directly onto the second side of the substrate 305A. As illustrated, a plurality of light emitting (or light emitting) layers 325 may also be used, such as on both sides of the devices 300, 300A, 300C, 300D, 700, 700A, 720, 730, 740, 750, 760, 770. . In an exemplary embodiment, such as the LED aspect, the one or more light emitting layers 325 are, for example, but not limited to, through the printing or coating process discussed above, over the entire surface of the stabilizing layer 335 (or stabilizing layer 335 May be deposited over the second conductor(s) 320 when not used, or directly over the second side of the substrate 305A for the device 700 aspect, or both. At least one light emitting layer 325 is capable of emitting light in the visible spectrum, or adapted to emit light in the visible spectrum in response to light (or other electromagnetic radiation) emitted from the diodes 100-100L, or emitted light (or other at any selected frequency Electromagnetic radiation), or can be formed of any material or compound that is capable of shifting (e.g., stroke shifting) the frequency of it. For example, a yellow phosphor-based light emitting layer 325 can be used with blue light emitting diodes 100-100L to produce substantially white light. These luminescent compounds include various phosphors that can be provided in any of various forms with any of various dopants. The light-emitting compounds or particles forming one or more light-emitting layers 325 may be used or suspended in the form of a polymer having various binders, and various binders (e.g., DuPont or Conductive Compounds) Phosphor binders (available from the above) to aid in printing or other deposition processes and to provide adhesion of the phosphor to the base layer and subsequent upper layers. The one or more light-emitting layers 325 may also be provided in a uv-curable or heat-curable form.

(1) G1758, G2060, G2262, G3161, EG2762, EG 3261, EG3560, EG3759, Y3957, EY4156, EY4254, EY4453, EY4651, EY4750, O5446, available from Intematix, Fremont, CA O5544, O5742, O6040, R630, R650, R6733, R660, R670, NYAG-1, NYAG-4, NYAG-2, NYAG-5, NYAG-3, NYAG-6, TAG-1, TAG-2, SY450- A, SY450-B, SY460-A, SY460-B, OG450-75, OG450-27, OG460-75, OG460-27, RG450-75, RG450-65, RG450-55, RG450-50, RG450-45, RG450-40, RG450-35, RG450-30, RG450-27, RG460-75, RG460-65, RG460-55, RG460-50, RG460-45, RG460-40, RG460-35, RG460-30, and RG460 -27; (2) 13C1380, 13D1380, 14C1220, and GG-84 available from Global Tungsten & Powders Corp. of Towanda, Pennsylvania, USA; (3) FL63/S-D1, HPL63/F-F1, HL63/S-D1, QMK58/F-U1, QUMK58/F-D1 available from Phosphor Technology Ltd. of Hertz, UK , KEMK63/F-P1, CPK63/N-U1, ZMK58/N-D1, and UKL63/F-U1; (4) BYW01A/PTCW01AN, BYW01B/PTCW01BN, BUVOR02, BUVG01, BUVR02, BUVY02, BUVG02, BUVR03/PTCR03, and BUVY03 available from Phosphor Tech Corp. of Lithia Springs, GA, USA; And (5) a broad range of equivalent luminescence or luminescence, including, but not limited to, Hawaii655, Maui535, Bermuda465, and Bahama560 available from Lightscape Materials, Inc. of Princeton, NJ, USA. Compounds are available and are within the scope of this disclosure. Additionally, colorants, dyes, and/or dopants may be included in any such luminescent (or light emitting) layer 325, depending on the selected aspect. In an exemplary embodiment, a yttrium aluminum garnet ("YAG") phosphor available from Phosphor Technologies Limited and Global Tungsten & Powders Corporation, for example 40% YAG in a uv curable resin (wetting and drying of about 40-100 μm/ Cured film thickness), or 70% YAG in an infrared curable resin-solvent system, for example about 5% polyvinylbutyral in about 95% cyclohexanol (wet film thickness of about 15 to 17 μm and about 13 to A dry/cured film thickness of 15 μm) is used. Additionally, the phosphors or other compounds used to form the light emitting layer 325 may include dopants that emit light in a specific spectrum, such as green or blue. In these cases, the emissive layer may be printed to define pixels for any given or selected color, such as RGB or CMYK, to provide a color display. Those of skill in the art will recognize that any of the device 300 aspects may also include one or more such light emitting layers 325 coupled or deposited to the stabilizing layer 335 or the second conductor(s) 320.

Depending on the solvents used to form the one or more second conductor(s) 320, as illustrated in FIG. 103, for example, the compounds of the one or more second conductor(s) 320 are passed through the dielectric layer 315. Any one or more barrier layers 318 may be used to prevent penetrating the one or more first conductors 310. In an exemplary embodiment, a viscosity modifier, such as an E-10 viscosity modifier or any of the other viscosity modifiers discussed above, is used, deposited to form a cured or dried film or membrane thickness of about 100 to 200 nm. Any of the materials used to form the protective or sealing coating 330 or stabilizing layer 335 may also be used to form one or more barrier layers 318.

The device 300 may also include any protective or sealing coating 330 (which may be combined with any stabilizing layer 335), which may also include for protection from various factors such as weather, corrosive substances in the air, etc. The polymer (resin or other binder) used with the light-emitting layer 325 may include any type of lance or light diffusing or dispersing structure or filter, such as a substantially transparent plastic or other polymer. Can be provided by For ease of illustration, Figures 76, 78-82, 87, 88, 91-98, 102, and 103 show these polymers (resin or other binder) forming the protective or sealing coating 330 with dashed lines to indicate substantial transparency. Shown using. In an exemplary embodiment, the protective or sealing coating 330 uses a proprietary resin available as NAZDAR 9727 (www.nazdar.com) or a urethane-based material such as uv curable urethane acrylate PF 455 BC available from Henkel Corporation, Dusseldorf, Germany. And then deposited as one or more ball coats to a thickness of about 10 to 40 μm. In another exemplary embodiment, the protective or sealing coating 330 is formed by laminating the device 300. Although not illustrated separately, related U.S. patent applications (U.S. Patent Application No. 12/560,334, U.S. Patent Application No.12/560,340, U.S. Patent Application No.12/560,355, U.S. Patent Application No.12/560,364, and U.S. Patents Suspended in a plurality of lenses (polymers (resin or other binder)), as discussed in Application No. 12/560,371, the entire contents of which are incorporated herein by reference with the same effect as described in the entirety thereof. ) Can also be deposited directly over the one or more light emitting layers 325 and other features, creating any of a variety of light emitting device 300 aspects.

Those skilled in the art will recognize that any number of first conductor 310, insulator 315, second conductor 320, etc. may be used within the scope of the claimed invention. Additionally, in addition to the illustrated orientations, for any device 300, a first plurality of conductors 310, one or more insulators (or dielectric layers) 315, and a second plurality of conductor(s) 320 (optionally incorporated There may be a wide variety of orientations and configurations, for example substantially parallel orientations) of the corresponding any one or more third conductors). For example, the first plurality of conductors 310 may all be substantially parallel to each other, and the second plurality of conductor(s) 320 may also all be substantially parallel to each other. Again, the first plurality of conductors 310 and the second plurality of conductor(s) 320 may be perpendicular to each other (limiting a row and a column), so that the overlapping region thereof is a pixel (" It can be used to define a pixel"), and can be addressed separately and independently. If either or both of the first plurality of conductors 310 and the second plurality of conductor(s) 320 can be implemented as spaced, substantially parallel lines having a predetermined width (both are Limiting or both limiting columns), they may also be addressed by rows and/or columns, such as, for example, but not limited to, sequential addressing of consecutive rows. Additionally, either or both of the first plurality of conductors 310 and the second plurality of conductor(s) 320 may be implemented as a layer or sheet as mentioned above.

As will be apparent from the present disclosure, exemplary devices 300, 300A, 300B, 300C, 300D, 700, 700A, 700B, 720, 730, 740, 750, 760, 770 are a selection of composite materials such as substrate 305. Accordingly, it can be designed and manufactured to be highly flexible and deformable, potentially even foldable, stretchable and potentially wearable, not rigid. For example, exemplary devices 300, 300A, 300B, 300C, 300D, 700, 700A, 700B, 720, 730, 740, 750, 760, 770 are flexible, collapsible and wearable garments, or flexible lamps, or wallpapers. It may include a lamp. Due to this flexibility, exemplary devices 300, 300A, 300B, 300C, 300D, 700, 700A, 700B, 720, 730, 740, 750, 760, 770 can be wound up like a poster or folded like a piece of paper. There is, and when opened again, it can be fully functional. In addition, for example, due to this flexibility, exemplary devices 300, 300A, 300B, 300C, 300D, 700, 700A, 700B, 720, 730, 740, 750, 760, 770 can have various shapes and sizes, and It can be configured for a wide range of styles and other aesthetic purposes. These exemplary devices 300, 300A, 300B, 300C, 300D, 700, 700A, 700B, 720, 730, 740, 750, 760, 770 are also considerably more elastic than prior art devices, for example conventional large It is much less fragile and less vulnerable than a screen television.

As specified above, the plurality of diodes 100 to 100L may be configured to be a photovoltaic (PV) diode or LED (via material selection and corresponding doping), for example and without limitation. 84 is a block diagram of an aspect of a first exemplary system 350 implementing a plurality of diodes 100-100L as LEDs of any type or color. System 350 includes light emitting devices 300A, 300C, 300D, 300C, 300D, 700A (and any of devices 720, 730, 740, 750, 760, 770 where the diode is an LED), power supply 340 (e.g., AC line or DC battery), and optionally a controller 345 (with control logic circuit 360 and optionally memory 365). (Device 300A is otherwise generally the same as device 300, but has a plurality of diodes 100 to 100L running as LEDs, and in the case of the device 300C, 300D aspect, it is double-sided, similarly, device 700A is otherwise generally the same as device 700. However, it has a plurality of diodes 100 to 100L that are implemented as an LED). When one or more first conductors 310 and one or more second conductor(s) 320 (or third conductor 312) are energized, for example through application of a corresponding voltage (e.g. voltage from power source 340) , When the conductor and the insulator are each implemented as a single layer, it is entirely through the devices 300A, 300C, 300D, 300C, 300D, 700A, 720, 730, 740, 750, 760, 770, or the excited first conductor 310 and the second 2 At the corresponding intersection (overlap area) of the conductor(s) 320, one or more of the plurality of LEDs (diodes 100 to 100L) will be energized, which depending on their orientation and configuration, for example a pixel, Defines a sheet, or row/column. Thus, by selectively energizing the first conductor 310 and the second conductor(s) 320, device 300A (and/or system 350) provides a pixel-addressable dynamic display or lighting device or signage or the like. For example, the first plurality of conductors 310 may include a corresponding plurality of rows, and the plurality of transparent second conductor(s) 320 include a corresponding plurality of columns, and the corresponding rows and corresponding Each pixel is defined by the intersection or overlap of columns. In addition, for example, any one or both of the first plurality of conductors 310 and the second plurality of conductor(s) 320 as illustrated in FIGS. 76 to 82, 87, 88, 91 to 98, 102, 103 If they can be implemented together, the excitation of conductors 310, 320 is applied to substantially all (or most) of a plurality of LEDs (diodes 100 to 100L) to provide light emission for fixed displays such as lighting devices or signage, for example. Will provide power. These pixel counts can be much higher than typical high definition levels.

Continuing with reference to Figure 84, the devices 300A, 300C, 300D, 300C, 300D, 700A, 720, 730, 740, 750, 760, 770, through the interface circuit 355, DC power (for example, battery or solar Photovoltaic cells) or an AC power source (eg, household or building power), and also optionally to a controller 345. The interface circuit 355 can be implemented in a wide variety of ways, such as a full-wave or half-wave rectifier, an impedance matching circuit, a capacitor to reduce DC ripple, a switching power supply for coupling to an AC line, etc., for example, without limitation, a diode It may include a wide range of members (not illustrated separately) for controlling the excitation of 100 to 100L. When the controller 345 is executed as in the case of the addressable light emitting display system 350 aspect and/or the dynamic light emitting display system 350 aspect, the controller 345 is known or known in the electronic art. It can be used to control the excitation of diodes 100 to 100L (via conductors 310 and a plurality of transparent second conductor(s) 320), and is typically a control logic circuit 360 (this can be a combinational logic circuit, a finite state machine, a processor, etc.) Have) and memory 365. Other input/output (I/O) circuits can also be used. If the controller 345 is not running, as in the case of the various lighting system 350 aspects (this is typically the non-addressable and/or non-dynamic light emitting display system 350 aspect), the system 350 turns on the lighting system, for example, and/or To turn off and/or dimming, it is typically coupled to an electrical or electronic switch (not separately illustrated) that may include any suitable type of switching arrangement. The control logic circuit 360, memory 365, is discussed in more detail below, following the discussion of FIGS. 100-103, 85 and 86.

The interface circuit 355 may be implemented as is known or may be known in the art, and includes an impedance matching capacity, a voltage rectification circuit, for example a voltage conversion for connecting a low voltage processor with a high voltage control bus, the control logic circuit 360 Various switching mechanisms (eg, transistors), and/or physical coupling mechanisms for turning on or off various lines or connectors in response to a signal from In addition, the interface circuit 355 may also accept and/or transmit signals externally to the system 350 in question, for example via hard-wiring or RF signaling, or accept information in real time, for example to control a dynamic display. , It can also be adjusted to control (dimming) the brightness of the light output, for example. Since the interface circuit 355A may be a standalone device (e.g., modular) and can be reused with devices 760, 770 configured to be snapped, screwed, locked or coupled to the interface circuit 355A, for example, The interface circuit 355A can be used repeatedly over time with a number of replacement devices 760 and 770.

For example, as illustrated in FIG. 100, exemplary system aspects 800 and 810 are device 760 (when implemented using diodes 100-100K) or device 770 (when a plurality of diodes 100-100L are light emitting diodes). A diode 100L), and an interface circuit 355 for fitting any of various standard Edison sockets for lighting bulbs. Continuing and without limitation in this embodiment, the interface circuit 355 is one or more of the standardized screw configurations, e.g., E12, E14, E26, and/or E27 screw base standard, e.g., medium screw base (E26). Or candelabra screw base (E12), and/or sized and molded to conform to various other standards promulgated by the American Standards Institute (“ANSI”) and/or the Lighting Engineering Institute. In other exemplary aspects, the interface circuit 355 may be sized and shaped to conform to a two plug base such as a standard fluorescent light bulb socket or a GU-10 base, for example, but not limited to. This exemplary system aspect may be considered equally as another type of device, for example and without limitation, especially if it has a form factor compatible for insertion into an Edison or fluorescent socket.

For example, an LED-based "light bulb" can be any type of power socket, such as, but not limited to, L1, PL-2 pin, PL-4 pin, G9 halogen capsule, Portion of interface circuit 355, such as ES, E27, SES, or E14, which can be adapted to connect with a G4 halogen capsule, GU10, GU5.3, bayonet, small bayonet, or any other connection known in the art. It can be formed to have a design similar to a conventional incandescent lighting bulb, with a screw-type connection as.

Devices 300A, 300C, 300D, 700 and first system 350 are used for lighting bulbs and tubes, lamps, luminaires, indoor and outdoor lighting, lamps configured to have a lampshade form factor, architectural lighting, work or operation lighting, decorative or mood lighting. Lighting, ceiling lighting, safety lighting, dimmable lighting, color lighting, performance and/or color variable lighting, display lighting, and lighting having any of the various decorative or illusory forms mentioned herein, comprising: It can be used to form a wide range of lighting devices or other lighting products for purposes. Although not illustrated separately, the first system 350 will generally also include a variety of mechanical structures to provide sufficient physical support of the devices 300A, 300C, 300D in any desired shape or form in system 350.

Referring to FIG. 100, an exemplary system 800 includes a device 760 and an interface circuit 355A, and an exemplary system 810 includes a device 770 and an interface circuit 355A. The interface circuit 355A is configured to fit into a standard Edison bulb screw-type socket for coupling to a standard AC power source such as AC mains (not illustrated separately). This interface circuit 355A will typically include a rectifier circuit for converting an AC voltage to a DC voltage, and also, as is known in the LED lighting and LED power supply fields, an impedance matching circuit and various other circuits to reduce the ripple of the DC voltage. Capacitors and/or resistors (and switches often implemented using transistors) may be included. 102 and 103, device 760 is composed of a plurality of diodes 100 to 100K, while device 770 is composed of a plurality of diodes 100L, as discussed above and discussed in more detail below, the device It has corresponding differences in structure and materials. FIG. 100 also shows exemplary devices (300, 300A, 300B, 300C, 300D, 300C, 300D, 700, 700A, 700B, 720, 730, 740, 750, 760, 770) bent and folded in a fantastic and decorative form. It provides an example of a very thin and flexible form factor.

101 is a plan view illustrating a printed layout of devices 760 and 770. As illustrated, devices 760 and 770 are printed as flat sheets with very thin form factors and then die cut in area 716 to form a relatively narrow ramp strip 717 (continuously coupled, as described above). Electrodes (illustrated as carbon electrodes 322A and 322B) are provided at each end. Subsequently, as illustrated in FIG. 100, the devices 760 and 770 are rounded, and the ends 718 of the lamp strip 717 are gathered together to overlap each other in a circle, and the electrodes 322A and 322A to provide power to the devices 760 and 770 through the interface circuit 355A. Connect the 322B, and the lamp strips 717 are slightly separated from each other.

Referring to Figure 102, the device 760 is similar to the other illustrated devices, and has two layers, i.e., one or more third conductors 312 (which is also available in any of the transparent or non-transparent conductive inks and compounds discussed herein. 315A), and an additional dielectric layer between the one or more third conductors 312 and the one or more first conductors 310 (315B). Exemplified as) is further added. One or more third conductors 312 are used to provide power (e.g., voltage level) along the edge of the lamp strip 717, and one or more second conductors that can be deposited as a layer of transparent conductive material as discussed above. It is coupled to 320 and provides a way to reduce the overall impedance, current level and power consumption of the device 760, effectively functioning as a parallel busbar along the length of each lamp strip 717.

With reference to FIG. 103, device 770 is also similar to the other illustrated devices, with three layers, i.e. (1) at least one third conductor 312 (which is also a transparent or non-transparent conductive ink and compound discussed herein. Can be deposited as a single layer using any of these); (2) an additional dielectric layer between the one or more third conductors 312 and the one or more first conductors 310 (illustrated as 315A, to distinguish it from the other dielectric layer illustrated as 315B); And (3) one or more barrier layers 318 as mentioned above, deposited between said dielectric layer 315B and said one or more second conductors 320 are further added. One or more third conductors 312 are used to provide power (e.g., voltage level) along the edge of the lamp strip 717, are coupled to one or more of the first conductors 310, and further extend the length of each lamp strip 717. Thus, it provides a method of reducing the overall impedance, current level and power consumption of the device 770 while effectively functioning as a parallel busbar.

Various levels of light output can be provided by the devices 300A, 300C, 300D, 300C, 300D, 700A, 720, 730, 740, 750, 760, 770, which is the concentration of the diodes used 100-100L, the first system Based on the number of devices used in 350 300A, 300C, 300D, 300C, 300D, 700A, 720, 730, 740, 750, 760, 770, selected or permitted power consumption, and applied voltage and/or current level Will be different. In an exemplary embodiment, the devices 300A, 300C, 300D, 300C, 300D, 700A, 720, 730, 740, 750, 760, 770 include, but are not limited to, power consumption, concentration or density of diodes 100-100L, diodes Depending on the current level of 100 to 100L (that is, the intensity at which the diodes 100 to 100L are driven), the total impedance level, etc., a light output in the range of about 25 to 1300 lumens may be provided.

As specified above, the plurality of diodes 100 to 100L may be configured to be a photovoltaic (PV) diode (through material selection and corresponding doping). 85 is a block diagram of an embodiment of a second exemplary system 375 in which diodes 100-100L are implemented as photovoltaic (PV) diodes. System 375 is similar to Devices 300B, 700B (which is otherwise generally similar to Devices 300, 700 (or any of the other illustrated devices), but with a plurality of diodes 100-100L implemented as photovoltaic (PV) diodes. And an energy storage device 380 or interface circuit 385 (not separately illustrated), such as a battery for delivering power or energy to another system, including, for example, a motorized device or an electric utility. do. (In other exemplary aspects that do not include the interface circuit 385, other circuit configurations may be used to directly provide energy or power to such an energy consuming device or system or energy distribution device or system.) Within system 375, the device One or more first conductors 310 (or electrode 322A) of 300B, 700B are coupled to form a first terminal (e.g., negative or positive terminal), and one or more second conductor(s) of devices 300B, 700B ) 320 (or electrode 322B) to form a second terminal (e.g., a corresponding positive or negative terminal), and then connect them to either or both of the energy storage device 380 or the interface circuit 385. Can be coupled to When light (e.g., daylight) is incident on the device 300B, 700B, the light can be concentrated on one or more photovoltaic (PV) diodes 100-100L, which in turn converts incident photons into electron-hole pairs. In turn to generate an output voltage generated across the first and second terminals, and an output to either or both of the energy storage device 380 or the interface circuit 385.

When the first conductor 310 has the interlocking or comb-shaped structure illustrated in FIG. 77, the second conductor 320 can be excited using the first conductor 310B, or similarly, the voltage generated is the first conductor 310A and 310B. It should be noted that it can be accommodated across.

FIG. 86 is a flow chart illustrating an exemplary method of fabrication aspect of devices 300, 300A, 300B, 300C, 300D, 700, 700A, 700B, 720, 730, 740, 750, 760, 770, and provides a useful overview. Starting from the starting step 400, one or more first conductors 310 are deposited on the substrate 305, for example, printing a conductive ink or a polymer, or the substrate 305, depending on the implementation. After deposition, sputtering or coating with metal, the conductive ink or polymer is cured or partially cured, or the deposited metal is removed from potentially unwanted locations (step 405). Then, a plurality of diodes 100 to 100L, which are typically suspended in a liquid, gel or other compound or mixture (e.g., suspended in a diode ink), and may also contain a plurality of inert particles 292, are also typically Depositing over the one or more first conductors via printing or coating (step 410) to form an ohmic contact between the plurality of diodes 100-100L and the one or more first conductors (this is also for example It may include, but is not limited to, various chemical reactions, compression and/or heating). For the apparatus 700 aspect, steps 405 and 410 are performed in the reverse order as discussed above.

Then, a dielectric or insulating material, such as a dielectric ink, is deposited (also cured or heated) over or around the plurality of diodes 100-100L, for example around the periphery of the diodes 100-100L (step 415), One or more insulator or dielectric layers 315 are formed. For the device 760 aspect, although not illustrated separately, one or more third conductors 312 and dielectric layer 315A may be deposited in steps 405 and 415 followed by another step 405 and step 410. For the device 770 aspect, although not illustrated separately, a barrier layer 318 may also be deposited. Next, one or more second conductors 320 (which may or may not be optically transmissive) are placed over the plurality of diodes 100 to 100L, for example over the dielectric layer 315 and over the top of the diodes 100 to 100L. A contact is formed by depositing around the surface and cured (or heated) (step 420) to form an ohmic contact between the one or more second conductors 320 and the plurality of diodes 100-100L. In example aspects, such as an addressable display, the plurality of (transparent) second conductors 320 are oriented substantially perpendicular to the first plurality of conductors 310. For the device 770 aspect, although not specifically illustrated, the dielectric layer 315A may be deposited in step 415 and then one or more third conductors 312 may be deposited in step 405.

As another option, before or during step 420, a test may be performed to remove or neutralize the non-functional or defective diodes 100-100L. For example, in the case of PV diodes, when scanning the surface of the partially finished device (first side) with a laser or other light source, and the area (or individual diodes 100-100L) does not provide the expected electrical response, This can be removed using high-intensity lasers or other removal techniques. In addition, for example, in the case of a powered light-emitting diode, the surface (first side) is scanned with an optical sensor, and the area (or individual diodes 100-100L) does not provide the predicted light output and/or excessive current When drawing in (i.e., current exceeding a predetermined amount), it can also be removed using high-intensity lasers or other removal techniques. Depending on the implementation, for example, depending on how to remove the non-functional or defective diodes 100-100L, this test step could instead be performed after steps 425, 430 or 435 discussed below. A stabilizing layer 335 is then deposited over the one or more second conductors 320 or other layer as illustrated for various devices (step 425), followed by depositing a light emitting layer 325 over the stabilizing layer (step 430). In an apparatus 700 aspect, the layer 325 is typically deposited over the second side of the substrate 305A as mentioned above. Subsequently, a plurality of lenses (not separately exemplified), which are also usually suspended in a polymer, binder, or other compound or mixture to form a lance or lens particle ink or suspension, are also placed over the light-emitting layer, usually via printing or A preformed lens panel comprising a plurality of lenses deposited or suspended in a polymer is attached to the first side of the partially finished device (e.g., through a lamination process), followed by a protective coating (and/or selected Color) can be optionally deposited (eg, via printing) (step 355), and the method can be terminated (return step 440).

Again, referring to FIG. 84, the control logic circuit 360 may be any type of controller, processor, or control logic circuit, and may be implemented as one or more processors to perform the functions discussed herein. Like the term processor as used herein, processor 360 may include the use of a single integrated circuit ("IC"), or a plurality of integrated circuits or other members connected, arranged or grouped together, such as a controller, Microprocessor, digital signal processor ("DSP"), parallel processor, multi-core processor, custom IC, application specific integrated circuit ("ASIC"), field programmable gate array ("FPGA") "), adaptive computing ICs, associated memories (eg, RAM, DRAM and ROM), and other ICs and components. Consequently, the term processor, as used herein, is a single IC, or a custom IC, ASIC, processor, microprocessor, controller, FPGA, adaptive computing IC, or integrated circuits and associated memory that perform the functions discussed below. For example, it should be understood to mean and include an array of microprocessor memory or additional RAM, DRAM, SDRAM, SRAM, MRAM, ROM, FLASH, EPROM or some other group of E ² PROMs equally. The processor, along with its associated memory, (via programming, FPGA interconnection, or hard-wiring) of the method of the invention, e.g., selective pixel addressing for dynamic display aspects, or row/column for signage aspects. It can be adjusted or set to perform addressing. For example, the method may be a series of program instructions and other code (or equivalent set or other program) for subsequent execution when the processor is operating (i.e., powering and acting), the associated memory (and/or memory 365) and other equivalent members. Equally, if the control logic circuit 360 can be implemented in whole or in part as an FPGA, custom IC and/or ASIC, the FPGA, custom IC or ASIC may also be designed, configured and/or hard-wired to implement the method of the present invention. Can be ringed. For example, the control logic circuit 360 is a processor, controller, microprocessor, DSP collectively referred to as "controller" or "processor", each programmed, designed, adjusted or set to execute the method of the present invention with memory 365. And/or as an arrangement of ASICs.

The control logic circuit 360, along with its associated memory, for corresponding control over the displayed information, (through programming, FPGA interconnection, or hard-wiring) various first plurality of conductors 310 and second A plurality of conductor(s) of 320 (and any one or more of the third conductors 312) may be set to control the excitation of (applied voltage to). For example, static or time-varying display information is a series of program instructions (or equivalent setup or other programs) for subsequent execution when the control logic circuit 360 is operating, and associated memory (and/or memory 365) and other It can be programmed, stored, configured, and/or hard-wired in the control logic circuit 360 with equivalent members.

Memory 365, which may include a data store (or database), is a memory integrated circuit (“IC”) that is now known or becomes available in the future, depending on the aspect selected, or RAM, FLASH, DRAM, SDRAM, SRAM. , Volatile or nonvolatile removable or non-removable integrated circuit memory portion (e.g., resident memory within a processor), including, but not limited to, MRAM, FeRAM, ROM, EPROM or E ² PROM, or any other memory Device type, for example magnetic hard drive, optical drive, magnetic disk or tape drive, hard disk drive, other machine-readable storage or storage media, e.g. floppy disk, CDROM, CD-RW, digital multifunction disk (DVD ) Or other optical memory, or any other type of memory, storage medium, or any computer or other machine-readable data that is now known or becomes available in the future, including, but not limited to, data storage devices or circuits. It may be implemented in any number of forms including storage media, storage devices for information storage or communication, or other storage or communication devices. Additionally, such computer-readable media includes any information delivery media capable of encoding data or other information in wired or wireless signals, including electromagnetic signals, optical signals, audio signals, RF signals or infrared signals, and the like. Computer readable instructions, data structures, program modules or other data in a data signal or a modularized signal such as an electromagnetic or optical carrier or other transmission mechanism. Memory 365 can be adjusted to store various look up tables (of the software of the present invention), parameters, coefficients, other information and data, programs or instructions, and other types of tables such as database tables.

As indicated above, the processor 360 is programmed to perform the inventive method, for example using the inventive software and data structures. As a result, the systems and methods of the present invention can be implemented as software that provides programming or other instructions, such as a set of instructions and/or metadata, implemented within the computer-readable medium discussed above. Additionally, metadata can also be used to define various data structures of a lookup table or database. Such software may be in the form of source code or object code, for example and without limitation. The source code may be further compiled into some form of instruction or object code (including assembly instructions or configuration information). The software, source code or metadata of the present invention may be any type of code, such as C, C++, SystemC, LISA, XML, Java, Brew, SQL, and variations thereof, or various hardware definitions or hardware modeling languages (e.g. It can be implemented as any other type of programming language that performs the functions discussed herein, including, for example, Verilog, VHDL, RTL) and final database files (eg, GDSII). Consequently, “construct”, “program construct”, “software construct” or “software”, as used equivalently herein, provides or provides a specified related function or method. Means and refers to any programming language of any kind with any syntax or signature that can be interpreted as doing (e.g., instantiated or loaded into a processor or computer comprising a processor 360 When running).

The software, metadata, or other source code of the present invention and any final bit file (object code, database, or lookup table) may be computer-readable instructions, data structures, program modules, or other computer-readable instructions as discussed above for memory 365. As other data, any tangible storage medium such as any of a computer or other machine-readable data storage medium, e.g., a floppy disk, CDROM, CD-RW, DVD, magnetic hard drive, optical drive, or the above It can be implemented in any other type of data storage device or medium as mentioned.

In addition to the controller 345 illustrated in FIG. 84, those skilled in the art will recognize that there are a number of equivalent setups, layouts, types and types of control circuits known in the art that are within the scope of the present invention.

Although the present invention has been described with respect to certain aspects thereof, these aspects are merely exemplary and do not limit the invention. In the context of this specification, numerous specific details are provided, such as examples of electronic components, electronic devices and structural connections, materials, and structural modifications to provide a thorough understanding of aspects of the invention. However, one of ordinary skill in the art will recognize that aspects of the invention may be practiced without having one or more of the above specific details, or with other devices, systems, assemblies, parts, materials, members, etc. will be. In other instances, well-known structures, materials, or operations have not been specifically shown or described in detail in order to avoid obscuring aspects of aspects of the invention. Those of skill in the art will also appreciate that additional or equivalent method steps may be used, may be combined with other steps, or performed in different orders, all of which are within the scope of the claimed invention. In addition, the various drawings are not drawn to scale and should not be regarded as limiting.

Reference throughout this specification to “a aspect”, “an aspect”, or a particular “an aspect” means that a particular feature, structure, or characteristic described in connection with that aspect is included in at least one aspect and necessarily It is not included and also means that they do not necessarily refer to the same aspect. In addition, a particular feature, structure, or characteristic of any particular aspect may be combined with one or more other aspects in any suitable manner and in any suitable combination, including the use of the selected feature without the corresponding use of other features. . Additionally, a number of variations may be made to adapt a particular field, situation or material to the essential scope and spirit of the invention. It is to be understood that other variations and modifications of the aspects of the invention described and illustrated herein are possible in light of the teachings herein and are to be considered part of the spirit and scope of the invention.

It will be appreciated that one or more of the members shown in the figures may be implemented in a more discrete or integrated manner, or may even be removed or rendered inoperable in certain cases, as may be useful depending on the particular field. An integrally formed combination of parts is also within the scope of the invention, particularly for aspects in which the separation or combination of separate parts is unclear or indistinguishable. In addition, the term "coupled" herein, including in various forms such as "coupled" or "coupleable", refers to integrally formed parts, and parts coupled via or through another part. Any direct or indirect electrical, structural or magnetic coupling, connection or attachment, including any direct or indirect electrical, structural or magnetic coupling, adaptation or caper to such direct or indirect electrical, structural or magnetic coupling, connection or attachment Means and includes capability.

The term “LED” and its plural forms “LEDs” as used herein for the purposes of the present invention include within any bandwidth or visible spectrum of any color or color temperature or other spectrum such as ultraviolet or infrared , Any electroluminescent diode or other capable of generating radiation in response to an electrical signal, including, but not limited to, various semiconductor-based or carbon-based structures that emit light in response to current or voltage, light-emitting polymers, organic LEDs, etc. It should be understood to include carrier injection-based or junction-based systems of the type. In addition, the term "solar photovoltaic diode" (or PV) and its plural forms "PVs" used for the purposes of the present invention are included in any bandwidth or spectrum of the visible spectrum or other spectrum such as ultraviolet or infrared Electrical signals (e.g., voltage) in response to incident energy (e.g., light or other electromagnetic waves), including, but not limited to, various semiconductor-based or carbon-based structures that generate electrical signals in response to light. It should be understood to include any photovoltaic diode or other type of carrier injection-based or junction-based system capable of generating ).

The dimensions and values described herein are not to be understood as being strictly limited to the exact numerical values recited. Rather, unless otherwise specified, each such dimension is intended to mean both the recited value and the functionally equivalent range surrounding the value. For example, a dimension described as “40 mm” is intended to mean “about 40 mm”.

All documents cited in the detailed description of the invention are incorporated herein by reference in their relevant parts; Citation of any document should not be construed as an admission that this is prior art to the present invention. To the extent that any meaning or definition of a term in this document conflicts with any meaning or definition of the same term in the document cited by reference, the meaning or definition assigned to the term in this document will prevail.

In addition, any signal arrows in the drawings, unless specifically stated, should be regarded as illustrative only and not limiting. Combinations of step elements will also be considered to be within the scope of the present invention, especially if the ability to separate or combine is unclear or predictable. The separate term "or", as used throughout this specification and in the claims below, is intended to mean "and/or" which generally has both the meaning of connection and the meaning of separation, unless otherwise indicated. (Also, this is not limited to the meaning of "exclusive logicalization"). The terms in the singular form used throughout the technical content of the present specification and the following claims include the plural form unless clearly indicated otherwise. In addition, as used throughout the technical content of this specification and the following claims, the meaning of ".. to" includes ".. to" and ".. to" unless explicitly indicated otherwise. .

The above description of illustrated aspects of the invention, including those described in this summary or abstract, is not intended to be exhaustive or to limit the invention to the detailed forms disclosed herein. From the above, it will be appreciated that many changes, modifications and alternatives may be intended and practiced without departing from the spirit and scope of the novel concepts of the present invention. It is to be understood that limitations on the specific methods and apparatus illustrated herein are not intended or inferred. Of course, all such modifications included in the claims are intended to be covered by the appended claims.

Claims (14)

A flexible substrate at least partially transmissive to light;
At least one first conductor coupled to the substrate;
A plurality of light emitting diodes distributed in parallel on the at least one first conductor;
A dielectric material between sides of the light emitting diodes of the plurality of light emitting diodes; And
A bidirectional light emitting device comprising at least one second conductor coupled to the plurality of light emitting diodes and a dielectric material,
Said at least one first conductor is at least partially transmissive to light,
At least some of the plurality of light emitting diodes have a first forward-bias orientation, and at least one of the plurality of light emitting diodes is a second reverse-bias orientation or a third Has an unbiased orientation,
The at least one second conductor is at least partially transmissive to light. The device of claim 1, wherein each light emitting diode of the plurality of light emitting diodes has a side dimension of 10 to 50 μm and a height of 5 to 25 μm. The method of claim 2, wherein each of the light emitting diodes of the plurality of light emitting diodes,
A light-emitting or light-absorbing region having a side dimension of 6 to 30 μm and a height of 1 to 7 μm;
A first conductive terminal coupled to the light emitting or light absorbing region on a first surface; And
A second conductive terminal coupled to the light emitting or light absorbing region on a second surface opposite to the first surface,
Wherein the first conductive terminal has a height of 3 to 6 μm and the second conductive terminal has a height of 2 μm or less. The method of claim 3, wherein the first conductive terminal of at least a portion of the light emitting diodes is coupled to the at least one first conductor in a forward-bias orientation, and the first conductive terminal of at least a portion of the light emitting diodes 2 conductive terminals are coupled to the at least one first conductor in a reverse-bias orientation, or
The first conductive terminal of at least a portion of the light emitting diodes is coupled to the at least one first conductor in a reverse-bias orientation, and the second conductive terminal of at least a portion of the light emitting diodes is the at least one first conductor In a forward-bias orientation to the device. 4. The device of claim 3, wherein the light emitting or light absorbing region further comprises a surface texture for light extraction. The apparatus of claim 3, wherein each light emitting diode of the plurality of light emitting diodes emits light in both directions through the first side and the second side of the light emitting or light absorbing region. The apparatus of claim 1, wherein the at least one first conductor or the at least one second conductor further comprises a busbar, a comb structure, or both a busbar and a comb structure. 8. The device of claim 7, wherein the busbar or comb structure further comprises at least one third conductor, wherein the at least one third conductor is opaque or impermeable to light. The apparatus of claim 1, further comprising a plurality of first conductors and a plurality of second conductors arranged to provide a series of coupled regions of the plurality of light emitting diodes. The device of claim 1, wherein the at least one first conductor and the at least one second conductor comprise a transparent conductive material or compound. The device of claim 1 further comprising a light dispersing structure, panel or layer. The device of claim 1, further comprising at least one emitting or diverging layer or region comprising at least one phosphorescent or fluorescent emitter. The method of claim 1, wherein when a voltage differential is applied to the plurality of light emitting diodes, light is emitted from the plurality of light emitting diodes through the at least one first conductor and the at least one second conductor. Released, device. The apparatus according to claim 1, wherein the device is a lighting bulb, a lighting tube, a lamp, a lighting equipment, an indoor lighting equipment, an outdoor lighting equipment, a lamp shade, a lighting equipment for a building, a lighting equipment for work or operation, a ceiling lighting equipment, a safety lighting equipment. , Dimmable lighting fixtures, color lighting fixtures, performance lighting fixtures, color variable lighting fixtures, display lighting fixtures, display lighting, addressable displays, mirrors, indicia, signage, A device, which is at least one of a package, a carton, a business product, an industrial product, a building product, and combinations thereof.

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