TWI613547B - Computer system having PCI-E redriver, and configurating method of the PCI-E redriver - Google Patents

Abstract

A computer system including a central processing unit, a PCI-E switch, a logic unit, a PCI-E enhancer, and a PCI-E connector. When the computer system is booted, the central processing unit is connected to the PCI-E module connected to the PCI-E connector and obtains information about the PCI-E module. The central processing unit then sets the register of the logic unit according to the obtained information, and the logic unit outputs a corresponding signal to the PCI-E switch according to the set value of the register, whereby the PCI-E switch corresponds to the PCI-E connector. Configuration settings. The BIOS of the computer system simultaneously generates corresponding control commands according to the information of the PCI-E module and transmits them to the PCI-E enhancer to adjust the internal parameters of the PCI-E enhancer, so that the PCI-E enhancer is set and PCI-E The modules match.

Description

Computer system with PCI-E enhancer, and setting method of PCI-E enhancer

The invention relates to a computer system and a setting method thereof, in particular to a computer system with a PCI-E enhancer and a setting method of the PCI-E enhancer.

The Personal Computer Interface Express (PCI-E) is one of the most common connection interfaces in today's computers. When a computer system needs to expand and connect various functional modules (such as network cards, display cards, etc.), it can generally be connected through the PCI-E connector on the motherboard of the computer system.

Furthermore, since PCI-E delivers extremely fast speeds (eg, PCI-E 4.0 can achieve a transfer rate of approximately 16 GT/s), when the transmission distance is too long, a PCI-E enhancer is required. Signal enhancements to maintain the integrity of the PCI-E signal.

However, different PCI-E function modules have different information (for example, different models, different internal wafers, etc.), so the parameters of the PCI-E enhancer on the computer system must be adjusted accordingly. The connected PCI-E function modules match.

In the prior art, the parameters of the PCI-E booster are generally adjusted by using a hardware setting, for example, a corresponding resistor is externally connected to the PCI-E booster, and the resistance value is changed. To adjust the parameters of the PCI-E enhancer. However, the above resistors are manually soldered The method is connected to the motherboard of the computer system, and when the connected PCI-E function module is replaced, the user must manually replace the resistor. This adjustment method takes a long time, which causes considerable trouble for the user. Furthermore, replacing the resistor repeatedly will cause damage to the motherboard.

In addition, a dip switch is provided on some of the motherboards, and the parameters of the PCI-E enhancer are adjusted by the operation of the dip switch. However, the dip switch still requires the user to operate manually, and its operation mode must be inconsistent with the original factory specifications. Moreover, the finger switch actually occupies a valuable configuration space on the motherboard, causing the motherboard to be too large, and thus is not favored by the market.

The main object of the present invention is to provide a computer system with a PCI-E enhancer and a PCI-E enhancer setting method thereof, which can automatically set the configuration of the PCI-E switch according to the information of the external PCI-E module. And automatically adjust the parameters of the PCI-E enhancer, so that the PCI-E signal received/transmitted by the PCI-E module can be completed.

In order to achieve the above object, the present invention discloses a computer system having a PCI-E enhancer, the computer system mainly comprising a central processing unit, a PCI-E switch, a logic unit, a PCI-E enhancer and a PCI-E connector. After the computer system is started, the central processing unit is connected to a PCI-E module connected to the PCI-E connector to obtain information of the PCI-E module. The central processing unit then sets a register of the logic unit according to the obtained information, and the logic unit outputs a corresponding signal to the PCI-E switch according to the set value of the register, whereby the PCI-E switcher The PCI-E connector performs the corresponding configuration settings.

A BIOS of the computer system simultaneously generates a corresponding control command according to the information of the PCI-E module and transmits the corresponding control command to the PCI-E enhancer to adjust internal parameters of the PCI-E enhancer to enable the PCI-E enhancement. The settings of the device match the PCI-E module.

With the technical means of the present invention, the user of the computer system does not have to manually set the configuration of the PCI-E switch, and does not have to manually adjust the parameters of the PCI-E enhancer. According to the information of the PCI-E module, the computer system can automatically complete the setting and adjustment of the PCI-E switch and the PCI-E enhancer during the normal booting process, which is quite convenient.

1‧‧‧ computer system

10‧‧‧System Management Bus

11‧‧‧Central Processing Unit

12‧‧‧PCI-E switch

13‧‧‧Logical unit

131‧‧‧ register

14‧‧‧PCI-E enhancer

141‧‧‧First Signal Enhancer

1411‧‧‧First Receive Signal Enhancer

1412‧‧‧First Transmit Signal Enhancer

142‧‧‧Second Signal Enhancer

1421‧‧‧Second Receive Signal Enhancer

1422‧‧‧Second Transmit Signal Enhancer

15‧‧‧PCI-E connector

151‧‧‧First PCI-E connector

152‧‧‧Second PCI-E connector

16‧‧‧System Management Bus Switcher

2‧‧‧PCI-E module

S10~S26‧‧‧Setting steps

S230~S234‧‧‧Setting steps

1 is a system architecture diagram of a first embodiment of the present invention.

2 is a system architecture diagram of a second embodiment of the present invention.

3 is a configuration diagram of a system management bus switch of the first embodiment of the present invention.

4A is a configuration diagram of a PCI-E switch according to a first embodiment of the present invention.

4B is a configuration diagram of a PCI-E switch according to a second embodiment of the present invention.

4C is a configuration diagram of a PCI-E switch according to a third embodiment of the present invention.

4D is a configuration diagram of a PCI-E switch of a fourth embodiment of the present invention.

Figure 5 is a flow chart showing the setting of the first embodiment of the present invention.

Figure 6 is a flow chart showing the setting of a second embodiment of the present invention.

DETAILED DESCRIPTION OF THE INVENTION A preferred embodiment of the present invention will be described in detail with reference to the drawings.

Referring to Figure 1, there is shown a system architecture diagram of a first embodiment of the present invention. The invention discloses a computer system with a PCI-E enhancer (hereinafter referred to as a computer system 1). As shown in FIG. 1 , the computer system 1 mainly comprises a central processing unit (CPU) 11 and a PCI. -E-switch (PCI-E switch) 12, a logic unit 13, a PCI-E redriver 14 and a PCI-E slot (PCI-E slot) 15.

The PCI-E connector 15 serves as an expansion interface of the computer system 1 for expanding a PCI-E module 2 connected to the outside. The PCI-E module 2 can be, for example, an expansion module such as a local area network (LAN) interface card or a display card, but is not limited thereto. In this embodiment, the PCI-E connector 15 can be used to connect different types of PCI-E modules, wherein different types of PCI-E modules have different models, names, different chips, and may be applicable to Different PCI-E configurations.

The PCI-E enhancer 14 is mainly connected to the PCI-E connector 15 for enhancing the PCI-E signal received/transmitted by the PCI-E connector 15 so that the PCI-E connector 15 is connected. The PCI-E signal transmitted between the PCI-E module 2 and the computer system 1 can be more complete. It should be noted that, in this embodiment, a single PCI-E connector 15 and a single PCI-E enhancer 14 are taken as an example, but the PCI-E connector 15 and the PCI-E are illustrated. The number of boosters 14 is not limited to one (more on this later).

The PCI-E switcher 12 is connected to the PCI-E enhancer 14 and is connected to the PCI-E connector 15 via the PCI-E enhancer 14. As described in the foregoing, different types of the PCI-E module 2 may be applicable to different PCI-E configurations. In this embodiment, the computer system 1 automatically uses the PCI-E switch 12 for the PCI. The -E connector 15 is configured to configure the logic of the PCI-E connector 15 to meet the requirements of the PCI-E module 2.

The logic unit 13 is connected to the PCI-E switch 12. In the embodiment, the logic unit 13 is controlled by the central processing unit 11 to assist the PCI-E switch 12 in performing the above configuration configuration.

The central processing unit 11 is mainly connected to the PCI-E switch 12 and the logic unit 13, and the central processing unit 11 is also connected to the PCI-E connector 15. In the present invention, after the computer system 1 is activated, the central processing unit 11 directly connects and reads the PCI-E module 2 through the PCI-E connector 15 to obtain information of the PCI-E module 2. . Specifically, the information may be, for example, at least one of the name and model of the PCI-E module 2, a wafer number of a chip (not shown), and a suitable PCI-E configuration. However, the above is only one specific example of the present invention and should not be limited thereto.

After obtaining the information of the PCI-E module 2, the central processing unit 11 then sets a register 131 of the logic unit 13 according to the information. After the central processing unit 11 is set, the logic unit 13 outputs a corresponding signal to the PCI-E switch 12 according to the set value of the register 131, so that the PCI-E switch 12 can be based on the corresponding signal. The configuration of the connected PCI-E connector 15 is configured.

It should be noted that, in this embodiment, the logic unit 13 is mainly a Complex Programmable Logic Device (CPLD), and the corresponding signal output by the logic unit 13 is a low potential signal (Low). ) or a high potential signal (High). The PCI-E switch 12 performs a corresponding configuration configuration (described later in detail) by identifying the corresponding signal as a low potential signal and a high potential signal.

In the present invention, after the computer system 1 is started, the central processing unit 11 performs a basic input/output system (Basic Input/Output) in addition to reading the information of the PCI-E module 2. System, BIOS). The BIOS generates a corresponding control command according to the information of the PCI-E module 2 during the startup process of the computer system 1, and transmits the control command to the PCI-E enhancer 14. Thereby, the PCI-E enhancer 14 can adjust an internal parameter according to the control command, so that the internal parameter can conform to the requirement of the PCI-E module 2. In this embodiment, the internal parameters may be, for example, an equalization value (EQ) and a de-emphasis (DEM), but are not limited. The EQ value and the DEM value are commonly used parameters of the signal booster, and are not described herein again.

Specifically, in this embodiment, the central processing unit 11 is mainly connected to the PCI-E connector 15 through a system management bus (SMB) 10, and then connected and read through the PCI-E connector 15. Take the PCI-E module 2. Moreover, the BIOS transmits the control command to the PCI-E enhancer 14 through the system management bus 10, so that the PCI-E enhancer 14 can adjust the internal parameter according to the control command.

It is worth mentioning that the system management bus 10 has a unique address, so when the computer system 1 has a plurality of PCI-E enhancers 14 and a plurality of PCI-E connectors 15, There may be a problem of address confusion, causing the central processing unit 11 to fail to read the PCI-E module 2 correctly, or the BIOS cannot correctly transfer the control command to the PCI-E enhancer 14.

Please refer to FIG. 2, which is a system architecture diagram of a second embodiment of the present invention. In the present embodiment, the computer system 1 has two PCI-E enhancers 14 and has two PCI-E connectors 15. Specifically, in the embodiment, the PCI-E switch 12 of the computer system 1 is connected to a first signal booster 141 and a second signal booster 142. The first signal booster 141 is connected to a first PCI- The E connector 151 is connected to a second PCI-E connector 152, and the second PCI-E connector 152 is connected to the external PCI-E module 2.

In this embodiment, the computer system 1 further includes a system management bus switch 16 through which the system management bus switch 16 is connected to the central processing unit 11 and simultaneously connected to the first signal enhancement. The second signal enhancer 142, the first PCI-E connector 151 and the second PCI-E connector 152. When the central processing unit 11 is to be connected to the first PCI-E connector 151 or the second PCI-E connector 152, or when the BIOS is to transmit the control command to the first signal enhancer 141 or the second When the signal booster 142 is used, the system management bus switch 16 can be used to stagger the addresses of the PCI-E enhancer 14 and the PCI-E connectors 15 to avoid access errors.

Please refer to FIG. 3 as a configuration diagram of the system management bus switch of the first embodiment of the present invention. As shown in FIG. 3, the system management bus switch 16 mainly transmits a data signal (SMB_DATA) and a clock signal (SMB_CLK) to the central processing unit 11 through the system management bus 10, and the system manages the bus switch. The device 16 uses a unique address (Address: 0x1110111x).

When receiving the signal sent by the central processing unit 11, the system management bus switch 16 first identifies a destination device of the central processing unit 11 according to the signal, and sends the signal to the first PCI according to the identification result. E connector 151 (DATA_SLOT1/CLK_SLOT1) or the second PCI-E connector 152 (DATA_SLOT2/CLK-SLOT2). In this way, the central processing unit 11 can connect the plurality of PCI-E connectors 15 through a single system management bus 10 to correctly read the information of the PCI-E module 2 without The problem of address confusion.

In addition, in the embodiment, the first signal booster 141 mainly includes a first receive signal (Rx1) enhancer 1411 and a first transmit signal (Tx1) enhancer 1412, and the second signal enhancer 142. The method mainly includes a second receiving signal (Rx1) enhancer 1421 and a second sending signal (Tx1) enhancer 1422.

After the BIOS generates the control command, the control command is sent to the system management bus switch 16 mainly through the system management bus 10 . The system management bus switch 16 first identifies a destination device of the BIOS according to the content of the control command, and sends the control command to the first received signal enhancer 1411 (Address: 0xB0) according to the recognition result, the second The received signal booster 1421 (0xB2), the first transmit signal enhancer 1412 (0xB4) or the second transmit signal enhancer 1422 (0xB6). In this way, the BIOS can separately adjust the internal parameters of the plurality of PCI-E enhancers 14 through the unique system management bus 10 without the problem of address confusion.

Continuing to refer to FIG. 2 and FIG. 4A to FIG. 4D, wherein FIG. 4A to FIG. 4D are respectively a configuration diagram of the PCI-E switch of the first embodiment to the fourth embodiment of the present invention. In the present invention, the logic unit 13 mainly outputs the corresponding signal to the PCI-E switch 12 according to the set value of the register 131. More specifically, when the number of the PCI-E connectors 15 is one, the logic unit 13 mainly outputs only one set of the corresponding signals. When the number of the PCI-E connectors 15 is two, the logic unit 13 outputs two sets of the corresponding signals, and so on.

Specifically, the corresponding signal is a low potential signal (Low) or a high potential signal (High). When the corresponding signal is the low potential signal, the PCI-E switch 12 sets the logic of the corresponding PCI-E connector 15 as a set of PCI-E X8 connectors. When the corresponding signal is the high potential signal, the PCI-E sets the logic of the corresponding PCI-E connector 15 to be a set of PCI-E X4 connectors or two sets of PCI-E X4 connectors.

As shown in FIG. 4A, if the number of the PCI-E connectors 15 is two, and the corresponding signal output by the logic unit 13 is two low-potential signals, the PCI-E switch 12 will use the first PCI. -E The logic of the connector 151 is set to a set of PCI-E X8 connectors, and the logic of the second PCI-E connector 152 is also set as a set of PCI-E X8 connectors. That is, the PCI-E switch 12 switches the set of PCI-E X8 signal logic to two sets of PCI-E X8 signals for the central processing unit 11.

As shown in FIG. 4B, if the number of the PCI-E connectors 15 is two, and the corresponding signal output by the logic unit 13 is two high-potential signals, the PCI-E switch 12 will use the first PCI. The logic of the -E connector 151 is set to one or two sets of PCI-E X4 connectors, and the logic of the second PCI-E connector 152 is also set to one or two sets of PCI-E X4 connectors. That is, the PCI-E switcher 12 switches the set of PCI-E X8 signal logic to two to four sets of PCI-E X4 signals for the central processing unit 11.

As shown in FIG. 4C, if the number of the PCI-E connectors 15 is two, and the corresponding signal output by the logic unit 13 is a low potential signal + a high potential signal, the PCI-E switch 12 will The logic of the first PCI-E connector 151 is set to a set of PCI-E X8 connectors, and the logic of the second PCI-E connector 152 is set to one or two sets of PCI-E X4 connectors. That is, the PCI-E switch 12 switches the set of PCI-E X8 signals to a set of PCI-E X8 signals + one or two sets of PCI-E X4 signals for the central processing unit 11.

As shown in FIG. 4D, if the number of the PCI-E connectors 15 is two, and the corresponding signal output by the logic unit 13 is a high potential signal + a low potential signal, the PCI-E switch 12 will The logic of the first PCI-E connector 151 is set to one or two sets of PCI-E X4 connectors, and the logic of the second PCI-E connector 152 is set as a set of PCI-E X8 connectors. That is, the PCI-E switcher 12 switches the set of PCI-E X8 signal logic to one or two sets of PCI-E X4 signals + a set of PCI-E X8 signals for the central processing unit 11.

Through the corresponding signal sent by the logic unit 13, the computer system 1 of the present invention can automatically perform the configuration of the PCI-E switch 12 after connecting the PCI-E module 2 and obtaining the information. The configuration is such that the configuration configuration of the PCI-E switch 12 can be consistent with the requirements of the PCI-E module 2. However, the above description is only a specific example of the present invention, but should not be limited thereto.

Referring to Figure 5, there is shown a flow chart of the setting of the first embodiment of the present invention. First, the computer system 1 is started by external operation (step S10). At this time, if the computer system 1 is connected to the PCI-E module 2 through the PCI-E connector 15, the center of the computer system 1 The processing unit 11 can connect and read the PCI-E module 2 through the PCI-E connector 15 (step S12) to obtain the information of the PCI-E module 2 (step S14). In this embodiment, the information may be, for example, at least one of the name and model of the PCI-E module 2, the wafer number of the used chip, and the applicable PCI-E configuration, but is not limited thereto.

It should be noted that, in the above step S12, the central processing unit 11 mainly connects the PCI-E connector 15 through the system management bus bar 10. Moreover, when the number of the PCI-E connectors 15 is plural (for example, the first PCI-E connector 151 and the second PCI-E connector 152 shown in FIG. 2), the central processing unit 11 passes The system management bus bar 10 and the system management bus switch 16 are connected to the PCI-E connector 15 connected to the PCI-E module 2.

After the central processing unit 11 obtains the information of the PCI-E module 2, the central processing unit 11 then sets the register 131 of the logic unit 13 according to the obtained information (step S16). Then, the logic unit 13 outputs the corresponding signal to the PCI-E switch 12 according to the set value of the register 131, so that the PCI-E switch 12 performs the PCI-E connector 15 according to the corresponding signal. The configuration is configured (step S18).

In this embodiment, the corresponding signal is a low potential signal or a high potential signal. When the logic unit 13 outputs a low potential signal, the PCI-E switch 12 sets the logic of the PCI-E connector 15. a set of PCI-E X8 connectors; when the logic unit 13 outputs a high potential signal, the PCI-E switch 12 sets the logic of the PCI-E connector 15 to one or two sets of PCI-E X4 connectors. .

While the step S16 and the step S18 are performed, the central processing unit 11 further executes the BIOS, and the BIOS generates a corresponding control command according to the information of the PCI-E module 2 (step S20). Then, the BIOS transmits the control command to the PCI-E enhancer 14 to enable the PCI-E enhancer 14 to adjust the internal parameter according to the control command, so that the internal parameter and the requirement of the PCI-E module 2 are Matches (step S22).

It is worth mentioning that in the step S22, the BIOS mainly transmits the control command to the PCI-E enhancer 14 through the system management bus bar 10. Moreover, if the number of the PCI-E enhancer 14 is plural (for example, the first signal enhancer 141 and the second signal enhancer 142 shown in FIG. 2), the BIOS mainly manages the busbar 10 through the system. The system manages the bus switch 16 and passes the control command to the corresponding PCI-E enhancer 14. Moreover, the PCI-E enhancer 14 mainly adjusts internal parameters such as equalization value (EQ) and emphasis value (DEM) according to the control command, but is not limited thereto.

After the step S22, the BIOS sends a reset signal (step S24), whereby the computer system 1 is restarted according to the reset signal (step S26). After the computer system 1 is restarted, the PCI-E switch 12, the PCI-E enhancer 14 and the PCI-E connector 15 have all used the correct settings. In this way, the PCI-E module 2 can communicate with the central processing unit 11 correctly, and the PCI-E signal transmitted between the PCI-E module 2 and the central processing unit 11 can be complete.

As described in the foregoing, the present invention mainly sets the internal parameters of the PCI-E booster 14 automatically during the booting process of the computer system 1, so that the user does not notice under normal circumstances. . However, in order to allow the user to adjust the PCI-E enhancement for other purposes. The internal parameter of the device 14 or whether the setting of the BIOS is Debugged when a problem occurs is Debug. Therefore, the present invention further provides a manual adjustment scheme.

Referring to Figure 6, there is shown a flow chart of a second embodiment of the present invention. As shown in FIG. 6, after the foregoing step S22, the BIOS has completed the setting of the internal parameter of the PCI-E enhancer 14. Next, the BIOS determines whether a manual adjustment function of itself is enabled (step S230). If the manual adjustment function is not enabled, it indicates that the setting of the PCI-E enhancer 14 by the BIOS does not need to be intervened by the user, so the BIOS directly executes the step S24.

If the manual adjustment function is enabled, the BIOS further displays a BIOS setting page (step S231), wherein the BIOS setting page displays the internal parameters set by the PCI-E enhancer 14 in the step S22 (eg, The set value of the equalization value (EQ) and the emphasis value (DEM), etc. (for example, the level of the equalization value (Level), the value of the weighted value (dB), etc.).

Next, the BIOS determines whether or not an external operation is accepted through the BIOS setting page (step S232). If the external operation is accepted through the BIOS setting page, the BIOS adjusts the internal parameter of the PCI-E enhancer 14 according to the external operation (step S233). Next, the BIOS determines whether to accept an instruction to leave the BIOS setting page (step S234). The BIOS repeats the step S232 and the step S233 before accepting the instruction to leave the BIOS setting page. And, after accepting the instruction to leave the BIOS setting page, the BIOS leaves the BIOS setting page and proceeds to step S24.

Through the invention, the computer system 1 can automatically complete the PCI-E switch 12 and the PCI-E according to the information of the PCI-E module 2 after the PCI-E module 2 is plugged in and started. The related settings of the booster 14 are quite convenient.

The above is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention. Therefore, equivalent changes to the scope of the present invention are included in the scope of the present invention. Bright.

1‧‧‧ computer system

10‧‧‧System Management Bus

11‧‧‧Central Processing Unit

12‧‧‧PCI-E switch

13‧‧‧Logical unit

131‧‧‧ register

14‧‧‧PCI-E enhancer

15‧‧‧PCI-E connector

2‧‧‧PCI-E module

Claims (9)

A computer system with a PCI-E enhancer, comprising: a PCI-E connector for expanding a PCI-E module; a PCI-E enhancer for connecting the PCI-E connector; a PCI-E a switch connecting the PCI-E enhancer and connecting the PCI-E connector through the PCI-E enhancer; a logic unit connecting the PCI-E switch and having a register; and a central processing a unit that connects the PCI-E switch and the logic unit, obtains information of the PCI-E module after the computer system is started, and sets the register according to the information; wherein the logic unit is configured according to the register The set value outputs a corresponding signal to the PCI-E switch, and the PCI-E switch configures the PCI-E connector according to the corresponding signal; wherein the central processing unit executes after the computer system is started a BIOS, the BIOS generates a corresponding control command according to the information and transmits the control command to the PCI-E enhancer, and the PCI-E enhancer adjusts an internal parameter according to the control command to match the PCI-E module, wherein the BIOS The central processing unit manages the bus (System Management Bus, SMB) through a system The PCI-E connected to a connector of the PCI-E module reads the information by the BIOS and the system management bus is transmitted to the control command to the PCI-E enhancer. The computer system of claim 1, wherein the logic unit is a Complex Programmable Logic Device (CPLD). The computer system of claim 2, wherein when the corresponding signal is a low potential signal, the PCI-E switch sets the logic of the PCI-E connector to be a set of PCI-E X8 connectors; When the corresponding signal is a high potential signal, the PCI-E switch sets the logic of the PCI-E connector to one or two sets of PCI-E X4 connectors. The computer system of claim 1, wherein the number of the PCI-E enhancers is plural, the number of the PCI-E connectors is plural, and the plurality of PCI-E connectors are respectively connected to the plurality of PCI-E enhancers. And the computer system further includes a system management bus switch, the system management bus switch is connected to the central processing unit, the plurality of PCI-E enhancers and the plurality of PCI-E connectors for staggering the plurality of PCI- The address of the E-enhancer and the complex PCI-E connector. The computer system of claim 1, wherein the information includes at least one of a name, a model number, a wafer number of a wafer used, and a suitable PCI-E configuration of the PCI-E module, the internal Parameters include Equalization (EQ) and De-Emphasis (DEM). A method for setting a PCI-E enhancer for use in a computer system according to claim 1, comprising: a) the central processing unit acquires the information of the PCI-E module after the computer system is started, wherein the central The processing unit connects the PCI-E connector to obtain the information of the PCI-E module through the system management bus (SMB); b) the central processing unit sets the logic unit according to the information a register; the logic unit outputs the corresponding signal to the PCI-E switch according to the set value of the register; d) the PCI-E switch groups the PCI-E connector according to the corresponding signal The central processing unit executes the BIOS after the computer system is started; f) the BIOS generates the corresponding control command according to the information and transmits the control command to the PCI-E enhancer, wherein the BIOS is managed by the system The bus bar transmits the control command to the PCI-E enhancer; g) the PCI-E enhancer adjusts an internal parameter to match the PCI-E module according to the control command; and h) the BIOS issues a reset signal to restart the computer system. The setting method of claim 6, wherein the information includes at least one of a name, a model number of the PCI-E module, a wafer number of a chip used, and a suitable PCI-E configuration, the internal Parameters include Equalization (EQ) and De-Emphasis (DEM). The setting method of claim 6, wherein in the step d, when the corresponding signal is a low potential signal, the PCI-E switch sets the logic of the PCI-E connector to be a set of PCI-E X8 connections. The PCI-E switch sets the logic of the PCI-E connector to one or two sets of PCI-E X4 connectors when the corresponding signal is a high potential signal. The setting method of claim 6, wherein the step g further comprises the following steps: g1) the BIOS determines whether a manual adjustment function is enabled; g2) displaying a BIOS setting page when the manual adjustment function is enabled. The BIOS setting page displays the internal parameter of the PCI-E enhancer; g3) accepting an external operation through the BIOS setting page to adjust the internal parameter of the PCI-E enhancer; and g4) leaving the BIOS Perform step h when setting the page.