TWI609500B - Method for fabricating a hetero-junction solar cell - Google Patents

Method for fabricating a hetero-junction solar cell Download PDF

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TWI609500B
TWI609500B TW105140329A TW105140329A TWI609500B TW I609500 B TWI609500 B TW I609500B TW 105140329 A TW105140329 A TW 105140329A TW 105140329 A TW105140329 A TW 105140329A TW I609500 B TWI609500 B TW I609500B
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semiconductor layer
solar cell
fabricating
heterojunction solar
layer
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TW201822370A (en
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葉昌鑫
翁敏航
田偉辰
吳春森
黃玉君
黃俊凱
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財團法人金屬工業研究發展中心
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Description

異質接面太陽電池的製作方法Heterojunction solar cell manufacturing method

本發明是有關於一種電池的製作方法,特別是指一種異質接面太陽電池的製作方法。The invention relates to a method for manufacturing a battery, in particular to a method for manufacturing a heterojunction solar cell.

參閱圖1,現有的矽基異質接面太陽電池包含一塊具有相反的一第一表面和一第二表面的基板1、一層形成在該第一表面的第一本質型半導體層11(i-a-Si:H)、一層形成在該第一本質型半導體層11之上的p型矽半導體層12(p-a-Si:H)、一層形成在該第二表面的第二本質型半導體層13(i-a-Si:H)、一層形成在該第二本質型半導體層13上的n型矽半導體層14(n-a-Si:H)、二層各別地形成在該p型矽半導體層12和該n型矽半導體層14上的透明導電層15,及二層各別地形成在該二層透明導電層15上的電極16,該第一本質型半導體層11和p型矽半導體層12,以及該第二本質型半導體層13和n型矽半導體層14形成二層照光時以光電效應產生電子的光電轉換結構,從而在受光時,光於二層光電轉換結構行光電轉換產生電子流,再經該二層透明導電層15和二個電極16向外輸出。Referring to FIG. 1, a conventional bismuth-based heterojunction solar cell includes a substrate having an opposite first surface and a second surface, and a first intrinsic semiconductor layer 11 (ia-Si) formed on the first surface. :H), a p-type germanium semiconductor layer 12 (pa-Si:H) formed on the first intrinsic semiconductor layer 11, and a second intrinsic semiconductor layer 13 formed on the second surface (ia- Si:H), an n-type germanium semiconductor layer 14 (na-Si:H) formed on the second intrinsic semiconductor layer 13, and two layers separately formed on the p-type germanium semiconductor layer 12 and the n-type a transparent conductive layer 15 on the germanium semiconductor layer 14, and two electrodes 16 respectively formed on the two transparent conductive layers 15, the first intrinsic semiconductor layer 11 and the p-type germanium semiconductor layer 12, and the first The two intrinsic semiconductor layers 13 and the n-type germanium semiconductor layer 14 form a photoelectric conversion structure that generates electrons by photoelectric effect when two layers of light are irradiated, so that when light is received, light is photoelectrically converted into a two-layer photoelectric conversion structure to generate a flow of electrons, and then The two transparent conductive layers 15 and the two electrodes 16 are output outward.

就現有的矽基異質接面太陽電池而言,其問題之一是在形成該p型矽半導體層12及/或是該n型矽半導體層14時,需要摻雜例如p型摻雜的硼原子作為摻雜物以成為非本質的雜質區域(impurity range),再加上該第一本質型半導體層11、該p型矽半導體層12、該第二本質型半導體層13、該n型矽半導體層14本身均是極薄的膜體,因此在摻雜時會發生摻雜物摻入該第一本質型半導體層11和第二本質型半導體層13而形成載子複合中心,降低整體矽基異質接面太陽電池的輸出效能。One of the problems with the existing bismuth-based heterojunction solar cells is that doping such as p-type doped boron is required when forming the p-type germanium semiconductor layer 12 and/or the n-type germanium semiconductor layer 14. The atom acts as a dopant to become a non-essential impurity range, and the first intrinsic semiconductor layer 11, the p-type germanium semiconductor layer 12, the second intrinsic semiconductor layer 13, and the n-type germanium The semiconductor layer 14 itself is an extremely thin film body, so that dopants may be doped into the first intrinsic semiconductor layer 11 and the second intrinsic semiconductor layer 13 to form a carrier recombination center, which reduces the overall defect. The output efficiency of the base heterojunction solar cell.

目前,學術界乃至業界提出的解決方式之一,是例如第101137752號專利申請案揭示,在鍍膜形成該p型矽半導體層、該n型矽半導體層之前,先以低功率的氫氣電漿或氧氣電漿吹掃該第一本質型半導體層和該第二本質型半導體層表面之後再鍍膜形成該p型矽半導體層、該n型矽半導體層,如此可以有效避免汙染的發生;但,用低功率的氫氣電漿或氧氣電漿吹掃清潔會造成介面缺陷的產生,對改善摻雜汙染造成的缺陷密度的成效有限,且,根據學術界、業界的研究,此種技術中施作的重點在於低功率(13.56 兆赫)的氫氣電漿或氧氣電漿吹掃,電漿功率愈低,越能避免擴大對該第一本質型半導體層和該第二本質型半導體層表面造成轟擊效應,但同時功率愈低,則鍍率太慢不符合製程效率要求。At present, one of the solutions proposed by the academic community and the industry is disclosed in, for example, the patent application No. 101137752, before the formation of the p-type germanium semiconductor layer and the n-type germanium semiconductor layer, the low-power hydrogen plasma or After the oxygen plasma purges the first intrinsic semiconductor layer and the surface of the second intrinsic semiconductor layer, the p-type germanium semiconductor layer and the n-type germanium semiconductor layer are formed by plating, so that the occurrence of contamination can be effectively avoided; Low-power hydrogen plasma or oxygen plasma purge cleaning can cause interface defects, have limited effectiveness in improving the defect density caused by doping pollution, and, according to academic and industry research, are applied in this technology. The focus is on low-power (13.56 MHz) hydrogen plasma or oxygen plasma purge. The lower the plasma power, the more the bombardment effect on the surface of the first intrinsic semiconductor layer and the second intrinsic semiconductor layer can be avoided. However, the lower the power, the slower the plating rate does not meet the process efficiency requirements.

再例如第101114082號專利申請案揭示以調變氟化物與氫化物組成之混合氣體,於該第一本質型半導體層和該第二本質型半導體層表面上形成多層層體構成的P-I-N微晶矽結構、第099124025號專利申請案揭示於該本質型半導體層中鑲埋形成微晶矽質,以能有效降低內部缺陷、提高整體矽基異質接面太陽電池的輸出效能、乃至整體生產良率。但缺點都是額外增加製程,增加製程控制的難度,也同時拉長生產時間,導至生產成本的提高,而不利於市場競爭。Further, for example, the patent application No. 101114082 discloses a PIN microcrystal formed by forming a multi-layered layer on the surface of the first intrinsic semiconductor layer and the second intrinsic semiconductor layer by a mixed gas of a fluoride and a hydride. The structure and the patent application No. 099124025 disclose that the microcrystalline germanium is embedded in the intrinsic semiconductor layer to effectively reduce internal defects, improve the output efficiency of the overall germanium-based heterojunction solar cell, and even the overall production yield. However, the disadvantages are that the additional process is increased, the difficulty of process control is increased, and the production time is also extended, leading to an increase in production cost, which is not conducive to market competition.

因此,本發明的目的,即在提供一種降低薄膜缺陷密度的異質接面太陽電池的製作方法。Accordingly, it is an object of the present invention to provide a method of fabricating a heterojunction solar cell that reduces film defect density.

於是,本發明異質接面太陽電池的製作方法包含一步驟(A)、一步驟(B)、一步驟(C)、一步驟(D),及步驟(E)。Therefore, the manufacturing method of the heterojunction solar cell of the present invention comprises a step (A), a step (B), a step (C), a step (D), and a step (E).

該步驟(A)於一基板的一第一表面上形成一層第一本質型半導體層,並於該基板的一相反於該第一表面的第二表面上形成一層第二本質型半導體層。The step (A) forms a first intrinsic semiconductor layer on a first surface of a substrate, and forms a second intrinsic semiconductor layer on a second surface of the substrate opposite to the first surface.

該步驟(B)採用頻率高於25兆赫的電漿源於該第一本質型半導體層和該第二本質型半導體層之上分別形成厚度低於5奈米的一第一氧化層及一第二氧化層。The step (B) uses a plasma having a frequency higher than 25 MHz to form a first oxide layer and a first thickness of less than 5 nm on the first intrinsic semiconductor layer and the second intrinsic semiconductor layer, respectively. Dioxide layer.

該步驟(C)於該第一氧化層和該第二氧化層之上分別形成一層p型矽半導體層及一層n型矽半導體層。In the step (C), a p-type germanium semiconductor layer and an n-type germanium semiconductor layer are respectively formed on the first oxide layer and the second oxide layer.

該步驟(D)各別於該p型矽半導體層和該n型矽半導體層上沉積形成一層透明導電層。The step (D) is deposited on the p-type germanium semiconductor layer and the n-type germanium semiconductor layer to form a transparent conductive layer.

該步驟(E)於每一透明導電層上分別形成一個用於導電的電極。In the step (E), an electrode for conducting electricity is formed on each of the transparent conductive layers.

本發明的功效在於:採用頻率高於25兆赫的電漿源以較高的電漿密度,及較低的離子轟擊能量於第一本質型半導體層和第二本質型半導體層上沉積形成厚度低於5奈米的第一氧化層和第二氧化層,以降低後續形成p型矽半導體層和n型矽半導體層時,於第一本質型半導體層和第二本質型半導體層上會出現的摻雜汙染,達到以較為簡易的製程有效提高整體矽基異質接面太陽電池的輸出效能,降低生產成本的提高,而利於市場競爭。The effect of the invention is that a plasma source having a frequency higher than 25 MHz is deposited on the first intrinsic semiconductor layer and the second intrinsic semiconductor layer with a relatively high plasma density and a low ion bombardment energy to form a low thickness. a first oxide layer and a second oxide layer of 5 nm to reduce the subsequent formation of the p-type germanium semiconductor layer and the n-type germanium semiconductor layer, which may occur on the first intrinsic semiconductor layer and the second intrinsic semiconductor layer Doping pollution can effectively improve the output efficiency of the overall sulfhydryl heterojunction solar cell and reduce the production cost by a relatively simple process, which is conducive to market competition.

在本發明被詳細描述之前,應當注意在以下的說明內容中,類似的元件是以相同的編號來表示。Before the present invention is described in detail, it should be noted that in the following description, similar elements are denoted by the same reference numerals.

參閱圖2,本發明異質接面太陽電池的製作方法的一實施例,依序實施一步驟(A)、一步驟(B)、一步驟(C)、一步驟(D)及一步驟(E),用於製作如圖3所示的異質接面太陽電池,以改善現有的異質接面太陽電池的製作技術中,無法兼顧生產成本以及整體矽基異質接面太陽電池的輸出效能的問題。Referring to FIG. 2, an embodiment of a method for fabricating a heterojunction solar cell of the present invention sequentially performs a step (A), a step (B), a step (C), a step (D), and a step (E). In order to improve the production technology of the existing heterojunction solar cell, the problem of the production cost and the output performance of the overall sulfhydryl heterojunction solar cell cannot be achieved in the production of the heterojunction solar cell as shown in FIG.

如圖3所示,本發明異質接面太陽電池的製作方法的該實施例製作出的異質接面太陽電池,是與現有的矽基異質接面太陽電池相似,包含一塊具有相反的一第一表面21和一第二表面22的基板2、一層形成在該第一表面21上的第一本質型半導體層3(i-a-Si:H)、一層形成在該第一本質型半導體層3上的第一氧化層9、一層形成在該第一氧化層9上的p型矽半導體層5(p-a-Si:H)、一層形成在該第二表面22上的第二本質型半導體層4(i-a-Si:H)、一層形成在該第二本質型半導體層4上的第二氧化層10、一層形成在該第二氧化層10上的n型矽半導體層6(n-a-Si:H)、二層各別地形成在該p型矽半導體層5和該n型矽半導體層6上的透明導電層7,及二層各別地形成在該二層透明導電層7上的電極8,該第一本質型半導體層3、第一氧化層9和p型矽半導體層5,以及該第二本質型半導體層4、第二氧化層10和n型矽半導體層6形成二層照光時以光電效應產生電子的光電轉換結構,從而在受光時,光於二層光電轉換結構行光電轉換產生電子流,再經該二層透明導電層7和該二個電極8向外輸出。特別地,該第一氧化層9和該第二氧化層10的厚度極薄(不大於5nm),所以並不影響光行進、以及電子、載子穿隧而影響光電轉換,且可以避免在形成該p型矽半導體層5和該n型矽半導體層6的製程中,因摻雜而造成該第一本質型半導體層3和該第二本質型半導體層4的污染,以致缺陷密度增加、整體矽基異質接面太陽電池的輸出效能降低的問題,此部分容後於該實施例的說明中再行詳述。As shown in FIG. 3, the heterojunction solar cell produced by the embodiment of the method for fabricating a heterojunction solar cell of the present invention is similar to the existing germanium-based heterojunction solar cell, and includes a first one having an opposite first. a substrate 2 of the surface 21 and a second surface 22, a first intrinsic semiconductor layer 3 (ia-Si:H) formed on the first surface 21, and a layer formed on the first intrinsic semiconductor layer 3 a first oxide layer 9, a p-type germanium semiconductor layer 5 (pa-Si: H) formed on the first oxide layer 9, and a second intrinsic semiconductor layer 4 formed on the second surface 22 (ia) -Si:H), a second oxide layer 10 formed on the second intrinsic semiconductor layer 4, and an n-type germanium semiconductor layer 6 (na-Si:H) formed on the second oxide layer 10, Two layers of transparent conductive layers 7 respectively formed on the p-type germanium semiconductor layer 5 and the n-type germanium semiconductor layer 6, and two electrodes 8 respectively formed on the two transparent conductive layers 7, which a first intrinsic type semiconductor layer 3, a first oxide layer 9 and a p-type germanium semiconductor layer 5, and the second intrinsic type semiconductor layer 4, the second oxide layer 10 and n The 矽-type semiconductor layer 6 forms a photoelectric conversion structure that generates electrons by photoelectric effect when two layers of light are irradiated, so that when light is received, light is photoelectrically converted into a two-layer photoelectric conversion structure to generate a flow of electrons, and then through the two transparent conductive layers 7 and The two electrodes 8 are output to the outside. In particular, the thickness of the first oxide layer 9 and the second oxide layer 10 is extremely thin (not more than 5 nm), so that the light travel, and electrons and carrier tunneling are affected to affect photoelectric conversion, and formation can be avoided. In the process of the p-type germanium semiconductor layer 5 and the n-type germanium semiconductor layer 6, contamination of the first intrinsic semiconductor layer 3 and the second intrinsic semiconductor layer 4 is caused by doping, so that the defect density increases and the whole The problem of reduced output efficiency of the ruthenium-based heterojunction solar cell is described in detail in the description of this embodiment.

參閱圖2、圖3,本發明異質接面太陽電池製作方法的該實施例,是將該基板2載入一真空鍍膜腔的一鍍膜室(圖未示出)中,繼而實施該步驟(A),於該基板2的該第一表面21、該第二表面22分別形成該第一本質型半導體層3和該第二本質型半導體層4。更詳細的說,該步驟(A)以電漿增強化學氣相沉積(Plasma-Enhanced CVD, PECVD)形成該第一本質型半導體層3,之後,移動完成該第一本質型半導體層3的該基板2至真空鍍膜腔的一翻轉室,翻轉完成該第一本質型半導體層3的該基板2後再移入該鍍膜室中,以電漿增強化學氣相沉積於該第二表面22形成該第二本質型半導體層4。Referring to FIG. 2 and FIG. 3, this embodiment of the method for fabricating a heterojunction solar cell of the present invention is to load the substrate 2 into a coating chamber (not shown) of a vacuum coating chamber, and then perform the step (A). The first intrinsic semiconductor layer 3 and the second intrinsic semiconductor layer 4 are formed on the first surface 21 and the second surface 22 of the substrate 2, respectively. In more detail, the step (A) forms the first intrinsic type semiconductor layer 3 by plasma enhanced chemical vapor deposition (PECVD), and thereafter, the movement of the first intrinsic type semiconductor layer 3 is completed. The substrate 2 is turned into an inversion chamber of the vacuum coating chamber, and the substrate 2 of the first intrinsic semiconductor layer 3 is inverted and then transferred into the coating chamber to form a plasma enhanced chemical vapor deposition on the second surface 22 Two intrinsic semiconductor layers 4.

該步驟(B)採用頻率高於25兆赫(MHz)的電漿源於該第一本質型半導體層3和第二本質型半導體層4之上分別形成厚度低於5奈米的該第一氧化層9及該第二氧化層10,特別地,該步驟(B)是類似於該步驟(A),於真空鍍膜腔的翻轉室、鍍膜室中順續翻轉整塊半成品進行。The step (B) uses a plasma having a frequency higher than 25 megahertz (MHz) to form the first oxide having a thickness of less than 5 nm on the first intrinsic semiconductor layer 3 and the second intrinsic semiconductor layer 4, respectively. The layer 9 and the second oxide layer 10, in particular, the step (B) is similar to the step (A), in which the entire semi-finished product is continuously flipped in the inversion chamber and the coating chamber of the vacuum coating chamber.

更詳細地說,該步驟(B)是先將該真空鍍膜腔的鍍膜室的真空度維持於低於10 -6托,較佳地是低於700毫托至900毫托,通入氫氣和矽甲烷的混和氣體(H 2/SiH 4),氫氣(H 2):矽甲烷(SiH 4)的氣體流量比介於2至25之間,較佳地是15至20之間,並維持該基板2的溫度介於150度至250度之間,較佳的是介於170度至200度之間,並控制電漿源的功率密度介於每平方公分10毫瓦至100毫瓦之間、頻率介於27.12兆赫至40.68兆赫的電漿源,較佳的是功率密度介於每平方公分30毫瓦至80毫瓦之間、頻率為40.68兆赫,沉積形成該第一氧化層9和該第二氧化層10。 In more detail, the step (B) is to first maintain the vacuum of the coating chamber of the vacuum coating chamber below 10 -6 Torr, preferably below 700 mTorr to 900 mTorr, and to introduce hydrogen gas and a mixed gas of methane (H 2 /SiH 4 ), a gas flow ratio of hydrogen (H 2 ): methane (SiH 4 ) of between 2 and 25, preferably between 15 and 20, and maintaining the The temperature of the substrate 2 is between 150 degrees and 250 degrees, preferably between 170 degrees and 200 degrees, and the power density of the plasma source is controlled between 10 milliwatts and 100 milliwatts per square centimeter. a plasma source having a frequency between 27.12 MHz and 40.68 MHz, preferably having a power density of between 30 milliwatts and 80 milliwatts per square centimeter and a frequency of 40.68 MHz, deposited to form the first oxide layer 9 and The second oxide layer 10.

特別地,該步驟(B)以27.12兆赫至40.68兆赫的高震盪頻率產生較高密度、較低的離子轟擊能量的電漿,可以快速地於該第一本質型半導體層3和該第二本質型半導體層4上沉積形成厚度不大於5nm的該第一氧化層9和該第二氧化層10,從而降低鍍膜過程中對該第一本質型半導體層3和該第二本質型半導體層4離子轟擊效應的影響。In particular, the step (B) produces a plasma of higher density and lower ion bombardment energy at a high oscillation frequency of 27.12 MHz to 40.68 MHz, which can be quickly applied to the first intrinsic semiconductor layer 3 and the second essence. Depositing the first oxide layer 9 and the second oxide layer 10 having a thickness of not more than 5 nm on the semiconductor layer 4, thereby reducing ions of the first intrinsic semiconductor layer 3 and the second intrinsic semiconductor layer 4 during coating The impact of the bombardment effect.

該步驟(C)於該第一氧化層9和該第二氧化層10之上分別形成該p型矽半導體層5及該n型矽半導體層6;類似於前述該步驟(A)和步驟(B),於真空鍍膜腔的翻轉室、鍍膜室中順續翻轉整塊半成品進行。詳細地說,當於鍍膜室形成該p型矽半導體層5時,該第一氧化層9可以適度阻障摻雜物進入該第一本質型半導體層3中,進而降低膜體的缺陷密度,且因該第一氧化層9帶有負電荷,因此可減少表面載子的複合機率與介面處缺陷,進而提高膜體品質、有效提升光電轉換效能;沉積完該p型矽半導體層5後,則移動半成品至翻轉室中將半成品翻轉,同時,進行水氣通入清潔鍍膜室;之後將翻轉後的半成品移入鍍膜室,進行類似的過程形成該n型矽半導體層6。The step (C) forms the p-type germanium semiconductor layer 5 and the n-type germanium semiconductor layer 6 on the first oxide layer 9 and the second oxide layer 10, respectively; similar to the step (A) and the step ( B), successively flipping the whole semi-finished product in the inversion chamber and the coating chamber of the vacuum coating chamber. In detail, when the p-type germanium semiconductor layer 5 is formed in the plating chamber, the first oxide layer 9 can appropriately block the dopant into the first intrinsic semiconductor layer 3, thereby reducing the defect density of the film body. Moreover, since the first oxide layer 9 has a negative charge, the composite probability of the surface carrier and the defects at the interface can be reduced, thereby improving the quality of the film body and effectively improving the photoelectric conversion efficiency; after depositing the p-type germanium semiconductor layer 5, Then, the semi-finished product is moved into the inversion chamber to invert the semi-finished product, and at the same time, water vapor is introduced into the cleaning coating chamber; then the inverted semi-finished product is transferred into the coating chamber, and a similar process is performed to form the n-type germanium semiconductor layer 6.

該步驟(D)各別於該p型矽半導體層5和該n型矽半導體層6上沉積形成一層透明導電層7,其中,該等透明導電層7的材料選自ZnO、Al:ZnO、B:ZnO、Ga:ZnO、In:ZnO,及此等所成的群組所組成。The step (D) is deposited on the p-type germanium semiconductor layer 5 and the n-type germanium semiconductor layer 6 to form a transparent conductive layer 7, wherein the material of the transparent conductive layer 7 is selected from the group consisting of ZnO, Al: ZnO, B: ZnO, Ga: ZnO, In: ZnO, and the group formed by these.

該步驟(E)於每一透明導電層7上分別形成至少一個用於導電的電極8。In this step (E), at least one electrode 8 for conducting electricity is formed on each of the transparent conductive layers 7, respectively.

與現有的矽基異質接面太陽電池和相關的製程技術相較,本發明矽基異質接面太陽電池的製作方法主要以高震盪頻率的電漿源快速地沉積形成該第一氧化層9和該第二氧化層10,以致能減少表面載子的複合機率和降低膜體的缺陷密度,顯然,本發明之製程技術能以不增加時間成本及製程難度的情況下,達到提高膜體品質之成效。Compared with the existing ruthenium-based heterojunction solar cells and related process technologies, the method for fabricating the ruthenium-based heterojunction solar cell of the present invention is mainly to rapidly deposit the first oxide layer 9 with a plasma source of high oscillation frequency. The second oxide layer 10 is such that the composite probability of the surface carrier can be reduced and the defect density of the film body can be reduced. Obviously, the process technology of the present invention can improve the quality of the film body without increasing the time cost and the difficulty of the process. Results.

參閱下表,為清楚說明本發明異質接面太陽能電池之製作方法的成效,以下更深入地將本發明以不同的製程參數進行實驗並與現有的製程技術相較來加以驗證。 <TABLE border="1" borderColor="#000000" width="85%"><TBODY><tr><td> </td><td> 震盪頻率(MHz) </td><td> 功率密度(mW/cm<sup>2</sup>) </td><td> 基板溫度(度) </td><td> 真空度(mtorr) </td><td> 缺陷密度(eV<sup>-1</sup>cm<sup>-2</sup>) </td></tr><tr><td> 現有的製程 </td><td> 13.56 </td><td> </td><td> </td><td> </td><td> 1.4×10<sup>13</sup></td></tr><tr><td> 本發明 </td><td> 40.68 </td><td> 60 </td><td> 150 </td><td> 800 </td><td> 2.9×10<sup>11</sup></td></tr><tr><td> 60 </td><td> 250 </td><td> 800 </td><td> 3.1×10<sup>12</sup></td></tr><tr><td> 30 </td><td> 250 </td><td> 400 </td><td> 1.3×10<sup>12</sup></td></tr><tr><td> 40 </td><td> 250 </td><td> 400 </td><td> 4.8×10<sup>11</sup></td></tr><tr><td> 50 </td><td> 250 </td><td> 400 </td><td> 6.0×10<sup>12</sup></td></tr><tr><td> 60 </td><td> 250 </td><td> 400 </td><td> 8.5×10<sup>11</sup></td></tr></TBODY></TABLE>Referring to the table below, in order to clearly illustrate the effectiveness of the method of fabricating the heterojunction solar cell of the present invention, the present invention will be further experimentally tested with different process parameters and verified against existing process techniques.         <TABLE border="1" borderColor="#000000" width="85%"><TBODY><tr><td> </td><td> Oscillation frequency (MHz) </td><td> Power density (mW/cm<sup>2</sup>) </td><td> substrate temperature (degrees) </td><td> vacuum degree (mtorr) </td><td> defect density (eV<sup >-1</sup>cm<sup>-2</sup>) </td></tr><tr><td> Existing Processes</td><td> 13.56 </td><td> </td><td> </td><td> </td><td> 1.4×10<sup>13</sup></td></tr><tr><td> the present invention </ Td><td> 40.68 </td><td> 60 </td><td> 150 </td><td> 800 </td><td> 2.9×10<sup>11</sup></ Td></tr><tr><td> 60 </td><td> 250 </td><td> 800 </td><td> 3.1×10<sup>12</sup></td ></tr><tr><td> 30 </td><td> 250 </td><td> 400 </td><td> 1.3×10<sup>12</sup></td> </tr><tr><td> 40 </td><td> 250 </td><td> 400 </td><td> 4.8×10<sup>11</sup></td>< /tr><tr><td> 50 </td><td> 250 </td><td> 400 </td><td> 6.0×10<sup>12</sup></td></ Tr><tr><td> 60 </td><td> 250 </td><td> 400 </td><td> 8.5×10<sup>11</sup></td></tr ></TBODY></TABLE>

由上述之實驗結果可以證明,本發明以不同的功率密度、基板2溫度,和真空度進行實驗所呈現出來的缺陷密度很明顯地都遠低於現有製程的缺陷密度至少一個數量級,因此證實本發明以頻率為40.68兆赫的電漿源分別沉積該第一氧化層9和該第二氧化層10於該第一本質型半導體層3和該第二本質型半導體層4之上的薄膜製程方式,其薄膜的缺陷密度確實較現有的製程以頻率13.56兆赫的電漿源沉積出來的薄膜來的低且可以避免在形成該p型矽半導體層5和該n型矽半導體層6的製程中,進而改善後續製作出的矽基異質接面太陽電池不因本質型半導體層的被污染,而導致缺陷密度增加、輸出效能降低的問題。It can be proved from the above experimental results that the defect density exhibited by the present invention with different power density, substrate 2 temperature, and vacuum degree is obviously far lower than the defect density of the existing process by at least one order of magnitude, thus confirming the present Invented a thin film process for depositing the first oxide layer 9 and the second oxide layer 10 on the first intrinsic semiconductor layer 3 and the second intrinsic semiconductor layer 4 by a plasma source having a frequency of 40.68 MHz, The defect density of the film is indeed lower than that of the conventional film deposited by the plasma source having a frequency of 13.56 MHz and can be avoided in the process of forming the p-type germanium semiconductor layer 5 and the n-type germanium semiconductor layer 6, and further The problem that the subsequently produced ruthenium-based heterojunction solar cell is not contaminated by the intrinsic semiconductor layer causes an increase in defect density and a decrease in output efficiency.

綜上所述,本發明異質接面太陽電池的製作方法藉由高頻率(頻率為40.68兆赫)的電漿源分別沉積該第一氧化層9和該第二氧化層10於該第一本質型半導體層3和該第二本質型半導體層4上,以減少該第一本質型半導體層3和該第二本質型半導體層4的被污染,以致產生缺陷而減少表面載子的複合機率的問題,對製作異質接面太陽電池而言,能形成良好的異質接面,藉此增加光生載子壽命,進而提升薄膜鈍化效果與優化光電轉化效能,同時,以高頻率(頻率為40.68兆赫)的電漿源分別作用於該第一本質型半導體層3和該第二本質型半導體層4形成該第一氧化層9和該第二氧化層10,相較於現有的異質接面太陽電池的製作(例如第101114082號專利申請案)而言,更行簡化製程的複雜度,並同時提昇產品的良率,故確實能達成本發明的目的。In summary, the method for fabricating a heterojunction solar cell of the present invention deposits the first oxide layer 9 and the second oxide layer 10 on the first essential type by a high frequency (frequency of 40.68 MHz) plasma source. On the semiconductor layer 3 and the second intrinsic semiconductor layer 4, the problem of contamination of the first intrinsic semiconductor layer 3 and the second intrinsic semiconductor layer 4 is reduced, so that defects are generated to reduce the composite probability of surface carriers. For the production of heterojunction solar cells, a good heterojunction can be formed, thereby increasing the lifetime of the photo-generated carriers, thereby improving the film passivation effect and optimizing the photoelectric conversion performance, and at the same time, at a high frequency (frequency of 40.68 MHz). The plasma source acts on the first intrinsic semiconductor layer 3 and the second intrinsic semiconductor layer 4 to form the first oxide layer 9 and the second oxide layer 10, respectively, compared to the existing heterojunction solar cells. (For example, in the patent application No. 101114082), the complexity of the process is further simplified, and at the same time, the yield of the product is improved, so that the object of the present invention can be achieved.

惟以上所述者,僅為本發明的實施例而已,當不能以此限定本發明實施的範圍,凡是依本發明申請專利範圍及專利說明書內容所作的簡單的等效變化與修飾,皆仍屬本發明專利涵蓋的範圍內。However, the above is only the embodiment of the present invention, and the scope of the invention is not limited thereto, and all the simple equivalent changes and modifications according to the scope of the patent application and the patent specification of the present invention are still Within the scope of the invention patent.

1‧‧‧基板1‧‧‧Substrate

3‧‧‧第一本質型半導體層3‧‧‧First essential semiconductor layer

11‧‧‧第一本質型半導體層11‧‧‧First Intrinsic Semiconductor Layer

4‧‧‧第二本質型半導體層4‧‧‧Second essential semiconductor layer

12‧‧‧p型矽半導體層12‧‧‧p-type germanium semiconductor layer

5‧‧‧p型矽半導體層5‧‧‧p-type germanium semiconductor layer

13‧‧‧第二本質型半導體層13‧‧‧Second essential semiconductor layer

6‧‧‧n型矽半導體層6‧‧‧n-type germanium semiconductor layer

14‧‧‧n型矽半導體層14‧‧‧n-type germanium semiconductor layer

7‧‧‧透明導電層7‧‧‧Transparent conductive layer

15‧‧‧透明導電層15‧‧‧Transparent conductive layer

8‧‧‧電極8‧‧‧Electrode

16‧‧‧電極16‧‧‧Electrode

9‧‧‧第一氧化層9‧‧‧First oxide layer

2‧‧‧基板2‧‧‧Substrate

10‧‧‧第二氧化層10‧‧‧Second oxide layer

21‧‧‧第一表面21‧‧‧ first surface

A~E‧‧‧步驟A~E‧‧‧Steps

22‧‧‧第二表面22‧‧‧ second surface

本發明的其他的特徵及功效,將於參照圖式的實施方式中清楚地呈現,其中:  圖1是一示意圖,說明現有的矽基異質接面太陽電池; 圖2是一流程圖,說明本發明異質接面太陽電池的製作方法的一實施例;及 圖3是一示意圖,說明本發明異質接面太陽電池的製作方法的異質接面太陽電池。Other features and effects of the present invention will be apparent from the following description of the drawings, wherein: FIG. 1 is a schematic diagram illustrating a conventional bismuth-based heterojunction solar cell; FIG. 2 is a flow chart illustrating the present invention An embodiment of a method of fabricating a heterojunction solar cell; and FIG. 3 is a schematic view of a heterojunction solar cell of the method of fabricating a heterojunction solar cell of the present invention.

A~E‧‧‧步驟 A~E‧‧‧Steps

Claims (10)

一種異質接面太陽電池的製作方法,包含:(A)於一基板的一第一表面上形成一層第一本質型半導體層,並於該基板的一相反於該第一表面的第二表面上形成一層第二本質型半導體層;(B)採用頻率介於27.12兆赫至40.68兆赫的電漿源於該第一本質型半導體層和該第二本質型半導體層之上分別形成厚度低於5奈米的一第一氧化層及一第二氧化層;(C)於該第一氧化層和該第二氧化層之上分別形成一層p型矽半導體層及一層n型矽半導體層;(D)各別於該p型矽半導體層和該n型矽半導體層上沉積形成一層透明導電層;及(E)於每一透明導電層上分別形成一個用於導電的電極。 A method for fabricating a heterojunction solar cell, comprising: (A) forming a first intrinsic semiconductor layer on a first surface of a substrate, and on a second surface of the substrate opposite to the first surface Forming a second intrinsic semiconductor layer; (B) using a plasma having a frequency between 27.12 MHz and 40.68 MHz to form a thickness of less than 5 nm on the first intrinsic semiconductor layer and the second intrinsic semiconductor layer, respectively a first oxide layer and a second oxide layer of the rice; (C) forming a p-type germanium semiconductor layer and an n-type germanium semiconductor layer respectively on the first oxide layer and the second oxide layer; (D) Forming a transparent conductive layer on the p-type germanium semiconductor layer and the n-type germanium semiconductor layer; and (E) forming an electrode for conducting electricity on each of the transparent conductive layers. 如請求項1所述的異質接面太陽電池的製作方法,其中,該步驟(B)是在一真空度維持在低於10-6托的真空鍍膜腔中形成該第一氧化層和該第二氧化層。 The method for fabricating a heterojunction solar cell according to claim 1, wherein the step (B) is to form the first oxide layer and the first layer in a vacuum coating chamber maintained at a vacuum of less than 10 -6 Torr. Dioxide layer. 如請求項2所述的異質接面太陽電池的製作方法,其中,該步驟(B)中,該真空鍍膜腔之真空度維持於700毫托至900毫托之間。 The method for fabricating a heterojunction solar cell according to claim 2, wherein in the step (B), the vacuum degree of the vacuum coating chamber is maintained between 700 mTorr and 900 mTorr. 如請求項2所述的異質接面太陽電池的製作方法,其中,該步驟(B)中,該真空鍍膜腔還通入氫氣和矽甲烷的混和氣體,且氫氣和矽甲烷的氣體流量比介於2至25之間。 The method for fabricating a heterojunction solar cell according to claim 2, wherein in the step (B), the vacuum coating chamber is further provided with a mixed gas of hydrogen and helium methane, and a gas flow ratio of hydrogen and helium methane is introduced. Between 2 and 25. 如請求項4所述的異質接面太陽電池的製作方法,其中,該步驟(B)中,還通入氣體流量比介於15至20之間的H2/SiH4於該真空鍍膜腔中。 The method for fabricating a heterojunction solar cell according to claim 4, wherein in the step (B), H 2 /SiH 4 having a gas flow ratio between 15 and 20 is also introduced into the vacuum coating chamber. . 如請求項1所述的異質接面太陽電池的製作方法,其中,該步驟(B)中,維持該基板的溫度介於150度至250度之間。 The method for fabricating a heterojunction solar cell according to claim 1, wherein in the step (B), the temperature of the substrate is maintained between 150 degrees and 250 degrees. 如請求項1所述的異質接面太陽電池的製作方法,其中,該步驟(B)中,控制電漿源的功率密度介於每平方公分10毫瓦至100毫瓦之間。 The method for fabricating a heterojunction solar cell according to claim 1, wherein in the step (B), the power density of the plasma source is controlled to be between 10 milliwatts and 100 milliwatts per square centimeter. 如請求項1所述的異質接面太陽電池的製作方法,其中,該步驟(B)中,控制電漿源的功率密度介於每平方公分30毫瓦至80毫瓦之間。 The method for fabricating a heterojunction solar cell according to claim 1, wherein in the step (B), the power density of the plasma source is controlled to be between 30 milliwatts and 80 milliwatts per square centimeter. 如請求項1所述的異質接面太陽電池的製作方法,其中,該步驟(B)中,控制電漿源的頻率為40.68兆赫。 The method for fabricating a heterojunction solar cell according to claim 1, wherein in the step (B), the frequency of the plasma source is controlled to be 40.68 MHz. 如請求項1所述的異質接面太陽電池的製作方法,其中,該步驟(D)中,選自ZnO、Al:ZnO、B:ZnO、Ga:ZnO、In:ZnO,及此等所成的群組為材料沉積形成該等透明導電層。 The method for fabricating a heterojunction solar cell according to claim 1, wherein the step (D) is selected from the group consisting of ZnO, Al: ZnO, B: ZnO, Ga: ZnO, In: ZnO, and the like. The group is formed by material deposition to form the transparent conductive layers.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI733229B (en) * 2019-10-25 2021-07-11 財團法人金屬工業研究發展中心 Method of forming a semiconductor structure and semiconductor structure

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103137767A (en) * 2011-11-29 2013-06-05 财团法人工业技术研究院 Full back electrode heterojunction solar cell
TWM517422U (en) * 2015-09-08 2016-02-11 元晶太陽能科技股份有限公司 Heterojunction solar cell with local passivation
TWM527159U (en) * 2016-04-15 2016-08-11 元晶太陽能科技股份有限公司 Heterojunction solar cell

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103137767A (en) * 2011-11-29 2013-06-05 财团法人工业技术研究院 Full back electrode heterojunction solar cell
TWM517422U (en) * 2015-09-08 2016-02-11 元晶太陽能科技股份有限公司 Heterojunction solar cell with local passivation
TWM527159U (en) * 2016-04-15 2016-08-11 元晶太陽能科技股份有限公司 Heterojunction solar cell

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI733229B (en) * 2019-10-25 2021-07-11 財團法人金屬工業研究發展中心 Method of forming a semiconductor structure and semiconductor structure

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