TWI608779B - Multilayer circuit board with high density interconnects and method of manufacturing the same - Google Patents

Multilayer circuit board with high density interconnects and method of manufacturing the same Download PDF

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TWI608779B
TWI608779B TW105112258A TW105112258A TWI608779B TW I608779 B TWI608779 B TW I608779B TW 105112258 A TW105112258 A TW 105112258A TW 105112258 A TW105112258 A TW 105112258A TW I608779 B TWI608779 B TW I608779B
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multilayer circuit
conductive
circuit substrate
circuit board
conductive bumps
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TW105112258A
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TW201739330A (en
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蘇永泰
吳克興
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中華精測科技股份有限公司
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高密度互連多層電路板及其製造方法 High-density interconnect multilayer circuit board and manufacturing method thereof

本發明涉及一種多層板及其貼合方法,特別是涉及一種高密度互連多層電路板及其製造方法。 The present invention relates to a multilayer board and a bonding method thereof, and more particularly to a high-density interconnection multilayer circuit board and a method of fabricating the same.

印刷電路板是許多電子產品中不可或缺的元件之一,其功能在於提供不同電子元件之間的電子訊號傳輸;隨著印刷電路板(printed circuit board,PCB)及電子元件製作技術的進步,印刷電路板及電子元件的設計亦隨之朝向小尺寸的方向,以符合現行電子產品微型化的需求。然而,在印刷電路板的體積或厚度減少的同時,伴隨而來的缺點是印刷電路板上可用的佈線面積亦相對減少,遂有多層印刷電路板的佈局設計相應被提出,以在不增加印刷電路板尺寸的前提下,增加可佈線的面積。 Printed circuit board is one of the indispensable components in many electronic products. Its function is to provide electronic signal transmission between different electronic components. With the advancement of printed circuit board (PCB) and electronic component manufacturing technology, Printed circuit boards and electronic components are also designed to be oriented in a small size to meet the current miniaturization of electronic products. However, while the volume or thickness of the printed circuit board is reduced, the attendant disadvantage is that the wiring area available on the printed circuit board is relatively reduced, and the layout design of the multilayer printed circuit board is correspondingly proposed so as not to increase the printing. Increase the area of the wiring under the premise of the board size.

一般來說,印刷電路板的垂直互連結構一般的作法多採用高密度互連(high density interconnection,HDI)方式製作,亦即採逐一增層的方式,並藉由雷射開盲孔、填孔電鍍及壓合等製程來完成垂直互連,目的在於以相同或更小的體積或厚度形成更為密集的線路連接。除此之外,亦有一個較為特殊做法,以我國第200929495號專利案為例,其公開一種產生高互連密度多層電路之方法,此方法主要是先在黏合薄片上形成通孔,再於通孔內填充導電膏,然後再藉由黏合薄片分別將上層與下層承載高密度電路的聚合物介電材料分別貼附於多層電路核心的上下兩側。然而,此方法容 易因導電材塞得比較淺而產生空洞缺陷,或是因樹脂擠壓導電材塞而造成上下互連失敗。 In general, the vertical interconnection structure of a printed circuit board is generally manufactured by a high density interconnection (HDI) method, that is, a layer is added one by one, and a blind hole is filled by a laser. Hole plating and lamination processes are used to complete the vertical interconnections in order to form denser line connections with the same or smaller volume or thickness. In addition, there is a more special practice. Taking China Patent No. 200929495 as an example, it discloses a method for producing a high-interconnect density multilayer circuit, which mainly forms a through hole on the adhesive sheet, and then The via hole is filled with a conductive paste, and then the upper and lower layers of the polymer dielectric material carrying the high-density circuit are respectively attached to the upper and lower sides of the multilayer circuit core by the adhesive sheet. However, this method capacity It is easy to cause void defects due to the shallow plug of the conductive material, or the upper and lower interconnect failures due to the resin pressing the conductive plug.

針對現有技術的不足之處,本發明之主要目的在於提供一種能有效防止上層與下層電路板間發生連接失敗的高密度互連多層電路板之製造方法,以及利用此方法製成的高密度互連多層電路板。 In view of the deficiencies of the prior art, the main object of the present invention is to provide a method for manufacturing a high-density interconnected multilayer circuit board capable of effectively preventing connection failure between an upper layer and a lower layer circuit board, and a high-density mutual interface manufactured by the method. Connect multiple layers of boards.

本發明一較佳實施例提供一種高密度互連多層電路板之製造方法,其包括以下步驟:提供預先製成的第一多層電路基板及第二多層電路基板,其中所述第一多層電路基板具有第一接合面,且所述第一接合面上設有第一接觸墊陣列;在所述第一接觸墊陣列中之每一第一接觸墊上形成一導電凸塊,並在所述第一接合面上形成一膠合層,其中多個所述導電凸塊從所述膠合層外露;在每一所述導電凸塊與所述膠合層的間隙填入一導電複合材料;以及將所述第二多層電路基板透過所述膠合層與所述第一多層電路基板壓合在一起,其中所述第二多層電路基板藉由多個所述導電凸塊與多個所述導電複合材料與所述第一多層電路基板電性連接。 A preferred embodiment of the present invention provides a method of fabricating a high-density interconnected multilayer circuit board, comprising the steps of: providing a pre-formed first multi-layer circuit substrate and a second multi-layer circuit substrate, wherein the first plurality The layer circuit substrate has a first bonding surface, and the first bonding surface is provided with a first contact pad array; a conductive bump is formed on each of the first contact pads in the first contact pad array, and Forming a glue layer on the first joint surface, wherein a plurality of the conductive bumps are exposed from the glue layer; a conductive composite material is filled in a gap between each of the conductive bumps and the glue layer; The second multilayer circuit substrate is pressed together with the first multilayer circuit substrate through the glue layer, wherein the second multilayer circuit substrate is covered by the plurality of the conductive bumps and the plurality of The conductive composite material is electrically connected to the first multilayer circuit substrate.

本發明另一較佳實施例提供一種高密度互連多層電路板,其包括第一多層電路基板、一膠合層、多個導電複合材料及第二多層電路基板。所述第一多層電路基板具有第一接合面,所述第一接合面上設有第一接觸墊陣列,且所述第一接觸墊陣列中之每一第一接觸墊上設有一導電凸塊;所述膠合層設置於所述第一接合面上且圍繞多個所述導電凸塊,其中多個所述導電凸塊從所述膠合層外露;多個所述導電複合材料分別填充於每一所述導電凸塊與所述膠合層的間隙;以及所述第二多層電路基板設置於所述膠合層上,且所述第二多層電路基板藉由多個所述導電凸塊及多個 所述導電複合材料與所述第一多層電路基板電性連接。 Another preferred embodiment of the present invention provides a high density interconnect multilayer circuit board including a first multilayer circuit substrate, a glue layer, a plurality of conductive composite materials, and a second multilayer circuit substrate. The first multilayer circuit substrate has a first bonding surface, the first bonding surface is provided with a first contact pad array, and each of the first contact pad arrays is provided with a conductive bump a plurality of the conductive bumps are exposed from the glue layer a gap between the conductive bump and the glue layer; and the second multilayer circuit substrate is disposed on the glue layer, and the second multilayer circuit substrate is covered by the plurality of conductive bumps and Multiple The conductive composite material is electrically connected to the first multilayer circuit substrate.

本發明至少具有以下技術效果:本發明透過“先在第一多層電路基板上形成包括多個導電凸塊的一凸塊陣列,再形成膠合層將其圍繞,然後在每一導電凸塊與膠合層的間隙填入一導電複合材料以將間隙塞滿,最後再透過膠合層結合第一和第二多層電路基板”的流程設計,能避免在上層與下層電路基板的接觸墊之間形成空洞缺陷。 The present invention has at least the following technical effects: the present invention firstly forms a bump array including a plurality of conductive bumps on a first multilayer circuit substrate, and then forms a glue layer to surround it, and then in each conductive bump The gap of the glue layer is filled with a conductive composite material to fill the gap, and finally the flow design of the first and second multilayer circuit substrates is bonded through the glue layer, thereby avoiding formation between the contact pads of the upper layer and the lower circuit substrate. Void defect.

再者,由於在上層電路基板的每一個接觸墊與下層電路基板上相對應的接觸墊之間,皆有一個由具有導電複合材料包覆的導電凸塊所構成的傳輸路徑,且每一個具有導電複合材料包覆的導電凸塊與相對應的貫孔內緣之間完全密實,因此可增加信號傳輸的可靠度及品質。 Furthermore, since each of the contact pads of the upper circuit substrate and the corresponding contact pads on the lower circuit substrate have a transmission path formed by conductive bumps coated with a conductive composite material, and each has The conductive bumps coated by the conductive composite are completely dense with the corresponding inner edges of the through holes, thereby increasing the reliability and quality of signal transmission.

為使能更進一步瞭解本發明的特徵及技術內容,請參閱以下有關本發明的詳細說明與附圖,然而所附圖式僅提供參考與說明用,並非用來對本發明加以限制者。 For a better understanding of the features and technical aspects of the present invention, reference should be made to the accompanying drawings.

S100-S106‧‧‧步驟 S100-S106‧‧‧Steps

M‧‧‧高密度互連多層板 M‧‧‧High Density Interconnect Multilayer Board

1‧‧‧第一多層電路基板 1‧‧‧First multilayer circuit board

11‧‧‧第一接合面 11‧‧‧First joint

12‧‧‧第一接觸墊陣列 12‧‧‧First contact pad array

121‧‧‧第一接觸墊 121‧‧‧First contact pad

122‧‧‧外徑 122‧‧‧ outside diameter

13‧‧‧層間絕緣層 13‧‧‧Interlayer insulation

14‧‧‧直通式導電結構 14‧‧‧through-type conductive structure

2‧‧‧第二多層電路基板 2‧‧‧Second multilayer circuit board

21‧‧‧第二接合面 21‧‧‧Second joint

22‧‧‧第二接觸墊陣列 22‧‧‧Second contact pad array

221‧‧‧第二接觸墊 221‧‧‧Second contact pad

23‧‧‧層間絕緣層 23‧‧‧Interlayer insulation

24‧‧‧直通式導電結構 24‧‧‧through-type conductive structure

3‧‧‧導電凸塊 3‧‧‧Electrical bumps

30‧‧‧外徑 30‧‧‧ outside diameter

31‧‧‧頂面 31‧‧‧ top surface

32‧‧‧底面 32‧‧‧ bottom

33‧‧‧環側面 33‧‧‧ ring side

4‧‧‧膠合層 4‧‧‧Glued layer

41‧‧‧開口 41‧‧‧ openings

410‧‧‧口徑 410‧‧‧ caliber

42‧‧‧貫孔 42‧‧‧through holes

5‧‧‧導電複合材料 5‧‧‧ Conductive composite materials

圖1為本發明一較佳實施例之高密度互連多層電路板之製造方法的流程示意圖。 1 is a flow chart showing a method of manufacturing a high-density interconnection multilayer circuit board according to a preferred embodiment of the present invention.

圖2為本發明之高密度互連多層電路板中之第一多層電路基板及第一多層電路基板的結構示意圖。 2 is a schematic structural view of a first multilayer circuit substrate and a first multilayer circuit substrate in a high-density interconnection multilayer circuit board of the present invention.

圖3為本發明之高密度互連多層電路板的局部分解示意圖。 3 is a partially exploded perspective view of the high density interconnect multilayer circuit board of the present invention.

圖4為圖3中A部分的局部放大圖。 Figure 4 is a partial enlarged view of a portion A of Figure 3.

圖5為本發明之高密度互連多層電路板的組合示意圖。 Fig. 5 is a schematic view showing the combination of the high-density interconnection multilayer circuit board of the present invention.

圖6為圖5中B部分的局部放大圖。 Figure 6 is a partial enlarged view of a portion B of Figure 5.

本發明所揭露的技術內容主要是關於一種高密度互連多層電路板的創新貼合方法,以及利用此貼合方法所製成的高密度互連 多層電路板。本發明的特點在於,先分別製作上層電路基板及下層電路基板,再於上層或下層電路基板的接觸墊陣列上對應形成導電凸塊陣列,然後形成一膠合層圍繞導電凸塊陣列,並於每一個導電凸塊與膠合層的間隙填入導電複合材料以將間隙塞滿,最後再藉由膠合層將上層與下層電路基板結合;依此方式,能有效改善因上層與下層電路基板的接觸墊之間形成空洞缺陷,而造成上下互連失敗的問題,且上層與下層電路基板的接觸墊之間能形成導電複合材料完整包覆導電凸塊的高頻信號傳輸架構,以增加信號傳輸的可靠度及品質。 The technical content disclosed by the present invention is mainly related to an innovative bonding method of a high-density interconnected multilayer circuit board, and a high-density interconnection made by using the bonding method. Multi-layer circuit board. The invention is characterized in that the upper circuit substrate and the lower circuit substrate are separately fabricated, and then the conductive bump array is formed on the contact pad array of the upper or lower circuit substrate, and then a glue layer is formed around the conductive bump array, and A conductive bump and a gap of the bonding layer are filled with the conductive composite material to fill the gap, and finally the upper layer and the lower circuit substrate are combined by the bonding layer; in this way, the contact pad of the upper layer and the lower circuit substrate can be effectively improved. A cavity defect is formed, which causes a problem of failure of the upper and lower interconnections, and a high-frequency signal transmission structure in which the conductive composite material completely encapsulates the conductive bump can be formed between the contact pads of the upper layer and the lower circuit substrate to increase the reliability of signal transmission. Degree and quality.

在下文將參看隨附圖式更充分地描述各種例示性實施例,在隨附圖式中展示一些例示性實施例。然而,本發明概念可能以許多不同形式來體現,且不應解釋為限於本文中所闡述之例示性實施例。確切而言,提供此等例示性實施例使得本發明將為詳盡且完整,且將向熟習此項技術者充分傳達本發明概念的範疇。在諸圖式中,可為了清楚而誇示層及區之大小及相對大小。類似數字始終指示類似元件。 Various illustrative embodiments are described more fully hereinafter with reference to the accompanying drawings. However, the inventive concept may be embodied in many different forms and should not be construed as being limited to the illustrative embodiments set forth herein. Rather, these exemplary embodiments are provided so that this invention will be in the In the drawings, the size and relative sizes of layers and regions may be exaggerated for clarity. Similar numbers always indicate similar components.

應理解,雖然本文中可能使用術語第一、第二、第三等來描述各種元件或信號等,但此等元件或信號不應受此等術語限制。此等術語乃用以區分一元件與另一元件,或者一信號與另一信號。另外,如本文中所使用,術語「或」視實際情況可能包括相關聯之列出項目中之任一者或者多者之所有組合。 It will be understood that, although the terms first, second, third, etc. may be used herein to describe various elements or signals and the like, such elements or signals are not limited by the terms. These terms are used to distinguish one element from another, or a signal and another. In addition, as used herein, the term "or" may include all combinations of any one or more of the associated listed items.

請參考圖1,為本發明一較佳實施例之高密度互連多層電路板之製造方法的流程示意圖。請配合參考圖2至圖6,所述高密度互連多層電路板之製造方法是先執行步驟S100:提供預先製成的第一多層電路基板1及第二多層電路基板2。首先要說明的是,受製程能力所限,例如現有鑽針的鑽孔能力不足,業界多採用“分別製成上、下多層板後再進行貼合”的製程技術,以增加印刷電路板的層數。本實施例中,第一多層電路基板1具有第一接合面11,且 第一接合面11上設有第一接觸墊陣列12;第二多層電路基板2具有第二接合面21,且第二接合面21上設有與第一接觸墊陣列12相對應的第二接觸墊陣列22。 Please refer to FIG. 1 , which is a schematic flow chart of a method for manufacturing a high-density interconnection multilayer circuit board according to a preferred embodiment of the present invention. Referring to FIG. 2 to FIG. 6 , the manufacturing method of the high-density interconnection multilayer circuit board first performs step S100 : providing the first multilayer circuit substrate 1 and the second multilayer circuit substrate 2 which are prepared in advance. The first thing to note is that due to the limited processing capability, for example, the drilling ability of the existing burs is insufficient. The industry often adopts the process technology of “making the upper and lower multi-layer boards separately and then laminating” to increase the printed circuit board. The number of layers. In this embodiment, the first multilayer circuit substrate 1 has a first bonding surface 11 and The first bonding surface 11 is provided with a first contact pad array 12; the second multilayer circuit substrate 2 has a second bonding surface 21, and the second bonding surface 21 is provided with a second corresponding to the first contact pad array 12. Contact pad array 22.

實務上,第一接觸墊陣列12與第二接觸墊陣列22的佈排方式可因應細線路化(fine pitch)和更小元件尺寸的趨勢而改變,本發明對此並不加以限制;再者,第一接觸墊陣列12中之第一接觸墊121與第二接觸墊陣列22中之第二接觸墊221的數目、形狀、及尺寸比例亦可根據實際使用需求進行調整,詳細的佈局情形可能更為複雜。 In practice, the arrangement of the first contact pad array 12 and the second contact pad array 22 may be changed according to the trend of fine pitch and smaller component size, which is not limited by the present invention; The number, shape, and size ratio of the first contact pads 121 of the first contact pad array 12 and the second contact pads 221 of the second contact pad array 22 may also be adjusted according to actual use requirements, and the detailed layout may be More complicated.

更進一步來說,第一多層電路基板1(如下層電路基板)主要包括交互堆疊的多個層間絕緣層13與多個布線層(包括內部互連線路,圖未示)及多個直通式導電結構14,熟知該項技術領域者應了解形成層間絕緣層13、直通式導電結構14與布線層的相關製程技術,例如可先利用微影暨蝕刻、機械鑽孔或雷射鑽孔形成貫孔,再於貫孔內形成孔壁金屬層,並於剩餘空間內填充絕緣材料,以形成直通式導電結構14,以及利用金屬沉積、微影暨蝕刻等製程形成布線層等;製程變化與選擇性極多,於此不多加贅述。 Further, the first multilayer circuit substrate 1 (the following layer circuit substrate) mainly includes a plurality of interlayer insulating layers 13 and a plurality of wiring layers (including internal interconnection lines, not shown) and a plurality of through-through layers that are alternately stacked. Conductive structure 14, well-known in the art, should understand the process technology for forming the interlayer insulating layer 13, the straight-through conductive structure 14 and the wiring layer, for example, by using lithography and etching, mechanical drilling or laser drilling Forming a through hole, forming a metal layer of the hole wall in the through hole, filling the remaining space with an insulating material to form a straight-through conductive structure 14, and forming a wiring layer by a process such as metal deposition, lithography, etching, etc.; There are many changes and options, so I won’t go into details here.

相似地,第二多層電路基板2(如上層電路基板)主要包括交互堆疊的多個層間絕緣層23與多個布線層(包括內部互連線路,圖未示)及多個直通式導電結構24,熟知該項技術領域者應了解形成層間絕緣層23、直通式導電結構24與布線層的相關製程技術,於此不多加贅述。須說明的是,雖然在圖2中,第一多層電路基板1與第二多層電路基板2的結構為對稱型式,亦即第一多層電路基板1所包括的層間絕緣層13及布線層的層數,與第二多層電路基板2所包括的層間絕緣層23及布線層的層數相同;但是對於本實施例的其他實施態樣,第一多層電路基板1與第二多層電路基板2的結構亦可為非對稱型式,亦即第一多層電路基板1所包括的層間絕緣層13及布線層的層數,與第二多層電路基板2所包括的層 間絕緣層23及布線層的層數不同。所以說,圖2僅供參考與說明之用,並非用以限制本發明。 Similarly, the second multilayer circuit substrate 2 (the upper layer circuit substrate) mainly includes a plurality of interlayer insulating layers 23 and a plurality of wiring layers (including internal interconnection lines, not shown) and a plurality of straight-through conductive layers which are alternately stacked. Structure 24, those skilled in the art should understand the related process technology for forming the interlayer insulating layer 23, the straight-through conductive structure 24 and the wiring layer, and will not be described here. It should be noted that, in FIG. 2, the structures of the first multilayer circuit substrate 1 and the second multilayer circuit substrate 2 are of a symmetrical type, that is, the interlayer insulating layer 13 and the cloth included in the first multilayer circuit substrate 1. The number of layers of the line layer is the same as the number of layers of the interlayer insulating layer 23 and the wiring layer included in the second multilayer circuit substrate 2; however, for other embodiments of the embodiment, the first multilayer circuit substrate 1 and the first The structure of the two-layer circuit substrate 2 may also be an asymmetrical type, that is, the number of layers of the interlayer insulating layer 13 and the wiring layer included in the first multilayer circuit substrate 1, and the number of layers included in the second multilayer circuit substrate 2. Floor The number of layers of the interlayer insulating layer 23 and the wiring layer is different. Therefore, FIG. 2 is for reference and description only and is not intended to limit the invention.

接著,執行步驟S102:在第一接觸墊陣列12中之每一第一接觸墊121上形成一導電凸塊3,並在第一接合面11上形成一膠合層4,其中多個導電凸塊3分別從膠合層4外露。導電凸塊3能作為第一多層電路基板1對外之電性接點,其材料可為單一金屬或多元合金(如銅或銅合金);膠合層4用以將第一多層電路基板1與第二多層電路基板2相貼合,其材料可為含有玻璃纖維的聚丙烯樹脂組合物。實務上,導電凸塊3可藉由印刷(printing)、濺鍍(sputtered coating)、電鍍(electro plating)、或化學氣相沉積(chemical vapor deposition)與微影暨蝕刻製程成型,膠合層4則可藉由壓合方式成型,然而本發明並不對此加以限制。 Then, a step S102 is performed to form a conductive bump 3 on each of the first contact pads 121 of the first contact pad array 12, and a glue layer 4 is formed on the first bonding surface 11, wherein the plurality of conductive bumps 3 is exposed from the glue layer 4, respectively. The conductive bump 3 can serve as an external electrical contact of the first multilayer circuit substrate 1, and the material thereof can be a single metal or a multi-element alloy (such as copper or copper alloy); the bonding layer 4 is used to bond the first multilayer circuit substrate 1 The material is bonded to the second multilayer circuit substrate 2, and the material thereof may be a polypropylene resin composition containing glass fibers. In practice, the conductive bumps 3 can be formed by printing, sputtering coating, electro plating, or chemical vapor deposition, and lithography and etching processes, and the bonding layer 4 is It can be formed by pressing, but the invention is not limited thereto.

本實施例中,膠合層4成型時的厚度要大於導電凸塊3的高度,亦即導電凸塊3被膠合層4覆蓋住。為使導電凸塊3從膠合層4外露,之後還須利用雷射加工在膠合層4上形成多個開口41,然而開口41的加工方式並不特別被限制於此,操作者可根據實際需求,改以微影暨蝕刻製程來形成開口41;較佳地,每一開口41的口徑410大於相對應的導電凸塊3頂部的外徑30,且小於相對應的第一接觸墊121的外徑122。 In this embodiment, the thickness of the glue layer 4 when formed is greater than the height of the conductive bumps 3, that is, the conductive bumps 3 are covered by the glue layer 4. In order to expose the conductive bumps 3 from the glue layer 4, a plurality of openings 41 are formed on the glue layer 4 by laser processing. However, the processing method of the openings 41 is not particularly limited thereto, and the operator can according to actual needs. The opening 41 is formed by a lithography and etching process; preferably, the opening 410 of each opening 41 is larger than the outer diameter 30 of the top of the corresponding conductive bump 3 and smaller than the corresponding first contact pad 121. Trail 122.

然後,執行步驟S104:在每一導電凸塊3與膠合層4的間隙G填入一導電複合材料5。實務上,導電複合材料5可藉由印刷(printing)方式成型,然而導電複合材料5的成型方式並不特別限制於此。本實施例中,每一導電複合材料5可為銅錫合金、銅膏或銀膠所構成,其中又以銅錫合金為較佳,具體地說,所述以銅錫合金可包含銅、錫與鉭、銦、鋅、錳、鉻、鎳、鍺、鍶、鉑、鎂、鋁及鋯之中的至少一種金屬。 Then, step S104 is performed: a conductive composite material 5 is filled in the gap G between each of the conductive bumps 3 and the bonding layer 4. In practice, the conductive composite material 5 can be formed by printing, but the manner of molding the conductive composite material 5 is not particularly limited thereto. In this embodiment, each conductive composite material 5 may be composed of a copper-tin alloy, a copper paste or a silver paste, wherein a copper-tin alloy is preferably used. Specifically, the copper-tin alloy may include copper and tin. And at least one metal selected from the group consisting of ruthenium, indium, zinc, manganese, chromium, nickel, ruthenium, osmium, platinum, magnesium, aluminum, and zirconium.

值得說明的是,步驟S102中採用“先形成包括多個導電凸塊3的一凸塊陣列,再形成膠合層4緊密地圍繞覆蓋凸塊陣列,然後 利用雷射加工在膠合層4形成多個開口41,以將導電凸塊3外露”的流程設計,所以膠合層4具有多個貫孔42內,且多個導電凸塊3分別位於多個貫孔42內,其中每一導電凸塊3的頂面31及環側面33與相對應的貫孔42內緣不接觸,且相互之間皆形成有一間隙G;因此,步驟S104中更進一步於每一間隙G內填入一導電複合材料5,以將間隙G塞滿,亦即將貫孔42內的剩餘空間予以填滿。 It should be noted that, in step S102, “a bump array including a plurality of conductive bumps 3 is formed first, and then a glue layer 4 is formed to closely surround the cover bump array, and then The process of forming a plurality of openings 41 in the glue layer 4 by laser processing to expose the conductive bumps 3 is designed. Therefore, the glue layer 4 has a plurality of through holes 42 and the plurality of conductive bumps 3 are respectively located in a plurality of through holes. In the hole 42, the top surface 31 and the ring side surface 33 of each of the conductive bumps 3 are not in contact with the inner edges of the corresponding through holes 42, and a gap G is formed between each other; therefore, in step S104, further A gap G is filled with a conductive composite material 5 to fill the gap G, that is, the remaining space in the through hole 42 is filled.

再者,雖然膠合層4在完全固化之前仍具有流動性,但由於第一多層電路基板1的第一接合面11上已預先配置有多個導電凸塊3,因此可利用其來阻擋或限制膠合層4相對於第一多層電路基板1的滑動,並使具有導電複合材料5包覆的導電凸塊3與相對應的貫孔42內緣之間完全密實,無任何的空洞缺陷。 Furthermore, although the glue layer 4 still has fluidity before it is completely cured, since the plurality of conductive bumps 3 are pre-configured on the first joint surface 11 of the first multilayer circuit substrate 1, it can be used to block or The sliding of the bonding layer 4 relative to the first multilayer circuit substrate 1 is restricted, and the conductive bumps 3 coated with the conductive composite material 5 and the inner edges of the corresponding through holes 42 are completely dense without any void defects.

此外,由於初步成型的導電複合材料5尚未完全固化,因此在步驟S104完成之後,所述的高密度互連多層電路板之製造方法還需要執行一熱處理步驟,以使導電複合材料5完全固化;較佳地,為確保第一和第二多層電路基板1、2的接合效果,在熱處理步驟中僅能將膠合層4加熱至半固化,所以熱處理的溫度須小於膠合層之材料的玻璃轉移溫度,以避免膠合層轉態。 In addition, since the initially formed conductive composite material 5 has not been completely cured, after the step S104 is completed, the method for manufacturing the high-density interconnected multilayer circuit board further needs to perform a heat treatment step to completely cure the conductive composite material 5; Preferably, in order to ensure the bonding effect of the first and second multilayer circuit substrates 1, 2, only the glue layer 4 can be heated to semi-cured in the heat treatment step, so the temperature of the heat treatment must be smaller than the glass transfer of the material of the glue layer. Temperature to avoid transition of the glue layer.

最後,執行步驟S106:將第二多層電路基板2透過膠合層4與第一多層電路基板1壓合在一起,其中第二多層電路基板2藉由多個導電凸塊3與多個導電複合材料5與第一多層電路基板1電性連接。本實施例中,膠合層4本身即具有黏著性,所以第一和第二多層電路基板1、2可藉由熱壓而直接貼附於膠合層4的相對二表面上,且每一第一接觸墊121與相對的第二接觸墊221之間,皆可透過由具有導電複合材料5包覆的導電凸塊3所構成的傳輸路徑形成導通。 Finally, step S106 is performed: the second multilayer circuit substrate 2 is pressed together with the first multilayer circuit substrate 1 through the glue layer 4, wherein the second multilayer circuit substrate 2 is covered by the plurality of conductive bumps 3 and The conductive composite material 5 is electrically connected to the first multilayer circuit substrate 1. In this embodiment, the glue layer 4 itself has adhesiveness, so the first and second multilayer circuit substrates 1 and 2 can be directly attached to the opposite surfaces of the glue layer 4 by hot pressing, and each of the first A contact pad 121 and the opposite second contact pad 221 are electrically connected to each other through a transmission path formed by the conductive bumps 3 coated with the conductive composite material 5.

請複參考圖4至圖6,步驟S100至步驟S106完成後,即製成一種新穎的高密度互連多層電路板M,其能作為封裝後測試或 晶圓式(wafer level)封裝測試用的轉接載板(interposer)或PCB母板(probe card PCB),然而高密度互連多層電路板M的應用領域及用途並不特別限制於此。如圖所示,高密度互連多層電路板M包括第一多層電路基板1、一膠合層4、多個導電複合材料5、及第二多層電路基板2。第一多層電路基板1的第一接合面11上設有第一接觸墊陣列12,且第一接觸墊陣列12中之每一第一接觸墊121上設有一導電凸塊3;膠合層4設置於第一接合面11上且圍繞多個導電凸塊3,其中多個導電凸塊3從膠合層4外露;多個導電複合材料5分別填充於每一導電凸塊3與膠合層4的間隙G;第二多層電路基板2設置於膠合層4上,第二多層電路基板2的第二接合面21上設有與第一接觸墊陣列12相對應的第二接觸墊陣列22,且第二接觸墊陣列22藉由多個導電凸塊3及多個導電複合材料5與第一接觸墊陣列12形成導通。 Referring to FIG. 4 to FIG. 6 , after step S100 to step S106 is completed, a novel high-density interconnect multilayer circuit board M can be fabricated, which can be used as a post-package test or The interposer or the probe card PCB for the wafer level package test, however, the application field and use of the high-density interconnection multilayer circuit board M are not particularly limited thereto. As shown, the high-density interconnect multilayer circuit board M includes a first multilayer circuit substrate 1, a glue layer 4, a plurality of conductive composite materials 5, and a second multilayer circuit substrate 2. A first contact pad array 12 is disposed on the first bonding surface 11 of the first multilayer circuit substrate 1 , and each of the first contact pads 121 of the first contact pad array 12 is provided with a conductive bump 3; the bonding layer 4 Disposed on the first bonding surface 11 and surrounding the plurality of conductive bumps 3, wherein the plurality of conductive bumps 3 are exposed from the bonding layer 4; the plurality of conductive composite materials 5 are respectively filled in each of the conductive bumps 3 and the bonding layer 4. a gap G; a second multilayer circuit substrate 2 is disposed on the glue layer 4, and a second contact pad array 22 corresponding to the first contact pad array 12 is disposed on the second bonding surface 21 of the second multilayer circuit substrate 2, The second contact pad array 22 is electrically connected to the first contact pad array 12 by a plurality of conductive bumps 3 and a plurality of conductive composite materials 5.

具體地說,膠合層4具有多個貫孔42,多個導電凸塊3與多個導電複合材料5分別位於多個貫孔42內,且每一貫孔42內緣與具有導電複合材料5包覆的導電凸塊3之間完全密實。從結構上來看,每一導電凸塊3具有一頂面31、一與頂面31相對應的底面32、及一位於頂面31與底面32之間的環側面33,在每一第一接觸墊121與相對應的第二接觸墊221之間,導電凸塊3與貫孔42內緣之間有間隙G存在,導電複合材料5恰好填充於間隙G內;導電凸塊3的底面32與第一接觸墊121相連接,導電複合材料5一方面與導電凸塊3的頂面31及環側面33相連接,且另一方面與第二接觸墊221相連接。 Specifically, the glue layer 4 has a plurality of through holes 42 , and the plurality of conductive bumps 3 and the plurality of conductive composite materials 5 are respectively located in the plurality of through holes 42 , and the inner edge of each of the consistent holes 42 and the conductive composite material are provided The covered conductive bumps 3 are completely dense. Structurally, each of the conductive bumps 3 has a top surface 31, a bottom surface 32 corresponding to the top surface 31, and a ring side surface 33 between the top surface 31 and the bottom surface 32, at each first contact. Between the pad 121 and the corresponding second contact pad 221, a gap G exists between the conductive bump 3 and the inner edge of the through hole 42, and the conductive composite material 5 is just filled in the gap G; the bottom surface 32 of the conductive bump 3 is The first contact pads 121 are connected, and the conductive composite material 5 is connected on the one hand to the top surface 31 and the ring side surface 33 of the conductive bump 3, and on the other hand to the second contact pad 221.

附帶一提,導電凸塊3與貫孔42的結構會根據所採取的製程而有所不同;本實施例中,雖然圖4所示的導電凸塊3的外徑30是由第二接觸墊221往第一接觸墊121的方向逐漸增加,亦即導電凸塊3為截面呈梯形的梯形凸塊,而貫孔42的孔徑(未標號)是由第二接觸墊221往第一接觸墊121的方向逐漸減小,亦即貫孔 42略呈漏斗狀,然而本發明對此並不加以限制。對於本實施例的不同實施態樣,導電凸塊3可為任意幾何形狀(如矩狀、圓柱狀等),貫孔42可為中空圓柱狀。 Incidentally, the structure of the conductive bump 3 and the through hole 42 may vary according to the process taken; in this embodiment, although the outer diameter 30 of the conductive bump 3 shown in FIG. 4 is the second contact pad The direction of the first contact pad 121 is gradually increased, that is, the conductive bump 3 is a trapezoidal trapezoid having a trapezoidal cross section, and the aperture (not labeled) of the through hole 42 is from the second contact pad 221 to the first contact pad 121. The direction of the hole is gradually reduced, that is, the through hole 42 is slightly funnel shaped, however, the invention is not limited thereto. For different implementations of this embodiment, the conductive bumps 3 can be of any geometric shape (such as a rectangular shape, a cylindrical shape, etc.), and the through holes 42 can be hollow cylindrical.

以上僅為本發明的較佳可行實施例,非因此侷限本發明的專利範圍,故舉凡運用本發明說明書及圖式內容所做的等效技術變化,均包含於本發明的保護範圍內。 The above is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention. Therefore, equivalent technical changes made by the present invention and the contents of the drawings are included in the scope of the present invention.

M‧‧‧高密度互連多層板 M‧‧‧High Density Interconnect Multilayer Board

1‧‧‧第一多層電路基板 1‧‧‧First multilayer circuit board

12‧‧‧第一接觸墊陣列 12‧‧‧First contact pad array

121‧‧‧第一接觸墊 121‧‧‧First contact pad

13‧‧‧層間絕緣層 13‧‧‧Interlayer insulation

14‧‧‧直通式導電結構 14‧‧‧through-type conductive structure

2‧‧‧第二多層電路基板 2‧‧‧Second multilayer circuit board

22‧‧‧第二接觸墊陣列 22‧‧‧Second contact pad array

221‧‧‧第二接觸墊 221‧‧‧Second contact pad

23‧‧‧層間絕緣層 23‧‧‧Interlayer insulation

24‧‧‧直通式導電結構 24‧‧‧through-type conductive structure

3‧‧‧導電凸塊 3‧‧‧Electrical bumps

4‧‧‧膠合層 4‧‧‧Glued layer

5‧‧‧導電複合材料 5‧‧‧ Conductive composite materials

Claims (18)

一種高密度互連多層電路板之製造方法,包括以下步驟:提供預先製成的第一多層電路基板及第二多層電路基板,其中所述第一多層電路基板具有第一接合面,且所述第一接合面上設有第一接觸墊陣列;在所述第一接觸墊陣列中之每一第一接觸墊上形成一導電凸塊,並在所述第一接合面上形成一膠合層,其中多個所述導電凸塊從所述膠合層外露;在每一所述導電凸塊與所述膠合層的間隙填入一導電複合材料;以及將所述第二多層電路基板透過所述膠合層與所述第一多層電路基板壓合在一起,其中所述第二多層電路基板藉由多個所述導電凸塊與多個所述導電複合材料與所述第一多層電路基板電性連接。 A manufacturing method of a high-density interconnection multilayer circuit board, comprising the steps of: providing a first multilayer circuit substrate and a second multilayer circuit substrate prepared in advance, wherein the first multilayer circuit substrate has a first bonding surface, And forming a first contact pad array on the first bonding surface; forming a conductive bump on each of the first contact pads, and forming a glue on the first bonding surface; a layer, wherein a plurality of the conductive bumps are exposed from the glue layer; a conductive composite material is filled in a gap between each of the conductive bumps and the glue layer; and the second multilayer circuit substrate is transparent The bonding layer is press-fitted together with the first multilayer circuit substrate, wherein the second multilayer circuit substrate comprises a plurality of the conductive bumps and a plurality of the conductive composite materials and the first plurality The layer circuit substrate is electrically connected. 如請求項1所述的高密度互連多層電路板之製造方法,其中在所述第一接觸墊陣列中之每一所述第一接觸墊上形成所述導電凸塊的步驟中,更包括利用雷射加工在所述膠合層上形成多個開口,以使多個所述導電凸塊分別外露於多個所述開口。 The manufacturing method of the high-density interconnection multilayer circuit board of claim 1, wherein the step of forming the conductive bumps on each of the first contact pads in the first contact pad array further comprises utilizing The laser processing forms a plurality of openings on the glue layer such that a plurality of the conductive bumps are exposed to the plurality of openings, respectively. 如請求項2所述的高密度互連多層電路板之製造方法,其中每一所述開口的口徑大於相對應的所述導電凸塊頂部的外徑,且小於相對應的所述第一接觸墊的內徑。 The manufacturing method of the high-density interconnection multilayer circuit board according to claim 2, wherein a diameter of each of the openings is larger than an outer diameter of a corresponding top of the conductive bumps, and is smaller than the corresponding first contact The inner diameter of the pad. 如請求項1所述的高密度互連多層電路板之製造方法,在每一所述導電凸塊與所述膠合層的間隙填入所述導電複合材料的步驟中,每一所述導電複合材料是透過印刷方式填入相對應的所述導電凸塊與所述膠合層的間隙。 The method for manufacturing a high-density interconnection multilayer circuit board according to claim 1, wherein in the step of filling the conductive composite material in a gap between each of the conductive bumps and the glue layer, each of the conductive composites The material is filled into the gap between the corresponding conductive bump and the glue layer by printing. 如請求項4所述的高密度互連多層電路板之製造方法,其中每一所述導電複合材料為銅錫合金、銅膏或銀膠所構成。 A method of manufacturing a high-density interconnected multilayer circuit board according to claim 4, wherein each of said conductive composite materials is composed of a copper-tin alloy, a copper paste or a silver paste. 如請求項5所述的高密度互連多層電路板之製造方法,其中所 述銅錫合金包含銅、錫與鉭、銦、鋅、錳、鉻、鎳、鍺、鍶、鉑、鎂、鋁及鋯之中的至少一種金屬。 A method of manufacturing a high-density interconnected multilayer circuit board according to claim 5, wherein The copper-tin alloy includes at least one of copper, tin, and antimony, indium, zinc, manganese, chromium, nickel, lanthanum, cerium, platinum, magnesium, aluminum, and zirconium. 如請求項1所述的高密度互連多層電路板之製造方法,其中在每一所述導電凸塊與所述膠合層的間隙填入所述導電複合材料的步驟與將所述第二多層電路基板透過所述膠合層與所述第一多層電路基板壓合在一起的步驟之間,更包括一熱處理步驟,以使每一所述導電複合材料完全固化,並使所述膠合層半固化。 The method of manufacturing a high-density interconnection multilayer circuit board according to claim 1, wherein the step of filling the conductive composite material in a gap between each of the conductive bumps and the bonding layer and the second The step of bonding the layer circuit substrate through the bonding layer to the first multilayer circuit substrate further includes a heat treatment step to completely cure each of the conductive composite materials and to bond the bonding layer Semi-cured. 如請求項7所述的高密度互連多層電路板之製造方法,其中所述熱處理的溫度小於所述膠合層之材料的玻璃轉移溫度。 The method of manufacturing a high-density interconnected multilayer circuit board according to claim 7, wherein the heat treatment has a temperature lower than a glass transition temperature of a material of the glue layer. 如請求項1所述的高密度互連多層電路板之製造方法,其中所述第二多層電路基板具有第二接合面,且所述第二接合面上設有第二接觸墊陣列;在將所述第二多層電路基板透過所述膠合層與所述第一多層電路基板壓合在一起的步驟中,所述第二接觸墊陣列藉由多個所述導電凸塊與多個所述導電複合材料與所述第一多層電路基板的所述第一接觸墊陣列形成導通。 The method of manufacturing the high-density interconnection multilayer circuit board of claim 1, wherein the second multilayer circuit substrate has a second bonding surface, and the second bonding surface is provided with a second contact pad array; In the step of pressing the second multilayer circuit substrate through the glue layer and the first multilayer circuit substrate, the second contact pad array comprises a plurality of the conductive bumps and a plurality of The conductive composite material is electrically connected to the first contact pad array of the first multilayer circuit substrate. 一種高密度互連多層電路板,包括:第一多層電路基板,所述第一多層電路基板具有第一接合面,所述第一接合面上設有第一接觸墊陣列,且所述第一接觸墊陣列中之每一第一接觸墊上設有一導電凸塊;一膠合層,所述膠合層設置於所述第一接合面上且圍繞多個所述導電凸塊,其中多個所述導電凸塊從所述膠合層外露;多個導電複合材料,多個所述導電複合材料分別填充於每一所述導電凸塊與所述膠合層的間隙;以及第二多層電路基板,所述第二多層電路基板設置於所述膠合層上,且所述第二多層電路基板藉由多個所述導電凸塊及多個所述導電複合材料與所述第一多層電路基板電性連接。 A high-density interconnected multilayer circuit board comprising: a first multi-layer circuit substrate having a first bonding surface, the first bonding surface being provided with a first contact pad array, and Each of the first contact pads is provided with a conductive bump; a glue layer, the glue layer is disposed on the first joint surface and surrounds the plurality of the conductive bumps, wherein the plurality of The conductive bumps are exposed from the glue layer; a plurality of conductive composite materials, a plurality of the conductive composite materials respectively filling a gap between each of the conductive bumps and the glue layer; and a second multilayer circuit substrate, The second multilayer circuit substrate is disposed on the glue layer, and the second multilayer circuit substrate comprises a plurality of the conductive bumps and the plurality of the conductive composite materials and the first multilayer circuit The substrate is electrically connected. 如請求項10所述的高密度互連多層電路板,其中所述第二多層電路基板具有第二接合面,所述第二接合面上設有與所述第一 接觸墊陣列相對應的第二接觸墊陣列,且所述第二接觸墊陣列藉由多個所述導電凸塊與多個所述導電複合材料與所述第一多層電路基板的所述第一接觸墊陣列形成導通。 The high-density interconnection multilayer circuit board of claim 10, wherein the second multilayer circuit substrate has a second bonding surface, and the second bonding surface is provided with the first Contacting the second contact pad array corresponding to the array of pads, and the second contact pad array is formed by the plurality of the conductive bumps and the plurality of the conductive composite materials and the first multilayer circuit substrate A contact pad array is formed to be conductive. 如請求項10所述的高密度互連多層電路板,其中所述膠合層具有多個貫孔,多個所述導電凸塊與多個所述導電複合材料分別位於多個所述貫孔內。 The high-density interconnection multilayer circuit board of claim 10, wherein the glue layer has a plurality of through holes, and the plurality of the conductive bumps and the plurality of the conductive composite materials are respectively located in the plurality of through holes . 如請求項12所述的高密度互連多層電路板,其中每一所述導電凸塊具有一頂面、一與所述頂面相對應的底面、及一位於所述頂面與所述底面之間的環側面,每一所述導電凸塊的所述底面連接相對應的所述第一接觸墊,每一所述導電複合材料連接相對應的所述第二接觸墊與所述導電凸塊的所述頂面。 The high-density interconnected multilayer circuit board of claim 12, wherein each of the conductive bumps has a top surface, a bottom surface corresponding to the top surface, and a top surface and the bottom surface The bottom surface of each of the conductive bumps is connected to the corresponding first contact pads, and each of the conductive composite materials is connected to the corresponding second contact pads and the conductive bumps The top surface. 如請求項12所述的高密度互連多層電路板,其中每一所述貫孔的孔徑由相對應的所述第二接觸墊往相對應的所述第一接觸墊的方向逐漸減小。 The high-density interconnected multilayer circuit board of claim 12, wherein an aperture of each of the through holes is gradually reduced from a corresponding one of the second contact pads toward a corresponding one of the first contact pads. 如請求項13所述的高密度互連多層電路板,其中每一所述導電複合材料連接相對應的所述導電凸塊的環側面。 The high-density interconnect multilayer circuit board of claim 13, wherein each of the conductive composite materials is connected to a corresponding loop side of the conductive bump. 如請求項10所述的高密度互連多層電路板,其中每一所述導電複合材料為銅錫合金、銅膏或銀膠所構成。 The high-density interconnect multilayer circuit board of claim 10, wherein each of the conductive composite materials is a copper-tin alloy, a copper paste or a silver paste. 如請求項16所述的高密度互連多層電路板,其中所述銅錫合金包含銅、錫與鉭、銦、鋅、錳、鉻、鎳、鍺、鍶、鉑、鎂、鋁及鋯之中的至少一種金屬。 The high-density interconnect multilayer circuit board of claim 16, wherein the copper-tin alloy comprises copper, tin and antimony, indium, zinc, manganese, chromium, nickel, lanthanum, cerium, platinum, magnesium, aluminum, and zirconium. At least one metal in the middle. 如請求項10所述的高密度互連多層電路板,其中每一所述導電凸塊的外徑由相對應的所述第二接觸墊往相對應的所述第一接觸墊的方向逐漸增加。 The high-density interconnection multilayer circuit board of claim 10, wherein an outer diameter of each of the conductive bumps is gradually increased from a corresponding second contact pad toward a corresponding one of the first contact pads. .
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