TWI607430B - Display apparatus - Google Patents

Description

Display device

The present invention relates to a display device, and more particularly to a display device for measuring a pixel voltage charging rate.

Generally, an image of a thin display is formed by displaying a plurality of pixels of different gray scales, which is usually determined by a gate driving signal on a gate line to determine a time when a pixel receives a data voltage. The data line is transmitted from the data line to the pixel to charge the pixel to display the gray scale corresponding to the displayed data. Therefore, the charging rate of the pixel is related to the display quality of the display. If the charging rate of the pixel is too slow, the display data cannot be correctly written to the pixel, that is, the pixel cannot display the correct image.

In order to know whether the actual charging rate of the panel pixel and the result of the simulation calculation match in the panel fabrication stage, the charging rate of the pixel must be measured. Since the voltage variation on the individual pixels is small when the pixel is driven, the general voltage measuring device cannot perform the measurement effectively, so how to measure the pixel charging rate is a problem to be solved.

The present invention provides a display device that can conveniently and efficiently perform measurement of a pixel charging rate.

A display device of the present invention includes a display panel and a driving circuit. The display panel includes a plurality of gate lines and a plurality of data lines, and the display panel has a display area and a non-display area. The non-display area includes a plurality of virtual pixels disposed in an area formed by the intersection of the corresponding gate lines and the data lines, and at least part of the virtual pixels are connected to each other. The driving circuit is coupled to the display panel, and provides a gate driving voltage to the gate line corresponding to the pseudo pixel, and provides a test data voltage to the data line, so that the connected virtual pixel reaction test data voltage generates a charging rate test signal.

In an embodiment of the invention, the driving circuit provides a gate driving voltage and a test data voltage during the test.

In an embodiment of the invention, the display area includes a plurality of display pixels disposed in an area formed by the intersection of the gate line and the data line, and the driving circuit sequentially drives the gate line during the frame period and provides Test the data voltage to the data line.

In an embodiment of the invention, the resolution of the display device is defined by a virtual pixel and a gate line and a data line corresponding to the display pixel.

In an embodiment of the invention, the display device further includes an amplifying circuit, wherein the input end is coupled to at least one of the virtual pixels connected to each other, the output end of the amplifying circuit is coupled to the test contact, and the amplifying circuit is amplified by the charging rate test. The signal is used to generate an amplified test signal for the test contact.

In an embodiment of the invention, the amplifying circuit includes an operational amplifier, and the positive input terminal receives the charging rate test signal, and the negative input terminal of the operational amplifier is coupled to the output terminal.

In an embodiment of the invention, the amplifying circuit is integrated into the display panel.

In an embodiment of the invention, one of the interconnected virtual pixels has a test contact, and the connected virtual pixels output a charge rate test signal through the test contact.

In an embodiment of the invention, the test data voltage is used to drive a virtual pixel to display a minimum grayscale value.

In an embodiment of the invention, the test data voltage is 15 volts.

Based on the above, in an exemplary embodiment of the present invention, interconnected by connecting a plurality of virtual pixels of a non-display area to each other and providing a gate driving voltage and a test data voltage to the connected virtual pixels. The virtual pixel reaction test data voltage provides a charge rate test signal having a sufficiently large voltage value, and the measurement of the pixel charge rate can be conveniently and efficiently performed.

The above described features and advantages of the invention will be apparent from the following description.

FIG. 1 is a schematic diagram of a display device according to an embodiment of the invention. Referring to FIG. 1 , the display device 100 includes a display panel 102 and a driving circuit 104 , and the driving circuit is coupled to the display panel 102 . The display panel 102 can be a hard display panel or a flexible display panel, such as an a-Si TFT display panel, an OTFT display panel or an OLED display panel, etc., and includes a plurality of gate lines GL1, a plurality of data lines DL1, and a plurality of Virtual pixels (such as P1 ~ P5) and multiple display pixels DP1. The display panel 102 has a display area DA1 and a non-display area FA1 (hatched area shown in FIG. 1), wherein the virtual pixel is located in the non-display area FA1 and is disposed at the intersection of the corresponding gate line GL1 and the data line DL1. It is connected to the corresponding gate line GL1 and the data line DL1. In order to keep the illustration simple and easy to explain, only five virtual pixels P1 to P5 and one display pixel DP1 are indicated in FIG. 1, and other virtual pixels and display pixels are not marked. In addition, it should be noted that the number of virtual pixels and the number of display pictures DP1 is not limited to the embodiment shown in FIG. 1.

In this embodiment, the virtual pixels P1 P P5 are connected to each other (for example, through a pixel electrode, in FIG. 1 , two virtual pixels separated by a broken line indicate that the two virtual pixels are connected to each other, for example, a virtual picture. The P1 and P2 are connected to form a virtual pixel string, and the driving circuit 104 can provide the gate driving voltage and the test data voltage to the gate line GL1 and the data line DL1 to react the connected virtual pixels P1 to P5. The data voltage is tested to generate a charge rate test signal S1. Wherein, since the virtual pixels generally do not participate in the display in the display panel, the gate driving voltages of the virtual pixels P1 P P5 must be additionally provided, which can utilize, for example, the remaining output pins on the driving circuit 104 (eg, the driving chip). Come on. In addition, the test data voltage can be used to drive the virtual pixel to display the minimum grayscale value (for example, black). In some embodiments, the voltage value of the test data voltage can be displayed, for example, to display the maximum grayscale value or a specific grayscale value. 15 volts, but not limited to this. In addition, one of the interconnected virtual pixels P1 P P5 may have a test contact (in the embodiment, the test contact may be a pixel electrode of the virtual pixel P1, but not limited thereto). The connected virtual pixels P1~P5 can output the charging rate test signal S1 through the test contact.

The charging rate test signal S1 is used to reflect the rate at which the virtual pixels P1~P5 are charged by the test data. For example, the virtual pixels P1 can be used according to the virtual pixels P1~P5 for a preset period of time after receiving the test data voltage. Whether the voltage of ~P5 can rise to a preset voltage, and if so, the charging rate of the virtual pixels P1~P5 meets the requirements. Since the virtual pixels P1 to P5 are the same as the process and structure of the display pixel DP1, the charging characteristics of the virtual pixels P1 to P5 and the display pixel DP1 are also the same, and the charging rates of the virtual pixels P1 to P5 meet the requirements, and the representative display The charging rate of the pixel DP1 also meets the requirements, and the image corresponding to the data can be correctly displayed.

Since the charging rate test signal S1 is provided by the connected virtual pixels P1~P5, the voltage value and the voltage variation range of the charging rate test signal S1 will be significantly larger than the voltage value and voltage variation range that the single virtual pixel can provide. Therefore, the problem that the voltage measuring device cannot be measured because the voltage to be measured is too small can be solved, and the average voltage variation of a single virtual pixel can be known by dividing the measurement result by the number of virtual pixels connected in series. value.

In some embodiments, if the voltage value of the charging rate test signal S1 is to be further increased, the charging rate test signal S1 may be amplified by the amplifying circuit 106 coupled to the test contact to generate the amplified test signal S1', and then Output to a voltage measuring device, such as an oscilloscope, to determine the charging rate of the virtual pixels P1 to P5. The amplifying circuit 106 can be implemented, for example, by an operational amplifier OP1. As shown in FIG. 1, the positive input terminal of the operational amplifier OP1 is coupled to the test contact on the virtual pixel P1, and the negative input terminal is coupled to the output terminal of the operational amplifier OP1. Pick up. It should be noted that in some implementations, the amplifying circuit 106 can also be integrated into the display panel. The input end of the amplifying circuit 106 can be coupled to the virtual pixel P1, for example, and the output terminal can be used as a test contact to facilitate the voltage. The measuring device is connected.

It is worth noting that the drive circuit can be performed during a specific test. FIG. 2 is a schematic diagram showing waveforms of a gate driving voltage and a data test voltage of the display device of the embodiment of FIG. 1. FIG. The gate driving voltage SG1 is a voltage on a gate line corresponding to the virtual pixels P1 to P5, and the gate driving voltage SG2 is a gate line corresponding to a display pixel adjacent to the virtual pixels P1 to P5. In order to keep the figure simple, the gate driving voltage of other gate lines is not shown here, and the data test voltage SD1 is the voltage on the data line DL1. As shown in FIG. 2, the driving circuit 104 can increase the voltage level of the gate driving voltage SG1 and the data test voltage SD1 only during a period of the test period T1 in the frame period F1 to charge the virtual pixels P1 to P5. test. Similarly, during the frame period F2, the charging rate of the virtual pixels P1 to P5 is also tested only during the test period T2.

FIG. 3 is a schematic diagram of a display device 300 according to another embodiment of the present invention. The difference between this embodiment and the embodiment of FIG. 1 is that the embodiment of FIG. 1 only serializes some virtual pixels (P1~P5), and in this embodiment, all virtual pixels of the non-display area FA1 ( P1~P10) are connected in series. That is, the number of serial connections of the virtual pixels is not limited to the embodiment of FIG. 1 or the embodiment of the present invention. As the number of virtual pixel serials increases, the voltage value and voltage variation range of the charging rate test signal S1 will be increased. Large, and more advantageous for voltage measurement devices for measurement. Moreover, in some embodiments, the display panel 102 can also be designed such that the resolution is defined by the virtual pixels and the display pixels DP1. For example, if the original resolution of the display panel 102 is 1024×786, if the virtual pixel corresponds to two gate lines, the display panel 102 can be designed as a panel with a resolution of 1024×788, that is, the remaining output pins on the driving circuit 104 are not utilized. To drive the virtual pixels, the driver circuit 104 is designed directly to drive the 788 gate lines without using the reserved bits of the driver circuit 104. Similarly, in this embodiment, the charging rate test signal S1 is also outputted by the test contact on the virtual pixel P1, and the charging rate test signal S1 can also be amplified by the amplifying circuit 106 as shown in the embodiment of FIG. 1. This will not be repeated here.

4 is a schematic diagram showing waveforms of a gate driving voltage and a data test voltage of the display device of the embodiment of FIG. 3. In this embodiment, the driving circuit 104 can sequentially drive the virtual pixels and display the gate lines of the pixels DP1 during the frame periods F1 and F2, and continuously maintain the data test voltage SD1 at a high voltage level. Both the virtual pixel and the display circuit are driven to display the image with the lowest gray scale, and the data test voltage SD1 is maintained at the high voltage level only during the test periods T1 and T2 of FIG. 2 .

In summary, in an exemplary embodiment of the present invention, by connecting a plurality of virtual pixels of a non-display area to each other, and providing a gate driving voltage and a test data voltage to the connected virtual pixels by the driving circuit, The interconnected virtual pixel reaction test data voltage can be supplied with a charge rate test signal having a sufficiently large voltage value, and the measurement of the pixel charge rate can be conveniently and efficiently performed.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and any one of ordinary skill in the art can make some changes and refinements without departing from the spirit and scope of the present invention. The scope of the invention is defined by the scope of the appended claims.

100, 300‧‧‧ display devices

102‧‧‧ display panel

104‧‧‧ drive circuit

GL1‧‧‧ gate line

DL1‧‧‧ data line

P1~P10‧‧‧Virtual pixels

DP1‧‧‧ display pixels

DA1‧‧‧ display area

FA1‧‧‧ non-display area

OP1‧‧‧Operational Amplifier

S1‧‧‧Charging rate test signal

S1’‧‧‧Amplification test signal

SG1, SG2‧‧‧ gate drive voltage

SD1‧‧‧ data test voltage

T1, T2‧‧‧ test period

FIG. 1 is a schematic diagram of a display device according to an embodiment of the invention. FIG. 2 is a schematic diagram showing waveforms of a gate driving voltage and a data test voltage of the display device of the embodiment of FIG. 1. FIG. FIG. 3 is a schematic diagram of a display device according to another embodiment of the present invention. 4 is a schematic diagram showing waveforms of a gate driving voltage and a data test voltage of the display device of the embodiment of FIG. 3.

100‧‧‧ display device

102‧‧‧ display panel

104‧‧‧ drive circuit

GL1‧‧‧ gate line

DL1‧‧‧ data line

P1~P5‧‧‧Virtual pixels

DP1‧‧‧ display pixels

DA1‧‧‧ display area

FA1‧‧‧ non-display area

OP1‧‧‧Operational Amplifier

S1‧‧‧Charging rate test signal

S1’‧‧‧Amplification test signal

Claims (10)

A display device includes: a display panel comprising a plurality of gate lines and a plurality of data lines, the display panel having a display area and a non-display area, the non-display area comprising: a plurality of virtual pixels, configured in corresponding An area formed by the intersection of the gate line and the data line, only a part of the virtual pixels are connected to each other; and a driving circuit coupled to the display panel to provide a gate driving voltage to the gate corresponding to the virtual pixels And a test data voltage is supplied to the data lines to cause the virtual pixels connected to each other to generate a charge rate test signal in response to the test data voltage. The display device of claim 1, wherein the driving circuit supplies the gate driving voltage and the test data voltage during a test. The display device of claim 1, wherein the display area comprises: a plurality of display pixels disposed in an area formed by the intersection of the gate lines and the data lines, wherein the driving circuit is in a frame period The gate lines are driven in sequence and a test data voltage is supplied to the data lines. The display device of claim 3, wherein the resolution of the display device is defined by the virtual pixels and the gate lines and the data lines corresponding to the display pixels. The display device of claim 1, further comprising: an amplifying circuit, wherein the input end is coupled to the virtual pixels connected to each other at least The output end of the amplifying circuit is coupled to a test contact, and the amplifying circuit amplifies the charging rate test signal to generate an amplified test signal at the test contact. The display device of claim 5, wherein the amplifying circuit comprises: an operational amplifier, wherein the positive input terminal receives the charging rate test signal, and the negative input terminal of the operational amplifier is coupled to the output terminal. The display device of claim 5, wherein the amplifying circuit is integrated in the display panel. The display device of claim 1, wherein one of the virtual pixels connected to each other has a test contact, and the virtual pixels connected to each other output the charge rate test signal through the test contact. . The display device of claim 1, wherein the test data voltage is used to drive the virtual pixels to display a minimum grayscale value. The display device of claim 1, wherein the test data voltage is 15 volts.