TWI603463B - 光感測器及光感測模組 - Google Patents

光感測器及光感測模組 Download PDF

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TWI603463B
TWI603463B TW103138867A TW103138867A TWI603463B TW I603463 B TWI603463 B TW I603463B TW 103138867 A TW103138867 A TW 103138867A TW 103138867 A TW103138867 A TW 103138867A TW I603463 B TWI603463 B TW I603463B
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徐永珍
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徐永珍
世博科技顧問股份有限公司
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Description

光感測器及光感測模組
本發明涉及一種半導體裝置,特別是一種半導體光感測器。
光感測器通常使用光電二極體將光信號轉換為電信號。傳統的光電二極體為PN接面或PIN結構,當一定強度的光照射光電二極體時,PN接面或PIN結構產生光電流。足夠能量的光子激發光電二極體的電子產生電子電洞對。電子由價帶(valence band)向傳導帶(conduction band)移動產生光電流。
由於大多數光感測器使用光電流表示入射光電二極體的光強度,因此光感測器易受使輸出信號飽和的高強度光的損害,或者低強度光產生的光電流過少而需要通過重置電路重置光電二極體。
有鑑於此,有必要提供一種光感測器。
一種光感測器,包括:基板,包括複數一體成型的光電壓感測元件及複數石墨烯-半導體異質接面,每一石墨烯-半導體異質接面包括:石墨烯層與半導體層;石墨烯層設置於基板上,半導體層設置於石墨烯層上,且每一光電壓感測元件與對應的一石墨烯-半導體異質接面連接。
一種光感測器,包括:基板,包括複數一體成型的光電壓感測元 件及複數石墨烯-半導體異質接面,每一石墨烯-半導體異質接面包括:石墨烯層與半導體層;石墨烯層覆蓋基板的一部分且半導體層覆蓋石墨烯層;且每一光電壓感測元件與對應的一石墨烯-半導體異質接面連接。
一種光感測模組,包括:至少一解碼器及至少一光感測器,光感測器包括:基板,包括複數一體成型的光電壓感測元件及複數石墨烯-半導體異質接面。每一石墨烯-半導體異質接面包括:石墨烯層;與半導體層;石墨烯層設置於基板上,半導體層設置於石墨烯層上,且每一光電壓感測元件與對應的一石墨烯-半導體異質接面連接。
一種光感測器,包括:光電二極體,光電二極體具有陽極端與陰極端;金屬-氧化物半導體場效應電晶體(Metal-Oxide Semiconductor Field Effect Transistor,MOSFET)包括閘極、源極與汲極。光電二極體的第一端與MOSFET的閘極連接,光電二極體的第二端連接一參考電壓源;MOSFET的汲極連接一電壓源,MOSFET的源極端為MOSFET的信號輸出端。
一種光感測器,包括:光電二極體,光電二極體具有陽極與陰極;運算放大器,包括非反向輸入端、反向輸入端及一輸出端;其中,光電二極體的第一端與運算放大器的非反向輸入端連接,光電二極體的第二端連接一參考電壓源;運算放大器的反向輸入端與輸出端連接。
1‧‧‧光感測器
30‧‧‧作動畫素區域
101‧‧‧列解碼電路
102‧‧‧欄解碼電路
103‧‧‧多工器電路
100‧‧‧模組
200‧‧‧系統
201‧‧‧顯示器
202‧‧‧記憶體
203‧‧‧控制器
204‧‧‧輸入模組
25‧‧‧光電二極體
35‧‧‧CMOS感測電路
10‧‧‧石墨烯層
15‧‧‧半導體層
M1、M2‧‧‧金屬層
IMD1、IMD2‧‧‧金屬介電層
28‧‧‧通孔
30’、250、251‧‧‧石墨烯-半導體光電二極體
M1‧‧‧MOSFET
70‧‧‧閘極
71‧‧‧源極
72‧‧‧電阻
73‧‧‧汲極
74‧‧‧電壓源Vdd
Vout‧‧‧輸出端
75、84‧‧‧定電壓源
80‧‧‧運算放大器
81‧‧‧非反向輸入端
82‧‧‧反向輸入端
83‧‧‧輸出端
41‧‧‧石墨烯
40‧‧‧銅箔
45‧‧‧氫氧化鈉溶液
50‧‧‧氫氣泡
42‧‧‧PMMA層
55‧‧‧石墨烯-PMMA
圖1A是本發明第一實施方式包括光電二極體陣列的光感測器的結構示意圖。
圖1B是圖1A所示光感測器沿線1B-1B的剖面結構示意圖。
圖2A是本發明第二實施方式包括光電二極體陣列的光感測器的結構示意圖。
圖2B是圖2A所示光感測器沿線2B-2B的剖面結構示意圖。
圖3A是石墨烯-半導體異質接面的偏壓示意圖。
圖3B是光電壓響應率與石墨烯-半導體異質接面入射能量的對應關係示意圖。
圖4-5是光電壓與石墨烯-半導體異質接面照度的對應關係示意圖。
圖6A與圖6B是圖1A與1B所示的光電二極體感測光電壓的電路示意圖。
圖7A與圖7B是圖1A與1B所示的光電二極體感測光電壓的電路示意圖。
圖8是石墨烯-半導體異質接面的製造流程示意圖。
圖9是使用圖1A或圖2A所示的光感測器的模組示意圖。
圖10是使用圖1A或圖2A所示的光感測器的系統示意圖。
請一併參閱圖1A及圖1B,圖1A是本發明第一實施方式包括光電二極體陣列的光感測器1的結構示意圖,圖1B是圖1A所示光感測器1沿線1B-1B的剖面結構示意圖。光感測器1包括複數作動畫素區域30。複數作動畫素區域30為多列多欄的陣列,在其它實施方式中 ,複數作動畫素區域30為一列一欄的陣列。在如圖9所示的另一實施方式中,光感測器1與至少一解碼器連接,解碼器包括列解碼電路101、欄解碼電路102、以及多工器電路103。解碼器作為從每一作動畫素區域30提取資訊的模組100。如圖10所示的另一實施方式中,模組100是一系統200的一部分,系統200將從每一作動畫素區域30提取的資訊處理並/或顯示在一顯示器201上,系統200還將從每一作動畫素區域30提取的資訊處理並/或存儲於一記憶體202中。系統200還包括一控制器203及一輸入模組204。
每一作動畫素區域30包括複數光電二極體25及一電晶體。在本實施方式中,電晶體可以是金屬氧化物半導體電晶體(Metal Oxide Semicondutor,MOS),如互補金屬氧化物半導體(Complementary Metal Oxide Semiconductor,CMOS)感測電路35。每一光電二極體包括一石墨烯層10及一半導體層15。在本實施方式中,半導體層15為一矽基質層,矽基質層可以是,但不限於高透明度多晶矽或非晶矽。CMOS感測電路35是CMOS感測電路的一個例子,其他CMOS感測電路的變形亦可採用。CMOS感測電路35包括複數金屬層(如:M1,M2等)。複數金屬層被金屬介電層(如:IMD1,IMD2等)分離並通過通孔28連接。CMOS感測電路35還包括一矽基板,設置於矽基板上的P型井與N型井及設置於P型井與N型井上的電晶體電路。
請繼續參閱圖1A與1B,石墨烯-半導體光電二極體25設置於CMOS感測電路35上方。請參閱圖2A與2B,石墨烯-半導體光電二極體30’與CMOS感測電路35相鄰設置。
石墨烯層10與半導體層15形成一石墨烯-半導體異質接面。半導 體層15可以是N型或P型半導體。在本實施方式中,半導體15具有N型導電性。對於石墨烯半導體接面,半導體,如一N型矽中會產生由光引起的電子碰撞,且石墨烯為載流子收集器。半導體層15為矽基質層,矽基質層可以是,但不限於高透明度多晶矽或非晶矽。如圖1B所示,石墨烯-半導體光電二極體25應用於CMOS感測電路35,半導體層15的厚度可以變化至只允許吸收特定波長的光(如可見光)。結合對廣泛波長具有低光學吸收率(~2.3%)的石墨烯,紅外光(IR)可能不會被異質接面吸收,而僅允許特定波長的光(如可見光)通過。在傳統CMOS感測模組中需要設置IR篩檢程式,而在石墨烯-半導體光電二極體中可省略IR過濾器以保證大量可見光被吸收用於光致激發。
CMOS圖像感測器,如作動畫素圖像感測器(Active pixel imaging sensors,APS),需要高畫素密度(圖像解析度)以滿足各種應用及消費者需求。CMOS圖像感測器可應用於可擕式電子裝置如相機、手機等。感測器的大小與畫素密度(如圖像解析度)是直接相關的,且可直接影響光感測的總面積及相應的感測器性能(包括信噪比及動態操作範圍)。例如,一具有較高畫素密度的CMOS圖像感測器(感測器的大小保持不變)可能導致較小的畫素大小從而降低光感測面積,從而需要在晶片上設置數量更多的電晶體以有效降低光感測的總面積以降低光響應速率及相應的動態範圍。
通過在CMOS IC晶片上設置石墨烯-半導體異質接面,從而實現低光照水準的高光反應速率、低光學吸收、內在信號抑制機制、高動態操作範圍、消除填充限制、降低光電二極體區域及直接將石 墨烯-半導體異質接面設置於半導體基板上,且在保持CMOS圖像感測器性能的前提下消除前述不利影響。
進一步,由於光電二極體與CMOS電路設置在不同平面,通過在CMOS IC晶片上設置石墨烯-半導體異質接面可消除填充因數限制。如圖1A所示,光電二極體設置於CMOS IC晶片的上方,且相互之間無重疊區域。此外,對於光電壓感測元件,光電二極體的面積需求不是很大,從而打破了以解析度衡量CMOS圖像感測器大小的傳統。同樣解釋如下,因為許多電路模組如復位電路是不必要的,從而用於感測每一畫素光電壓的電路變得簡化。
請參閱圖3A,當施加一反向偏壓於石墨烯-半導體接面時,石墨烯的費米能級(Fermi level,Ef(Gr))相比N型半導體的費米能級(Fermi level,Ef(Si))具有更高的移動性。這一特性允許更多的來自半導體價帶的光激電洞訪問狀態。在低光照條件下,由於入射光子的數量限制產生較少的光激載流子,這些載流子可被更高效的收集。因為鄰近石墨烯的費米能級(Ef(Gr))的低密度狀態屬性,而石墨烯的電勢對充電量具有高敏感性。因此通過感測石墨烯光電二極體的光電壓取代光電流,石墨烯光電二極體的光敏感性優於傳統光電二極體。
通過觀察開環電壓發現石墨烯光電二極體對入射光的功率具有高敏感性。如圖3B所示,石墨烯-半導體異質接面的光電壓響應率隨著入射光功率的增加而減小。此反比關係提供一內在信號抑制機制,也就是說,光電壓(V)與照度(lux)呈對數增長關係(如圖4及圖5所示)。因此,石墨烯-半導體異質接面光電二極體比傳統光電二極體吸收更多的光子(如在陽光直射下的高照度)。由於圖 像感測器未使用傳統的信號抑制技術獲得一更高的動態操作範圍。傳統的信號抑制技術需要在每一畫素設置更多的電晶體以模仿對數關係或需要使用複雜的控制電路以分別處理低照度水準以及高照度水準的信號。
請參閱圖6A與圖6B,圖6A與圖6B是石墨烯光電二極體感測光電壓的電路示意圖。如圖6A與圖6B所示,石墨烯-半導體光電二極體的第一端或第二端連接一參考電壓源。在圖6A與圖6B所示的實施方式中,參考電壓源分別是地電壓及定電壓源。在圖6A中,石墨烯-半導體光電二極體250的半導體具有N型導電性並與一電晶體相連,如一源極跟隨形態/結構的金屬-氧化物半導體場效應電晶體(Metal-Oxide Semiconductor Field Effect Transistor,MOSFET)M1。石墨烯端為陽極與MOSFET M1的閘極70連接,而半導體端是一接地的陰極。MOSFET M1的源極71經電阻72接地,並通過汲極73與電壓源Vdd 74連接。輸出端Vout設置在MOSFET M1的源極。在圖6B中,石墨烯-半導體光電二極體251的半導體具有P型導電性。石墨烯端為陰極與MOSFET M1的閘極70連接,半導體端是陽極並與一定電壓源75連接。MOSFET M1的源極71經電阻72接地,並通過汲極73與電壓源Vdd 74連接。輸出端Vout設置在MOSFET M1的源極。
請參閱圖7A與圖7B,圖7A與圖7B是石墨烯光電二極體感測光電壓的電路另一實施方式示意圖。如圖7A及圖7B所示,石墨烯-半導體光電二極體的第一端或第二端連接一參考電壓源。在圖7A與圖7B所示的實施方式中,參考電壓源分別是地電壓及一定電壓源。在圖7A中,石墨烯-半導體光電二極體250與一以電壓緩衝設置的 運算放大器80連接。運算放大器80的輸入電晶體可以是電晶體,如MOSFET。光電二極體250的石墨烯端為陽極與運算放大器80的非反向輸入端81連接,半導體端為陰極並接地。運算放大器80的反向輸入端82與運算放大器80的輸出端連接。在圖7B中,石墨烯-半導體光電二極體251與一以電壓緩衝設置的運算放大器80連接。運算放大器80的輸入電晶體可以是電晶體,如MOSFET。光電二極體251的石墨烯端為陰極與運算放大器80的非反向輸入端81連接,光電二極體251的半導體端為陽極與定電壓源84連接。運算放大器80的反向輸入端與運算放大器的輸出端83連接。
因為MOSFET M1的閘極或運算放大器80的非反向輸入端81幾乎沒有電流流過,石墨烯-半導體二極體250或251之石墨烯端的光電壓被MOSFET M1或運算放大器80檢測。由於檢測光電壓而不是光電流,因此光感測器可以在飽和之前接收更高強度的光,從而可省去復位電晶體。
石墨烯可被沉積在一基板上,石墨烯沉積方法可以是,但不限於,化學氣相沉積(Chemical Vapor Deposition,CVD)法及石墨烯轉移(Graphene Transfer)法。在化學氣相沉積法中,材料元素的化學蒸汽相互作用,然後沉積在晶片的表面。在CMOS圖像感測器的實施方式中,由於CMOS IC晶片的金屬層不能承受高溫,沉積石墨烯可通過低溫沉積法。因此,在本實施方式中的CVD方法生長石墨烯也可以是在低生長溫度,但需通過離子化氣體,如電漿輔助化學氣相沈積(Plasma-enhanced CVD,PECVD)或電子迴旋共振化學氣相沉積(Electron-cyclotron Resonance CVD,ECRCVD)協助。在石墨烯轉移法中,如圖8所示,首先通過CVD將 石墨烯41沉積在銅箔40上。然後將聚甲基丙烯酸甲酯(Polymethyl Methacrylate,PMMA)塗布在銅箔上。在氫氧化鈉(NaOH)溶液45中使用所謂的氫氣(H2)鼓泡過程,利用H2氣泡50將石墨烯沿PMMA層42與銅箔40分離或在FeCl3溶液中直接將銅箔40蝕刻掉。然後將石墨烯-PMMA55沉積在基板上。石墨烯由於凡得瓦力貼附於基板上。PMMA可通過普通的化學蝕刻清洗掉。
石墨烯-半導體異質接面是通過濺射法或化學氣相沉積(在CMOS圖像感測器的應用中,PECVD或ECRCVD亦可使用)預先形成在半導體材料上方,並粘接另一基板(在基板上半導體材料已經存在到石墨烯表面)。
在另一實施方式中,石墨烯半導體異質接面可應用於各種半導體基板(如矽、砷化鎵或其他半導體)應用於分立光探測器,如環境光感測器、測距儀或距離感測器。
在另一實施方式中,石墨烯半導體異質接面可應用於大型基板(如玻璃或塑膠基板)當作圖像感測器。玻璃基板的厚度可根據不同的應用需求設定,如可撓性薄玻璃基板。塑膠基板可以是聚萘二甲酸乙二醇酯(Polyethylene Naphthalene,PEN)、聚苯醚碸(Polyethersulfone,PES)、聚酯(Polyester,PET)、聚醯亞胺(polyimide,PI)等。當選用塑膠基板時,優選地使用低溫製程,如轉移、塗布、濺射、低溫CVD等。圖像感測器可應用於大型相機上,如3C產品、監測攝像頭、汽車、國防及需要大型相機的醫療產品。
在另一實施方式中,石墨烯半導體可用作X射線圖像感測器。其中,在已經設置畫素電路的玻璃基板上使用CVD或石墨烯轉移法 將石墨烯沉積至晶體矽基板或非晶矽上。石墨烯同樣可通過低溫製程,如轉移、塗布、濺射、低溫CVD等沉積在可撓性塑膠基板上。將反射性材料如鋁沉積在石墨烯層上,其中,若干閃爍體(Scintillators)如CsI:Tl包含反射性材料。閃爍體覆蓋並用於保護石墨烯。反射性材料允許X射線通過並由閃爍體反射可見光。前述石墨烯-半導體光探測器具有更高的靈敏度,因此可減少X射線的劑量從而降低對患者的輻射。
雖然本發明以優選實施例揭示如上,然其並非用以限定本發明,任何本領域技術人員,在不脫離本發明的精神和範圍內,當可做各種的變化,這些依據本發明精神所做的變化,都應包含在本發明所要求的保護範圍之內。
250‧‧‧石墨烯-半導體光電二極體
M1‧‧‧MOSFET
70‧‧‧閘極
71‧‧‧源極
72‧‧‧電阻
73‧‧‧汲極
74‧‧‧電壓源Vdd
Vout‧‧‧輸出端

Claims (39)

  1. 一種光感測器,包括:一基板,包括複數一體成型的光電壓感測元件;以及複數石墨烯-半導體異質接面,而每一石墨烯-半導體異質接面包括:一石墨烯層;以及一半導體層;其中該石墨烯層設置於該基板上,該半導體層設置於該石墨烯層上,且每一光電壓感測元件與對應的一石墨烯-半導體異質接面連接;該石墨烯-半導體異質接面的一端連接一參考電壓源。
  2. 如請求項1所述之光感測器,其中,該複數石墨烯-半導體異質接面以一維陣列排列。
  3. 如請求項1所述之光感測器,其中,該複數石墨烯-半導體異質接面以二維陣列排列。
  4. 如請求項1所述之光感測器,其中,該半導體層是矽基質層。
  5. 如請求項1所述之光感測器,其中,該石墨烯層通過化學氣相沉積法或轉移法形成。
  6. 如請求項4所述之光感測器,其中,該矽基質層是多晶矽層。
  7. 如請求項4所述之光感測器,其中,該矽基質層是非晶矽層。
  8. 如請求項1所述之光感測器,其中,參考電壓源是地電壓或定電壓源。
  9. 一種光感測器,包括:一基板,包括複數一體成型的光電壓感測元件;以及複數石墨烯-半導體異質接面,而每一石墨烯-半導體異質接面包括:一石墨烯層;以及 一半導體層;其中該石墨烯層覆蓋該基板的一部分且該半導體層覆蓋該石墨烯層;且每一光電壓感測元件與對應的一石墨烯-半導體異質接面連接;該石墨烯-半導體異質接面的一端連接一參考電壓源。
  10. 如請求項9所述之光感測器,其中,該複數石墨烯-半導體異質接面以一維陣列排列。
  11. 如請求項9所述之光感測器,其中,該複數石墨烯-半導體異質接面以二維陣列排列。
  12. 如請求項9所述之光感測器,其中,該半導體層是矽基質層。
  13. 如請求項9所述之光感測器,其中,該石墨烯層通過化學氣相沉積法或轉移法形成。
  14. 如請求項12所述之光感測器,其中,該矽基質層是多晶矽層。
  15. 如請求項12所述之光感測器,其中,該矽基質層是非晶矽層。
  16. 如請求項9所述之光感測器,其中,參考電壓源是地電壓或定電壓源。
  17. 一種光感測模組,包括:至少一解碼器;以及至少一光感測器,該光感測器包括:一基板,包括複數一體成型的光電壓感測元件;以及複數石墨烯-半導體異質接面,而每一石墨烯-半導體異質接面包括:一石墨烯層;以及一半導體層;其中該石墨烯層設置於該基板上,該半導體層設置於該石墨烯層上,且每一光電壓感測元件與對應的一石墨烯-半導體異質接面連接;該石墨烯-半導體異質接面的一端連接一參考電壓源。
  18. 一種光感測器,包括:一光電二極體,該光電二極體具有一第一端與一第二端;以及 一金屬-氧化物半導體場效應電晶體(Metal-Oxide Semiconductor Field Effect Transistor,MOSFET),包括一閘極端、一源極端與一汲極端;其中,該光電二極體的該第一端與該MOSFET的閘極連接,該光電二極體的該第二端連接一參考電壓源;且該MOSFET的該汲極端連接一電壓源,而該MOSFET的該源極端為MOSFET的信號輸出端;該光電二極體是石墨烯-半導體異質接面。
  19. 如請求項18所述之光感測器,其中,該光電二極體的該第一端為陽極,該光電二極體的該第二端為陰極。
  20. 如請求項18所述之光感測器,其中,該光電二極體的該第一端為陰極,該光電二極體的該第二端為陽極。
  21. 如請求項18所述之光感測器,其中,該參考電壓源為地電壓或定電壓源。
  22. 如請求項18所述之光感測器,其中,該光電二極體的該陽極為該異質接面的石墨烯側,而該MOSFET的源極經一電阻接地。
  23. 如請求項18所述之光感測器,其中,該光電二極體的該陽極為該異質接面的半導體側,而該MOSFET的該源極經一電阻接地。
  24. 如請求項18所述之光感測器,其中,該石墨烯-半導體異質接面的半導體具有N型導電性。
  25. 如請求項18所述之光感測器,其中,該石墨烯-半導體異質接面的半導體具有P型導電性。
  26. 如請求項24所述之光感測器,其中,該光感測器還包括一基板與一感測電路,其中,該石墨烯-半導體異質接面層疊設置在該基板上並直接設置在該感測電路上。
  27. 如請求項24所述之光感測器,其中,該光感測器還包括一基板與一感測 電路,其中,該石墨烯-半導體異質接面層疊設置在該基板上,且與該感測電路相鄰設置。
  28. 如請求項25所述之光感測器,其中,該光感測器還包括一基板與一感測電路,其中,該石墨烯-半導體異質接面層疊設置在該基板上並直接設置在該感測電路上。
  29. 如請求項25所述之光感測器,其中,該光感測器還包括一基板與一感測電路,其中,該石墨烯-半導體異質接面層疊設置在該基板上,且與該感測電路相鄰設置。
  30. 一種光感測器,包括:一光電二極體,該光電二極體具有一第一端與一第二端;以及一運算放大器,其包括一非反向輸入端、一反向輸入端及一輸出端;其中,該光電二極體的該第一端與該運算放大器的非反向輸入端連接,該光電二極體的該第二端連接一參考電壓源;且該運算放大器的該反向輸入端與該輸出端連接;該光電二極體是石墨烯-半導體異質接面。
  31. 如請求項30所述之光感測器,其中,該光電二極體的該第一端為陽極,該光電二極體的該第二端為陰極。
  32. 如請求項30所述之光感測器,其中,該光電二極體的該第一端為陰極,該光電二極體的該第二端為陽極。
  33. 如請求項30所述之光感測器,其中,該參考電壓源為地電壓或定電壓源。
  34. 如請求項30所述之光感測器,其中,該光電二極體的該陽極為異質接面的石墨烯側,該異質接面的半導體具有N型導電性。
  35. 如請求項30所述之光感測器,其中,該光電二極體的該陽極為異質接面的半導體側,該異質接面的半導體具有P型導電性。
  36. 如請求項34所述之光感測器,其中,該光感測器還包括一基板與一感測 電路,其中,該石墨烯-半導體異質接面層疊設置在該基板上並直接設置在該感測電路上。
  37. 如請求項34所述之光感測器,其中,該光感測器還包括一基板與一感測電路,其中,該石墨烯-半導體異質接面層疊設置在該基板上,且與該感測電路相鄰設置。
  38. 如請求項35所述之光感測器,其中,該光感測器還包括一基板與一感測電路,其中,該石墨烯-半導體異質接面層疊設置在該基板上並直接設置在該感測電路上。
  39. 如請求項35所述之光感測器,其中,該光感測器還包括一基板與一感測電路,其中,該石墨烯-半導體異質接面層疊設置在該基板上,且與該感測電路相鄰設置。
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