TWI602233B - Method for thinning a wafer and device thereof - Google Patents
Method for thinning a wafer and device thereof Download PDFInfo
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- TWI602233B TWI602233B TW105142541A TW105142541A TWI602233B TW I602233 B TWI602233 B TW I602233B TW 105142541 A TW105142541 A TW 105142541A TW 105142541 A TW105142541 A TW 105142541A TW I602233 B TWI602233 B TW I602233B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/02008—Multistep processes
- H01L21/0201—Specific process step
- H01L21/02016—Backside treatment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/02035—Shaping
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
Description
本發明係關於微電子技術領域，尤其係關於一種晶圓薄化方法及裝置。 The present invention relates to the field of microelectronics, and more particularly to a wafer thinning method and apparatus.
隨著記憶體和功率裝置等應用朝著更小尺寸、更高性能的方向發展，對薄晶圓的需求也日益增長。更薄的晶圓能夠帶來眾多好處，包括超薄的封裝，以及由此帶來更小的尺寸外形，還包括改善的電氣性能和更好的散熱性能。目前最常見的半導體應用薄化方式為磨削。TAIKO法是由迪思科科技有限公司開發的晶圓背面磨削技術，這項技術和以往的背面磨削不同，在對晶片進行磨削時，將保留晶片週邊的邊緣部分，只對圓內進行磨削薄型化。這種在晶圓週邊留邊的TAIKO晶圓在功率裝置和BSI型CMOS圖像感測器中有重要應用。 As applications such as memory and power devices move toward smaller sizes and higher performance, the demand for thin wafers is growing. Thinner wafers offer a number of benefits, including ultra-thin packages, and the resulting smaller form factor, including improved electrical performance and better thermal performance. The most common thinning method for semiconductor applications today is grinding. The TAIKO method is a wafer back grinding technology developed by Di Cisco Technology Co., Ltd. This technology is different from the conventional back grinding. When the wafer is ground, the edge portion of the wafer periphery is retained, and only the inside of the circle is performed. Grinding is thinner. This TAIKO wafer with a peripheral edge around the wafer has important applications in power devices and BSI-type CMOS image sensors.
TAIKO法需要特別精細的研磨工具，例如專利文獻JP2007173487A所記載的裝置，這使得TAIKO法的加工成本高昂。此外，在IC頂層結構的製造步驟中，由機械研磨引發的應力會造成晶圓的破裂，例如功率裝置需要覆蓋大約5μm厚的聚醯亞胺，在晶圓減薄至100μm時幾乎都會出現破裂。專利文獻JP2007335659A提供了採用濕式薄化製作TAIKO晶圓的方法，然而該方法需要的步驟較多，操作繁瑣。 The TAIKO method requires a particularly fine grinding tool, such as the one described in the patent document JP2007173487A, which makes the processing of the TAIKO method expensive. In addition, in the manufacturing steps of the IC top layer structure, stress caused by mechanical polishing may cause cracking of the wafer. For example, the power device needs to cover about 5 μm thick polyimide, and almost all cracks occur when the wafer is thinned to 100 μm. . Patent document JP2007335659A provides a method of fabricating a TAIKO wafer by wet thinning, however, the method requires many steps and is cumbersome to operate.
因此，實有必要尋求一種可減少晶圓破損、操作簡單、成本較低的晶圓薄化方法，以獲得所需的TAIKO晶圓。 Therefore, it is necessary to find a wafer thinning method that can reduce wafer damage, simple operation, and low cost to obtain the required TAIKO wafer.
鑒於以上所述現有技術，本發明的目的在於提供一種晶圓薄化方法及裝置，用於解決現有技術中製作TAIKO晶圓時易造成晶圓破損、方法複雜、成本高等的問題。 In view of the above-mentioned prior art, an object of the present invention is to provide a wafer thinning method and apparatus for solving the problems of wafer damage, complicated methods, and high cost when manufacturing TAIKO wafers in the prior art.
為實現上述目的及其他相關目的，本發明提供一種晶圓薄化方法，包括如下步驟：提供一晶圓，所述晶圓包括正面和背面，所述正面形成有IC裸芯；將所述晶圓正面朝下放入乾式蝕刻腔體中，利用密封環遮擋所述晶圓的週邊邊緣，僅露出需要薄化的晶圓背面的中心區域；通入蝕刻氣體ClF3對所述晶圓背面的中心區域進行乾式蝕刻至預設厚度，得到薄化的晶圓。 To achieve the above and other related objects, the present invention provides a wafer thinning method comprising the steps of: providing a wafer comprising a front side and a back side, wherein the front side is formed with an IC bare core; The circular face is placed face down in the dry etching cavity, and the peripheral edge of the wafer is blocked by the sealing ring to expose only the central region of the back surface of the wafer to be thinned; the center of the back surface of the wafer is etched with an etching gas ClF3 The area is dry etched to a predetermined thickness to obtain a thinned wafer.
較佳地，在被所述密封環遮擋的空間中通入邊緣保護氣體保護所述晶圓的週邊邊緣。 Preferably, an edge guard gas is introduced into the space blocked by the seal ring to protect the peripheral edge of the wafer.
更佳地，所述邊緣保護氣體為情性氣體。 More preferably, the edge shielding gas is an inert gas.
更佳地，所述邊緣保護氣體為選自H2、He、Ar、N2的一種或多種。 More preferably, the edge shielding gas is one or more selected from the group consisting of H 2 , He, Ar, and N 2 .
更佳地，所述邊緣保護氣體從所述晶圓下方通入被所述密封環遮擋的空間。 More preferably, the edge shielding gas passes from below the wafer into a space that is blocked by the sealing ring.
較佳地，進行乾式蝕刻時，通入的載氣為選自H2、He、Ar、N2的一種或多種。 Preferably, when the dry etching is performed, the carrier gas that is introduced is one or more selected from the group consisting of H 2 , He, Ar, and N 2 .
較佳地，進行乾式蝕刻時，所述乾式蝕刻腔體內壓力強度為500-1000托爾(Torr)。 Preferably, in the dry etching, the dry etching chamber has a pressure intensity of 500 to 1000 Torr.
較佳地，進行乾式蝕刻時，加熱所述晶圓。 Preferably, the wafer is heated during dry etching.
更佳地，將所述晶圓從室溫加熱至450℃。 More preferably, the wafer is heated from room temperature to 450 °C.
為實現上述目的及其他相關目的，本發明還提供一種晶圓薄化裝置，包括：乾式蝕刻腔體；晶圓加熱台，位於所述乾式蝕刻腔體內；密封環，安裝於所述乾式蝕刻腔體內，套於所述晶圓加熱台的週邊；所述密封環的頂部高於所述晶圓加熱台並遮擋所述晶圓加熱台的週邊邊緣，在所述密封環與所述晶圓加熱台之間形成一定空間；蝕刻氣體通入口，位於所述晶圓加熱台的上方。 To achieve the above and other related objects, the present invention further provides a wafer thinning apparatus comprising: a dry etching chamber; a wafer heating stage located in the dry etching chamber; and a sealing ring mounted on the dry etching chamber The body is sleeved around the periphery of the wafer heating stage; the top of the sealing ring is higher than the wafer heating stage and blocks the peripheral edge of the wafer heating stage, and the sealing ring and the wafer are heated A space is formed between the stages; an etching gas inlet is located above the wafer heating stage.
較佳地，所述晶圓薄化裝置包括邊緣保護氣體通入口，所述邊緣保護氣體通入口位於所述密封環的下部與所述晶圓加熱台之間。 Preferably, the wafer thinning device includes an edge shielding gas inlet, and the edge shielding gas inlet is located between the lower portion of the sealing ring and the wafer heating stage.
較佳地，所述晶圓薄化裝置包括節流閥，所述節流閥位於所述乾式蝕刻腔體底部。 Preferably, the wafer thinning device comprises a throttle valve, the throttle valve being located at the bottom of the dry etching chamber.
較佳地，所述晶圓薄化裝置包括氣體擴散板，所述氣體擴散板位於所述蝕刻氣體通入口與所述晶圓加熱台之間。 Preferably, the wafer thinning device comprises a gas diffusion plate located between the etching gas inlet and the wafer heating station.
如上所述，本發明的晶圓薄化方法及裝置，具有以下優點：本發明利用ClF3乾式蝕刻進行晶圓背面中心區域的薄化，並利用密封環遮擋晶圓的週邊邊緣，結合邊緣保護氣體，保護晶圓的週邊邊緣，從而可制得在晶圓週邊留邊的TAIKO晶圓。本發明避免了機械研磨對 晶圓造成的損傷，藉由增設密封環和邊緣保護氣體，可以對晶圓背面的中心區域進行高速率的乾式蝕刻，相對於習知TAIKO法，本發明簡化了方法步驟，降低了生產成本，提高了產品良率。 As described above, the wafer thinning method and apparatus of the present invention have the following advantages: the present invention utilizes ClF 3 dry etching to thin the central region of the wafer back surface, and shields the peripheral edge of the wafer with a sealing ring, and combines edge protection. The gas protects the peripheral edge of the wafer, allowing TAIKO wafers to be left around the wafer. The invention avoids damage to the wafer caused by mechanical polishing. By adding a sealing ring and an edge shielding gas, a high-rate dry etching of the central region of the back surface of the wafer can be performed, and the method simplifies the method compared with the conventional TAIKO method. The steps reduce production costs and increase product yield.
S1~S3‧‧‧步驟 S1~S3‧‧‧ steps
1‧‧‧乾式蝕刻腔體 1‧‧‧ dry etching chamber
2‧‧‧晶圓加熱台 2‧‧‧ Wafer heating station
3‧‧‧密封環 3‧‧‧Seal ring
4‧‧‧蝕刻氣體通入口 4‧‧‧etching gas inlet
5‧‧‧邊緣保護氣體通入口 5‧‧‧Edge protection gas inlet
6‧‧‧節流閥 6‧‧‧ throttle valve
7‧‧‧氣體擴散板 7‧‧‧ gas diffusion plate
第1圖為本發明實施例提供的晶圓薄化方法的示意圖。 FIG. 1 is a schematic diagram of a wafer thinning method according to an embodiment of the present invention.
第2圖為本發明實施例提供的晶圓薄化裝置的示意圖。 FIG. 2 is a schematic diagram of a wafer thinning apparatus according to an embodiment of the present invention.
以下結合圖式和具體實施例對本發明進一步詳細說明。根據本案說明書及申請專利範圍，本發明的優點及特徵將更清楚。需說明的是，圖式均採用非常簡化的形式，且均使用非精準的比例，僅用以方便、明晰地輔助說明本發明實施例的目的。 The invention is further described in detail below in conjunction with the drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the description and claims. It should be noted that the drawings are all in a very simplified form, and both use non-precise proportions, and are only for convenience and clarity to assist the purpose of the embodiments of the present invention.
請參閱第1圖，本發明實施例提供一種晶圓薄化方法，包括如下步驟：S1提供一晶圓，所述晶圓包括正面和背面，所述正面形成有IC裸芯；S2將所述晶圓正面朝下放入乾式蝕刻腔體中，利用密封環遮擋所述晶圓的週邊邊緣，僅露出需要薄化的晶圓背面的中心區域；S3通入蝕刻氣體ClF3對所述晶圓背面的中心區域進行乾式蝕刻至預設厚度，得到薄化的晶圓。 Referring to FIG. 1 , an embodiment of the present invention provides a wafer thinning method, including the steps of: S1 providing a wafer, the wafer includes a front side and a back side, the front side is formed with an IC bare core; The wafer is placed face down in the dry etching cavity, and the peripheral edge of the wafer is blocked by the sealing ring to expose only the central region of the back surface of the wafer to be thinned; S3 is etched into the wafer by the etching gas ClF 3 The center area of the back side is dry etched to a predetermined thickness to obtain a thinned wafer.
作為本發明的較佳方案，可以在被所述密封環遮擋的空間中通入邊緣保護氣體保護所述晶圓的週邊邊緣。具體地，所述邊緣保護氣體可以為惰性氣體。較佳地，所述邊緣保護氣體可以為H2、He、Ar、N2中的 一種或多種。較佳地，所述邊緣保護氣體從所述晶圓的下方通入被所述密封環遮擋的空間中。 As a preferred embodiment of the present invention, the peripheral edge of the wafer can be protected by passing an edge shielding gas into the space blocked by the sealing ring. Specifically, the edge shielding gas may be an inert gas. Preferably, the edge shielding gas may be one or more of H 2 , He, Ar, N 2 . Preferably, the edge shielding gas passes from below the wafer into a space blocked by the sealing ring.
具體地，進行乾式蝕刻時，通入的載氣可以為H2、He、Ar、N2中的一種或多種；所述乾式蝕刻腔體內的壓力強度可以為500-1000托爾(Torr)。具體地，在進行乾式蝕刻時，可以加熱所述晶圓，例如，將所述晶圓從室溫加熱至450℃。 Specifically, when dry etching is performed, the carrier gas that is introduced may be one or more of H 2 , He, Ar, and N 2 ; and the pressure in the dry etching chamber may be 500-1000 torr (Torr). Specifically, the wafer may be heated during dry etching, for example, by heating the wafer from room temperature to 450 °C.
本方法利用ClF3乾式蝕刻進行晶圓背面中心區域的減薄，並利用密封環遮擋晶圓的週邊邊緣，結合邊緣保護氣體，保護晶圓的週邊邊緣，從而可制得在晶圓週邊留邊的TAIKO晶圓。 The method utilizes ClF 3 dry etching to reduce the central area of the back surface of the wafer, and shields the peripheral edge of the wafer with a sealing ring, and combines the edge shielding gas to protect the peripheral edge of the wafer, thereby obtaining a periphery around the wafer. TAIKO wafers.
請參閱第2圖，本發明實施例還提供一種晶圓薄化裝置，包括：乾式蝕刻腔體1、晶圓加熱台2、密封環3和蝕刻氣體通入口4。其中，晶圓加熱台2位於所述乾式蝕刻腔體1內；密封環3安裝於所述乾式蝕刻腔體1內，並套於所述晶圓加熱台2的週邊；所述密封環3的頂部高於所述晶圓加熱台2並遮擋所述晶圓加熱台2的週邊邊緣，在所述密封環3與所述晶圓加熱台2之間形成有一定空間；蝕刻氣體通入口4位於所述晶圓加熱台2的上方。 Referring to FIG. 2, an embodiment of the present invention further provides a wafer thinning apparatus, including: a dry etching chamber 1, a wafer heating stage 2, a sealing ring 3, and an etching gas inlet 4. The wafer heating stage 2 is located in the dry etching chamber 1; the sealing ring 3 is mounted in the dry etching chamber 1 and is sleeved around the periphery of the wafer heating stage 2; The top is higher than the wafer heating stage 2 and blocks the peripheral edge of the wafer heating stage 2, and a space is formed between the sealing ring 3 and the wafer heating stage 2; the etching gas inlet 4 is located Above the wafer heating stage 2.
作為本發明的較佳方案，所述晶圓薄化裝置還包括邊緣保護氣體通入口5，所述邊緣保護氣體通入口5位於所述密封環3的下部與所述晶圓加熱台2之間。 As a preferred embodiment of the present invention, the wafer thinning device further includes an edge shielding gas inlet 5, and the edge shielding gas inlet 5 is located between the lower portion of the sealing ring 3 and the wafer heating stage 2 .
具體地，所述晶圓薄化裝置還包括節流閥6，所述節流閥6位於所述乾式蝕刻腔體1底部，所述節流閥6可排出所述乾式蝕刻腔體1內的氣體，用於控制所述乾式蝕刻腔體1內的氣壓。 Specifically, the wafer thinning device further includes a throttle valve 6 located at the bottom of the dry etching chamber 1 , and the throttle valve 6 can be discharged from the dry etching chamber 1 A gas for controlling the gas pressure in the dry etching chamber 1.
較佳地，所述晶圓薄化裝置還包括氣體擴散板7，所述氣體擴散板7位於所述蝕刻氣體通入口4與所述晶圓加熱台2之間，用於使所述蝕刻氣體通入口4引入的蝕刻氣體擴散均勻，有利於均勻刻蝕，得到較佳的刻蝕表面。氣體擴散板7可以包括多個導流孔或者多個導流槽，或其他用於擴散氣流的結構。 Preferably, the wafer thinning device further includes a gas diffusion plate 7 between the etching gas inlet 4 and the wafer heating stage 2 for making the etching gas The etching gas introduced through the inlet 4 is uniformly diffused, which facilitates uniform etching and obtains a preferred etching surface. The gas diffusion plate 7 may include a plurality of flow guiding holes or a plurality of flow guiding grooves, or other structures for diffusing the gas flow.
採用本晶圓薄化裝置可以實現本發明的晶圓薄化方法。其中，所述密封環3作為配件安裝於所述乾式蝕刻腔體1內，可採用固定機構固定位置，可以取出更換。可以根據實際需要的TAIKO晶圓結構來設計和加工不同形狀和尺寸的密封環3。例如，可以配備不同邊緣尺寸的密封環用以製備對應邊緣尺寸的TAIKO晶圓。此外，所述晶圓加熱台2的高度可調，加工不同厚度的晶圓時，可以通過調整晶圓加熱台的高度來調整適應。 The wafer thinning method of the present invention can be realized by the present wafer thinning device. The sealing ring 3 is mounted as an accessory in the dry etching chamber 1 and can be fixed by a fixing mechanism, and can be taken out and replaced. The seal ring 3 of different shapes and sizes can be designed and processed according to the TAIKO wafer structure that is actually needed. For example, seal rings of different edge sizes can be provided to prepare TAIKO wafers of corresponding edge dimensions. In addition, the height of the wafer heating stage 2 is adjustable, and when processing wafers of different thicknesses, the height of the wafer heating stage can be adjusted to adjust.
以下以具體的實例來詳細說明本發明的技術方案。 The technical solutions of the present invention will be described in detail below with specific examples.
首先，提供一片需要薄化處理的晶圓。通常是矽晶圓。在晶圓的正面形成有IC裸芯。 First, a wafer that requires thinning is provided. Usually it is a germanium wafer. An IC die is formed on the front side of the wafer.
然後，將該晶圓放入上述晶圓薄化裝置的乾式蝕刻腔體1內，使該晶圓的正面朝下放置在晶圓加熱台2上。實際操作中，可將晶圓放置在晶圓加熱台2上的特定位置，並保持晶圓的位置不變動，例如，可以採用靜電吸盤、真空吸盤或其他適合的固定機構固定。 Then, the wafer is placed in the dry etching chamber 1 of the wafer thinning device, and the wafer is placed face down on the wafer heating stage 2. In practice, the wafer can be placed at a specific location on the wafer heating stage 2, and the position of the wafer is kept unchanged, for example, by electrostatic chucks, vacuum chucks, or other suitable securing mechanisms.
接下來選取結構尺寸符合實際需要的密封環3，例如具有特定邊緣尺寸的密封環3，將其安裝在乾式蝕刻腔體1內，卡套在所述晶圓加熱台2的週邊，使密封環3遮擋所述晶圓的週邊邊緣，僅露出需要薄化的晶圓背面的中心區域。 Next, a sealing ring 3 having a structural size that meets actual needs is selected, for example, a sealing ring 3 having a specific edge size, which is mounted in the dry etching chamber 1 and is sleeved around the periphery of the wafer heating stage 2 to make a sealing ring. 3 occluding the peripheral edge of the wafer, exposing only the central area of the back side of the wafer that needs to be thinned.
具體放置晶圓時，先將密封環3抬升，放置好晶圓後，再將密封環降下安裝固定。 When placing the wafer specifically, first lift the sealing ring 3, place the wafer, and then lower the sealing ring to fix it.
此時，所述密封環3與所述晶圓加熱台2之間留有一定空間，需要保護的晶圓邊緣位於該空間內。為了更好的保護需要保留的晶圓週邊邊緣，可在該空間內通入邊緣保護氣體，使乾式蝕刻過程中沒有蝕刻氣體進入反應。在密封環的限制和邊緣保護氣體的保護下，僅有需要薄化的晶圓背面的中心區域被刻蝕減薄。本實施例中，邊緣保護氣體通過邊緣保護氣體通入口5引入，邊緣保護氣體通入口5位於密封環3的下部與晶圓加熱台2之間，這樣邊緣保護氣體從所述晶圓的下方通入被所述密封環圍成的空間中，從下往上的保護氣流可以有效防止蝕刻氣體進入該空間。 At this time, a space is left between the seal ring 3 and the wafer heating stage 2, and the edge of the wafer to be protected is located in the space. In order to better protect the peripheral edge of the wafer that needs to be retained, an edge shielding gas can be introduced into the space so that no etching gas enters the reaction during the dry etching process. Under the restriction of the seal ring and the protection of the edge shielding gas, only the central region of the back surface of the wafer that needs to be thinned is etched and thinned. In this embodiment, the edge shielding gas is introduced through the edge shielding gas inlet 5, and the edge shielding gas inlet 5 is located between the lower portion of the sealing ring 3 and the wafer heating stage 2, so that the edge shielding gas passes from the lower side of the wafer. In the space enclosed by the seal ring, the protective gas flow from the bottom to the top can effectively prevent the etching gas from entering the space.
裝置調整好後，即可通入蝕刻氣體ClF3對所述晶圓背面的中心區域進行乾式蝕刻，蝕刻至預設厚度停止，即可得到薄化的晶圓。利用ClF3氣體可以對晶圓進行高速率的刻蝕，加快薄化處理的時間。蝕刻氣體ClF3可以從位於晶圓加熱台2上方的蝕刻氣體通入口4引入。載氣可以為H2、He、Ar、N2中的一種或多種，本實施例中，載氣也從晶圓加熱台2的上方引入。這樣乾式蝕刻腔體1內的蝕刻氣體從上往下流動。蝕刻氣體往下通入後，可以經由氣體擴散板7擴散均勻後與晶圓反應，從而可得到表面狀況較佳的刻蝕面。 After the device is adjusted, the central region of the back surface of the wafer can be dry etched by etching gas ClF3, and etched to a predetermined thickness to stop, thereby obtaining a thinned wafer. With the use of ClF 3 gas, the wafer can be etched at a high rate to speed up the thinning process. The etching gas ClF 3 can be introduced from the etching gas inlet 4 located above the wafer heating stage 2. The carrier gas may be one or more of H 2 , He, Ar, and N 2 . In the present embodiment, the carrier gas is also introduced from above the wafer heating stage 2 . Thus, the etching gas in the dry etching chamber 1 flows from the top to the bottom. After the etching gas is introduced downward, it can be uniformly diffused through the gas diffusion plate 7 and then reacted with the wafer, whereby an etched surface having a better surface condition can be obtained.
在乾式蝕刻過程中，乾式蝕刻腔體1內的壓力強度可以利用位於所述乾式蝕刻腔體1底部的節流閥6控制在500-1000托爾(Torr)之間。晶圓通過晶圓加熱台2進行加熱，本實施例中，將所述晶圓從室溫加熱至450℃。 In the dry etching process, the pressure intensity in the dry etching chamber 1 can be controlled between 500 and 1000 Torr by means of a throttle valve 6 located at the bottom of the dry etching chamber 1. The wafer is heated by the wafer heating stage 2, and in this embodiment, the wafer is heated from room temperature to 450 °C.
最終得到的薄化的晶圓可作為TAIKO晶圓應用到功率裝置和BSI型CMOS圖像感測器中，其背面中心區域被均勻減薄至預設厚度，週邊邊緣保留了原有厚度。 The resulting thinned wafer can be applied as a TAIKO wafer to power devices and BSI-type CMOS image sensors. The back center area is evenly thinned to a preset thickness, and the peripheral edges retain their original thickness.
綜上所述，本發明利用ClF3乾式蝕刻進行晶圓背面中心區域的薄化，並利用密封環遮擋晶圓的週邊邊緣，結合邊緣保護氣體，保護晶圓的週邊邊緣，從而可制得在晶圓週邊留邊的TAIKO晶圓。本發明避免了機械研磨對晶圓造成的損傷，藉由增設密封環和邊緣保護氣體，可以對晶圓背面的中心區域進行高速率的乾式蝕刻，相對於習知TAIKO方法，本發明簡化了方法步驟，降低了生產成本，提高了產品良率。所以，本發明有效克服了習知技術中的種種缺點而具高度產業利用價值。 In summary, the present invention utilizes ClF 3 dry etching to thin the central region of the back surface of the wafer, and uses a sealing ring to block the peripheral edge of the wafer, and combines the edge shielding gas to protect the peripheral edge of the wafer, thereby making it possible to A TAIKO wafer with a peripheral edge around the wafer. The invention avoids damage to the wafer caused by mechanical polishing. By adding a sealing ring and an edge shielding gas, a high-rate dry etching of the central region of the back surface of the wafer can be performed, and the method simplifies the method compared with the conventional TAIKO method. The steps reduce production costs and increase product yield. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has high industrial utilization value.
上述特定實施例之內容係為了詳細說明本發明，然而，該等實施例係僅用於說明，並非意欲限制本發明。熟習本領域之技藝者可理解，在不悖離後附申請專利範圍所界定之範疇下針對本發明所進行之各種變化或修改係落入本發明之一部分。 The above description of the specific embodiments is intended to be illustrative of the invention, and is not intended to limit the invention. It will be understood by those skilled in the art that various changes or modifications may be made to the present invention without departing from the scope of the appended claims.
S1~S3‧‧‧步驟 S1~S3‧‧‧ steps
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| CN110211870B (en) * | 2019-06-18 | 2021-08-13 | 北京北方华创微电子装备有限公司 | Wafer thinning method |
| CN111446163A (en) * | 2020-03-27 | 2020-07-24 | 绍兴同芯成集成电路有限公司 | Wafer with edge stepped/gentle slope type protection ring and manufacturing method thereof |
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