TWI592727B - Pixel structure and driving method - Google Patents

Pixel structure and driving method Download PDF

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TWI592727B
TWI592727B TW106103030A TW106103030A TWI592727B TW I592727 B TWI592727 B TW I592727B TW 106103030 A TW106103030 A TW 106103030A TW 106103030 A TW106103030 A TW 106103030A TW I592727 B TWI592727 B TW I592727B
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switching element
pixel
electrically coupled
electrode
data line
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TW106103030A
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TW201827907A (en
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紀佑旻
羅怡頡
蘇松宇
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友達光電股份有限公司
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Priority to CN201710223401.7A priority patent/CN106842658B/en
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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/13306Circuit arrangements or driving methods for the control of single liquid crystal cells

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Liquid Crystal (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Description

畫素結構與驅動方法 Pixel structure and driving method

本揭示內容是一種顯示技術,且特別是有關於一種畫素結構與驅動方法。 The present disclosure is a display technology, and in particular, relates to a pixel structure and driving method.

於液晶顯示器的防窺技術中,施加固定電壓在濾光片電極,其與畫素電極之間形成垂直電場以改變液晶角度,因此達到窄視角的顯示效果。然而,當施加固定電壓於每列濾光片電極時,由於畫素逐條掃描的緣故,顯示器內每列畫素的寫入資料的時間不同,使得亮度積分時間不同,造成顯示畫面亮度不均的問題。 In the anti-spying technology of the liquid crystal display, a fixed voltage is applied to the filter electrode, and a vertical electric field is formed between the pixel electrode and the pixel electrode to change the liquid crystal angle, thereby achieving a narrow viewing angle display effect. However, when a fixed voltage is applied to each column of the filter electrodes, the time for writing data of each column of pixels in the display is different due to the one-by-one scanning of the pixels, so that the brightness integration time is different, resulting in uneven brightness of the display screen. The problem.

本揭示內容之一態樣是一種畫素結構,其包含第一閘極線、第一資料線、第二資料線、第一畫素單元與對向電極。第一閘極線沿第一方向延伸,第一資料線、第二資料線沿第二方向延伸,第二方向不同於第一方向。第一畫素單元設置於第一閘極線、第一資料線與第二資料線之間,第一畫素單元包含第一畫素電極、第一共用電極、 第一開關元件與第二開關元件。第一共用電極與第一畫素電極相對設置,對向電極與第一畫素電極相對設置。第一開關元件具有控制端、第一端以及第二端。第一開關元件之控制端電性耦接第一閘極線,第一開關元件之第一端電性耦接第一資料線,第一開關元件之第二端電性耦接第一畫素電極。第二開關元件具有控制端、第一端以及第二端。第二開關元件之第一端電性耦接第二資料線,第二開關元件之第二端電性耦接第一共用電極。 One aspect of the present disclosure is a pixel structure including a first gate line, a first data line, a second data line, a first pixel unit, and a counter electrode. The first gate line extends in the first direction, and the first data line and the second data line extend in the second direction, and the second direction is different from the first direction. The first pixel unit is disposed between the first gate line, the first data line and the second data line, and the first pixel unit includes a first pixel electrode, a first common electrode, and a first switching element and a second switching element. The first common electrode is disposed opposite to the first pixel electrode, and the opposite electrode is disposed opposite to the first pixel electrode. The first switching element has a control end, a first end, and a second end. The first switching element is electrically coupled to the first gate line, the first end of the first switching element is electrically coupled to the first data line, and the second end of the first switching element is electrically coupled to the first pixel electrode. The second switching element has a control end, a first end, and a second end. The first end of the second switching element is electrically coupled to the second data line, and the second end of the second switching element is electrically coupled to the first common electrode.

本揭示內容之另一實施例是一種驅動方法,適用於畫素結構。畫素結構包含畫素單元與對向電極,畫素單元包含畫素電極、共用電極、第一開關元件與第二開關元件。驅動方法包含以下步驟。於第一期間,開啟第一開關元件以將第一訊號提供至畫素電極,並開啟第二開關元件以將第二訊號提供至共用電極,畫素結構之顯示模式為窄視角模式,其中對向電極位於固定電位。 Another embodiment of the present disclosure is a driving method suitable for a pixel structure. The pixel structure includes a pixel unit and a counter electrode, and the pixel unit includes a pixel electrode, a common electrode, a first switching element, and a second switching element. The driver method consists of the following steps. During the first period, the first switching element is turned on to provide the first signal to the pixel electrode, and the second switching element is turned on to provide the second signal to the common electrode, and the display mode of the pixel structure is a narrow viewing angle mode, wherein The electrode is at a fixed potential.

如此一來,本揭示內容可於窄視角模式中,透過畫素單元的畫素電極與共用電極同時切換極性以改善先前技術的畫素單元因積分時間不同而亮度不均的問題。此外,本揭示內容可整合於原畫素結構製程中,無須額外增設光罩,亦無須增加製程步驟,因此可在不增加製造成本的條件下有效地改善畫素結構於窄視角模式的顯示效果。 In this way, the present disclosure can simultaneously switch the polarity through the pixel electrode of the pixel unit and the common electrode in the narrow viewing angle mode to improve the brightness unevenness of the pixel unit of the prior art due to the difference in integration time. In addition, the present disclosure can be integrated into the original pixel structure process without additional masks and process steps, so that the display effect of the pixel structure in the narrow viewing angle mode can be effectively improved without increasing the manufacturing cost. .

以下將以實施方式對上述之說明作詳細的描述,並對本揭示內容之技術方案提供更進一步的解釋。 The above description will be described in detail in the following embodiments, and further explanation of the technical solutions of the present disclosure is provided.

100、200、300‧‧‧畫素結構 100, 200, 300‧‧‧ pixel structure

110~180、210~280、310~380‧‧‧畫素單元 110~180, 210~280, 310~380‧‧‧ pixel units

Gn、Gn-1~Gn+4‧‧‧閘極線 Gn, Gn-1~Gn+4‧‧‧ gate line

D1~D5‧‧‧資料線 D1~D5‧‧‧ data line

Tp1~Tp8、Tc1~Tc8‧‧‧開關元件 Tp1~Tp8, Tc1~Tc8‧‧‧ switching components

p1、c1‧‧‧第一端 P1, c1‧‧‧ first end

p2、c2‧‧‧第二端 P2, c2‧‧‧ second end

p3、c3‧‧‧控制端 P3, c3‧‧‧ control terminal

GND‧‧‧接地端 GND‧‧‧ ground terminal

R1‧‧‧第一方向 R1‧‧‧ first direction

R2‧‧‧第二方向 R2‧‧‧ second direction

410‧‧‧共用電極 410‧‧‧Common electrode

420‧‧‧畫素電極 420‧‧‧ pixel electrodes

430‧‧‧對向電極 430‧‧‧ opposite electrode

440‧‧‧液晶層 440‧‧‧Liquid layer

450‧‧‧絕緣層 450‧‧‧Insulation

E‧‧‧電場 E‧‧‧ electric field

T11、T12、T21、T22‧‧‧期間 During the period of T11, T12, T21 and T22‧‧

Sig11、Sig12、Sig21、Sig22、Sig3‧‧‧訊號 Sig11, Sig12, Sig21, Sig22, Sig3‧‧‧ signals

△V‧‧‧電位差 △V‧‧‧potential difference

為讓本揭示內容之上述和其他目的、特徵、優點與實施例能更明顯易懂,所附圖示之說明如下:第1圖係繪示本揭示內容一實施例之畫素結構之示意圖;第2圖係繪示本揭示內容一實施例之畫素結構之示意圖;第3圖係繪示本揭示內容一實施例之畫素結構之示意圖;第4圖係繪示本揭示內容一實施例之畫素結構之截面示意圖;以及第5圖係繪示本揭示內容一實施例之第一訊號與第二訊號之示意圖。 The above and other objects, features, advantages and embodiments of the present disclosure will become more apparent and understood. 2 is a schematic diagram showing a pixel structure of an embodiment of the present disclosure; FIG. 3 is a schematic diagram showing a pixel structure of an embodiment of the disclosure; FIG. 4 is a diagram showing an embodiment of the disclosure. A schematic cross-sectional view of a pixel structure; and FIG. 5 is a schematic diagram showing a first signal and a second signal in an embodiment of the present disclosure.

以下揭示提供許多不同實施例或例證用以實施本發明的特徵。本揭示在不同例證中可能重複引用數字符號且/或字母,這些重複皆為了簡化及闡述,其本身並未指定以下討論中不同實施例且/或配置之間的關係。 The following disclosure provides many different embodiments or features for carrying out the invention. The disclosure may repeatedly recite numerical symbols and/or letters in the various examples, which are for simplicity and elaboration, and do not in themselves specify the relationship between the various embodiments and/or configurations in the following discussion.

於實施方式與申請專利範圍中,除非內文中對於冠詞有所特別限定,否則「一」與「該」可泛指單一個或複數個。將進一步理解的是,本文中所使用之「包含」、「包括」、「具有」及相似詞彙,指明其所記載的特徵、區域、整數、步驟、操作、元件與/或組件,但不排除其所 述或額外的其一個或多個其它特徵、區域、整數、步驟、操作、元件、組件,與/或其中之群組。 In the scope of the embodiments and claims, "one" and "the" may mean a single or plural unless the context specifically dictates the articles. It will be further understood that the terms "comprising", "comprising", "comprising", and "the" Its place Or one or more of its other features, regions, integers, steps, operations, elements, components, and/or groups thereof.

當一元件被稱為「連接」或「耦接」至另一元件時,它可以為直接連接或耦接至另一元件,又或是其中有一額外元件存在。相對的,當一元件被稱為「直接連接」或「直接耦接」至另一元件時,其中是沒有額外元件存在。 When an element is referred to as being "connected" or "coupled" to another element, it can be either directly connected or coupled to the other element or an additional element. In contrast, when an element is referred to as being "directly connected" or "directly coupled" to another element, no additional element is present.

關於本文中所使用之「約」、「大約」或「大致約」一般通常係指數值之誤差或範圍約百分之二十以內,較好地是約百分之十以內,而更佳地則是約百分五之以內。文中若無明確說明,其所提及的數值皆視作為近似值,即如「約」、「大約」或「大致約」所表示的誤差或範圍。 As used herein, "about", "about" or "approximately" is generally within an error or range of about 20% of the index value, preferably within about 10%, and more preferably It is about five percent. Unless otherwise stated, the numerical values referred to are regarded as approximations, that is, the errors or ranges indicated by "about", "about" or "approximately".

請參考第1、4圖。第1圖係繪示本揭示內容一實施例之畫素結構100之示意圖。第4圖係繪示本揭示內容一實施例之畫素結構之截面示意圖。畫素結構100包含閘極線Gn-1~Gn+4、資料線D1~D5、畫素單元110~180與對向電極430。閘極線Gn-1~Gn+4沿第一方向R1延伸,資料線D1~D5沿第二方向R2延伸,而第二方向R2不同於第一方向R1。於一些實施例中,對向電極430(例如濾光片共用電極)為一整面的導電層(例如氧化銦錫(Indium tin oxide,ITO))。 Please refer to Figures 1 and 4. 1 is a schematic diagram of a pixel structure 100 in accordance with an embodiment of the present disclosure. Figure 4 is a cross-sectional view showing the pixel structure of an embodiment of the present disclosure. The pixel structure 100 includes gate lines Gn-1 to Gn+4, data lines D1 to D5, pixel units 110 to 180, and a counter electrode 430. The gate lines Gn-1 to Gn+4 extend in the first direction R1, the data lines D1 to D5 extend in the second direction R2, and the second direction R2 is different from the first direction R1. In some embodiments, the counter electrode 430 (eg, the filter common electrode) is a full-face conductive layer (eg, Indium Tin Oxide (ITO)).

須說明的是,如第1圖所示,開關單元Tp1~Tp8用以分別提供訊號至畫素單元110~180的畫素電極,開關單元Tc1~Tc8用以分別提供訊號至畫素單元110~180的共 用電極。畫素單元110、130、160、180的內部結構類似,以畫素單元110為例說明,畫素單元110設置於閘極線Gn、Gn+1與資料線D1、D2之間,並且包含畫素電極420、共用電極410、開關元件Tp1與開關元件Tc1。如第4圖所示,共用電極410與畫素電極420相對設置並且以絕緣層450相隔,對向電極430與畫素電極420相對設置並且以液晶層440相隔。開關元件Tp1具有控制端p3、第一端p1以及第二端p2,控制端p3電性耦接閘極線Gn,第一端p1電性耦接資料線D1,第二端p2電性耦接畫素電極420(畫素電極的電容如第1圖中耦接第二端p2與接地端GND之間的電容所示)以於閘極線Gn傳送致能訊號使開關元件Tp1開啟時將資料線D1的訊號傳送至畫素電極420。另一方面,開關元件Tc1具有控制端c3、第一端c1以及第二端c2,控制端c3電性耦接閘極線Gn+1,第一端c1電性耦接資料線D2,第二端c2電性耦接共用電極410(如第1圖中耦接第二端c2與接地端GND之間的電容)以於閘極線Gn+1傳送致能訊號使開關元件Tc1開啟時將資料線D2的訊號傳送至共用電極410。 It should be noted that, as shown in FIG. 1 , the switch units Tp1 to Tp8 are respectively used to provide the pixel electrodes of the signal to the pixel units 110 to 180, and the switch units Tc1 to Tc8 are respectively provided for the signal to the pixel unit 110~ 180 total Use an electrode. The internal structure of the pixel units 110, 130, 160, and 180 is similar. The pixel unit 110 is illustrated as an example. The pixel unit 110 is disposed between the gate lines Gn and Gn+1 and the data lines D1 and D2, and includes a picture. The element electrode 420, the common electrode 410, the switching element Tp1, and the switching element Tc1. As shown in FIG. 4, the common electrode 410 is disposed opposite to the pixel electrode 420 and separated by an insulating layer 450, and the opposite electrode 430 is disposed opposite to the pixel electrode 420 and separated by the liquid crystal layer 440. The switching element Tp1 has a control terminal p3, a first terminal p1 and a second terminal p2. The control terminal p3 is electrically coupled to the gate line Gn. The first terminal p1 is electrically coupled to the data line D1, and the second terminal p2 is electrically coupled. The pixel electrode 420 (the capacitance of the pixel electrode is coupled to the capacitance between the second terminal p2 and the ground GND as shown in FIG. 1), and the data is transmitted when the gate line Gn transmits the enable signal to turn on the switching element Tp1. The signal of line D1 is transmitted to the pixel electrode 420. On the other hand, the switching element Tc1 has a control terminal c3, a first terminal c1 and a second terminal c2. The control terminal c3 is electrically coupled to the gate line Gn+1. The first terminal c1 is electrically coupled to the data line D2, and the second The terminal c2 is electrically coupled to the common electrode 410 (such as the capacitor coupled between the second terminal c2 and the ground GND in FIG. 1) to transmit the enable signal when the gate line Gn+1 transmits the switching element Tc1. The signal of line D2 is transmitted to the common electrode 410.

如第4圖所示,畫素電極420位於對向電極430與共用電極410之間。於另一實施例中,畫素電極與共用電極的位置可互換,亦即共用電極420位於對向電極430與畫素電極410之間。 As shown in FIG. 4, the pixel electrode 420 is located between the counter electrode 430 and the common electrode 410. In another embodiment, the positions of the pixel electrodes and the common electrodes are interchangeable, that is, the common electrode 420 is located between the opposite electrode 430 and the pixel electrode 410.

以下說明鄰近畫素單元110、130、160、180的畫素單元120、140、150、170內部結構,畫素單元120、 140、150、170的內部結構類似,以畫素單元120為例說明,畫素單元120沿第一方向相鄰畫素單元110,畫素單元120設置於閘極線Gn、Gn+1與資料線D2、D3之間,並且包含畫素電極(截面結構類似畫素單元110的畫素電極420)、共用電極(截面結構類似畫素單元110的共用電極410)、開關元件Tp2與開關元件Tc2,共用電極與畫素電極相對設置。開關元件Tp2具有控制端p3、第一端p1以及第二端p2,控制端p3電性耦接閘極線Gn+1,第一端p1電性耦接資料線D3,第二端p2電性耦接畫素單元120的畫素電極以於閘極線Gn+1傳送致能訊號使開關元件Tp2開啟時將資料線D3的訊號傳送至畫素單元120的畫素電極。開關元件Tc2具有控制端c3、第一端c1以及第二端c2,控制端c3電性耦接閘極線Gn,第一端c1電性耦接資料線D2,第二端c2電性耦接畫素單元120的共用電極以於閘極線Gn傳送致能訊號使開關元件Tc2開啟時將資料線D2的訊號傳送至畫素單元120的共用電極。 The following describes the internal structure of the pixel units 120, 140, 150, 170 of the adjacent pixel units 110, 130, 160, 180, the pixel unit 120, The internal structure of 140, 150, and 170 is similar. Taking the pixel unit 120 as an example, the pixel unit 120 is adjacent to the pixel unit 110 in the first direction, and the pixel unit 120 is disposed on the gate line Gn, Gn+1 and the data. Between the lines D2 and D3, and including a pixel electrode (the pixel electrode 420 having a cross-sectional structure similar to the pixel unit 110), a common electrode (the common electrode 410 having a cross-sectional structure similar to the pixel unit 110), the switching element Tp2, and the switching element Tc2 The common electrode is disposed opposite to the pixel electrode. The switching element Tp2 has a control terminal p3, a first terminal p1 and a second terminal p2. The control terminal p3 is electrically coupled to the gate line Gn+1. The first terminal p1 is electrically coupled to the data line D3, and the second terminal p2 is electrically connected. The pixel electrode coupled to the pixel unit 120 transmits the signal of the data line D3 to the pixel electrode of the pixel unit 120 when the enable signal is transmitted on the gate line Gn+1 to turn on the switching element Tp2. The switching element Tc2 has a control end c3, a first end c1 and a second end c2. The control end c3 is electrically coupled to the gate line Gn. The first end c1 is electrically coupled to the data line D2, and the second end c2 is electrically coupled. The common electrode of the pixel unit 120 transmits the signal of the data line D2 to the common electrode of the pixel unit 120 when the enable signal is transmitted on the gate line Gn to turn on the switching element Tc2.

須說明的是,如第1圖所示,資料線D1耦接至開關單元Tp1、Tc5,因此資料線D1可於開關單元Tp1開啟期間(亦即閘極線Gn傳送致能訊號的期間)提供訊號至畫素單元110的畫素電極,並且於開關單元Tc5開啟期間(亦即閘極線Gn+2傳送致能訊號的期間)提供訊號至畫素單元150的共用電極。資料線D2~D5亦同,此處不再重複敘述。 It should be noted that, as shown in FIG. 1 , the data line D1 is coupled to the switch units Tp1 and Tc5 , so that the data line D1 can be provided during the period in which the switch unit Tp1 is turned on (that is, during the period in which the gate line Gn transmits the enable signal). The signal is connected to the pixel electrode of the pixel unit 110, and the signal is supplied to the common electrode of the pixel unit 150 during the period in which the switching unit Tc5 is turned on (that is, the period during which the gate line Gn+2 transmits the enable signal). The data lines D2 to D5 are also the same and will not be repeated here.

為了說明畫素單元的不同配置,請參考第2圖。如第2圖所示,畫素結構200內,畫素單元210、230、 250、270的內部結構類似於第1圖的畫素單元110,畫素單元220、240、260、280的內部結構類似於第1圖的畫素單元120。簡言之,沿著第二方向R2,第1圖內相鄰畫素單元110的是不同內部結構的畫素單元150,而第2圖內相鄰畫素單元210的是相同內部結構的畫素單元250。具體而言,畫素單元150的開關單元Tp5、Tc5連接方式不同於畫素單元250的開關單元Tp5、Tc5。如第1圖所示,設置於閘極線Gn+2、Gn+2、資料線D1、D2之間的畫素單元150中,開關元件Tp5具有控制端p3、第一端p1以及第二端p2,開關元件Tp5之控制端p3電性耦接閘極線Gn+3,開關元件Tp5之第一端p1電性耦接資料線D2,開關元件Tp5之第二端p2電性耦接畫素單元150的畫素電極(截面結構類似畫素單元110的畫素電極420)以於閘極線Gn+3傳送致能訊號使開關元件Tp5開啟時將資料線D2的訊號傳送至畫素單元150的畫素電極。開關元件Tc5具有控制端c3、第一端c1以及第二端c2,開關元件Tc5之控制端c3電性耦接閘極線Gn+2,開關元件Tc5之第一端c1電性耦接資料線D1,開關元件Tc5之第二端c2電性耦接畫素單元150的共用電極(截面結構類似畫素單元110的共用電極410)以於閘極線Gn+2傳送致能訊號使開關元件Tc5開啟時將資料線D1的訊號傳送至畫素單元150的共用電極。 To illustrate the different configurations of the pixel units, please refer to Figure 2. As shown in FIG. 2, within the pixel structure 200, the pixel units 210, 230, The internal structure of 250, 270 is similar to the pixel unit 110 of Fig. 1, and the internal structure of the pixel units 220, 240, 260, 280 is similar to the pixel unit 120 of Fig. 1. In short, along the second direction R2, the adjacent pixel units 110 in the first figure are the pixel units 150 of different internal structures, and the adjacent pixel units 210 in the second figure are the same internal structure. Element unit 250. Specifically, the switching units Tp5, Tc5 of the pixel unit 150 are connected in a different manner from the switching units Tp5, Tc5 of the pixel unit 250. As shown in FIG. 1, in the pixel unit 150 disposed between the gate lines Gn+2, Gn+2 and the data lines D1 and D2, the switching element Tp5 has a control terminal p3, a first terminal p1, and a second terminal. P2, the control terminal p3 of the switching element Tp5 is electrically coupled to the gate line Gn+3, the first end p1 of the switching element Tp5 is electrically coupled to the data line D2, and the second end p2 of the switching element Tp5 is electrically coupled to the pixel The pixel electrode of the unit 150 (the cross-sectional structure is similar to the pixel electrode 420 of the pixel unit 110) transmits the signal of the data line D2 to the pixel unit 150 when the enable signal is transmitted on the gate line Gn+3 to turn on the switching element Tp5. The pixel electrode. The switching element Tc5 has a control terminal c3, a first terminal c1 and a second terminal c2. The control terminal c3 of the switching component Tc5 is electrically coupled to the gate line Gn+2, and the first end c1 of the switching component Tc5 is electrically coupled to the data line. D1, the second end c2 of the switching element Tc5 is electrically coupled to the common electrode of the pixel unit 150 (the cross-sectional structure is similar to the common electrode 410 of the pixel unit 110) to transmit the enable signal to the gate line Gn+2 so that the switching element Tc5 When turned on, the signal of the data line D1 is transmitted to the common electrode of the pixel unit 150.

另一方面,如第2圖所示,畫素單元250中,開關元件Tp5具有控制端p3、第一端p1以及第二端p2,開關元件Tp5之控制端p3電性耦接閘極線Gn+2,開關元件Tp5 之第一端p1電性耦接資料線D1,開關元件Tp5之第二端p2電性耦接畫素單元250的畫素電極(截面結構類似畫素單元110的畫素電極420)以於閘極線Gn+2傳送致能訊號使開關元件Tp5開啟時將資料線D1的訊號傳送至畫素單元250畫素電極。開關元件Tc5具有控制端c3、第一端c1以及第二端c2,開關元件Tc5之控制端c3電性耦接閘極線Gn+3,開關元件Tc5之第一端c1電性耦接資料線D2,開關元件Tc5之第二端c2電性耦接畫素單元250的共用電極(截面結構類似畫素單元110的共用電極410)以於閘極線Gn+3傳送致能訊號使開關元件Tc5開啟時將資料線D2的訊號傳送至畫素單元250共用電極。 On the other hand, as shown in FIG. 2, in the pixel unit 250, the switching element Tp5 has a control terminal p3, a first terminal p1 and a second terminal p2, and the control terminal p3 of the switching component Tp5 is electrically coupled to the gate line Gn. +2, switching element Tp5 The first end p1 is electrically coupled to the data line D1, and the second end p2 of the switching element Tp5 is electrically coupled to the pixel electrode of the pixel unit 250 (the cross-sectional structure is similar to the pixel electrode 420 of the pixel unit 110). The polarity line Gn+2 transmits the enable signal to transmit the signal of the data line D1 to the pixel element of the pixel unit 250 when the switching element Tp5 is turned on. The switching element Tc5 has a control terminal c3, a first terminal c1 and a second terminal c2. The control terminal c3 of the switching component Tc5 is electrically coupled to the gate line Gn+3, and the first end c1 of the switching component Tc5 is electrically coupled to the data line. D2, the second end c2 of the switching element Tc5 is electrically coupled to the common electrode of the pixel unit 250 (the cross-sectional structure is similar to the common electrode 410 of the pixel unit 110) to transmit the enable signal to the gate line Gn+3 so that the switching element Tc5 When turned on, the signal of the data line D2 is transmitted to the common electrode of the pixel unit 250.

為了說明具有不同內部結構的畫素單元,請參考第3圖。畫素結構300內,畫素單元310、330、350、370的內部結構類似,以畫素單元310為例說明。畫素單元310設置於閘極線Gn、Gn+1、資料線D1、D2之間。不同於畫素單元110,畫素單元310的開關元件Tc1的控制端c3電性耦接閘極線Gn。畫素單元310的開關元件Tp1、開關元件Tc1的其餘連接方式類似於畫素單元110的開關元件Tp1、開關元件Tc1,此處不再重複敘述。 To illustrate pixel units with different internal structures, please refer to Figure 3. In the pixel structure 300, the internal structures of the pixel units 310, 330, 350, and 370 are similar, and the pixel unit 310 is taken as an example for illustration. The pixel unit 310 is disposed between the gate lines Gn and Gn+1 and the data lines D1 and D2. Different from the pixel unit 110, the control terminal c3 of the switching element Tc1 of the pixel unit 310 is electrically coupled to the gate line Gn. The remaining connection manners of the switching element Tp1 and the switching element Tc1 of the pixel unit 310 are similar to the switching element Tp1 and the switching element Tc1 of the pixel unit 110, and the description thereof will not be repeated here.

畫素單元320、340、360、380的內部結構類似,以畫素單元320為例說明。畫素單元320設置於閘極線Gn、Gn+1、資料線D2、D3之間,畫素單元320包含畫素電極(截面結構類似畫素單元110的畫素電極420)、共用電極(截面結構類似畫素單元110的共用電極410)、開關 元件Tp2與開關元件Tc2,共用電極與畫素電極相對設置。開關元件Tp2具有控制端p3、第一端p1以及第二端p2,控制端p3電性耦接閘極線Gn+1,第一端p1電性耦接資料線D2,第二端p2電性耦接畫素單元320的畫素電極以於閘極線Gn+1傳送致能訊號使開關元件Tp2開啟時將資料線D2的訊號傳送至畫素單元320的畫素電極。開關元件Tc2具有控制端c3、第一端c1以及第二端c2,控制端c3電性耦接閘極線Gn+1,第一端c1電性耦接資料線D3,第二端c2電性耦接畫素單元320的共用電極以於閘極線Gn+1傳送致能訊號使開關元件Tc2開啟時將資料線D3的訊號傳送至畫素單元320的共用電極。 The internal structure of the pixel units 320, 340, 360, 380 is similar, and the pixel unit 320 is taken as an example for illustration. The pixel unit 320 is disposed between the gate lines Gn and Gn+1 and the data lines D2 and D3. The pixel unit 320 includes a pixel electrode (a pixel electrode 420 having a cross-sectional structure similar to the pixel unit 110) and a common electrode (section The common electrode 410) of the structure similar to the pixel unit 110, the switch The element Tp2 and the switching element Tc2 are disposed opposite to the pixel electrode. The switching element Tp2 has a control terminal p3, a first terminal p1 and a second terminal p2. The control terminal p3 is electrically coupled to the gate line Gn+1. The first terminal p1 is electrically coupled to the data line D2, and the second terminal p2 is electrically connected. The pixel electrode coupled to the pixel unit 320 transmits the signal of the data line D2 to the pixel electrode of the pixel unit 320 when the enable signal is transmitted by the gate line Gn+1 to turn on the switching element Tp2. The switching element Tc2 has a control end c3, a first end c1 and a second end c2. The control end c3 is electrically coupled to the gate line Gn+1. The first end c1 is electrically coupled to the data line D3, and the second end c2 is electrically connected. The common electrode of the pixel unit 320 is coupled to transmit the enable signal to the gate line Gn+1 to transmit the signal of the data line D3 to the common electrode of the pixel unit 320 when the switching element Tc2 is turned on.

以下說明畫素結構100、200、300的驅動方法。以畫素單元110、210、310為例說明,如第5圖所示,於期間T21~T22,開啟開關元件Tp1以將資料線D1的第一訊號Sig11提供至畫素電極,並開啟開關元件Tc1以將資料線D2的第二訊號Sig12(如第5圖虛線標示)提供至共用電極,因此畫素結構100、200、300之顯示模式為窄視角模式。須說明的是,於期間T21~T22,傳送至畫素單元110、210、310的畫素電極與共用電極的第一訊號Sig11、第二訊號Sig12同時切換極性,對向電極430接收的訊號Sig3位於固定電位(例如接地端GND電位),其與畫素單元110、210、310的共用電極之間形成垂直電場E,因此液晶層440的液晶分子改變角度,因此達到窄視角的顯示效果。此外,相鄰畫素單元110、210、310的畫素單元(例如畫素單元 150、220、320)則可透過與第一訊號Sig11不同極性的第一訊號Sig21驅動其畫素電極,透過與第二訊號Sig12不同極性的第二訊號Sig22驅動其共用電極。因此,共用電極與對向電極之間亦形成垂直電場E以達到窄視角的顯示效果。 The driving method of the pixel structures 100, 200, and 300 will be described below. Taking the pixel units 110, 210, and 310 as an example, as shown in FIG. 5, during the period T21 to T22, the switching element Tp1 is turned on to supply the first signal Sig11 of the data line D1 to the pixel electrode, and the switching element is turned on. Tc1 provides the second signal Sig12 of the data line D2 (as indicated by the dashed line in FIG. 5) to the common electrode, so the display mode of the pixel structure 100, 200, 300 is a narrow viewing angle mode. It should be noted that, during the period T21~T22, the pixel electrodes transmitted to the pixel units 110, 210, and 310 and the first signal Sig11 and the second signal Sig12 of the common electrode simultaneously switch polarity, and the signal Sig3 received by the opposite electrode 430 At a fixed potential (for example, the ground GND potential), a vertical electric field E is formed between the common electrodes of the pixel units 110, 210, and 310, so that the liquid crystal molecules of the liquid crystal layer 440 change the angle, thereby achieving a narrow viewing angle display effect. In addition, pixel units of adjacent pixel units 110, 210, 310 (eg, pixel units) 150, 220, 320) can drive the pixel electrode through the first signal Sig21 having different polarity from the first signal Sig11, and drive the common electrode through the second signal Sig22 of different polarity from the second signal Sig12. Therefore, a vertical electric field E is also formed between the common electrode and the counter electrode to achieve a narrow viewing angle display effect.

以下說明畫素結構100、200、300的廣視角模式,於期間T11~T12,開啟開關元件Tp1以將資料線D1的訊號Sig11提供至畫素電極,開啟開關元件Tc1以將資料線D2的訊號Sig12提供至共用電極,畫素結構100、200、300之顯示模式為廣視角模式。須說明的是,對向電極430接收的訊號Sig3與共用電極接收的訊號Sig12位於固定電位,而畫素電極的電位與共用電極的電位維持固定電位差△V。類似地,相鄰畫素單元110、210、310的畫素單元(例如畫素單元150、220、320)則可透過與第一訊號Sig11不同極性的第一訊號Sig21驅動其畫素電極。 The following is a description of the wide viewing angle mode of the pixel structures 100, 200, and 300. During the period T11~T12, the switching element Tp1 is turned on to supply the signal Sig11 of the data line D1 to the pixel electrode, and the switching element Tc1 is turned on to turn the signal of the data line D2. Sig12 is provided to the common electrode, and the display mode of the pixel structures 100, 200, and 300 is a wide viewing angle mode. It should be noted that the signal Sig3 received by the counter electrode 430 and the signal Sig12 received by the common electrode are at a fixed potential, and the potential of the pixel electrode and the potential of the common electrode are maintained at a fixed potential difference ΔV. Similarly, the pixel units (eg, pixel units 150, 220, 320) of the adjacent pixel units 110, 210, and 310 can drive their pixel electrodes through the first signal Sig21 having a different polarity from the first signal Sig11.

如此一來,本揭示內容可於窄視角模式中,透過畫素單元的畫素電極與共用電極同時切換極性以改善先前技術的畫素單元因積分時間不同而亮度不均的問題。此外,本揭示內容可整合於原畫素結構製程中,無須額外增設光罩,亦無須增加製程步驟,因此可在不增加製造成本的條件下有效地改善畫素結構於窄視角模式的顯示效果。 In this way, the present disclosure can simultaneously switch the polarity through the pixel electrode of the pixel unit and the common electrode in the narrow viewing angle mode to improve the brightness unevenness of the pixel unit of the prior art due to the difference in integration time. In addition, the present disclosure can be integrated into the original pixel structure process without additional masks and process steps, so that the display effect of the pixel structure in the narrow viewing angle mode can be effectively improved without increasing the manufacturing cost. .

雖然本案已以實施方式揭露如上,然其並非用以限定本案,任何熟習此技藝者,在不脫離本案之精神和範圍內,當可作各種之更動與潤飾,因此本案之保護範圍當視後附之申請專利範圍所界定者為準。 Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present case. Anyone skilled in the art can make various changes and refinements without departing from the spirit and scope of the case. Therefore, the scope of protection of this case is considered. The scope defined in the patent application is subject to change.

100‧‧‧畫素結構 100‧‧‧ pixel structure

110~180‧‧‧畫素單元 110~180‧‧‧ pixel unit

Gn、Gn-1~Gn+4‧‧‧閘極線 Gn, Gn-1~Gn+4‧‧‧ gate line

D1~D5‧‧‧資料線 D1~D5‧‧‧ data line

Tp1~Tp8、Tc1~Tc8‧‧‧開關元件 Tp1~Tp8, Tc1~Tc8‧‧‧ switching components

p1、c1‧‧‧第一端 P1, c1‧‧‧ first end

p2、c2‧‧‧第二端 P2, c2‧‧‧ second end

p3、c3‧‧‧控制端 P3, c3‧‧‧ control terminal

GND‧‧‧接地端 GND‧‧‧ ground terminal

R1‧‧‧第一方向 R1‧‧‧ first direction

R2‧‧‧第二方向 R2‧‧‧ second direction

Claims (13)

一種畫素結構,包含:一第一閘極線,沿一第一方向延伸;一第二閘極線,沿該第一方向延伸;一第一資料線,沿一第二方向延伸,其中該第二方向不同於該第一方向;一第二資料線,沿該第二方向延伸;一第一畫素單元,設置於該第一閘極線、該第一資料線與該第二資料線之間,其中該第一畫素單元包含:一第一畫素電極;一第一共用電極,與該第一畫素電極相對設置;一第一開關元件具有一控制端、一第一端以及一第二端,該第一開關元件之該控制端電性耦接該第一閘極線,該第一開關元件之該第一端電性耦接該第一資料線,該第一開關元件之該第二端電性耦接該第一畫素電極;以及一第二開關元件具有一控制端、一第一端以及一第二端,該第二開關元件之該控制端電性耦接該第一閘極線或該第二閘極線,該第二開關元件之該第一端電性耦接該第二資料線,該第二開關元件之該第二端電性耦接該第一共用電極;以及一對向電極,與該第一畫素電極相對設置。 A pixel structure includes: a first gate line extending along a first direction; a second gate line extending along the first direction; and a first data line extending along a second direction, wherein The second direction is different from the first direction; a second data line extending along the second direction; a first pixel unit disposed on the first gate line, the first data line and the second data line The first pixel unit includes: a first pixel electrode; a first common electrode disposed opposite to the first pixel electrode; a first switching element having a control end, a first end, and a first end, the control end of the first switching element is electrically coupled to the first gate line, the first end of the first switching element is electrically coupled to the first data line, the first switching element The second end is electrically coupled to the first pixel electrode; and the second switching element has a control end, a first end, and a second end, and the control end of the second switching element is electrically coupled The first gate line or the second gate line, the first end of the second switching element is electrically coupled A second data line, the second terminal of the second switch is electrically coupled to the first element of the common electrode; and a counter electrode, the first pixel electrode disposed opposite. 如請求項1所述之畫素結構,其中該第二 開關元件之該控制端電性耦接該第一閘極線。 The pixel structure as claimed in claim 1, wherein the second The control terminal of the switching element is electrically coupled to the first gate line. 如請求項2所述之畫素結構,更包含:一第三資料線,沿該第二方向延伸;以及一第二畫素單元,設置於該第一閘極線、該第二閘極線、該第二資料線與該第三資料線之間,其中該第二畫素單元包含:一第二畫素電極;一第二共用電極,與該第二畫素電極相對設置;一第三開關元件具有一控制端、一第一端以及一第二端,該第三開關元件之該控制端電性耦接該第二閘極線,該第三開關元件之該第一端電性耦接該第二資料線,該第三開關元件之該第二端電性耦接該第二畫素電極;以及一第四開關元件具有一控制端、一第一端以及一第二端,該第四開關元件之該控制端電性耦接該第二閘極線,該第四開關元件之該第一端電性耦接該第三資料線,該第四開關元件之該第二端電性耦接該第二共用電極。 The pixel structure of claim 2, further comprising: a third data line extending along the second direction; and a second pixel unit disposed on the first gate line and the second gate line Between the second data line and the third data line, wherein the second pixel unit comprises: a second pixel electrode; a second common electrode disposed opposite to the second pixel electrode; The switching element has a control end, a first end and a second end, the control end of the third switching element is electrically coupled to the second gate line, and the first end of the third switching element is electrically coupled Connected to the second data line, the second end of the third switching element is electrically coupled to the second pixel electrode; and the fourth switching element has a control end, a first end, and a second end, The control terminal of the fourth switching element is electrically coupled to the second gate line, the first end of the fourth switching element is electrically coupled to the third data line, and the second end of the fourth switching element is electrically The second common electrode is coupled to the second common electrode. 如請求項1所述之畫素結構,其中該第二開關元件之該控制端電性耦接該第二閘極線。 The pixel structure of claim 1, wherein the control terminal of the second switching element is electrically coupled to the second gate line. 如請求項4所述之畫素結構,更包含: 一第三資料線,沿該第二方向延伸;以及一第二畫素單元,設置於該第一閘極線、該第二閘極線、該第二資料線與該第三資料線之間,其中該第二畫素單元包含:一第二畫素電極;一第二共用電極,與該第二畫素電極相對設置;一第三開關元件具有一控制端、一第一端以及一第二端,該第三開關元件之該控制端電性耦接該第二閘極線,該第三開關元件之該第一端電性耦接該第二資料線,該第三開關元件之該第二端電性耦接該第二畫素電極;以及一第四開關元件具有一控制端、一第一端以及一第二端,該第四開關元件之該控制端電性耦接該第一閘極線,該第四開關元件之該第一端電性耦接該第三資料線,該第四開關元件之該第二端電性耦接該第二共用電極。 The pixel structure as claimed in claim 4 further includes: a third data line extending along the second direction; and a second pixel unit disposed between the first gate line, the second gate line, the second data line, and the third data line The second pixel unit includes: a second pixel electrode; a second common electrode disposed opposite the second pixel electrode; a third switching element having a control end, a first end, and a first The second end of the third switching element is electrically coupled to the second gate line, the first end of the third switching element is electrically coupled to the second data line, and the third switching element is The second end is electrically coupled to the second pixel electrode; and the fourth switching element has a control end, a first end, and a second end, and the control end of the fourth switching element is electrically coupled to the first end The first end of the fourth switching element is electrically coupled to the third data line, and the second end of the fourth switching element is electrically coupled to the second common electrode. 如請求項5所述之畫素結構,更包含:一第三閘極線,沿該第一方向延伸;一第四閘極線,沿該第一方向延伸;以及一第三畫素單元,設置於該第三閘極線、該第四閘極線、該第一資料線與該第二資料線之間,其中該第三畫素單元包含:一第三畫素電極; 一第三共用電極,與該第三畫素電極相對設置;一第五開關元件具有一控制端、一第一端以及一第二端,該第五開關元件之該控制端電性耦接該第四閘極線,該第五開關元件之該第一端電性耦接該第二資料線,該第五開關元件之該第二端電性耦接該第三畫素電極;以及一第六開關元件具有一控制端、一第一端以及一第二端,該第六開關元件之該控制端電性耦接該第三閘極線,該第六開關元件之該第一端電性耦接該第一資料線,該第六開關元件之該第二端電性耦接該第三共用電極。 The pixel structure of claim 5, further comprising: a third gate line extending along the first direction; a fourth gate line extending along the first direction; and a third pixel unit, The third pixel unit is disposed between the third gate line, the fourth gate line, the first data line and the second data line, wherein the third pixel unit comprises: a third pixel electrode; a third common electrode is disposed opposite to the third pixel electrode; a fifth switching element has a control end, a first end, and a second end, the control end of the fifth switching element is electrically coupled to the a fourth gate line, the first end of the fifth switching element is electrically coupled to the second data line, the second end of the fifth switching element is electrically coupled to the third pixel electrode; The sixth switching element has a control end, a first end and a second end, the control end of the sixth switching element is electrically coupled to the third gate line, and the first end of the sixth switching element is electrically The first data line is coupled to the first data line, and the second end of the sixth switching element is electrically coupled to the third common electrode. 如請求項5所述之畫素結構,更包含:一第三閘極線,沿該第一方向延伸;一第四閘極線,沿該第一方向延伸;以及一第三畫素單元,設置於該第三閘極線、該第四閘極線、該第一資料線與該第二資料線之間,其中該第三畫素單元包含:一第三畫素電極;一第三共用電極,與該第三畫素電極相對設置;一第五開關元件具有一控制端、一第一端以及一第二端,該第五開關元件之該控制端電性耦接該第三閘極線,該第五開關元件之該第一端電性耦接該第一資料線,該第五開關元件之該第二端電性耦接該第三 畫素電極;以及一第六開關元件具有一控制端、一第一端以及一第二端,該第六開關元件之該控制端電性耦接該第四閘極線,該第六開關元件之該第一端電性耦接該第二資料線,該第六開關元件之該第二端電性耦接該第三共用電極。 The pixel structure of claim 5, further comprising: a third gate line extending along the first direction; a fourth gate line extending along the first direction; and a third pixel unit, And disposed between the third gate line, the fourth gate line, the first data line and the second data line, wherein the third pixel unit comprises: a third pixel electrode; a third sharing An electrode is disposed opposite to the third pixel electrode; a fifth switching element has a control end, a first end, and a second end, wherein the control end of the fifth switching element is electrically coupled to the third gate a first end of the fifth switching element is electrically coupled to the first data line, and the second end of the fifth switching element is electrically coupled to the third And a sixth switching element having a control end, a first end, and a second end, wherein the control end of the sixth switching element is electrically coupled to the fourth gate line, the sixth switching element The first end is electrically coupled to the second data line, and the second end of the sixth switching element is electrically coupled to the third common electrode. 如請求項1所述之畫素結構,其中該第一畫素電極位於該對向電極與該第一共用電極之間。 The pixel structure of claim 1, wherein the first pixel electrode is located between the opposite electrode and the first common electrode. 如請求項1所述之畫素結構,其中該第一共用電極位於該對向電極與該第一畫素電極之間。 The pixel structure of claim 1, wherein the first common electrode is located between the opposite electrode and the first pixel electrode. 如請求項1所述之畫素結構,其中該對向電極為一整面的導電層。 The pixel structure of claim 1, wherein the counter electrode is a full-face conductive layer. 一種驅動方法,適用於一畫素結構,其中該畫素結構包含一畫素單元與一對向電極,該畫素單元包含一畫素電極、一共用電極、一第一開關元件與一第二開關元件,該共用電極與該畫素電極相對設置,該第一開關元件耦接該畫素電極,該第二開關元件耦接該共用電極,該對向電極與該畫素電極相對設置,該驅動方法包含:於一第一期間,開啟該第一開關元件以將一第一電壓訊號提供至該畫素電極,並開啟該第二開關元件以將一第 二電壓訊號提供至該共用電極,該畫素結構之一顯示模式為一窄視角模式,其中該對向電極位於一固定電位,該第一電壓訊號與該第二電壓訊號同時切換極性。 A driving method is applicable to a pixel structure, wherein the pixel structure comprises a pixel unit and a pair of electrodes, the pixel unit comprises a pixel electrode, a common electrode, a first switching element and a second a switching element, the common electrode is disposed opposite to the pixel electrode, the first switching element is coupled to the pixel electrode, the second switching element is coupled to the common electrode, and the opposite electrode is disposed opposite to the pixel electrode, The driving method includes: turning on the first switching element to provide a first voltage signal to the pixel electrode, and turning on the second switching element to turn on a first period The two voltage signals are supplied to the common electrode. The display mode of the pixel structure is a narrow viewing angle mode, wherein the opposite electrode is at a fixed potential, and the first voltage signal and the second voltage signal simultaneously switch polarity. 如請求項11所述之驅動方法,更包含:於一第二期間,開啟該第一開關元件以將該第一電壓訊號提供至該畫素電極,該畫素結構之該顯示模式為一廣視角模式,其中該對向電極與該共用電極位於該固定電位。 The driving method of claim 11, further comprising: turning on the first switching element to provide the first voltage signal to the pixel electrode during a second period, the display mode of the pixel structure is a wide a viewing angle mode in which the counter electrode and the common electrode are at the fixed potential. 如請求項12所述之驅動方法,其中於該第二期間,該共用電極之電位與該畫素電極之電位維持一固定電位差。 The driving method of claim 12, wherein the potential of the common electrode and the potential of the pixel electrode maintain a fixed potential difference during the second period.
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