TWI643008B - Display device and operating method thereof - Google Patents

Abstract

A display device includes a display layer, a plurality of pixel electrodes, a plurality of array layer common electrodes, a plurality of pixel electrode switches, and a plurality of common electrode switches. The pixel electrode and the common electrode of the array layer are disposed on the same side of the display layer. The pixel electrode switch is electrically coupled to the pixel electrode, and is configured to be turned on corresponding to a plurality of gate signals, respectively, so as to provide a plurality of data voltages to the pixel electrode, respectively. The common electrode switch is electrically coupled to the common electrode of the array layer, and is configured to be turned on respectively according to the gate signals, so as to provide the common voltage of the first array layer and the common voltage of the second array layer to the common electrode of the array layer, respectively.

Description

Display device and operation method thereof

This case relates to an electronic device and method. Specifically, the present application relates to an anti-peeping display device and an operation method thereof.

With the development of technology, display devices have been widely used in people's lives.

In recent years, multi-view display technology has become more and more widely used in display devices. Various multi-view display devices include fringe field switching (FFS) and in-plane switching (IPS). The rotation of the liquid crystal molecules is controlled by controlling the change of the electric field between the two electrodes. The conventional technique can achieve a good viewing angle effect, but cannot effectively achieve the function of anti-peeping. In general, users will want to fully receive the information on the display only within a limited viewing angle range. For example, when the angle is greater than a certain side view angle, the information on the display cannot be completely received or interpreted, and peeping can be prevented.

Therefore, part of the anti-peeping design is implemented with a pixel structure. Now, by controlling the twist of the display element, the display screen of the liquid crystal display device can be controlled.

Therefore, how to properly provide voltage to these electrodes to control the twist of liquid crystal molecules is an important research topic in this field.

An embodiment of the present invention relates to a display device. According to an embodiment of the present invention, the display device includes a display layer, a plurality of pixel electrodes, a plurality of common electrode layers, a plurality of pixel electrode switches, and a plurality of common electrode switches. The pixel electrodes and the common electrodes of the array layers are disposed on the same side of the display layer. The pixel electrode switches are electrically coupled to the pixel electrodes, and are configured to be turned on in response to a plurality of gate signals, respectively, to provide a plurality of data voltages to the pixel electrodes. The common electrode switches are electrically coupled to the common electrodes of the array layers, and are respectively turned on according to the gate signals to provide a common voltage of the first array layer and a common voltage of the second array layer to the array layers, respectively. Common electrode.

Another aspect of the present invention relates to a method for operating a display device. According to an embodiment of the present invention, the operation method includes: receiving the gate signals to respectively turn on the pixel electrode switches so that the pixel electrodes can receive the data voltages; and using a first of the gate signals In both cases, at least one second switch of the common electrode switches is turned on to provide a common voltage of the second array layer to a plurality of second electrodes of the common electrodes of the array layers. The first and second ones of the gate signals are different from each other.

By applying one of the above embodiments, a common electrode can be opened. Off and a corresponding pixel electrode switch are turned on at the same time, thereby updating the voltages on the corresponding common electrode of the array layer and the pixel electrode at the same time.

40‧‧‧Gate driving circuit

100‧‧‧ display device

SD‧‧‧Source Drive Circuit

DSR‧‧‧Active Zone

NDSR‧‧‧Non-display area

DSL‧‧‧Display Layer

PCM‧‧‧pixel electrode

ACM‧‧‧Array layer common electrode

CCM‧‧‧ Opposite common electrode

PSW‧‧‧Pixel electrode switch

ASW1, ASW2‧‧‧Common electrode switch

TRL‧‧‧Transfer Line

PX1, PX2 ‧‧‧ pixels

G (1) -G (4) ‧‧‧Gate signal

D (1) -D (5) ‧‧‧Data voltage

VACM1, VACM2 ‧‧‧ Common voltage of array layer

V1-V5‧‧‧line

M1, M2‧‧‧ mode

F1-F4‧‧‧frame

200‧‧‧ Method

S1-S2‧‧‧ Operation

FIG. 1A is a schematic view of a display device according to an embodiment of the present invention; FIG. 1B is a schematic cross-sectional view of a display device according to an embodiment of the present invention; FIG. 1C is another view of the display device according to the present invention; A schematic cross-sectional view of a display device according to an embodiment; FIG. 2 is a schematic voltage diagram of a display device according to an embodiment of the present invention in different modes; and FIG. 3 is a schematic view of a display device according to an embodiment of the present invention. The flowchart of the operation method of the display device is shown.

The following will clearly illustrate the spirit of the present disclosure with diagrams and detailed descriptions. Any person with ordinary knowledge in the technical field who understands the embodiments of the present disclosure can be changed and modified by the techniques taught in the present disclosure. It does not depart from the spirit and scope of this disclosure.

Regarding the "first", "second", ..., etc. used herein, they do not specifically mean the order or order, nor are they used to limit the present invention. They are only used to distinguish elements described in the same technical terms or operating.

As used in this article, "electrical coupling" can mean that two or more components make direct physical or electrical contact with each other, or indirectly make physical or electrical contact with each other, and "electrical coupling" can also mean Two or more elements operate or act on each other.

The terms "including", "including", "having", "containing" and the like used in this article are all open-ended terms, which means including but not limited to.

As used herein, "and / or" includes any and all combinations of the things described.

Regarding the directional terms used in this article, such as: up, down, left, right, front or back, etc., are only directions referring to the attached drawings. Therefore, the directional terms used are used to illustrate and not to limit the case.

Regarding the terms used in this article, unless otherwise specified, each term usually has the ordinary meaning of being used in this field, the content disclosed here, and the special content. Certain terms used to describe this disclosure are discussed below or elsewhere in this specification to provide additional guidance to those skilled in the art on the description of this disclosure.

An embodiment of the present invention is described by using a fringe field switching (FFS) display device. FIG. 1A is a schematic diagram of a display device 100 according to an embodiment of the present invention. FIG. 1B is a schematic cross-sectional view of a display device 100 according to an embodiment of the disclosure. In this embodiment, the display device 100 includes a display layer DSL, a plurality of pixel electrodes PCM, a plurality of array layer common electrodes ACM, a counter common electrode CCM, a plurality of pixel electrode switches PSW, a plurality of common electrode switches ASW1, ASW2, source driving circuit SD, and gate driving circuit 40. The display layer DSL is provided in the area where the liquid crystal molecular material is located between the upper substrate and the lower substrate; the pixel electrode PCM and the common electrode of the array layer ACM may be electrode layers provided on the lower substrate, respectively, for receiving the data voltage and the common voltage of the array layer. The opposing common electrode CCM may be an electrode layer of an upper substrate disposed on the opposite side of the lower substrate to receive a common voltage having a fixed voltage level.

In one embodiment of the present invention, the pixel electrode PCM, the pixel electrode switch PSW, and the common electrode ACM of the array layer are respectively arranged in a matrix form and are disposed in the active region DSR. In one embodiment, the common electrode switches ASW1 and ASW2 may be disposed in the non-display area NDSR. It should be noted that, in different embodiments, the pixel electrode PCM, the pixel electrode switch PSW, the common electrode ACM of the array layer, and the common electrode switches ASW1 and ASW2 may also be disposed at different positions in the display device 100 according to actual needs. This embodiment is used as an example. In one embodiment, the common electrodes ACM of the array layer are electrically independent of each other, but the present invention is not limited thereto. In different embodiments, part of the common electrodes ACM of the array layer may be connected to each other according to actual needs. The active area DSR may be a display area of the display device 100, that is, a pixel area, and the non-display area NDSR may be a peripheral area where the driving circuit is located.

In this embodiment, the pixel electrode switches PSW are respectively connected to the pixel electrodes PCM, and the common electrode switches ASW1 and ASW2 are electrically coupled to the array layer common electrode ACM, respectively. In an embodiment, each common electrode switch ASW1, ASW2 is electrically coupled to a plurality of common electrodes ACM of the array layer. In one embodiment, each common electrode switch ASW1, ASW2 is electrically coupled to the transmission line TRL, and each common electrode switch ASW1, ASW2 passes through a corresponding one. The transmission line TRL is electrically coupled to a plurality of common electrodes ACM of the array layers.

In this embodiment, the pixel electrode PCM and the array layer common electrode ACM are disposed on the same side of the display layer DSL, and the opposing common electrode CCM is disposed on the other side of the display layer DSL (as shown in FIG. 1B).

In this embodiment, the gate driving circuit 40 is used to provide gate signals G (1) -G (4) to the pixel electrode switches PSW row by row through the gate lines to turn on the pixel electrode switches PSW row by row. The source driving circuit SD is used to provide the data voltages D (1) -D (5) to the turned-on pixel electrode switches PSW, so that the turned-on pixel electrode switches PSW provide the data voltages D (1) -D (5) to the corresponding ones The pixel electrode PCM, so that the display element in the display layer DSL, that is, the liquid crystal molecules, can deflect parallel to the direction of the pixel electrode PCM according to the received data voltage D (1) -D (5).

In this embodiment, the pixel electrode PCM may include a plurality of first electrodes (marked with a "①" symbol thereon) and a plurality of second electrodes (marked with a "②" symbol thereon). In the same frame, a first electrode in the pixel electrode PCM is used to receive a data voltage of a first polarity, and a second electrode in the pixel electrode PCM is used to receive a data voltage of a second polarity. In the next frame, the first electrode in the pixel electrode PCM is used to receive the data voltage of the second polarity, and the second electrode in the pixel electrode PCM is used to receive the data voltage of the first polarity. In one embodiment, the first electrode and the second electrode in the pixel electrode PCM are arranged alternately with each other, but other types of arrangements are also within the scope of the present case. In an example of the present invention, the data voltage of the first polarity may be, for example, a voltage level between 0V and + 5V, and the data voltage of the second polarity may be, for example, a voltage level between 0V and -5V. The upper and lower limits are only examples, and the present invention It is not limited to this. The one frame may include the time when the gate signals of the display device 100 enable all the gate lines in sequence, and one frame may also be the time required for one screen update.

In one embodiment, the display device 100 may have a wide viewing angle mode and a narrow viewing angle mode. In the wide viewing angle mode, users in front of the display device 100 can have undistorted image information that can be received in a wide range of viewing angles; in the narrow viewing angle mode, users in front of the display device 100 can view specific viewing angles. Undistorted image information received in a range (for example, 5 degrees to the left and right of a normal viewing angle). In one embodiment, in the narrow viewing angle mode, the common electrode switches ASW1 and ASW2 are respectively used to receive the common voltages VACM1 and VACM2 of the array layer, and are sequentially turned on according to the gate signals G (1) -G (4) to pass through The transfer lines TRL are staggered to provide the common voltage VACM1, VACM2 of the array layer to the common electrode ACM of the array layer. The staggering provides that, since the common voltages VACM1 and VACM2 of the array layer in the narrow viewing angle mode are different from the voltages on the common electrode CCM opposite to each other, an electric field is formed between the common electrode ACM of the array layer and the common electrode CCM, so that the display layer The corresponding display element in the DSL, that is, the long axis of the liquid crystal molecules stands up in a direction perpendicular to the opposing common electrode CCM, thereby reducing the visible range of the display device 100.

In this embodiment, the common electrode ACM of the array layer may include a plurality of first electrodes (marked with a "①" symbol) and a plurality of second electrodes (marked with a "②" symbol) corresponding to the first of the pixel electrodes PCM, respectively. The electrode is disposed with the second electrode. In the same frame, the common electrode switch ASW1 provides the array layer common voltage VACM1 at the first voltage level to the first electrode in the array layer common electrode ACM, and the common electrode switch ASW2 provides the second voltage level. The common voltage from the array layer VACM2 to the second electrode in the common electrode ACM of the array layer. In the next frame, the common electrode switch ASW1 provides the array layer common voltage VACM1 at the second voltage level to the first electrode in the array layer common electrode ACM, and the common electrode switch ASW2 provides the array layer common voltage at the first voltage level. VACM2 to the second electrode in the common electrode ACM of the array layer. In one embodiment, the first electrode and the second electrode in the common electrode ACM of the array layer are arranged alternately with each other, but other types of arrangements are also within the scope disclosed in the present invention.

In one embodiment, the common voltages VACM1 and VACM2 of the array layers of the first voltage level and the second voltage level correspond to the data voltages of the first polarity and the data voltages of the second polarity, respectively. That is, the array layer common voltages VACM1 and VACM2 at the first voltage level are used to provide a corresponding pixel layer common electrode ACM when a pixel electrode PCM receives a data voltage of a first polarity. The array layer common voltages VACM1 and VACM2 at the second voltage level are used to provide a pixel electrode PCM with the data voltage of the second polarity to the corresponding array layer common electrodes ACM. In an example, the common voltage VACM1 and VACM2 of the array layer of the first voltage level may be + 5V, and the common voltage VACM1 and VACM2 of the array layer of the second voltage level may be -5V, but this case is not limited thereto. In different embodiments, the common voltages VACM1, VACM2 of the first voltage level array layer may be different from each other, and / or the common voltages VACM1, VACM2 of the second voltage level array layer may be different from each other.

On the other hand, in an embodiment, in the wide-view mode, the common electrode switches ASW1 and ASW2 are used to receive substantially the same as the opposite common switches. The array layer common voltage VACM1, VCAM of the third voltage level of the voltage on the electrode CCM, and the array layer common voltage VACM1, VCAM of the third voltage level are provided to the array layer common electrode ACM. In this way, since the voltage on the common electrode ACM of the array layer is substantially the same as the voltage on the common electrode CCM of the opposite layer, the corresponding display element in the display layer DSL may be, for example, that the long axis of the liquid crystal molecules is not erected and is not narrow. The visible range of the display device 100 is changed.

The following paragraphs use an operation example to further explain the details of this case in the narrow viewing angle mode, but this case is not limited to this. In the first frame, the source driving circuit SD provides data voltages D (1), D (3), D (5) with a first polarity and data voltages D (2), D (4) with a second polarity The display device 100 provides the array layer common voltage VACM1 at the first voltage level to the common electrode switch ASW1, and provides the array layer common voltage VACM2 to the common electrode switch ASW2 at the second voltage level. When the gate driving circuit 40 provides a gate signal G (1), the pixel electrode switch PSW of the first row is turned on according to the gate signal G (1), so that the first electrode receiving device in the first row of pixel electrodes PCM is first The data voltages D (1), D (3), and D (5) of the polarity, and the second electrode in the first row of pixel electrodes PCM receive the data voltages D (2) and D (4) of the second polarity. At this time, the common electrode switch ASW1 receiving the gate signal G (1) is turned on according to the gate signal G (1) to provide the array layer common voltage VACM1 at the first voltage level to the first and second column array layer common electrodes ACM. In the first electrode.

In the first frame, when the gate signal G (2) is provided by the gate driving circuit 40, the pixel electrode switch PSW of the second column is turned on according to the gate signal G (2), so that the second pixel electrode PCM in the second column is turned on. One electrode receiver with first pole Data voltages D (1), D (3), and D (5), and the second electrode in the second row of pixel electrodes PCM receives the data voltages D (2) and D (4) with the second polarity. At this time, the common electrode switch ASW2 receiving the gate signal G (2) is turned on according to the gate signal G (2) to provide the array layer common voltage VACM2 at the second voltage level to the second and third column array layer common electrodes ACM. Of the second electrode.

In the first frame, the operation of the gate driving circuit 40 to provide the gate signal G (3) is similar to the operation of the gate driving circuit 40 to provide the gate signal G (1), so it is not described herein. In addition, in the first frame, the operation of the gate driving circuit 40 to provide the gate signal G (4) is similar to the operation of the gate driving circuit 40 to provide the gate signal G (2), so it is not described here.

In the second frame subsequent to the first frame, the source driving circuit SD instead provides the data voltages D (1), D (3), and D (5) with the second polarity to the first electrode in the pixel electrode PCM. The data voltages D (2) and D (4) with the first polarity are provided to the second electrode in the pixel electrode PCM. In addition, in the second frame, the display device 100 provides the array layer common voltage VACM1 of the second voltage level to the common electrode switch ASW1, and provides the array layer common voltage VACM2 of the first voltage level to the common electrode switch ASW2. The operation in the second frame is similar to the above-mentioned operation in the first frame, so it is not repeated here.

By using the above embodiment, the pixel electrodes PCM and the array layer common electrode ACM corresponding to each other can be updated at the same or similar time with the voltages thereon. In this way, when the polarity is reversed, the time during which the polarities of the voltages on the pixel electrode PCM and the common electrode ACM of the array layer are different can be shortened, thereby improving the display quality.

In addition, in different embodiments, each pixel (such as a pixel The pixel electrode PCM of PX1, PX2) may be a single electrode (as shown in FIG. 1A) or include a plurality of sub-electrodes (as shown in FIG. 1B), and the scope of this case is not limited to the embodiment shown.

In addition, it should be noted that although the foregoing embodiment is described by taking 16 sub-pixels as an example, the number of sub-pixels of the display device 100 may be set according to actual requirements, and is not limited to the above-mentioned embodiment.

Furthermore, it should be noted that in one embodiment, the common common electrode CCM may be omitted according to actual needs (as shown in Fig. 1C), so the scope of this case is not implemented as shown in Figs. 1A and 1B. Examples are limited.

The following paragraphs will provide more specific details of this case with Figure 2, but this case is not limited to this case. In Figure 2, line V1 represents the voltage on the array layer common electrode ACM of the pixel PX1 (for example, the same as the array layer common voltage VACM1), line V2 represents the voltage on the pixel electrode PCM of the pixel PX1, and line V3 represents the voltage of the pixel PX2. The voltage on the common electrode ACM of the array layer (for example, the same as the common voltage VACM2 of the array layer), the line V4 represents the voltage on the pixel electrode PCM of the pixel PX2, and the line V5 represents the voltage on the opposing common electrode CCM.

In the first mode M1 (such as the wide viewing angle mode), the voltages on the array layer common electrode ACM of the pixel PX1, the array layer common electrode ACM of the pixel PX2, and the opposing common electrode CCM are the same (for example, 0V). In this mode, in the first frame F1, the pixel electrode PCM of the pixel PX1 has a data voltage of a first polarity (such as 0V ~ + 5V), and the pixel electrode PCM of the pixel PX2 has a data voltage of a second polarity. (Such as 0V ~ -5V). In the second frame F2, the pixel electrode PCM of the pixel PX1 is provided with There is a data voltage with a second polarity (such as 0V ~ -5V), and a pixel voltage PCM of the pixel PX2 has a data voltage with a first polarity (such as 0V ~ + 5V).

In the second mode M2 (such as the narrow viewing angle mode), the voltage on the array layer common electrode ACM of the pixel PX1, the voltage on the array layer common electrode ACM of the pixel PX2, and the voltage on the opposing common electrode CCM are different from each other. In this mode, in the third frame F3, the array layer common electrode ACM of the pixel PX1 has the array layer common voltage VACM1 (such as + 5V) of the first voltage level, and the array layer common electrode ACM of the pixel PX2 has The common voltage VACM2 (for example, -5V) of the array layer of the second voltage level, and the voltage on the counter common electrode CCM is the same as the voltage on the counter common electrode CCM in the first mode M1 (for example, 0V). At this time, the potential difference between the common electrode ACM of the array layer of the pixel PX1 and the common common electrode CCM forms an electric field, and the potential difference between the common electrode ACM of the array layer of the pixel PX2 and the common common electrode CCM forms an electric field, and these electric fields make the display layer DSL The corresponding display element rises in a direction perpendicular to the opposing common electrode CCM, and narrows the viewing angle of the display device 100. In addition, in the third frame F3, the pixel electrode PCM of the pixel PX1 has a data voltage of a first polarity (such as 0V ~ + 5V), and the pixel electrode PCM of the pixel PX2 has a data voltage of a second polarity (such as 0V ~ -5V).

In the fourth frame F4, the array layer common electrode ACM of the pixel PX1 has a second voltage level common voltage VACM1 (such as -5V), and the array layer common electrode ACM of the pixel PX2 has a first voltage level Array layer common voltage VACM2 (such as + 5V), the voltage on the opposing common electrode CCM is in phase with the voltage on the opposing common electrode CCM in the first mode M1 Same (for example, 0V). At this time, the potential difference between the common electrode ACM of the array layer of the pixel PX1 and the common common electrode CCM forms an electric field, and the potential difference between the common electrode ACM of the array layer of the pixel PX2 and the common common electrode CCM forms an electric field, and these electric fields make the display layer DSL The corresponding display element rises in a direction perpendicular to the opposing common electrode CCM, and narrows the viewing angle of the display device 100. In addition, in the fourth frame F4, the pixel electrode PCM of the pixel PX1 has a data voltage of a second polarity (such as 0V ~ -5V), and the pixel electrode PCM of the pixel PX2 has a data voltage of a first polarity (such as 0V ~ + 5V).

FIG. 3 is a flowchart of a method 200 for operating a display device according to an embodiment of the invention.

The operation method 200 can be applied to a display device 100 having the same or similar structure as that shown in FIG. 1A. In order to make the description simple, the operation method 200 will be described below by taking the display device 100 in FIG. 1 as an example according to an embodiment of the present invention, but the present invention is not limited to this application.

In addition, it should be understood that the operations of the operation method 200 mentioned in this embodiment can be adjusted according to actual needs, except for those specifically described in order, and can even be performed simultaneously or partially simultaneously.

Moreover, in different embodiments, these operations may be adaptively added, replaced, and / or omitted.

In this embodiment, the operation method 200 includes the following operations.

In operation S1, the display device 100 receives the gate signals G (1) -G (4) by using the pixel electrode switches PSW to turn on the pixel electrode switches PSW respectively, so that the pixel electrodes PCM can receive the data voltage D (1) -D (5).

In operation S2, the display device 100 utilizes a common electrode switch ASW1 and ASW2 receive the gate signals G (1) -G (4) to turn on the common electrode switches ASW1 and ASW2, respectively, so that the array layer common electrode ACM can receive the array layer common voltage VACM1 and the array layer common voltage VACM2, respectively.

In one embodiment, the pixel electrode PCM and the array layer common electrode ACM corresponding to the same gate signal receive the data voltages D (1) -D (5) and the array layer common voltage VACM1 or the array layer common voltage VACM2, respectively. .

For example, while the pixel electrode PCM receiving the gate signal G (2) receives the data voltages D (1) -D (5), the common electrode switch ASW2 receiving the gate signal G (2) provides the second array layer common voltage. VACM2 to the corresponding array layer common electrode ACM. For another example, while the pixel electrode PCM receiving the gate signal G (3) receives the data voltage D (1) -D (5), the common electrode switch ASW2 receiving the gate signal G (3) provides the first array layer common Voltage VACM1 to the corresponding array layer common electrode ACM.

It should be noted that the specific details of the above operations can refer to the foregoing paragraphs, so they will not be repeated here.

Although the present invention has been disclosed as above by way of example, it is not intended to limit the present invention. Any person skilled in the art can make various modifications and retouches without departing from the spirit and scope of the present invention. Therefore, the protection of the present invention The scope shall be determined by the scope of the attached patent application.

Claims (10)

A display device includes: a display layer; a plurality of pixel electrodes; a common electrode of a plurality of array layers, wherein the pixel electrodes and the common electrodes of the array layers are disposed on the same side of the display layer; a plurality of pixel electrode switches are electrically coupled The pixel electrodes are respectively turned on in response to a plurality of gate signals to provide a plurality of data voltages to the pixel electrodes respectively; and a plurality of common electrode switches are electrically coupled to the common electrodes of the array layers for respectively according to the The gate signals are turned on to provide a common voltage of the first array layer and a common voltage of the second array layer to the common electrodes of the array layers, respectively. The display device according to claim 1, wherein at least one first switch of the common electrode switches is configured to provide the common voltage of the first array layer to the plurality of first electrodes of the common electrodes of the array layers, and the common electrodes At least one second switch of the switch is used to provide a common voltage of the second array layer to the plurality of second electrodes of the common electrodes of the array layers, wherein the first switch and the second switch correspond to different ones of the gate signals. Who is conducting. The display device according to claim 2, wherein the first electrodes and the second electrodes of the common electrodes of the array layers are arranged alternately with each other. The display device according to claim 1, wherein the common electrode switches are sequentially turned on to alternately provide the common voltage of the first array layer and the common voltage of the second array layer to the common electrodes of the array layers. The display device according to claim 1, wherein in a first mode, the common voltage of the first array layer and the common voltage of the second array layer are the same as each other, and in a second mode, the first array layer is common. The voltage and the common voltage of the second array layer are different from each other. The display device according to claim 1, further comprising: a pair of common electrodes, disposed on the other side of the display layer with respect to the array layer common electrodes, for receiving a pair of common voltages; In one mode, the common voltage of the first array layer, the common voltage of the second array layer, and the opposing common voltage are the same as each other, and in a second mode, the common voltage of the first array layer, the second array layer The common voltage and the opposing common voltage are different from each other. The display device according to any one of claims 1-6, wherein the pixel electrode switches are disposed in a display area of the display device, and the common electrode switches are disposed in a non-display area of the display device. . An operating method applied to a display device of claim 1, comprising: receiving the gate signals to respectively turn on the pixel electrode switches so that the pixel electrodes can receive the data voltages; and receiving the gates Signals to turn on the common electrode switches respectively, so that the common electrodes of the array layers can receive the common voltage of the first array layer and the common voltage of the second array layer, respectively, which correspond to the same of the gate signals A portion of the pixel electrodes and a portion of the common electrodes of the array layers simultaneously receive the data voltages and the common voltage of the first array layer or the common voltage of the second array layer, respectively. The operation method according to claim 8, further comprising: using at least one of the gate signals to turn on at least one first switch of the common electrode switches to provide the first array layer common voltage to the A plurality of first electrodes of the common electrodes of the array layers; and using a second one of the gate signals to turn on at least one second switch of the common electrode switches to provide the common voltage of the second array layers to the The plurality of second electrodes of the common electrode of the array layer; wherein the first one and the second one of the gate signals are different from each other. The operating method according to claim 8 or 9, wherein in a first mode, the common voltage of the first array layer and the common voltage of the second array layer are the same as each other, and in a second mode, the first array The layer common voltage and the second array layer common voltage are different from each other.