TWI590425B - 包含用於與一電子裝置整合之導電連接的光電模組 - Google Patents

包含用於與一電子裝置整合之導電連接的光電模組 Download PDF

Info

Publication number
TWI590425B
TWI590425B TW102139852A TW102139852A TWI590425B TW I590425 B TWI590425 B TW I590425B TW 102139852 A TW102139852 A TW 102139852A TW 102139852 A TW102139852 A TW 102139852A TW I590425 B TWI590425 B TW I590425B
Authority
TW
Taiwan
Prior art keywords
substrate
optoelectronic
printed circuit
circuit board
wiring
Prior art date
Application number
TW102139852A
Other languages
English (en)
Other versions
TW201423964A (zh
Inventor
哈特牧 魯德曼
瑪里歐 賽桑納
優卡 阿拉西尼歐
菲力普 鮑棋勞斯
蘇珊妮 衛斯坦后佛
珍斯 吉傑
Original Assignee
海特根微光學公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 海特根微光學公司 filed Critical 海特根微光學公司
Publication of TW201423964A publication Critical patent/TW201423964A/zh
Application granted granted Critical
Publication of TWI590425B publication Critical patent/TWI590425B/zh

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4697Manufacturing multilayer circuits having cavities, e.g. for mounting components
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14618Containers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14632Wafer-level processed structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0203Containers; Encapsulations, e.g. encapsulation of photodiodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04026Bonding areas specifically adapted for layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/241Disposition
    • H01L2224/24151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/24221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/24225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/24227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the HDI interconnect not connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the semiconductor or solid-state body being mounted in a cavity or on a protrusion of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/2919Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/33Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
    • H01L2224/331Disposition
    • H01L2224/3318Disposition being disposed on at least two different sides of the body, e.g. dual array
    • H01L2224/33181On opposite sides of the body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83192Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8385Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83851Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester being an anisotropic conductive adhesive
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93Batch processes
    • H01L2224/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49833Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the chip support structure consisting of a plurality of insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12041LED
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12043Photo diode
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12044OLED
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15153Shape the die mounting substrate comprising a recess for hosting the device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/156Material
    • H01L2924/15786Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787Ceramics, e.g. crystalline carbides, nitrides or oxides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/156Material
    • H01L2924/1579Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/182Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/182Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/183Components mounted in and supported by recessed areas of the printed circuit board
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007Types of components
    • H05K2201/10121Optical component, e.g. opto-electronic component
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/06Lamination
    • H05K2203/063Lamination of preperforated insulating layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Photovoltaic Devices (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)

Description

包含用於與一電子裝置整合之導電連接的光電模組
本發明係關於包含用於與一電子裝置整合之導電連接的光電模組。本發明亦係關於用於製造該等模組之晶圓級製程,及係關於併入有此等模組之裝置。
諸如相機光學器件、光模組及感測器模組之光電模組通常整合至諸如行動電話及其他手持式或可攜式裝置之電子裝置以及其他器具中。對此等模組而言,(舉例而言)在一平行製程中經濟製作,且針對該等模組而言,具有儘可能少的機械複雜、難以製造或需小心處置之部件,已變得日益重要。製作製程可係複雜的,此乃因需要將各種光學及/或光電元件整合至該等模組中,然後需要將該等模組組裝至電子裝置(例如,行動電話)中。另外,為在將一光電模組整合至諸如一行動電話之一裝置中時允許該光電模組恰當起作用,需要在該模組與該裝置之間提供電連接。
本發明闡述光電模組及製造方法。該等模組之各種實施方案包含可促進將該等模組整合至一外部裝置中之導電佈線及連接。在某些實施方案中,該等導電佈線及連接可促進將該模組與其他組件整合在 一起。
舉例而言,根據某些實施方案,光電模組包含可促進將該等模組整合至一外部裝置中之導電佈線及連接。某些光電模組包含一光電堆疊,該光電堆疊包含至少一個透鏡及一光電元件。導電路徑可自該模組之底部延伸至頂部。該等導電路徑可包含在該光電元件之表面上之導電襯墊,以及至少部分嵌入於用於該光電堆疊之一基板及一殼體之壁中之佈線。導電連接可安置於該基板之一頂部表面與該等壁之底部表面之間,以使得該等導電連接將第二佈線電連接至第一佈線以及該光電元件之該表面上之該等導電襯墊。該等模組可整合至廣泛範圍之電子裝置。
舉例而言,可以晶圓級製程製造該等模組以使得可同時製造多個光電模組。製造技術可結合封裝一起用於廣泛範圍之光電堆疊。此外,下文詳細闡述之光電堆疊可結合該等製造技術中之任何者一起使用。此外,可在各種細節不同之其他類型之光電堆疊可用於前述製造技術中。
依據以下詳細說明、隨附圖式及申請專利範圍,將易知其他態樣、特徵及優點。
10‧‧‧光電模組/模組
10A‧‧‧模組
10B‧‧‧模組
10C‧‧‧模組
10D‧‧‧模組
10E‧‧‧模組
10F‧‧‧模組
12‧‧‧光電堆疊/透鏡堆疊
12A‧‧‧陣列式相機/陣列式相機堆疊
12B‧‧‧光電堆疊
14‧‧‧光電元件
16‧‧‧透鏡堆疊
16A‧‧‧透鏡堆疊
16B‧‧‧透鏡堆疊
18‧‧‧殼體基板/基板殼體/殼體
20‧‧‧壁/殼體壁/印刷電路板
22‧‧‧導電襯墊/導電觸點
24‧‧‧佈線/導電通孔
26‧‧‧佈線/端子襯墊/導電通孔
28‧‧‧導電連接
30‧‧‧焊料球
32‧‧‧密封件
40‧‧‧第一基板面板/第一印刷電路板/印刷電路板/基板面板
40A‧‧‧第一印刷電路板
42‧‧‧第二基板面板/第二印刷電路板/印刷電路板/基板面板
42A‧‧‧第二印刷電路板/薄印刷電路板
44‧‧‧開口
60‧‧‧光電裝置
61‧‧‧間隔件
61A‧‧‧經機械加工孔
62‧‧‧光學元件
63‧‧‧間隔件
64‧‧‧光發射器/發射器
65‧‧‧間隔件
66‧‧‧光偵測器/偵測器
68‧‧‧平台
69‧‧‧不透明壁
70‧‧‧壁
80‧‧‧組件
82‧‧‧連接線
100‧‧‧黏合劑材料
101‧‧‧黏合劑材料
102‧‧‧各向異性導電膜
104‧‧‧各向異性導電膜
110‧‧‧間隔件/間隔件晶圓
圖1圖解說明一光電模組之一實例。
圖2至圖7圖解說明用於製成多個光電模組之一自下而上之製造製程。
圖8至圖13圖解說明光電模組之其他實例。
圖14至圖18圖解說明用於製成多個光電模組之一自上而下製造製程。
圖19至圖22圖解說明用於製成多個光電模組之另一自上而下製造製程。
圖23至圖25圖解說明使用一間隔件製造光電模組之一方法。
圖26及圖27圖解說明使用一單個印刷電路板及一間隔件製造光電模組之一方法。
圖28至圖30圖解說明使用一單個印刷電路板及一間隔件製造光電模組之又一方法。
如圖1中所示,一光電模組10包含一光電堆疊12,該光電堆疊12又包含一光電元件14及一透鏡堆疊16。透鏡堆疊16可包含一或多個光學元件且可包含將該等光學元件彼此分離之間隔件。因此,舉例而言,透鏡堆疊16可包含一單個透鏡或一透鏡陣列。在所圖解說明之實施方案中,舉例而言,模組10可充當可整合至在模組10外部之一電子裝置(例如,一行動電話或其他手持式或可攜式裝置)中且電連接至其之一相機、一閃光或一感測器。光電元件14之實例包含一影像感測器晶片、一光發射器元件(例如,一LED、OLED或雷射晶片)或一偵測器元件(例如,一光電二極體)。如圖1中所示,透鏡堆疊16安置於光電元件14上面,且與其對準。透鏡堆疊16可(舉例而言)直接附接至光電元件14之頂部表面。導電襯墊22位於光電元件14之頂部表面上,在透鏡堆疊16定位之區域外部。舉例而言,如圖1中所圖解說明,導電襯墊22位於光電元件14之頂部表面之邊緣附近。
光電堆疊12經裝納於由一殼體基板18及殼體壁20構成之一殼體或封裝內。舉例而言,殼體基板18及壁20可由一印刷電路板(PCB)材料(諸如玻璃纖維或陶瓷)形成。如圖1之實例中所圖解說明,光電堆疊12安置於殼體基板18之一頂部表面上,殼體基板18用作殼體之底部,而殼體壁20界定殼體之側壁。一黏合劑材料可提供於基板殼體18之上部表面與光電元件14之下部表面之間。模組10之頂部處之一開口使透鏡堆疊16之頂部曝露至外部用於透射及/或發射光。光電堆疊12 之各側與殼體壁20之毗鄰表面之間的間隔可由密封件32封閉。
殼體基板18包含自基板之頂部表面延伸穿過該基板至其底部表面之佈線24。同樣,殼體壁20包含自頂部表面延伸穿過壁至底部表面之佈線26。舉例而言,佈線24、26可使用一電鍍通孔(PTH)導電通孔製程來形成。如圖1之實例中所圖解說明,佈線24之部分嵌入於殼體基板18內,佈線26之部分嵌入於殼體壁20內。佈線24、26亦可沿著殼體基板18及壁20之上部及下部表面延伸。殼體基板18之底部表面上之佈線24及殼體壁20之頂部表面上之佈線26可用作導電端子襯墊。舉例而言,佈線24、26可使用一導電金屬或金屬合金(諸如銅(Cu)、金(Au)、鎳(Ni)、錫銀(SnAg)、銀(Ag)或鎳鈀(NiPd))藉助一電鍍製程而提供。其他金屬或金屬合金亦可用於某些實施方案中。在圖1之實例中,佈線24、26經圖解說明為分別自殼體基板18及壁20之頂部表面延伸至其底部表面之垂直電鍍導電通孔。然而,在某些實施方案中,電鍍導電通孔可水平向外延伸至模組10之外部側壁。
在某些實施方案中,殼體壁20亦可能至少部分地由類似於透鏡堆疊中所使用之間隔件材料之間隔件材料構成。舉例而言,此可係諸如不透明環氧樹脂或玻璃強化環氧樹脂之聚合物材料。在此情形中,佈線24、26可藉由以下步驟而提供:將導電佈線印刷或噴塗至間隔件上,將一導電塗層施加至該間隔件上,將導電佈線、銷或電鍍通孔嵌入於該間隔件中,或使用導電環氧樹脂材料作為一間隔件。
導電連接28提供於殼體基板18之上部表面與壁20之下部表面之間。導電連接28可採取各種形式中之任何一者,舉例而言,包含導電彈性條帶、導電環氧樹脂或膠、導電POCOTM銷、彈簧連接器,或諸如一各向異性導電膜、環氧樹脂、膏或黏合劑之一各向異性導電材料。導電連接28可直接接觸光電元件14之頂部表面上之導電襯墊22、殼體基板18上之佈線24之上部部分,及壁20上之佈線26之下部部分。 導電連接28因此起到數個功能。首先,該等導電連接將殼體18及壁20機械地固持在一起。其次,該等導電連接在殼體基板18中之佈線24、殼體壁20中之佈線26及光電元件14之頂部表面上之導電襯墊22之間提供導電(亦即,電)路徑。因此,在所圖解說明之實例中,存在自模組10之底部表面延伸穿過模組10至其頂部表面之導電路徑。
在某些實施方案中,焊料球30可經提供作為殼體基板18之底部表面處的佈線24上之一球形格柵陣列(BGA)之一部分。該球形格柵陣列(若存在)可促進將模組10表面安裝至一印刷電路板(PCB),以使得模組10可整合(舉例而言)至一電子裝置(例如,一行動電話)中。因此,導電襯墊22、導電連接28及佈線24之組合能夠將來自光電元件14之信號提供(舉例而言)至模組10外部之一積體電路(例如,一行動電話內之一PCB)。在其他實施方案中,可藉由殼體基板18之底部表面上之導電佈線24直接進行至外部積體電路之電連接。另一選擇係,模組10之頂部上之端子襯墊26可用於至外部積體電路之電連接。
作為一晶圓級製造製程之一部分,可組裝如同模組10之光電模組。藉由圖2至圖7圖解說明此一製程之一實例,該等圖圖解說明可如何以晶圓級執行多個模組10之封裝。如圖2中圖解說明,一第一基板面板(例如,一印刷電路板)40經提供且包含佈線24及用於球形格柵陣列之焊料球30。如圖3中所展示,然後將經預組裝光電堆疊12附接至第一印刷電路板40之一上部表面。舉例而言,可在一先前晶圓級製程期間製造光電堆疊12,以使得並行製造多個光電堆疊12。作為此一製程之一部分,可將光電元件14直接附接至透鏡堆疊16,透鏡堆疊16可(舉例而言)藉由複製(諸如壓凸、模製、壓印、鑄造或蝕刻)製成。在某些情形中,藉助射出模製技術製造透鏡堆疊16。可將該所射出模製透鏡安裝於一架中且堆疊至所要尺寸。作為用於預組裝光電堆疊12之先前晶圓級製程之一部分,可將導電襯墊22提供於光電元件之頂部表 面上。
如圖4中所圖解說明,提供包含佈線26及導電連接28之一第二基板面板(例如,一印刷電路板)42,且其具有對應於光電堆疊12之位置之開口(例如,通孔)44。使第二印刷電路板42與第一印刷電路板40對準,以使得當使印刷電路板接觸時光電堆疊12配合於開口44內。如圖5中所示,然後,藉由導電連接28之方式將第二印刷電路板42之底部表面附接至第一印刷電路板40之頂部表面。此技術可導致導電襯墊22藉由導電連接28之方式嵌入於第一印刷電路板40之頂部表面之間。在某些實施方案中,用一金屬塗層塗佈光電堆疊12之側與殼體壁20之毗鄰表面之間的間隔以提供免受電磁輻射影響之保護。接下來,如圖6中所示,提供密封件32以封閉光電堆疊12之側與第二印刷電路板42之毗鄰表面之間的空間。然後,將印刷電路板40、42分離(舉例而言,藉由切割)成個別模組10,如圖7中所示。
基板面板(例如,印刷電路板40、42)之大小可取決於特定實施方案。然而,作為一實例,基板面板40、42可係200mm×300mm面板,此可容納(舉例而言)大約2000至2500個5mm×5mm大小之光學堆疊。其他尺寸可適合於某些實施方案。
在圖1之實例中,光電堆疊12經圖解說明包含光電元件14上之透鏡堆疊16。然而,其他類型之光電堆疊或裝置以及光電堆疊及/或裝置之組合可併入至一單個模組中。此外,此等模組亦可以類似於上文圖2至圖7中所闡述之製程之一晶圓級製程製造。此等其他模組可包含用於每一光電元件之導電襯墊22,以及用於模組中之每一光電堆疊及裝置之佈線24、26及導電連接28。
舉例而言,圖8展示一模組10A,其包含如結合圖1所闡述之一相機類型光電堆疊12,且亦包含具有一光學元件(例如,一透鏡)62、一光發射器(例如,一LED)64及一光偵測器(例如,一光電二極體)66之 一光電裝置60。如同光電堆疊12,亦可使用一晶圓級製造技術預組裝第二光電裝置60。然後,可將多個預組裝光電堆疊12及光電裝置60附接至一第一印刷電路板。然後,可提供一第二印刷電路板(類似於上文所闡述之印刷電路板42)且將其附接至第一印刷電路板。
圖9圖解說明一模組10B之另一實例,其包含一相機型光電堆疊12及類似於上文結合圖8所闡述之光電裝置之一光電裝置60兩者。模組10B類似於圖8之模組10A。然而,在圖9之實施例中,光電裝置60豎立於一平台68上。舉例而言,可藉由在將預組裝光電堆疊12及光電裝置60附接至第一印刷電路板之前,在第一印刷電路板之部分上添加一額外層來提供平台68。
圖10圖解說明另一模組10C,其包含一陣列式相機12A作為光電堆疊。陣列式相機12A包含光電元件14及一透鏡堆疊16A,其中透鏡對由不透明壁69分離。陣列式相機堆疊12A包含間隔件61、63及65,此可有助於校正透鏡之焦距位移。間隔件61亦包含經機械加工孔61A,該等經機械加工孔可有助於補償焦距位移。在某些情形中,透鏡堆疊16A包含用以校正焦距之偏差之特徵。一焦距校正特徵之一實例包含定位於該(等)透鏡與光電元件14之間的一或多個透明基板。焦距校正特徵之厚度可經調整以便補償焦距之位移。
圖11圖解說明另一模組10D,其包含用於一感測器之一光電堆疊12B,該光電堆疊包含一光發射器(例如,一LED)64及一光偵測器(例如,一光電二極體)66。光發射器64與光偵測器66中之每一者與形成一透鏡堆疊16B之各別透鏡對準。除了分離各別透鏡之不透明壁69外,光發射器64及光偵測器66亦可由實質上對由發射器64發射及/或由偵測器66偵測之光之不過明之一壁70分離。
圖12及圖13圖解說明模組10E、10F之實例,其中光電堆疊12及殼體壁20處於不同高度。特定而言,透鏡堆疊16延伸稍微高於殼體壁 20之頂部。殼體壁20之下部高度允許在模組之頂部上提供其他組件80(例如,一解耦合電容器、一低減磁電壓調節器、一驅動器、一電荷幫浦)或另一模組(例如,一閃光燈或鄰近感測器)。此等其他組件或模組可放置於墊高部頂部上。在某些實施方案中,額外組件80藉由一連接線82電耦合至透鏡堆疊16以促進(舉例而言)自動聚焦、影像穩定化或與透鏡堆疊相關聯之其他功能(諸如對一透鏡、光圈或濾光片之控制)。因此,殼體壁20中之佈線26可用於促成模組之增強功能性。舉例而言,在某些實施方案中,佈線26可促進提供一自動聚焦功能且可促進提供機電致動器、電力解耦合電容器、電阻器、線圈、濾光片、用於一感測器或用於光學器件之驅動器電路,或使用一嵌入式基板製作製程或表面安裝技術(SMT)組裝於一基板上之類似電路。
如自前述闡述明瞭,可使用一晶圓級製造製程將廣泛範圍之光電堆疊整合至模組中。光電堆疊可包含閃光型透鏡堆疊、陣列式相機、單透鏡相機、鄰近感測器或其他類型之光電堆疊。
圖2至圖7之晶圓級製造製程係一自下而上製程(即,以用作殼體基板18之第一印刷電路板40開始)。然而,其他實施方案可使用以第二印刷電路板42開始之一自上而下晶圓級製程。如本發明中所使用,焊料球30被稱為位於模組之「底部」處或附近,而密封件32被稱為位於模組之「頂部」處或附近。同樣地,(沿垂直方向)較接近於模組之底部之一特定組件之一表面可稱為一「底部」表面,而(沿垂直方向)較接近於模組之頂部之一特定組件之一表面可稱為一「頂部」表面
圖14至圖18中圖解說明一實例性自上而下晶圓級製程,其中將光電堆疊12附接至第二印刷電路板42(圖14至圖15),然後附接第一印刷電路板40(圖16至圖17)且然後執行切割以將印刷電路板堆疊分離成個別模組10(圖18)。如之前闡述,導電連接28在佈線24及佈線26之間提供一導電路徑。另外,將一黏合劑材料100(例如,環氧樹脂、 膠、黏膠帶)提供於印刷電路板40、42之相對表面中之一或兩者上(參見圖17),以便有助於將印刷電路板40、42固持在一起直至進行切割為止。同樣地,可在第一印刷電路板40之上部表面與每一光電元件14之下部表面之間提供一黏合劑材料101,以便將第一印刷電路板40一起固持至光電堆疊12。在其他實施方案中亦可以一類似方式提供黏合劑材料101。
在某些實施方案中,可提供額外特徵。舉例而言,圖19至圖22圖解說明使用各向異性導電膜(ACF)102、104作為兩個不同類型之位置中之導電連接。特定而言,(i)在光電元件14之上部表面上之導電觸點22之間提供ACF 102,及(ii)在第一印刷電路板40中之導電通孔24與第二印刷電路板42中之導電通孔26之間提供ACF 104。在所圖解說明之實施方案中,第二印刷電路板42可充當一重新分佈層。由於在印刷電路板42上之接觸襯墊之間存在較多間隔,因此製程可不需要與某些其他實施方案相同之容差精確度。在使印刷電路板40、42彼此附接之前,可將ACF 104提供於印刷電路板40、42中之一者或兩者上。
為減小殼體壁所需之材料之量,某些實施方案將一較薄印刷電路板用於第二基板面板42及一間隔件110,如圖23至圖25之製程中所示。在此實例中,如圖24中所示,將光電堆疊12附接至一相對薄之第二印刷電路板42A(例如,高度明顯小於光電堆疊12之高度之一印刷電路板)。然後,將第一印刷電路板40A附接至毗鄰光電元件14之第二印刷電路板42A,如圖25中所示。另外,將一間隔件晶圓110附接至第一印刷電路板42A以便環繞光電堆疊12之另一端。在將堆疊切割成個別模組之後,間隔件110之壁沿橫向方向比殼體壁20之厚度薄。舉例而言,間隔件110可由實質上對由光電堆疊12中之組件發射或偵測之光之波長不透明之一材料構成。間隔件110亦可包含至少部分嵌入之導電通孔,以使得,如先前所闡述,一導電路徑自模組之底部延伸 至頂部。前述製造製程可以晶圓級執行以便同時製造多個模組。
如上文所闡述,前述實施方案使用彼此附接之兩個印刷電路板。為更進一步減小印刷電路板材料之量,可使用一單個印刷電路板及一間隔件製造光電模組。在以圖26及圖27之順序圖解說明實例時,其中將光電堆疊12附接至相對薄之印刷電路板42A,且然後如上文所闡述附接一間隔件晶圓110。與間隔件晶圓110附接之表面相對的印刷電路板42A之表面包含導通孔及用於球形格柵陣列之焊料球。因此,在切割之後,每一模組包含環繞透鏡堆疊16之殼體壁20及間隔件110。將光電元件14附接至透鏡堆疊16。光電元件14之表面上之導電襯墊22及延伸穿過壁20及間隔件110之導電通孔提供自光電元件14至模組之底部處之焊料球30(圖27之頂部處展示)以及模組之頂部處之導電觸點(圖27之底部處展示)之電連接。若替代經組合之印刷電路板20及間隔件110使用與透鏡堆疊12一樣高之一單個印刷電路板,則導電通孔亦可自印刷電路板之底部延伸至頂部。在某些實施方案中,可將光電元件14附接至薄印刷電路板42A,且然後可將透鏡堆疊16及間隔件110附接於印刷電路板之相對側上,如以圖28至圖30之順序展示。
在圖23至圖30之實施方案中,亦可藉由導電通孔與導電襯墊之間的導電連接(類似於關於其他實施方案所闡述之導電連接)來提供電觸點。
替代印刷電路板,在某些實施方案中可使用其他類型之陶瓷或玻璃纖維基板。
儘管前述圖中之某些圖(例如,圖2至圖7、圖14至圖18、圖19至圖22、圖23至圖25、圖26至圖27及圖28至圖30)圖解說明一特定光電堆疊,但上文所闡述之光電堆疊中之任何者可結合上文所闡述之製造技術中之任何者一起使用。此外,可將可在各種細節不同之其他類型之光電堆疊併入至前述製造技術中。
上文所闡述之影像感測器及其他模組可整合至其中之裝置之實例包含諸如相機電話、生物裝置、行動機器人、監控攝影機、攝錄影機、膝上型電腦及平板電腦之電子裝置以及其他裝置。
其他實施方案係在申請專利範圍之範疇內。
10‧‧‧光電模組/模組
12‧‧‧光電堆疊/透鏡堆疊
14‧‧‧光電元件
16‧‧‧透鏡堆疊
18‧‧‧殼體基板/基板殼體/殼體
20‧‧‧壁/殼體壁/印刷電路板
22‧‧‧導電襯墊/導電觸點
24‧‧‧佈線/導電通孔
26‧‧‧佈線/端子襯墊/導電通孔
28‧‧‧導電連接
30‧‧‧焊料球
32‧‧‧密封件

Claims (33)

  1. 一種光電模組,其包括:一光電堆疊,其包含至少一個透鏡及一光電元件,其中該光電元件具有在其表面上之多個導電襯墊;一殼體,其包含一基板及多個壁,該等壁橫向環繞該至少一個透鏡,使得該至少一個透鏡之至少一部分及該等壁共同具有一交叉平面,該交叉平面平行於該基板,其中該基板包含一第一佈線,該第一佈線之至少一部分嵌入於該基板內且其自該基板之一頂部表面延伸至該基板之一底部表面,其中該等壁包含一第二佈線,該第二佈線之至少一部分嵌入於該等壁內且其自該等壁之一底部表面延伸至該等壁之一頂部表面;及其中有一空的空間存在該至少一個透鏡與包含該第二佈線的該等壁之間;該光電模組包含多個導電連接,該等導電連接安置於該基板之一頂部表面與該等壁之該底部表面之間,其中該等導電連接將該第二佈線電連接至該第一佈線以及該光電元件之該表面上之該等導電襯墊。
  2. 如請求項1之光電模組,其中該等導電連接包括一各向異性導電材料。
  3. 如請求項2之光電模組,其中該各向異性導電材料包括各向異性導電膜、環氧樹脂、膏或黏合劑。
  4. 如請求項1之光電模組,其中該第一佈線及該第二佈線分別包含在該基板及該等壁中之電鍍通孔。
  5. 如請求項1之光電模組,其中該第一佈線之一部分存在於該基板之該底部表面上,該模組進一步包含在該基板之該底部表面上的該第一佈線之該部分上之一或多個焊料球。
  6. 如請求項1之光電模組,其中該第二佈線之一部分存在於該等壁之該頂部表面上。
  7. 如請求項1之光電模組,其中該基板及該等壁係由一印刷電路板材料構成。
  8. 如請求項1之光電模組,其中該基板及該等壁係由一陶瓷或玻璃纖維材料構成。
  9. 一種製造光電模組之方法,該方法包括:將複數個光電堆疊附接至一第一基板,其中每一光電堆疊包含至少一個透鏡及一光電元件,且其中每一光電堆疊之至少一部分配合於該第一基板中之一各別通孔內,其中該光電元件具有在其頂部表面上之多個導電襯墊,且其中該第一基板包含第一佈線,每一第一佈線之至少一部分嵌入於該第一基板內且自該第一基板之一底部表面延伸至該第一基板之一頂部表面,其中該等光電元件之該等導電襯墊中之每一者連接至該第一基板之該底部表面處的該等第一佈線中之一各別者之一部分;將一第二基板附接於該第一基板之該底部表面處,其中該第二基板包含第二佈線,每一第二佈線之至少一部分嵌入於該第二基板內且自該第二基板之一底部表面延伸至該第二基板之一頂部表面,其中該第二基板之該頂部表面處的該等第二佈線中之每一者之一部分透過一各別導電連接而連接至該第一基板之該底部表面處的該等第一佈線中之一各別者之一部分;及將該等經附接之第一及第二基板分離成複數個光電模組。
  10. 如請求項9之方法,其包含:提供一黏合劑材料以將該第一基板 之該底部表面與該第二基板之該頂部表面接合在一起。
  11. 如請求項10之方法,其包含:提供一黏合劑材料以將該第二基板之該上部表面與每一光電堆疊中之該光電元件之一下部表面接合在一起。
  12. 如請求項9之方法,其中每一導電連接包括一各向異性導電材料。
  13. 如請求項12之方法,其中該各向異性導電材料包括各向異性導電膜、環氧樹脂、膏或黏合劑。
  14. 如請求項9之方法,其中每一導電連接包括一導電彈性條帶。
  15. 如請求項9之方法,其中該等第一及第二佈線分別包含在該第一基板及該第二基板中之電鍍通孔。
  16. 如請求項9之方法,其中該第一基板及該第二基板係由一印刷電路板材料構成。
  17. 如請求項9之方法,其中該第一基板及該第二基板係由一陶瓷或玻璃纖維材料構成。
  18. 一種製造光電模組之方法,該方法包括:將複數個光電堆疊附接至一第一印刷電路板,其中每一光電堆疊包含至少一個透鏡及一光電元件,且其中每一光電堆疊之至少一部分配合於該第一印刷電路板中之一各別開口內,其中該光電元件具有在其頂部表面上之多個導電襯墊,且其中該第一印刷電路板包含第一佈線,每一第一佈線之至少一部分嵌入於該第一印刷電路板內且自該第一印刷電路板之一底部表面延伸至該第一印刷電路板之一頂部表面,其中該等光電元件之該等導電襯墊中之每一者藉由各向異性導電膜材料連接至該第一印刷電路板之該底部表面處的該等第一佈線中之一各別者之一部分; 將一第二印刷電路板附接於該第一印刷電路板之該底部表面處,其中該第二印刷電路板包含第二佈線,每一第二佈線之至少一部分嵌入於該第二印刷電路板內且自該第二印刷電路板之一底部表面延伸至該第二印刷電路板之一頂部表面,其中該第二印刷電路板之該頂部表面處的該等第二佈線中之每一者之一部分藉由各向異性導電膜材料而連接至該第一印刷電路板之該底部表面處的該等第一佈線中之一各別者之一部分;及將該等經附接之第一及第二印刷電路板切割成複數個光電模組。
  19. 如請求項18之方法,其中該等第一及第二佈線分別包含在該第一印刷電路板及該第二印刷電路板中之電鍍通孔。
  20. 如請求項18之方法,其中每一光電堆疊包含一透鏡堆疊,該方法包含:將該透鏡堆疊插入至該第一印刷電路板中之該等開口中之一各別者中,以使得該透鏡堆疊之一端在該第一印刷電路板之該頂部表面附近。
  21. 一種製造光電模組之方法,該方法包括:將複數個光電堆疊附接至一第一基板,其中每一光電堆疊包含至少一個透鏡及一光電元件,其中該第一基板包含第一佈線,每一第一佈線之至少一部分嵌入於該第一基板內且自該第一基板之一底部表面延伸至該第一基板之一頂部表面,其中該光電元件具有在其頂部表面上之多個導電襯墊;及將一第二基板附接於該第一基板之該頂部表面處,其中每一光電堆疊之至少一部分配合於該第二基板中之一各別通孔內,其中該第二基板包含第二佈線,每一第二佈線之至少一部分嵌入於該第二基板內且自該第二基板之一底部表面延伸至該第二基板之一頂部表面,其中該等光電元件之該等導電襯墊中之每 一者連接至該第二基板之該底部表面處的該等第二佈線中之一各別者之一部分,且其中該第一基板之該頂部表面處的該等第一佈線中之每一者之一部分透過一各別導電連接而連接至該第二基板之該底部表面處的該等第二佈線中之一各別者之一部分;及將該等經附接之第一及第二基板切割成複數個光電模組。
  22. 如請求項21之方法,其中該等導電連接包括一各向異性導電材料。
  23. 如請求項22之方法,其中該各向異性導電材料包括各向異性導電膜、環氧樹脂、膏或黏合劑。
  24. 如請求項21之方法,其中該等第一及第二佈線分別包含在該第一基板及該第二基板中之電鍍通孔。
  25. 如請求項21之方法,其中該第一基板及該第二基板係由一陶瓷或玻璃纖維材料構成。
  26. 如請求項21之方法,其中該光電堆疊包括一透鏡陣列,該透鏡陣列具有相對於一光電二極體對準之至少一個透鏡且具有相對於一發光二極體對準之至少一個透鏡。
  27. 如請求項21之方法,其中該光電堆疊包含在該第二基板之該頂部表面上面延伸之一透鏡堆疊,該方法包含:將一電子裝置電耦合至該透鏡堆疊用於控制該透鏡堆疊之一功能,其中該電子裝置安置於該第二基板之該頂部表面上方且電耦合至該第二基板之該頂部表面處之該第二佈線。
  28. 如請求項21之方法,其中該光電堆疊包含一陣列式相機。
  29. 一種光電模組,其包括:一透鏡堆疊,其附接至一光電元件之一第一表面,其中該光電元件具有在其第一表面上之導電襯墊; 一殼體,其包含一壁及附接至該壁之一間隔件,其中該壁橫向環繞該透鏡堆疊之一第一部分且包含在一第一表面上之多個導電襯墊,其中該壁之該第一表面上之該等導電襯墊分別與該光電元件之該第一表面上之該等導電襯墊電接觸,其中該間隔件橫向環繞該透鏡堆疊之一第二部分,該間隔件之一橫向寬度小於該壁之一對應橫向寬度,該光電模組進一步包含耦合至該壁之該第一表面上之該等導電襯墊之導電表面安裝連接。
  30. 如請求項29之光電模組,其中該壁及該間隔件包含將該壁之該第一表面上之該等導電襯墊耦合至該間隔件之一自由端上之導電襯墊之電鍍導電通孔。
  31. 如請求項29或30項之光電模組,其中該壁由選自由以下各項組成之一群組之一材料構成:玻璃纖維、一陶瓷、一聚合物及一環氧樹脂。
  32. 如請求項29或30項之光電模組,其中該間隔件由實質上對由該光電元件發射或可偵測之光之一波長不透明之一材料構成。
  33. 如請求項29或30項之光電模組,其進一步包含安置於與該透鏡堆疊位於其上之該光電元件之一側相對的該光電元件之一側處之一基板,其中該基板包含延伸穿過該基板且電耦合至該導電表面安裝連接以及該光電元件之該第一表面上之該等導電襯墊之電鍍導電通孔。
TW102139852A 2012-11-02 2013-11-01 包含用於與一電子裝置整合之導電連接的光電模組 TWI590425B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US201261721720P 2012-11-02 2012-11-02
US13/685,193 US8606057B1 (en) 2012-11-02 2012-11-26 Opto-electronic modules including electrically conductive connections for integration with an electronic device

Publications (2)

Publication Number Publication Date
TW201423964A TW201423964A (zh) 2014-06-16
TWI590425B true TWI590425B (zh) 2017-07-01

Family

ID=49681604

Family Applications (1)

Application Number Title Priority Date Filing Date
TW102139852A TWI590425B (zh) 2012-11-02 2013-11-01 包含用於與一電子裝置整合之導電連接的光電模組

Country Status (3)

Country Link
US (1) US8606057B1 (zh)
TW (1) TWI590425B (zh)
WO (1) WO2014070107A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI675284B (zh) * 2017-09-21 2019-10-21 美商谷歌有限責任公司 可攜式電子裝置及其製造方法

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6123271B2 (ja) * 2012-12-14 2017-05-10 富士通株式会社 光電複合基板の製造方法
US9681032B1 (en) 2015-03-17 2017-06-13 Amazon Technologies, Inc. Imager module with molded packaging
US9848111B1 (en) * 2015-03-17 2017-12-19 Amazon Technologies, Inc. Imager module with molded packaging
DE102016103123A1 (de) * 2016-02-23 2017-08-24 Vishay Semiconductor Gmbh Optoelektronische Vorrichtung
US10243111B2 (en) 2016-06-29 2019-03-26 Ams Sensors Singapore Pte. Ltd. Optoelectronic device subassemblies and methods of manufacturing the same
US10551596B2 (en) 2016-06-29 2020-02-04 Ams Sensors Singapore Pte. Ltd. Optical and optoelectronic assemblies including micro-spacers, and methods of manufacturing the same
CN108627936B (zh) * 2018-04-10 2020-02-21 Oppo广东移动通信有限公司 激光投射结构和电子装置
EP4340555A2 (en) 2018-06-11 2024-03-20 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Method of manufacturing a component carrier with a stepped cavity and a stepped component assembly being embedded within the stepped cavity

Family Cites Families (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5195154A (en) * 1990-04-27 1993-03-16 Ngk Insulators, Ltd. Optical surface mount technology (o-smt), optical surface mount circuit (o-smc), opto-electronic printed wiring board (oe-pwb), opto-electronic surface mount device (oe-smd), and methods of fabricating opto-electronic printed wiring board
EP1443344A1 (en) 2003-01-29 2004-08-04 Heptagon Oy Manufacturing micro-structured elements
EP1542074A1 (en) 2003-12-11 2005-06-15 Heptagon OY Manufacturing a replication tool, sub-master or replica
EP1569276A1 (en) 2004-02-27 2005-08-31 Heptagon OY Micro-optics on optoelectronics
EP1720794A2 (en) * 2004-03-01 2006-11-15 Tessera, Inc. Packaged acoustic and electromagnetic transducer chips
US7897503B2 (en) * 2005-05-12 2011-03-01 The Board Of Trustees Of The University Of Arkansas Infinitely stackable interconnect device and method
US20070216047A1 (en) 2006-03-20 2007-09-20 Heptagon Oy Manufacturing an optical element
US20070216049A1 (en) 2006-03-20 2007-09-20 Heptagon Oy Method and tool for manufacturing optical elements
US20070216048A1 (en) 2006-03-20 2007-09-20 Heptagon Oy Manufacturing optical elements
US20070216046A1 (en) 2006-03-20 2007-09-20 Heptagon Oy Manufacturing miniature structured elements with tool incorporating spacer elements
US20100072640A1 (en) 2006-06-09 2010-03-25 Heptagon Oy Manufacturing a replication tool, sub-master or replica
US7423335B2 (en) * 2006-12-29 2008-09-09 Advanced Chip Engineering Technology Inc. Sensor module package structure and method of the same
US7692256B2 (en) 2007-03-23 2010-04-06 Heptagon Oy Method of producing a wafer scale package
US9400394B2 (en) 2007-05-14 2016-07-26 Heptagon Micro Optics Pte. Ltd. Illumination system
JP5580207B2 (ja) 2007-11-27 2014-08-27 ヘプタゴン・マイクロ・オプティクス・プライベート・リミテッド ウェハ・スケール・パッケージおよびその製作方法、ならびに光学デバイスおよびその製作方法
US20090159200A1 (en) 2007-12-19 2009-06-25 Heptagon Oy Spacer element and method for manufacturing a spacer element
TW200937642A (en) 2007-12-19 2009-09-01 Heptagon Oy Wafer stack, integrated optical device and method for fabricating the same
TWI478808B (zh) 2007-12-19 2015-04-01 Heptagon Micro Optics Pte Ltd 製造光學元件的方法
TWI481496B (zh) 2007-12-19 2015-04-21 Heptagon Micro Optics Pte Ltd 製造光學元件的方法
TWI505703B (zh) 2007-12-19 2015-10-21 Heptagon Micro Optics Pte Ltd 光學模組,晶圓等級的封裝及其製造方法
TWI484237B (zh) 2007-12-19 2015-05-11 Heptagon Micro Optics Pte Ltd 用於攝影裝置的光學模組、擋板基板、晶圓級封裝、及其製造方法
KR101353934B1 (ko) 2007-12-27 2014-01-22 삼성전기주식회사 전기소자를 구비한 이미지센서 모듈 및 그 제조방법
US8828174B2 (en) 2008-08-20 2014-09-09 Heptagon Micro Optics Pte. Ltd. Method of manufacturing a plurality of optical devices
US8193555B2 (en) * 2009-02-11 2012-06-05 Megica Corporation Image and light sensor chip packages
TWI511243B (zh) * 2009-12-31 2015-12-01 Xintec Inc 晶片封裝體及其製造方法
WO2011097175A2 (en) * 2010-02-05 2011-08-11 Luxera, Inc. Integrated electronic device for controlling light emitting diodes

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI675284B (zh) * 2017-09-21 2019-10-21 美商谷歌有限責任公司 可攜式電子裝置及其製造方法
US10461744B2 (en) 2017-09-21 2019-10-29 Google Llc Proximity sensor connection mechanism

Also Published As

Publication number Publication date
TW201423964A (zh) 2014-06-16
WO2014070107A1 (en) 2014-05-08
US8606057B1 (en) 2013-12-10

Similar Documents

Publication Publication Date Title
TWI590425B (zh) 包含用於與一電子裝置整合之導電連接的光電模組
US8891006B2 (en) Wafer level camera module with active optical element
US9786820B2 (en) Opto-electronic module and method for manufacturing the same
US9258467B2 (en) Camera module
US7665915B2 (en) Camera module, method of manufacturing the same, and printed circuit board for the camera module
CA2571345C (en) System and method for mounting an image capture device on a flexible substrate
US8092102B2 (en) Camera module with premolded lens housing and method of manufacture
US20110102667A1 (en) Camera module with fold over flexible circuit and cavity substrate
US20100328525A1 (en) Camera module
US20080170141A1 (en) Folded package camera module and method of manufacture
US9197803B2 (en) Camera module
CN105657296B (zh) 具有互连层间隙的图像感测设备及相关方法
JP2007243960A (ja) カメラモジュール及びカメラモジュールの製造方法
US9997554B2 (en) Chip scale package camera module with glass interposer having lateral conductive traces between a first and second glass layer and method for making the same
US11114573B2 (en) Optoelectronic module assembly and manufacturing method
US9059058B2 (en) Image sensor device with IR filter and related methods
CN107808889B (zh) 叠层封装结构及封装方法
CN114402582B (zh) 镜头模组及其制作方法
JP2004221634A (ja) 光モジュール及びその製造方法並びに電子機器