TWI590105B - Input Device and Status Detecting Method Using the Same - Google Patents

Description

Input device and its state detection method

The present invention relates to a method and apparatus for detecting a state of an input device, and more particularly to a method for detecting the state of an input device component by means of interrupt processing and related devices.

With the development of information technology, the rise of e-sports has led to the vigorous development of related products. In general, the performance of e-sports peripheral electronic devices often directly affects the performance of the contestants, and thus becomes the key to the outcome. For example, the response speed of the keyboard and mouse, the probability of a peripheral device generating an error reaction, and the like. Since the current matrix array type keyboard detects that the button is tapped, the signal line of the keyboard array needs to be scanned line by line to confirm the position of the tapped button in the keyboard matrix, and according to the position, After checking the table, the scan code of the button is obtained, and finally the corresponding scan code is sent according to the translated format. As a result, the long processing time also causes the problem of slow response. In addition, when the user inputs a combination key or types a plurality of keys at the same time, problems such as a drop key or a ghost key may occur. Although the existing keyboard uses different scanning technologies and detection methods to speed up the response of the keyboard or prevent ghost key or key conflicts. However, the current keyboard detects the scanning via the keyboard, checks whether there are ghost keys, and the like, and instead increases the response time of the keyboard. In this way, if the user uses the game or the e-sports, it not only causes inconvenience to the user, but also affects the performance of the user at the time of the competition due to ghost keys or key problems.

Therefore, the main object of the present invention is to provide a state detecting method for an input device and related devices for improving the response speed of the input device and avoiding the probability of detecting errors.

The invention discloses a state detecting method for an input device, which is used in a computer system, comprising: when a plurality of input components of the input device are triggered, generating a plurality of interrupt signals corresponding to the plurality of input components; a plurality of interrupt signals, a plurality of interrupt flags corresponding to the plurality of input elements are set; and the input corresponding to the plurality of first interrupt flags is transmitted according to the plurality of first interrupt flags in the plurality of interrupt flags Scanning code of the component to the computer system, wherein the number of the plurality of first interrupt flags is related to the capacity of the address buffer; and clearing the plurality of first interrupt flags in the plurality of interrupt flags; And detecting at least one second interrupt flag of the plurality of interrupt flags that has not been cleared, and transmitting a scan code corresponding to the input component of the at least one second interrupt flag to the computer system.

The invention further discloses an input device comprising: a plurality of input elements, wherein each input element is triggered to generate a corresponding interrupt signal; a data register for storing a plurality of interrupts corresponding to the plurality of input elements a service routine; an address register; and a controller; wherein, when a plurality of input elements of the input device are triggered, generating a plurality of interrupt signals corresponding to the plurality of input elements, the controller is based on the plurality of Interrupt signals establish a plurality of interrupt flags corresponding to the plurality of input elements and transmit scans corresponding to the input elements of the plurality of first interrupt flags according to the plurality of first interrupt flags in the plurality of interrupt flags Code to the computer system, wherein the number of the plurality of first interrupt flags is related to the capacity of the address buffer, and the controller clears the plurality of first interrupt flags in the plurality of interrupt flags; And detecting at least one second interrupt flag of the plurality of interrupt flags that has not been cleared, and transmitting an input component corresponding to the at least one second interrupt flag Scan code to the computer system.

Please refer to FIG. 1. FIG. 1 is a schematic diagram of an input device 10 according to an embodiment of the present invention. The input device 10 is used in a computer system, and includes a controller 102, a plurality of input elements 104, an address register 106, and a data register 108. Each input element 104 is independently coupled to the controller 102. A corresponding interrupt signal is generated when each input element 104 is tapped or operated. That is, each input element 104 is in a one-to-one corresponding architecture with the controller 102. The controller 102 stores the status information when the plurality of input elements 104 are triggered by the address register 106. The data register 108 is used to store a plurality of Interrupt Service Routines (ISRs) corresponding to the plurality of input elements 104. Each of the input elements has a dedicated interrupt service routine. When the dedicated interrupt service routine is read from the data register 108 and executed, the scan code of the corresponding input component is sent to the computer system for use. The input device 10 can be a different input device such as a keyboard, a mouse, a remote controller, etc., and is not limited thereto. Input device 10 can include a plurality of input elements 104, such as keyboard keys, mouse buttons, remote buttons, and the like. When the user taps or operates a plurality of input elements, the input elements trigger a plurality of interrupt signals corresponding to the plurality of input elements (for example, when the user uses the keyboard, the combination of multiple keys is simultaneously pressed) . In order to improve user convenience, the present invention directly controls a one-to-one correspondence between a plurality of input elements 104 and their signals, that is, when the controller 102 detects that at least one input element 104 is triggered. The device 102 can directly detect the input component 104 and send the scan code of the input component 104. Thus, the present invention can correctly and quickly reflect the state of the input device.

Please refer to FIG. 2, which is a schematic diagram of a detection process 20 according to an embodiment of the present invention. The detection process 20 can be compiled into computer readable media for storage in the controller 102 and instructed and executed via the controller 102. The detection process 20 includes the following steps:

Step 202: Start.

Step 204: Generate a plurality of interrupt signals corresponding to the plurality of input elements when the plurality of input elements are triggered.

Step 206: Set a plurality of interrupt flags corresponding to the plurality of input elements according to the plurality of interrupt signals.

Step 208: Transmit a scan code corresponding to the input elements of the plurality of first interrupt flags to the computer system according to the plurality of first interrupt flags in the plurality of interrupt flags.

Step 210: Clear a plurality of first interrupt flags.

Step 212: Detect a second interrupt flag of the plurality of interrupt flags that has not been cleared, and accordingly transmit a scan code corresponding to the input component of the second interrupt flag to the computer system.

Step 214: End.

In short, according to the detection process 20, when the user uses the input device 10 (eg, a keyboard), when multiple input elements 104 (eg, keys on the keyboard) are tapped, a plurality of interrupt signals and interrupt flags are triggered. The controller 102 will detect the generated interrupt signal and its corresponding interrupt flag by the one-to-one corresponding interrupt signal and the interrupt flag triggered by the input component 104, and accordingly, corresponding to the The scan code of the input component is sent out to the computer system. In this way, the present invention does not need to use the operation flow of the traditional keyboard (keyboard detection scan, ghost key prevention, query code table, etc.), and directly returns the scan code of the key when the button is triggered, to ensure The trigger signal of each input component of the input device is surely processed, and the state of the key is prevented from occurring, thereby increasing the response speed of the keyboard.

In detail, in step 204, when the user taps or operates a plurality of input elements 104, a plurality of interrupt signals corresponding to the input elements that are tapped or operated are triggered. In step 206, a plurality of interrupt flags corresponding to the plurality of input elements that are tapped or operated are set according to the plurality of interrupt signals. For example, when the letter buttons A to D of the input device 10 are simultaneously tapped, the interrupt signals INT_A, INT_B, INT_C, and INT_D are generated, and the interrupt flags INT_A flag, INT_B flag, INT_C flag, and INT_D flag are set.

Next, in step 208, the scan code corresponding to the input elements of the plurality of first interrupt flags is transmitted to the computer system according to the plurality of first interrupt flags in the plurality of interrupt flags. The number of the first interrupt flag is the capacity of the associated address register 106. For example, the number of first interrupt flags is equal to the number of addresses that the address register 106 can store. Specifically, due to hardware limitations, the address register 160 can store a limited number of addresses. In step 208, a part of the interrupt flags (ie, a plurality of first interrupt flags) of all the interrupt flags may be processed according to the capacity of the address register 106 to transmit a plurality of first interrupt flags. Mark the scan code of the input component to the computer system.

For example, if the address register 106 is a stack register, the number of addresses that can be stored is three. When the letter buttons A to D of the input device 10 are simultaneously tapped, the interrupt signals INT_A, INT_B, INT_C, and INT_D and the interrupt flags INT_A flag, INT_B flag, INT_C flag, and INT_D flag are generated, and the interrupt flag INT_A flag can be processed first. Three of the interrupt flags, INT_B flag, INT_C flag, and INT_D flag. For example, the interrupt flag INT_A flag, INT_B flag, and INT_C flag are processed first. Referring to FIG. 3, when the processor of the computer system executes to a certain line of the main program, when the letter buttons A to D generate an interrupt signal through the trigger of the user, the processor raises the interrupt flag INT_flag according to the interrupt signals. The notification then stops the main program action and stores the address (eg, 0x00A0) currently executed by the main program in the address register 106. The controller 102 obtains the address of the interrupt service routine corresponding to the letter buttons A, B, and C of the interrupt flag INT_A flag and the interrupt flag INT_C flag according to the interrupt flags INT_A flag, INT_B flag, and INT_C flag. Then, jump to the address of the interrupt service routine of the letter button A of the interrupt flag INT_A flag, and prepare to start the interrupt service routine of the letter A of the INT_A flag. Since the interrupt flag INT_B flag and the interrupt flag INT_C flag have not been processed yet, the address of the interrupt service routine (for example, 0xF0A0) corresponding to the letter A of the interrupt flag INT_A flag is stored to the address. The register 106 jumps to the address of the interrupt service routine of the letter B of the interrupt flag INT_B flag to prepare to start executing the interrupt service routine corresponding to the letter B of the interrupt flag INT_B flag. In this case, since the interrupt flag INT_C flag is still processed, the address of the interrupt service routine (for example, 0xBBA0) corresponding to the letter B of the interrupt flag INT_B flag is also stored to the address temporary storage. The device 106 jumps to the address of the interrupt service routine of the letter C of the interrupt flag INT_C flag (for example, 0xB0A0) to prepare to execute the interrupt service routine corresponding to the letter C of the interrupt flag INT_C flag.

Next, an interrupt service routine corresponding to the letter button C of the interrupt flag INT_C flag is executed to transmit the scan code of the letter button C to the computer system. After the interrupt service routine corresponding to the letter C of the interrupt flag INT_C flag is executed, the address of the interrupt service routine corresponding to the letter B of the interrupt flag INT_B flag is obtained from the address register 106 ( For example, 0xBBA0) and execute the interrupt service routine corresponding to the letter B of the interrupt flag INT_B flag to transmit the scan code of the letter button B to the computer system. Similarly, after the interrupt service routine corresponding to the letter B of the interrupt flag INT_C flag is executed, the interrupt service routine corresponding to the letter button A of the interrupt flag INT_A flag is obtained from the address register 106. The address (for example, 0x0FA0) and the interrupt service routine corresponding to the letter button A of the interrupt flag INT_A flag is executed to transmit the scan code of the letter button A to the computer system. In this way, the scan codes of the letter keys A, B and C are supplied to the computer system. Then, the computer system reads the address (for example, 0x00A0) executed by the current main program stored in the previous address register 106 and returns to the execution position of the original main program. That is to say, in step 208, part of the interrupt flag of the plurality of interrupt flags can be processed according to the capacity of the address register 106 and the corresponding scan code is sent to the computer system.

Since the scan code corresponding to the input elements of the plurality of first interrupt flags has been transmitted to the computer system, in step 210, the plurality of first interrupt flags in the plurality of first interrupt flags are cleared.

Next, in step 212, it is detected whether there is an interrupt flag (ie, a second interrupt flag) that is not cleared in the plurality of interrupt flags. If any, it indicates that the interrupt signal generated by the input component and the corresponding interrupt flag have not been processed. In step 212, the scan code of its corresponding input component is transmitted to the computer system according to the interrupt flag that has not been cleared. For example, if the address register 106 is a stack register, the number of addresses that can be stored is three. The interrupt signals INT_A, INT_B, INT_C, and INT_D and the interrupt flags INT_A flag, INT_B flag, INT_C flag, and INT_D flag are generated when the letter buttons A to D of the input device 10 are simultaneously tapped. As shown in Figure 3, if the scan codes for letter buttons A, B, and C have been provided to the computer system. Furthermore, according to step 210, the interrupt flags INT_A flag, INT_B flag, and INT_C flag have also been cleared. In this case, the interrupt flag INT_D flag is not cleared because it still exists. In step 212, as shown in FIG. 4, the input device 10 can detect that the interrupt flag INT_D flag has not been cleared. The processor of the computer system stores the address (e.g., 0xFFA0) currently executed by the main program in the address register 106. Next, the controller 102 obtains an address of the interrupt service routine (for example, 0xA0FF) corresponding to the letter button D of the interrupt flag INT_D according to the interrupt flag INT_D flag. Then, jump to the address of the interrupt service routine of the letter D of the interrupt flag INT_D flag (for example, 0xA0FF), and execute the interrupt service routine corresponding to the letter button D of the interrupt flag INT_C flag to transmit the corresponding INT_D. The letter of the letter of the button D is scanned to the computer system. In this way, the scan codes of the letter buttons A to D of the input device 10 are all transmitted to the computer system without a situation in which the key drop and the key position conflict. Furthermore, the input device of the present invention detects the state of the button by a one-to-one architecture, thereby effectively eliminating the lengthy time of scanning the keyboard, thereby improving the response speed of the keyboard, thereby improving convenience.

On the other hand, in step 212, after the scan codes corresponding to the input elements of the second interrupt flags are transmitted to the computer system, the second interrupt flags are cleared. In addition, if the number of interrupt flags (second interrupt flags) detected to be uncleared is greater than the number of addresses that can be stored by the address register 106, the operations may be performed according to the operations of steps 208 and 210. The address register 106 can store the number of addresses to gradually process the un-cleared interrupt flag to transmit the scan code of the corresponding input component to the computer system.

Please refer to FIG. 5 and FIG. 6 . FIG. 5 and FIG. 6 are respectively schematic diagrams of a hardware architecture according to an embodiment of the present invention. In one embodiment, as shown in FIG. 5, the present invention uses a one-to-one corresponding architecture to detect the state of the keys. Therefore, the controller 102 of the input device 10 can employ a Printed Circuit Board (PCB). To replace the traditional laminate. However, due to the length and complexity of the PCB traces and the short interruption of response time, the anti-interference ability of external noise suppression is reduced. In order to solve the above problem, the present invention adds a ceramic capacitor of tens to hundreds of pf levels to the input end of each triggered interrupt signal for debounce processing of the input signal. That is to say, when a trigger signal is generated, the trigger signal is stabilized by the ceramic capacitor and then enters the controller 102. In addition, as shown in FIG. 6, in order to effectively block the radio frequency interference (RFI) outside the PCB printing plate of the controller 102 from entering the inner layer signal line, the PCB board of the controller 102 of the present invention will The surface layer is surrounded by a GND plane to achieve the shortest noise suppression path. In this way, it is possible to effectively suppress external bursts of high-frequency noise (Anti-noise).

It is to be noted that the foregoing embodiments are intended to illustrate the spirit of the invention, and those of ordinary skill in the art may be modified as appropriate, and are not limited thereto. For example, the number of interrupted levels can be adjusted according to the hardware device, and the input device of the present invention can be used for other input devices, such as a multi-button rocker or a remote control, in addition to the keyboard. In addition, the state detecting method of the input device of the present invention can also be applied to other related detecting devices to improve the reaction speed or ensure that each input signal can be correctly sent out in a one-to-one correspondence.

In summary, the present invention provides a state detection method and related device for an input device of a one-to-one architecture, which not only eliminates redundant scanning input devices, avoids ghost keys, combination keys, or drop keys, etc., Improve the response speed of the keyboard, and solve problems such as ghost keys and key conflicts, thereby improving the correctness of the input device. The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should be within the scope of the present invention.

10‧‧‧Input device

102‧‧‧ Controller

104‧‧‧ Input components

106‧‧‧ address register

108‧‧‧data register

20‧‧‧Detection process

202~214‧‧‧Steps

INT_flag, INT_A flag, INT_B flag, INT_C flag, INT_D flag‧‧‧ interrupt flag

FIG. 1 is a schematic diagram of an input device according to an embodiment of the present invention. FIG. 2 is a schematic diagram of a detection process according to an embodiment of the present invention. FIG. 3 and FIG. 4 are respectively schematic diagrams of detecting operations according to an embodiment of the present invention. 5 and 6 are respectively schematic views of a hardware architecture of an embodiment of the present invention.

20‧‧‧Detection process

202~214‧‧‧Steps

Claims (13)

A state detecting method for an input device, comprising: a computer system, comprising: generating a plurality of interrupt signals corresponding to the plurality of input elements when a plurality of input elements of the input device are triggered; according to the plurality of interrupts a signal, a plurality of interrupt flags corresponding to the plurality of input elements are set; and a scan corresponding to the input elements of the plurality of first interrupt flags is transmitted according to the plurality of first interrupt flags in the plurality of interrupt flags Code to the computer system, wherein the number of the plurality of first interrupt flags is related to the capacity of the address buffer; clearing the plurality of first interrupt flags in the plurality of interrupt flags; and detecting At least one second interrupt flag of the plurality of interrupt flags that has not been cleared, and correspondingly transmitting a scan code corresponding to the input component of the at least one second interrupt flag to the computer system; wherein the plurality of first The number of interrupt flags is equal to the number of addresses that can be stored by the address register. The state detecting method of claim 1, wherein the scan code corresponding to the input element of the plurality of first interrupt flags is transmitted to the computer according to the plurality of first interrupt flags in the plurality of interrupt flags The step of the system includes obtaining, according to the plurality of first interrupt flags in the plurality of interrupt flags, an interrupt service routine corresponding to the input elements of the plurality of first interrupt flags, to transmit corresponding to the complex number The scan code of the input component of the first interrupt flag is sent to the computer system. The state detecting method of claim 1, wherein the at least one second interrupt flag that has not been cleared in the plurality of interrupt flags is detected and transmitted according to the at least one second interrupt flag The step of inputting the scan code of the component to the computer system includes: detecting the at least one second interrupt flag of the plurality of interrupt flags that has not been cleared; Obtaining, according to the at least one second interrupt flag, an interrupt service routine corresponding to the input component of the at least one second interrupt flag, to transmit a scan code corresponding to the input component of the at least one second interrupt flag To the computer system. The state detecting method of claim 1, further comprising: clearing the at least one second interrupt flag of the plurality of interrupt flags. The state detecting method of claim 1, wherein the address register is a stack register. An input device includes: a plurality of input elements, wherein each input element is triggered to generate a corresponding interrupt signal; a data register for storing a plurality of interrupt service routines corresponding to the plurality of input elements; An address register; and a controller; wherein, when a plurality of input elements of the input device are triggered, generating a plurality of interrupt signals corresponding to the plurality of input elements, the controller is set according to the plurality of interrupt signals Corresponding to the plurality of interrupt flags of the plurality of input elements and transmitting scan codes corresponding to the input elements of the plurality of first interrupt flags to the computer according to the plurality of first interrupt flags in the plurality of interrupt flags a system, wherein the number of the plurality of first interrupt flags is related to a capacity of an address register, the controller clears the plurality of first interrupt flags in the plurality of interrupt flags; and detecting the At least one second interrupt flag of the plurality of interrupt flags that has not been cleared, and correspondingly transmitting a scan code corresponding to the input component of the at least one second interrupt flag to the Brain; wherein the plurality of first interrupt flag is equal to the number of the address register can store the address number. The input device of claim 6, further comprising a data register for storing a plurality of interrupt service routines corresponding to the plurality of input elements. The input device of claim 7, wherein the controller is based on the plurality of first interrupt flags in the plurality of interrupt flags, and is obtained by the data register and executed corresponding to the plurality of first interrupt flags The interrupt service routine of the input component is configured to transmit a scan code corresponding to the input component of the plurality of first interrupt flags to the computer system. The input device of claim 7, wherein the controller detects the at least one second interrupt flag of the plurality of interrupt flags that has not been cleared, and temporarily delays the data according to the at least one second interrupt flag. The memory fetches and executes an interrupt service routine corresponding to the input component of the at least one second interrupt flag to transmit a scan code corresponding to the input component of the at least one second interrupt flag to the computer system. The input device of claim 6, wherein the controller clears the at least one second interrupt flag corresponding to the plurality of interrupt flags. The input device of claim 6, wherein the address register is a stack register. The input device of claim 6, wherein the input device further comprises at least one ceramic capacitor for suppressing external burst high frequency noise. The input device of claim 6, wherein the line surface of one of the input devices is Set the ground plane to surround it.