TWI588850B - Oscillator circuit and operating method of oscillator circuit - Google Patents

Oscillator circuit and operating method of oscillator circuit Download PDF

Info

Publication number
TWI588850B
TWI588850B TW104121048A TW104121048A TWI588850B TW I588850 B TWI588850 B TW I588850B TW 104121048 A TW104121048 A TW 104121048A TW 104121048 A TW104121048 A TW 104121048A TW I588850 B TWI588850 B TW I588850B
Authority
TW
Taiwan
Prior art keywords
conductive
loop
oscillator
conduction
inductive device
Prior art date
Application number
TW104121048A
Other languages
Chinese (zh)
Other versions
TW201612930A (en
Inventor
陳煥能
周淳朴
Original Assignee
台灣積體電路製造股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US14/319,787 external-priority patent/US9473152B2/en
Application filed by 台灣積體電路製造股份有限公司 filed Critical 台灣積體電路製造股份有限公司
Publication of TW201612930A publication Critical patent/TW201612930A/en
Application granted granted Critical
Publication of TWI588850B publication Critical patent/TWI588850B/en

Links

Landscapes

  • Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)
  • Near-Field Transmission Systems (AREA)

Description

振盪器電路與振盪器電路的操作方法 Oscillator circuit and oscillator circuit operation method

本揭露係關於用於電感裝置的耦合結構。 The present disclosure relates to a coupling structure for an inductive device.

在積體電路中,時脈樹(clock tree)通常用於將共同的時脈信號分布至不同的元件,以同步化其操作。時脈信號在積體電路的兩個或多個時脈元件到達時間的差異可造成積體電路的操作錯誤。在一些應用中,用於共同時脈信號分布的時脈樹係包含例如H樹篩或平衡緩衝樹之結構。在許多例子中,以足以驅動分布共同時脈信號沿著時脈樹之電流,將分布時脈信號之到達的不匹配最小化。隨著時脈信號的頻率增加,驅動時脈樹的電力消耗增加。同樣地,時脈緩衝器在時脈樹之不同階段從電源供應汲取的大量電流,因而藉由造成供應電壓的電壓降而影響附近元件的效能。在一些應用中,時脈樹使用積體電路之總電力消耗的20%至40%。 In integrated circuits, a clock tree is typically used to distribute common clock signals to different components to synchronize their operation. The difference in the arrival time of the clock signal at the two or more clock elements of the integrated circuit can cause an operational error of the integrated circuit. In some applications, the clock tree for the common clock signal distribution includes structures such as H-tree screens or balanced buffer trees. In many instances, the mismatch in the arrival of the distributed clock signal is minimized at a current sufficient to drive the distribution of the common clock signal along the clock tree. As the frequency of the clock signal increases, the power consumption of the driving clock tree increases. Similarly, the clock buffer draws a large amount of current from the power supply at different stages of the clock tree, thus affecting the performance of nearby components by causing a voltage drop in the supply voltage. In some applications, the clock tree uses 20% to 40% of the total power consumption of the integrated circuit.

本揭露的一些實施例係提供一種電路,其包括耦合結構,其包括二或多個傳導迴路;以及一組傳導路徑,其電性連接該二或多個傳導迴路;以及第一電感裝置,其磁性耦合至該二或多個傳導迴路的第一傳導迴路。 Some embodiments of the present disclosure provide a circuit including a coupling structure including two or more conductive loops; and a set of conductive paths electrically connected to the two or more conductive loops; and a first inductive device Magnetically coupled to the first conduction loop of the two or more conduction loops.

本揭露的一些實施例係提供一種電路,其包括第一振 盪器,其包括電感裝置;第二振盪器,其包括電感裝置;以及耦合結構,其包括第一傳導迴路,其磁性耦合至該第一振盪器的該電感裝置;第二傳導迴路,其磁性耦合至該第二振盪器的該電感裝置;以及一組傳導路徑,其電性連接該第一傳導迴路與該第二傳導迴路。 Some embodiments of the present disclosure provide a circuit including a first oscillator a oscillating device comprising: an inductive device; a second oscillator comprising an inductive device; and a coupling structure comprising a first conducting loop magnetically coupled to the inductive device of the first oscillator; a second conducting loop, magnetically An inductive device coupled to the second oscillator; and a set of conductive paths electrically coupled to the first conductive loop and the second conductive loop.

本揭露的一些實施例係提供一種方法,其包括響應第一振盪器的第一電感裝置所產生的第一磁場,在耦合結構的第一傳導迴路,產生感應電流;以及將該感應電流經由電性連接該第一與第二傳導迴路的該耦合結構之一組傳導路徑,而傳輸至該耦合結構的第二傳導迴路,第二振盪器的第二電感裝置係經由該耦合結構而磁性耦合至該第一振盪器的該第一電感裝置。 Some embodiments of the present disclosure provide a method including generating a induced current in a first conductive loop of a coupling structure in response to a first magnetic field generated by a first inductive device of a first oscillator; and transmitting the induced current via electricity And a pair of conductive paths connecting the first and second conductive loops to the second conductive loop of the coupling structure, and the second inductive device of the second oscillator is magnetically coupled to the second inductor The first inductive device of the first oscillator.

100A‧‧‧振盪器 100A‧‧‧Oscillator

100B‧‧‧振盪器 100B‧‧‧Oscillator

110A‧‧‧電感裝置 110A‧‧‧Inductive device

120A‧‧‧電容裝置 120A‧‧‧Capacitive device

130A‧‧‧主動迴授裝置 130A‧‧‧Active feedback device

140A‧‧‧切換裝置 140A‧‧‧Switching device

152A‧‧‧輸出節點 152A‧‧‧Output node

154A‧‧‧互補輸出節點 154A‧‧‧Complementary Output Node

152B‧‧‧互補輸出節點 152B‧‧‧Complementary Output Node

132A、134A‧‧‧N型電晶體 132A, 134A‧‧‧N type transistor

162A、162B‧‧‧接地參考節點 162A, 162B‧‧‧ Ground Reference Node

164A、164B‧‧‧供應參考節點 164A, 164B‧‧‧ supply reference node

112A、114A‧‧‧電感器 112A, 114A‧‧‧Inductors

122A、122B‧‧‧粗調電容器 122A, 122B‧‧‧ coarse adjustment capacitor

124A、124B‧‧‧微調電容器 124A, 124B‧‧‧ trimmer capacitor

170A、170B‧‧‧路徑 170A, 170B‧‧ Path

110B‧‧‧電感裝置 110B‧‧‧Inductive device

120B‧‧‧電容裝置 120B‧‧‧Capacitive device

130B‧‧‧主動迴授裝置 130B‧‧‧Active feedback device

140B‧‧‧切換裝置 140B‧‧‧Switching device

152B‧‧‧輸出節點 152B‧‧‧Output node

154B‧‧‧互補輸出節點 154B‧‧‧Complementary output node

126A、126B‧‧‧匯流排 126A, 126B‧‧ ‧ busbar

200‧‧‧電容器陣列 200‧‧‧ capacitor array

202‧‧‧第一節點 202‧‧‧first node

204‧‧‧第二節點 204‧‧‧second node

212-1~212-K‧‧‧電晶體 212-1~212-K‧‧‧Optoelectronics

222-1~222-K、224-1~224-K‧‧‧電容器 222-1~222-K, 224-1~224-K‧‧‧ capacitor

B[0]、B[1]、B[K-1]‧‧‧控制信號 B[0], B[1], B[K-1]‧‧‧ control signals

250‧‧‧變容器 250‧‧‧Transformers

252‧‧‧第一節點 252‧‧‧ first node

254‧‧‧第二節點 254‧‧‧second node

256‧‧‧控制節點 256‧‧‧Control node

262、264‧‧‧電晶體 262, 264‧‧‧Optoelectronics

128A、128B‧‧‧路徑 128A, 128B‧‧ Path

300A~300F‧‧‧振盪器 300A~300F‧‧‧Oscillator

310A~310E‧‧‧電感裝置 310A~310E‧‧‧Inductive device

380A~380G‧‧‧相互電感耦合 380A~380G‧‧‧ mutual inductive coupling

400‧‧‧主從微調單元 400‧‧‧Master-slave fine-tuning unit

402‧‧‧主振盪器 402‧‧‧Main Oscillator

404‧‧‧從振盪器 404‧‧‧From Oscillator

412‧‧‧第一相位比較器 412‧‧‧First Phase Comparator

414‧‧‧第二相位比較器 414‧‧‧Second phase comparator

416‧‧‧控制單元 416‧‧‧Control unit

422‧‧‧第一傳導路徑 422‧‧‧First conduction path

424‧‧‧第二傳導路徑 424‧‧‧Second conduction path

432‧‧‧第一頻率分割器 432‧‧‧First frequency divider

434‧‧‧第二頻率分割器 434‧‧‧Second frequency divider

422‧‧‧第一傳導路徑 422‧‧‧First conduction path

424‧‧‧第二傳導路徑 424‧‧‧Second conduction path

442‧‧‧第一相位錯誤信號 442‧‧‧First phase error signal

444‧‧‧第二相位錯誤信號 444‧‧‧Second phase error signal

406‧‧‧控制單元 406‧‧‧Control unit

500‧‧‧脈衝分布網路 500‧‧‧pulse distribution network

510‧‧‧脈衝產生器 510‧‧‧ pulse generator

520‧‧‧驅動器 520‧‧‧ drive

532、534‧‧‧振盪器 532, 534‧‧‧ oscillator

541‧‧‧第一階傳導路徑 541‧‧‧First-order conduction path

543a、543b‧‧‧第二階傳導路徑 543a, 543b‧‧‧ second-order conduction path

545a~545d‧‧‧第三階傳導路徑 545a~545d‧‧‧ third-order conduction path

547a~547i‧‧‧第四階傳導路徑 547a~547i‧‧‧ fourth-order conduction path

549a~549p‧‧‧第五階傳導路徑 549a~549p‧‧‧ fifth-order conduction path

552、554、556、558‧‧‧驅動器 552, 554, 556, 558‧‧‧ drive

700‧‧‧振盪器 700‧‧‧Oscillator

702‧‧‧輸出節點 702‧‧‧ Output node

710-1~710-P‧‧‧反向器 710-1~710-P‧‧‧ reverser

720‧‧‧反向器 720‧‧‧ reverser

800‧‧‧振盪器 800‧‧‧Oscillator

802、804‧‧‧輸出節點 802, 804‧‧‧ output nodes

810-1~810-Q‧‧‧差動放大器 810-1~810-Q‧‧‧Differential Amplifier

900‧‧‧電路 900‧‧‧ Circuitry

910‧‧‧耦合結構 910‧‧‧Coupling structure

922‧‧‧第一電感裝置 922‧‧‧First Inductive Device

924‧‧‧第二電感裝置 924‧‧‧second inductive device

912‧‧‧第一傳導迴路 912‧‧‧First conduction loop

914‧‧‧第二傳導迴路 914‧‧‧Second conduction loop

916‧‧‧傳導路徑 916‧‧‧Transmission path

922a、924a‧‧‧信號埠 922a, 924a‧‧‧ signal埠

922b、924b‧‧‧線圈 922b, 924b‧‧‧ coil

922c、924c‧‧‧埠方向 922c, 924c‧‧‧ direction

912a、914a‧‧‧第一端 912a, 914a‧‧‧ first end

912b、914b‧‧‧第二端 912b, 914b‧‧‧ second end

916a‧‧‧第一傳導路徑 916a‧‧‧First conduction path

916b‧‧‧第二傳導路徑 916b‧‧‧second conduction path

910A、910B、910C‧‧‧耦合結構 910A, 910B, 910C‧‧‧ coupling structure

916Aa‧‧‧第一傳導路徑 916Aa‧‧‧First conduction path

916Ab‧‧‧第二傳導路徑 916Ab‧‧‧second conduction path

916B‧‧‧傳導路徑 916B‧‧‧ Conduction path

916Ba‧‧‧第一傳導路徑 916Ba‧‧‧First conduction path

916Bb‧‧‧第二傳導路徑 916Bb‧‧‧second conduction path

916C‧‧‧傳導路徑 916C‧‧‧ Conduction path

916Ca‧‧‧第一傳導路徑 916Ca‧‧‧First conduction path

916Cb‧‧‧第二傳導路徑 916Cb‧‧‧second conduction path

1210A‧‧‧耦合結構 1210A‧‧‧Coupling structure

1212A‧‧‧第一傳導迴路 1212A‧‧‧First conduction loop

1214A‧‧‧第二傳導迴路 1214A‧‧‧Second conduction loop

1216A‧‧‧第一組傳導路徑 1216A‧‧‧First set of conduction paths

1210B‧‧‧耦合結構 1210B‧‧‧Coupling structure

1212B‧‧‧第三傳導迴路 1212B‧‧‧ third conduction loop

1214B‧‧‧第四傳導迴路 1214B‧‧‧fourth conduction loop

1216B‧‧‧第二組傳導路徑 1216B‧‧‧Second set of conduction paths

1222、1224、1226‧‧‧電感裝置 1222, 1224, 1226‧‧‧Inductive devices

1210C‧‧‧耦合結構 1210C‧‧‧Coupling structure

1226‧‧‧電感裝置 1226‧‧‧Inductive device

1210D‧‧‧耦合結構 1210D‧‧‧ coupling structure

1210E‧‧‧耦合結構 1210E‧‧‧Coupling structure

1216B’‧‧‧傳導路徑 1216B’‧‧‧ Conduction path

1310A、1310B‧‧‧耦合結構 1310A, 1310B‧‧‧ coupling structure

1322、1324、1326、1327‧‧‧電感裝置 Inductive devices 1322, 1324, 1326, 1327‧‧

1312、1314、1316、1317‧‧‧傳導迴路 1312, 1314, 1316, 1317‧‧‧ conduction loop

1318‧‧‧傳導路徑 1318‧‧‧ Conduction path

1410‧‧‧耦合結構 1410‧‧‧Coupling structure

1412、1414‧‧‧傳導迴路 1412, 1414‧‧‧ Conduction loop

1416‧‧‧傳導路徑 1416‧‧‧ Conduction path

1512‧‧‧第一屏蔽結構 1512‧‧‧First shielding structure

1514‧‧‧第二屏蔽結構 1514‧‧‧Second shield structure

一或多個實施例的說明係作為例示而非限制,在附隨的圖式中,具有相同元件符號的元件係代表相同元件。 The description of the one or more embodiments is intended to be illustrative and not restrictive.

圖1係根據一或多個實施例說明兩個振盪器的概示圖。 1 is a schematic diagram illustrating two oscillators in accordance with one or more embodiments.

圖2A係根據一或多個實施例說明可用於圖1所示之一個或兩個振盪器的電容器陣列之概示圖。 2A is a schematic diagram of a capacitor array that can be used with one or both of the oscillators shown in FIG. 1 in accordance with one or more embodiments.

圖2B係根據一或多個實施例說明可用於圖1所示之一個或兩個振盪器的變容器之概示圖。 2B is a schematic illustration of a varactor that can be used with one or both of the oscillators shown in FIG. 1 in accordance with one or more embodiments.

圖3係根據一或多個實施例說明六個振盪器的概示圖。 3 is a schematic diagram illustrating six oscillators in accordance with one or more embodiments.

圖4係根據一或多個實施例說明一組主從微調單元的功能性方塊圖。 4 is a functional block diagram illustrating a set of master-slave fine-tuning units in accordance with one or more embodiments.

圖5係根據一或多個實施例說明脈衝分布網路的概示圖。 FIG. 5 illustrates an overview of a pulse distribution network in accordance with one or more embodiments.

圖6係根據一或多個實施例說明同步化振盪器的方法 之流程圖。 6 is a diagram illustrating a method of synchronizing an oscillator in accordance with one or more embodiments. Flow chart.

圖7係根據一或多個實施例說明環形振盪器的概示圖。 FIG. 7 illustrates an overview of a ring oscillator in accordance with one or more embodiments.

圖8係根據一或多個實施例說明另一個環形振盪器的概示圖。 FIG. 8 is a diagrammatic view of another ring oscillator in accordance with one or more embodiments.

圖9係根據一或多個實施例說明耦合結構與對應電感裝置的俯視圖。 9 is a top plan view of a coupling structure and corresponding inductive device in accordance with one or more embodiments.

圖10係根據一或多個實施例說明在有或無耦合結構下,兩個電感裝置之間的耦合因子與頻率之關係之示意圖。 10 is a diagram illustrating the relationship between coupling factors and frequency between two inductive devices with or without a coupled structure, in accordance with one or more embodiments.

圖11A至圖11C係根據一或多個實施例說明耦合結構與對應的電感裝置之俯視圖。 11A-11C illustrate top views of a coupling structure and corresponding inductive device in accordance with one or more embodiments.

圖12A至圖12E係根據一或多個實施例說明耦合結構與對應的電感裝置之俯視圖。 12A-12E illustrate top views of a coupling structure and corresponding inductive device in accordance with one or more embodiments.

圖13A至圖13B係根據一或多個實施例說明耦合結構與對應的電感裝置之俯視圖。 13A-13B illustrate top views of a coupling structure and corresponding inductive device in accordance with one or more embodiments.

圖14係根據一或多個實施例說明耦合結構與對應的電感裝置之俯視圖。 14 is a top plan view of a coupling structure and corresponding inductive device in accordance with one or more embodiments.

圖15係根據一或多個實施例說明具有屏蔽結構之耦合結構與對應的電感裝置之俯視圖。 15 is a top plan view of a coupling structure having a shield structure and a corresponding inductive device, in accordance with one or more embodiments.

圖16係根據一或多個實施例說明磁性耦合電感裝置的方法之流程圖。 16 is a flow chart illustrating a method of a magnetically coupled inductive device in accordance with one or more embodiments.

應理解以下的揭露內容係提供一或多個不同的實施例或範例,用於實施揭露內容的不同特徵。以下描述元件與配置的特定範例以簡化本揭露。當然,這些範例並非用於限制本揭露。根據產業的標準實施,圖式中的各種特徵並非依比例繪示,而是僅用於說明之 用。 It is to be understood that the following disclosure provides one or more different embodiments or examples for implementing different features of the disclosed. Specific examples of components and configurations are described below to simplify the disclosure. Of course, these examples are not intended to limit the disclosure. According to the implementation of industry standards, the various features in the drawings are not drawn to scale, but are for illustrative purposes only. use.

在一些實施例中,不使用時脈樹,而是使用用於產生具有預定頻率的輸出振盪信號的二或多個振盪器來將時脈信號分布至積體電路中的各種時脈元件。再者,實施一或多個同步化機制,用以將二或多個振盪器產生的振盪信號之間的頻率或相差最小化。在一些實施例中,一或多個同步化機制係包含磁耦合、主從微調以及脈衝注入。 In some embodiments, instead of using a clock tree, two or more oscillators for generating an output oscillating signal having a predetermined frequency are used to distribute the clock signals to various clock elements in the integrated circuit. Furthermore, one or more synchronization mechanisms are implemented to minimize the frequency or phase difference between the oscillating signals generated by the two or more oscillators. In some embodiments, one or more synchronization mechanisms include magnetic coupling, master-slave trimming, and pulse injection.

圖1係根據一或多個實施例說明兩個振盪器100A與100B的概示圖。在一些實施例中,振盪器100A與100B係用於產生具有預定頻率的振盪信號。在一些實施例中,來自振盪器100A與100B之振盪信號的頻率係大約相同,但並非完全等於預定頻率。同樣地,來自振盪器100A與100B之振盪信號的相位並未完全被同步化。在一些實施例中,將振盪器100A與100B同步化係指將來自振盪器100A與100B之振盪信號之間的頻率或相位差最小化。雖然圖1僅說明兩個振盪器100A與100B,然而本揭露所述的同步化機制係可用於相同積體電路之二或多個類似架構的振盪器。 1 is a schematic diagram illustrating two oscillators 100A and 100B in accordance with one or more embodiments. In some embodiments, oscillators 100A and 100B are used to generate an oscillating signal having a predetermined frequency. In some embodiments, the frequency of the oscillating signals from oscillators 100A and 100B is about the same, but not exactly equal to the predetermined frequency. Likewise, the phases of the oscillating signals from oscillators 100A and 100B are not fully synchronized. In some embodiments, synchronizing oscillators 100A and 100B refers to minimizing the frequency or phase difference between the oscillating signals from oscillators 100A and 100B. Although FIG. 1 illustrates only two oscillators 100A and 100B, the synchronization mechanism described herein can be used for two or more oscillators of similar architecture of the same integrated circuit.

振盪器100A包含電感裝置110A、電容裝置120A、主動迴授裝置130A、切換裝置140A、輸出節點152A以及互補輸出節點154A。電感裝置110A、電容裝置120A、主動迴授裝置130A與切換裝置140A係耦合在輸出節點152A與互補輸出節點152B之間。 The oscillator 100A includes an inductive device 110A, a capacitive device 120A, an active feedback device 130A, a switching device 140A, an output node 152A, and a complementary output node 154A. Inductor 110A, capacitive device 120A, active feedback device 130A, and switching device 140A are coupled between output node 152A and complementary output node 152B.

主動迴授裝置130A係包含兩個N型電晶體132A與134A。電晶體132A與134A的源極端係耦合接地參考節點162A。電晶體132A的汲極端係耦合節點152A與電晶體134A的閘極端,以及電晶體134A的汲極端係耦合節點154A與電晶體132A的閘極端。主動迴授裝置130A係用於在節點152A輸出第一輸出振盪信號以及在節點154A輸出第一互補輸出振盪信號。第一輸出振盪信號與第一互補輸出振盪 信號具有預定頻率,預定頻率係根據電感裝置110A的電性與電容裝置120A的電性而決定。在一些實施例中,如果電感裝置110A具有電感LTOTAL以及電容裝置120A具有電容CTOTAL,則可根據以下方程式決定預定頻率FOSC(赫茲,Hz): The active feedback device 130A includes two N-type transistors 132A and 134A. The source terminals of transistors 132A and 134A are coupled to ground reference node 162A. The drain terminal of transistor 132A is coupled to node 152A and the gate terminal of transistor 134A, and the gate terminal of transistor 134A is coupled to node 154A and the gate terminal of transistor 132A. Active feedback device 130A is for outputting a first output oscillating signal at node 152A and a first complementary output oscillating signal at node 154A. The first output oscillating signal and the first complementary output oscillating signal have a predetermined frequency, and the predetermined frequency is determined according to the electrical properties of the inductive device 110A and the electrical properties of the capacitive device 120A. In some embodiments, if the inductive device 110A has an inductance L TOTAL and the capacitive device 120A has a capacitance C TOTAL , the predetermined frequency F OSC (Hz, Hz) can be determined according to the following equation:

在一些應用中,亦已知具有類似於振盪器100A架構的振盪器為電感電容振諧振盪器(LC tank oscillators)。在一些實施例中,電晶體132A與134A為P型電晶體。在一些實施例中,其他型式的主動迴授裝置亦可作為主動迴授裝置130A。 In some applications, oscillators having an architecture similar to oscillator 100A are also known as LC tank oscillators. In some embodiments, transistors 132A and 134A are P-type transistors. In some embodiments, other types of active feedback devices may also be used as the active feedback device 130A.

電感裝置110A包含整合形成傳導線圈的電感器112A與電感器114A。電感器112A係耦合在節點152A與供應參考節點164A之間,以及電感器114A係耦合在節點154A與供應參考節點164A之間。 The inductive device 110A includes an inductor 112A and an inductor 114A that are integrated to form a conductive coil. Inductor 112A is coupled between node 152A and supply reference node 164A, and inductor 114A is coupled between node 154A and supply reference node 164A.

電容裝置120A係包含粗調電容器122A與微調電容器124A。在一些實施例中,根據來自匯流排126A的一組數位信號,設定粗調電容器122A的電容。在一些實施例中,藉由一組硬佈線電容器(hard-wired capacitors)取代粗調電容器122A,因而粗調電容器233A的電容被固定,而故省略匯流排126A。在一些實施例中,根據來自路徑128A的類比信號,設定微調電容器124A的電容。在一些實施例中,藉由控制粗調電容器122A或微調電容器124A,可調節振盪器100A的共振頻率。 The capacitor device 120A includes a coarse adjustment capacitor 122A and a trimming capacitor 124A. In some embodiments, the capacitance of the coarse tuning capacitor 122A is set based on a set of digital signals from the busbar 126A. In some embodiments, the coarse adjustment capacitor 122A is replaced by a set of hard-wired capacitors, so that the capacitance of the coarse adjustment capacitor 233A is fixed, and the bus bar 126A is omitted. In some embodiments, the capacitance of trimmer capacitor 124A is set based on the analog signal from path 128A. In some embodiments, the resonant frequency of oscillator 100A can be adjusted by controlling coarse capacitor 122A or trim capacitor 124A.

當切換裝置140A開啟時,切換裝置140A係用於設定節點152A與154A的信號於對應的預定電壓位準。例如,當切換裝置140A開啟時,節點152A與154A電耦合在一起。在此情況下,電晶體 132A與134A以及電感器112A與114A係作為分壓器,並且節點152A與154A的信號之電壓位準可根據電晶體132A與134A以及電感器112A與114A的阻抗而決定。在一些實施例中,當切換裝置140A開啟時,節點152A與154A的信號設定於約為供應參考節點164A與接地參考節點162A的電壓位準之中間。 When the switching device 140A is turned on, the switching device 140A is configured to set the signals of the nodes 152A and 154A to a corresponding predetermined voltage level. For example, when switching device 140A is turned on, nodes 152A and 154A are electrically coupled together. In this case, the transistor 132A and 134A and inductors 112A and 114A are used as voltage dividers, and the voltage levels of the signals at nodes 152A and 154A can be determined based on the impedance of transistors 132A and 134A and inductors 112A and 114A. In some embodiments, when switching device 140A is turned on, the signals of nodes 152A and 154A are set to be intermediate between the voltage levels of supply reference node 164A and ground reference node 162A.

藉由路徑170A上的信號,控制切換裝置140A。在一些實施例中,路徑170A上的控制信號係脈衝信號,用以迫使節點152A與154A的振盪信號相交。因此,在本申請案中,切換裝置140A亦指重設裝置或是脈衝注入裝置。在一些實施例中,切換裝置140A係電晶體。在一些實施例中,切換裝置140A係P型電晶體、N型電晶體或是傳輸閘極。在一些實施例中,省略切換裝置140A。 Switching device 140A is controlled by the signal on path 170A. In some embodiments, the control signal on path 170A is a pulse signal that forces nodes 152A to intersect the oscillating signal of 154A. Therefore, in the present application, the switching device 140A also refers to a reset device or a pulse injection device. In some embodiments, switching device 140A is a transistor. In some embodiments, switching device 140A is a P-type transistor, an N-type transistor, or a transmission gate. In some embodiments, switching device 140A is omitted.

振盪器100B包含電感裝置110B、電容裝置120B、主動迴授裝置130B、切換裝置140B、輸出節點152B以及互補輸出節點154B。振盪器100B與振盪器100A具有實質相同的架構。振盪器100B的元件係類似於振盪器100A的元件,具有類似的元件符號,差別在於把「A」改成「B」。振盪器100B的特徵與功能係實質類似於上述的振盪器100A,因而關於振盪器100B的詳細說明則不再重複。 The oscillator 100B includes an inductive device 110B, a capacitive device 120B, an active feedback device 130B, a switching device 140B, an output node 152B, and a complementary output node 154B. Oscillator 100B has substantially the same architecture as oscillator 100A. The components of the oscillator 100B are similar to those of the oscillator 100A and have similar component symbols, with the difference being that "A" is changed to "B". The features and functions of the oscillator 100B are substantially similar to the oscillator 100A described above, and thus the detailed description of the oscillator 100B will not be repeated.

在一些實施例中,振盪器100A與振盪器100B係在相同的基板上、在相同封裝基板上的不同基板上、在堆疊基板的不同基板上、或是在堆疊晶粒的不同基板上。在一些實施例中,實現功率分布網路,使得供應參考節點164A與164B具有實質相同的供應電壓位準,並且使得接地參考節點162A與162B具有實質相同的接地參考位準。在一些實施例中,匯流排126A與126B的數位信號具有相同的邏輯值。 In some embodiments, the oscillator 100A and the oscillator 100B are on the same substrate, on different substrates on the same package substrate, on different substrates of the stacked substrate, or on different substrates of the stacked die. In some embodiments, the power distribution network is implemented such that supply reference nodes 164A and 164B have substantially the same supply voltage level and that ground reference nodes 162A and 162B have substantially the same ground reference level. In some embodiments, the digital signals of busbars 126A and 126B have the same logic value.

在一些實施例中,信號分布網路基於共同信號,提供路徑170A與路徑170B上的信號。在一些實施例中,路徑170A與路徑 170B上的信號為同步化的信號。在一些實施例中,在路徑170A與路徑170B上的信號係脈衝信號。在一些實施例中,振盪器100A與100B的輸出振盪信號之預定頻率係路徑170A與路徑170B上的信號頻率的整數倍。 In some embodiments, the signal distribution network provides signals on path 170A and path 170B based on a common signal. In some embodiments, path 170A and path The signal on 170B is a synchronized signal. In some embodiments, the signals on path 170A and path 170B are pulse signals. In some embodiments, the predetermined frequency of the output oscillating signals of oscillators 100A and 100B is an integer multiple of the signal frequency on path 170A and path 170B.

再者,振盪器100A的電感裝置110A與振盪器100B的電感裝置110B係磁性耦合(如虛線箭號180所指)。電感裝置110A與電感裝置110B之間的磁性耦合係指操作電感裝置110A產生的磁通量影響電感裝置110B的操作,反之亦然。類似於振盪器100A與100B之配置位置,在一些實施例中,電感裝置110A與電感裝置110B係在相同基板上、在相同封裝基板上的不同基板上、在堆疊基板的不同基板上、或是在堆疊晶粒的不同基板上。電感裝置110A與電感裝置110B係用於減弱在振盪器100A的節點152A與振盪器100B的節點152B的振盪信號的反向(out-of-phase)成分並且強化在振盪器100A的節點152A與振盪器100B的節點152B的振盪信號之同相(in-phase)成分。因此,在振盪器100A與振盪器100B致能之後,在節點152A與152B的輸出振盪信號最終穩定為同相振盪信號。換言之,電感裝置110A與電感裝置110B係用於將振盪器100A與振盪器100B產生的振盪信號同步化。 Furthermore, the inductive device 110A of the oscillator 100A is magnetically coupled to the inductive device 110B of the oscillator 100B (as indicated by the dashed arrow 180). The magnetic coupling between the inductive device 110A and the inductive device 110B refers to the magnetic flux generated by the operating inductive device 110A affecting the operation of the inductive device 110B, and vice versa. Similar to the configuration positions of the oscillators 100A and 100B, in some embodiments, the inductive device 110A and the inductive device 110B are on the same substrate, on different substrates on the same package substrate, on different substrates of the stacked substrate, or On different substrates of stacked crystal grains. Inductor 110A and inductive device 110B are used to attenuate the out-of-phase components of the oscillating signal at node 152A of oscillator 100A and node 152B of oscillator 100B and to strengthen node 152A and oscillate at oscillator 100A. The in-phase component of the oscillating signal of node 152B of device 100B. Thus, after the oscillator 100A and oscillator 100B are enabled, the output oscillating signals at nodes 152A and 152B eventually stabilize as in-phase oscillating signals. In other words, the inductive device 110A and the inductive device 110B are used to synchronize the oscillation signal generated by the oscillator 100A with the oscillator 100B.

在一些實施例中,振盪器100A的電感裝置110A與振盪器100B的電感裝置110B的距離等於或小於預定距離,造成互感(mutual-inductance),該互感足以在預定的時間期間內同步化振盪器100A與振盪器100B。在一些實施例中,預定距離係具有振盪信號之預定頻率的電磁波之波長的一半。在一些實施例中,輸出振盪信號的預定頻率範圍係自100MHz至20GHz。 In some embodiments, the distance between the inductive device 110A of the oscillator 100A and the inductive device 110B of the oscillator 100B is equal to or less than a predetermined distance, resulting in mutual-inductance sufficient to synchronize the oscillator for a predetermined period of time. 100A and oscillator 100B. In some embodiments, the predetermined distance is half the wavelength of the electromagnetic wave having a predetermined frequency of the oscillating signal. In some embodiments, the predetermined frequency range of the output oscillating signal is from 100 MHz to 20 GHz.

圖2A係根據一或多個實施例說明可作為粗調電容器122A或粗調電容器122B的電容器陣列200之概示圖。電容器陣列200包含第一節點202、第二節點204、K個電晶體212-1至212-K,以及2K 個電容器222-1至222-K與224-1至224-K,其中K為正整數。第一節點202與第二節點204可用於連接對應的節點152A或節點154A或是連接對應的節點152B或節點154B。電容器222-1至222-K係耦合第一節點202,電容器224-1至224-K係耦合至第二節點204,以及電晶體212-1至212-K係耦合在對應的成對的電容器222-1至222-K與224-1至224-K之間。電晶體212-1至212-K係作為開關且受控於控制信號B[0]、B[1]至B[K-1]。 2A is a schematic diagram of a capacitor array 200 that can be used as a coarse adjustment capacitor 122A or a coarse adjustment capacitor 122B, in accordance with one or more embodiments. Capacitor array 200 includes a first node 202, a second node 204, K transistors 212-1 through 212-K, and 2K Capacitors 222-1 through 222-K and 224-1 through 224-K, where K is a positive integer. The first node 202 and the second node 204 can be used to connect to the corresponding node 152A or node 154A or to the corresponding node 152B or node 154B. Capacitors 222-1 through 222-K are coupled to first node 202, capacitors 224-1 through 224-K are coupled to second node 204, and transistors 212-1 through 212-K are coupled to corresponding pairs of capacitors. Between 222-1 and 222-K and 224-1 to 224-K. The transistors 212-1 to 212-K are used as switches and are controlled by control signals B[0], B[1] to B[K-1].

在一些實施例中,電晶體212-1至212-K係P型電晶體或N型電晶體。在一些實施例中,電晶體212-1至212-K替換為傳輸閘極或其他型式的開關。在一些實施例中,電容器222-1至222-K與224-1至224-K係金屬-氧化物-金屬電容器或是金屬-絕緣體-金屬電容器。 In some embodiments, the transistors 212-1 through 212-K are P-type transistors or N-type transistors. In some embodiments, transistors 212-1 through 212-K are replaced with transmission gates or other types of switches. In some embodiments, capacitors 222-1 through 222-K and 224-1 through 224-K are metal-oxide-metal capacitors or metal-insulator-metal capacitors.

在一些實施例中,包含電晶體212-1至212-K之一、電容器222-1至222-K的對應電容器以及電容器224-1至224-K的對應電容器之各路徑的總電容具有相同的值。在這些情況下,控制信號B[0:K-1]係編碼為一元編碼格式。在一些實施例中,以上定義的各路徑之總電容係對應於預定單元電容值的20、21、...、2K-1倍之一。在這些可選擇的情況下,控制信號B[0:K-1]係編碼為二元編碼格式。 In some embodiments, the total capacitance of each path including one of transistors 212-1 to 212-K, a corresponding capacitor of capacitors 222-1 to 222-K, and a corresponding capacitor of capacitors 224-1 to 224-K has the same Value. In these cases, the control signal B[0:K-1] is encoded as a unary coding format. In some embodiments, the total capacitance of each of the paths defined above corresponds to one of 2 0 , 2 1 , . . . , 2 K-1 times the predetermined unit capacitance value. In these alternative cases, the control signal B[0:K-1] is encoded as a binary encoding format.

圖2B係根據一或多個實施例說明可作為圖1的微調電容器124A或微調電容器124B的變容器250之概示圖。變容器250包含第一節點252、第二節點254、控制節點256以及電晶體262與264。第一節點252與第二節點254可用於耦合對應的節點152A或節點154A,或是耦合對應的節點152B或節點154B。電晶體262具有汲極端與源極端一起耦合第一節點252。電晶體262具有耦合至控制節點256的閘極端。電晶體264具有汲極端與源極端一起耦合第二節點254。電晶體264具有耦合至控制節點256的閘極端。控制節點256係用於接收類比控制信號VCAP,例如路徑128A或128B上的控制信號。可響應控制信 號VCAP的電壓位準調整節點252與254之間的總電容。在一些實施例中,電晶體262與264係P型電晶體或N型電晶體。 2B is a schematic illustration of a varactor 250 that can be used as the trimmer capacitor 124A or trimmer capacitor 124B of FIG. 1 in accordance with one or more embodiments. The varactor 250 includes a first node 252, a second node 254, a control node 256, and transistors 262 and 264. The first node 252 and the second node 254 can be used to couple the corresponding node 152A or node 154A, or to couple the corresponding node 152B or node 154B. The transistor 262 has a 汲 terminal coupled to the first node 252 along with the source terminal. The transistor 262 has a gate terminal coupled to the control node 256. The transistor 264 has a 汲 terminal coupled to the source node with a second node 254. Transistor 264 has a gate terminal coupled to control node 256. Control node 256 is operative to receive analog control signal VCAP , such as a control signal on path 128A or 128B. The total capacitance between nodes 252 and 254 can be adjusted in response to the voltage level of control signal VCAP . In some embodiments, transistors 262 and 264 are P-type transistors or N-type transistors.

在圖1中,僅描述兩個振盪器100A與100B。然而,在一些實施例中,有超過兩個振盪器用於在積體電路中產生時脈。同樣地,振盪器100A或100B的電感裝置110A或110B係可磁性耦合二或多個振盪器之超過兩個電感裝置。 In Fig. 1, only two oscillators 100A and 100B are described. However, in some embodiments, there are more than two oscillators for generating a clock in the integrated circuit. Similarly, the inductive device 110A or 110B of the oscillator 100A or 100B can magnetically couple more than two inductive devices of two or more oscillators.

例如,圖3係根據一或多個實施例說明六個振盪器300A至300F的概示圖。振盪器300A至300F具有類似於上述振盪器100A的架構。除此之外,振盪器300A至300F具有對應的電感裝置310A至310F。省略振盪器300A至300F的其他詳細說明。 For example, FIG. 3 illustrates an overview of six oscillators 300A-300F in accordance with one or more embodiments. The oscillators 300A to 300F have an architecture similar to the oscillator 100A described above. In addition to this, the oscillators 300A to 300F have corresponding inductive devices 310A to 310F. Other detailed descriptions of the oscillators 300A to 300F are omitted.

如圖3所示,電感裝置310A與310B係磁性耦合(虛線箭號380A所示);電感裝置310B與310C係磁性耦合(虛線箭號380B);電感裝置310D與310E係磁性耦合(虛線箭號380C所示);電感裝置310E與310F係電磁耦合(虛線箭號380D所示);電感裝置310A與310D係磁性耦合(虛線箭號380E所示);電感裝置310B與310E係磁性耦合(虛線箭號380F所示);以及電感裝置310C與310F係磁性耦合(虛線箭號380G所示)。在此實施例中,相互電感耦合380A至380G係用於使振盪器300A至300F產生振盪信號,其具有大約相同的預定頻率以及大約相同的相位。 As shown in FIG. 3, the inductive devices 310A and 310B are magnetically coupled (shown by dashed arrow 380A); the inductive devices 310B and 310C are magnetically coupled (dashed arrow 380B); and the inductive devices 310D and 310E are magnetically coupled (dashed arrows) 380C); inductive devices 310E and 310F are electromagnetically coupled (shown by dashed arrow 380D); inductive devices 310A and 310D are magnetically coupled (shown by dashed arrow 380E); inductive devices 310B and 310E are magnetically coupled (dashed arrow) The inductive devices 310C and 310F are magnetically coupled (shown by dashed arrow 380G). In this embodiment, mutual inductive couplings 380A through 380G are used to cause oscillators 300A through 300F to generate an oscillating signal having approximately the same predetermined frequency and approximately the same phase.

在一些實施例中,電感裝置310A至310F係形成於相同基板上、相同封裝基板上的不同基板上、堆疊基板的不同基板上、或是堆疊晶粒的不同基板上。在一些實施例中,兩個電感裝置310A至310F之間的距離相當於磁性耦合380A至380G之一,係等於或小於具有預定頻率之電磁波的波長之一半。在一些實施例中,輸出振盪信號的預定頻率範圍係100MHz至20GHz。 In some embodiments, the inductive devices 310A-310F are formed on the same substrate, on different substrates on the same package substrate, on different substrates of the stacked substrate, or on different substrates of the stacked die. In some embodiments, the distance between the two inductive devices 310A-310F corresponds to one of the magnetic couplings 380A to 380G, which is one-half the wavelength of the electromagnetic wave having a predetermined frequency. In some embodiments, the predetermined frequency range of the output oscillating signal is from 100 MHz to 20 GHz.

圖4係根據一或多個實施例說明一組主從微調單元400 的功能性方塊圖。該組主從微調單元400係耦合至主振盪器402與從振盪器404,並且可基於比較主振盪器402與從振盪器404的輸出振盪信號而控制從振盪器404的共振頻率。在一些實施例中,主振盪器402係相當於圖1的振盪器100B,從振盪器404係相當於振盪器100A,以及藉由控制微調電容器124A,可調節從振盪器404的共振頻率。 4 illustrates a set of master-slave fine tuning units 400 in accordance with one or more embodiments. Functional block diagram. The set of master-slave trimming units 400 are coupled to the primary oscillator 402 and the slave oscillator 404, and may control the resonant frequency of the slave oscillator 404 based on comparing the output oscillator signals of the master oscillator 402 with the slave oscillator 404. In some embodiments, main oscillator 402 is equivalent to oscillator 100B of FIG. 1, slave oscillator 404 is equivalent to oscillator 100A, and by controlling trimmer capacitor 124A, the resonant frequency of slave oscillator 404 can be adjusted.

該組主從微調單元400係包含第一相位比較器412、第二相位比較器414、控制單元416、第一傳導路徑422、第二傳導路徑424、第一頻率分割器432以及第二頻率分割器434。 The set of master-slave fine-tuning units 400 includes a first phase comparator 412, a second phase comparator 414, a control unit 416, a first conduction path 422, a second conduction path 424, a first frequency divider 432, and a second frequency division. 434.

第一頻率分割器432係與主振盪器402相鄰並且電耦合至主振盪器402。第一頻率分割器432係用於接收來自主振盪器402的輸出振盪信號CLK_M,並且以預定比例N將輸出振盪信號CLK_M頻率分割而產生參考信號CLK_MR。在一些實施例中,N為正整數。在一些實施例中,N的範圍係自4至16。第二頻率分割器434係與從振盪器402相鄰並且電耦合至從振盪器402。第二頻率分割器434係用於接收來自從振盪器404的輸出振盪信號CLK_S,並且以預定比例N頻率分割輸出振盪信號CLK_S。 The first frequency divider 432 is adjacent to the primary oscillator 402 and is electrically coupled to the primary oscillator 402. The first frequency divider 432 is for receiving the output oscillating signal CLK_M from the main oscillator 402, and frequency-dividing the output oscillating signal CLK_M by a predetermined ratio N to generate the reference signal CLK_MR. In some embodiments, N is a positive integer. In some embodiments, N ranges from 4 to 16. The second frequency divider 434 is adjacent to and coupled to the slave oscillator 402. The second frequency divider 434 is for receiving the output oscillating signal CLK_S from the slave oscillator 404 and dividing the output oscillating signal CLK_S at a predetermined ratio N frequency.

在一些實施例中,省略第一頻率分割器432與第二頻率分割器434,以及振盪信號CLK_M與CLK_S係作為參考信號CLK_MR與參考信號CLK_SR。 In some embodiments, the first frequency divider 432 and the second frequency divider 434 are omitted, and the oscillating signals CLK_M and CLK_S are used as the reference signal CLK_MR and the reference signal CLK_SR.

第一相位比較器412係與主振盪器402相鄰。第二相位比較器414係與從振盪器404相鄰。第一傳導路徑422與第二傳導路徑424係位於主振盪器402與從振盪器404之間。第一相位比較器412係用於根據來自主振盪器402的參考信號CLK_MR以及來自從振盪器404並經由第一傳導路徑422傳送的參考信號CLK_SR之延遲版本CLK_SR’,而產生第一相位錯誤信號442。第二相位比較器422係用於根據來自從振盪器404的參考信號CLK_SR以及來自主振盪器402並經 由第二傳導路徑424傳送的參考信號CLK_MR之延遲版本CLK_MR’,而產生第二相位錯誤信號444。 The first phase comparator 412 is adjacent to the main oscillator 402. The second phase comparator 414 is adjacent to the slave oscillator 404. The first conductive path 422 and the second conductive path 424 are located between the main oscillator 402 and the slave oscillator 404. The first phase comparator 412 is configured to generate a first phase error signal based on the reference signal CLK_MR from the main oscillator 402 and the delayed version CLK_SR' from the oscillator 404 and the reference signal CLK_SR transmitted via the first conduction path 422. 442. The second phase comparator 422 is configured to be based on the reference signal CLK_SR from the slave oscillator 404 and from the main oscillator 402. The delayed version CLK_MR' of the reference signal CLK_MR transmitted by the second conduction path 424 generates a second phase error signal 444.

控制單元416係用於根據第一相位錯誤信號442與第二相位錯誤信號444,而產生調節信號VTUNE至從振盪器404。在一些實施例中,調節信號VTUNE可作為圖2的類比控制信號VCAP,或是作為類比控制信號用於調節圖1之路徑128A所攜載的微調電容器124A。 The control unit 416 is configured to generate the adjustment signal V TUNE to the slave oscillator 404 according to the first phase error signal 442 and the second phase error signal 444. In some embodiments, the adjustment signal V TUNE can be used as the analog control signal V CAP of FIG. 2 or as an analog control signal for adjusting the trimmer capacitor 124A carried by the path 128A of FIG.

圖5係根據一或多個實施例說明脈衝分布網路500的概示圖。在一些實施例中,脈衝分布網路500可用於經由路徑170A提供控制信號至振盪器100A的切換裝置140A,以及經由路徑170B提供控制信號至振盪器100B的切換裝置140B。 FIG. 5 illustrates an overview of a pulse distribution network 500 in accordance with one or more embodiments. In some embodiments, pulse distribution network 500 can be used to provide control signals to switch device 140A of oscillator 100A via path 170A, and to switch device 140B to provide control signals to oscillator 100B via path 170B.

脈衝分布網路500包含脈衝產生器510、驅動器520、以及一或多個傳導路徑,該一或多個傳導路徑配置為具有H樹架構。二或多個振盪器532與534係耦合至H樹的兩個端點。在一些實施例中,振盪器532係相當於圖1的振盪器100A,以及振盪器534係向當於振盪器100B。 Pulse distribution network 500 includes a pulse generator 510, a driver 520, and one or more conductive paths configured to have an H-tree architecture. Two or more oscillators 532 and 534 are coupled to both ends of the H-tree. In some embodiments, oscillator 532 is equivalent to oscillator 100A of FIG. 1, and oscillator 534 is directed to oscillator 100B.

脈衝產生器510係用於產生脈衝信號,可作為對應振盪器的切換裝置或重設裝置的控制信號。在一些實施例中,脈衝信號具有脈衝頻率,以及振盪器532與534的輸出振盪信號的預定頻率係脈衝頻率的整數倍。為了響應於脈衝信號藉由振盪器對應的切換裝置將輸出震盪信號設定在既定電壓位準,脈衝信號傳輸至振盪器532與534。因此,根據脈衝信號,振盪器532與534的輸出振盪信號之上升邊緣或下降邊緣的時間點被同步化。 The pulse generator 510 is used to generate a pulse signal, which can be used as a control signal for a switching device or a reset device of the corresponding oscillator. In some embodiments, the pulse signal has a pulse frequency and an integer multiple of a predetermined frequency train pulse frequency of the output oscillating signals of oscillators 532 and 534. In response to the pulse signal being set at a predetermined voltage level by the oscillator corresponding switching means, the pulse signal is transmitted to oscillators 532 and 534. Therefore, according to the pulse signal, the time points of the rising edge or the falling edge of the output oscillation signals of the oscillators 532 and 534 are synchronized.

圖5所述的H樹係五階H述,其包含一個(20)第一階傳導路徑541、二個(21)第二階傳導路徑543a與543b耦合至路徑541的對應端點、四個(22)第三階傳導路徑545a、545b、545c與545d耦合至路徑543a或543b的對應端點,以及八個(23)第四階傳導路徑547a至547i 耦合至路徑545a至545d的對應端點,以及十六個(24)第五階傳導路徑549a至549p耦合至路徑547a至547i的對應端點。第五階傳導路徑549a至549p具有連接至不同振盪器之對應切換裝置的端點。例如,路徑549a的一端係耦合至振盪器532,以及路徑549b的一端係耦合至振盪器534。在一些實施例中,第五階傳導路徑539a至539p的各端具有相同的路由距離。因此,從驅動器520至第五階傳導路徑549a至549p的對應端點之傳導路徑係用以在其傳輸與分布期間將相同的延遲實質加到脈衝信號。 H tree chart of the fifth-order 5 H described below, which comprises a (20) conducting a first-order path 541, two (21) conducting path 543a and the second stage 543b is coupled to a corresponding end of the path 541, Four (2 2 ) third-order conduction paths 545a, 545b, 545c, and 545d are coupled to corresponding endpoints of path 543a or 543b, and eight (2 3 ) fourth-order conduction paths 547a through 547i are coupled to paths 545a through 545d Corresponding endpoints, and sixteen (2 4 ) fifth-order conduction paths 549a through 549p are coupled to corresponding endpoints of paths 547a through 547i. The fifth order conduction paths 549a through 549p have endpoints connected to corresponding switching devices of different oscillators. For example, one end of path 549a is coupled to oscillator 532, and one end of path 549b is coupled to oscillator 534. In some embodiments, each end of the fifth-order conductive paths 539a through 539p have the same routing distance. Thus, the conduction path from the driver 520 to the corresponding endpoint of the fifth-order conduction paths 549a through 549p is used to substantially add the same delay to the pulse signal during its transmission and distribution.

驅動器520係用於提供足夠的電流驅動能力,將脈衝產生器510產生的脈衝信號傳輸至第五階傳導路徑549a至549p的不同端點。在一些實施例中,附加的驅動器552、554、556與558係位在第二階傳導路徑543a與543b的端點。在一些實施例中,省略附加的驅動器552、554、556與558。在一些實施例中,附加的驅動器552、554、556與558係位在H樹中不同階的傳導路徑之對應端點。 Driver 520 is operative to provide sufficient current drive capability to transmit pulse signals generated by pulse generator 510 to different end points of fifth order conduction paths 549a through 549p. In some embodiments, additional drivers 552, 554, 556, and 558 are tied at the ends of second order conduction paths 543a and 543b. In some embodiments, additional drivers 552, 554, 556, and 558 are omitted. In some embodiments, the additional drivers 552, 554, 556, and 558 are tied to corresponding endpoints of different orders of conduction paths in the H-tree.

因此,以上描述至少三種不同方式同步化二或多個振盪器的輸出振盪信號(該二或多個振盪器例如圖1的振盪器100A與100B):磁性耦合(如圖1與3所示);主從微調(如圖4所示);以及脈衝注入(如圖5所示)。在一些實施例中,使用磁性耦合與主從微調機制,將二或多個振盪器100A與100B同步化。在一些實施例中,使用磁性耦合與脈衝注入,將二或多個振盪器100A與100B同步化。在一些實施例中,使用磁性耦合、主從微調以及脈衝注入機制,將二或多個振盪器100A與100B同步化。 Thus, the output oscillating signals of two or more oscillators (the two or more oscillators such as oscillators 100A and 100B of FIG. 1) are synchronized in at least three different ways as described above: magnetic coupling (as shown in Figures 1 and 3) Master-slave fine-tuning (as shown in Figure 4); and pulse injection (as shown in Figure 5). In some embodiments, two or more oscillators 100A and 100B are synchronized using a magnetic coupling and master-slave fine-tuning mechanism. In some embodiments, two or more oscillators 100A and 100B are synchronized using magnetic coupling and pulse injection. In some embodiments, two or more oscillators 100A and 100B are synchronized using magnetic coupling, master-slave trimming, and pulse injection mechanisms.

圖6係根據一或多個實施例說明同步化振盪器的方法之流程圖,該振盪器係例如圖1所示的振盪器100A與100B。應理解在圖6所示的方法之前、期間以及/或之後,可進行其他操作,以及本文中可僅簡述一些其他製程。 6 is a flow diagram illustrating a method of synchronizing an oscillator, such as oscillators 100A and 100B shown in FIG. 1, in accordance with one or more embodiments. It should be understood that other operations may be performed before, during, and/or after the method illustrated in FIG. 6, and that only some other processes may be briefly described herein.

在操作610中,操作振盪器以輸出振盪信號。例如,在一些實施例中,操作振盪器100A以於節點152A輸出第一振盪信號,以及操作振盪器100B以於節點152B輸出第二振盪信號。 In operation 610, the oscillator is operated to output an oscillating signal. For example, in some embodiments, oscillator 100A is operated to output a first oscillating signal at node 152A and to operate oscillator 100B to output a second oscillating signal at node 152B.

在操作620中,磁性耦合振盪器的電感裝置。例如,在一些實施例中,磁性耦合振盪器100的電感裝置110A與振盪器100B的電感裝置110B,以降低振盪器100A與振盪器100B的輸出振盪信號之間的頻率差或相位差。 In operation 620, an inductive device of the magnetically coupled oscillator. For example, in some embodiments, the inductive device 110A of the magnetically coupled oscillator 100 and the inductive device 110B of the oscillator 100B reduce the frequency difference or phase difference between the oscillator oscillating signals of the oscillator 100A and the oscillator 100B.

在操作630中,在各種振盪器上進行脈衝注入程序。例如,在一些實施例中,在振盪器100A與振盪器100B上進行脈衝注入程序。在一些實施例中,操作630包含產生脈衝信號(操作632)、將脈衝信號經由第一傳導路徑傳輸至振盪器100A的切換裝置140A,以及將脈衝信號經由第二傳導路徑傳輸至振盪器100B的切換裝置140B。在一些實施例中,第一傳導路徑與第二傳導路徑係用於將相同的延遲實質加到脈衝信號。 In operation 630, a pulse injection procedure is performed on various oscillators. For example, in some embodiments, a pulse injection procedure is performed on oscillator 100A and oscillator 100B. In some embodiments, operation 630 includes generating a pulse signal (operation 632), transmitting the pulse signal to the switching device 140A of the oscillator 100A via the first conduction path, and transmitting the pulse signal to the oscillator 100B via the second conduction path. Switching device 140B. In some embodiments, the first conductive path and the second conductive path are used to substantially add the same delay to the pulse signal.

在一些實施例中,操作630進一步包含響應脈衝信號,藉由切換裝置140A將振盪器100A的第一振盪信號設定在第一預定電壓位準(操作634),以及響應脈衝信號,藉由切換裝置140B將振盪器100B的第二振盪信號設定在第一預定電壓位準(操作636)。 In some embodiments, operation 630 further includes responding to the pulse signal, setting a first oscillating signal of the oscillator 100A at a first predetermined voltage level by the switching device 140A (operation 634), and responding to the pulse signal by the switching device 140B sets the second oscillating signal of oscillator 100B at a first predetermined voltage level (operation 636).

方法進行至操作640,其中在二或多個振盪器上,進行主從微調程序。例如,在一些實施例中,在振盪器100A與振盪器100B上,進行主從微調程序。如圖6與圖4所示,操作640包含藉由以預定比例頻率分割來自振盪器402或100B的振盪信號,而產生參考信號CLK_MR(操作642);以及藉由以預定比例頻率分割來自振盪器404或100A的振盪信號,而產生參考信號CLK_SR(操作643)。 The method proceeds to operation 640 where a master-slave fine-tuning procedure is performed on two or more oscillators. For example, in some embodiments, a master-slave fine-tuning procedure is performed on oscillator 100A and oscillator 100B. As shown in FIGS. 6 and 4, operation 640 includes generating a reference signal CLK_MR by dividing the oscillating signal from the oscillator 402 or 100B at a predetermined frequency (operation 642); and dividing the oscillator from the predetermined frequency. The 404 or 100A oscillating signal generates a reference signal CLK_SR (operation 643).

再者,在操作645中,基於參考信號CLK_MR以及經由傳導路徑422傳輸的參考信號CLK_SR之延遲版本CLK_SR’,產生 第一相位錯誤信號442。在操作646中,基於參考信號CLK_SR以及經由傳導路徑424傳輸的參考信號CLK_MR之延遲版本CLK_MR’,產生第二相位錯誤信號444。在操作648中,基於第一相位錯誤信號442與第二相位錯誤信號424,產生調節信號VTUNEMoreover, in operation 645, a first phase error signal 442 is generated based on the reference signal CLK_MR and the delayed version CLK_SR' of the reference signal CLK_SR transmitted via the conduction path 422. In operation 646, a second phase error signal 444 is generated based on the reference signal CLK_SR and the delayed version CLK_MR' of the reference signal CLK_MR transmitted via the conduction path 424. In operation 648, an adjustment signal V TUNE is generated based on the first phase error signal 442 and the second phase error signal 424.

如圖6與圖1所示,在操作649中,基於調節信號VTUNE,調節振盪器404或100A產生的振盪信號之頻率或相位。 As shown in FIG. 6 and FIG. 1, in operation 649, the frequency or phase of the oscillating signal generated by the oscillator 404 or 100A is adjusted based on the adjustment signal V TUNE .

在一些實施例中,當同步化圖1的振盪器100A與100B時,省略操作630或操作640之一者,或省略二者。 In some embodiments, when the oscillators 100A and 100B of FIG. 1 are synchronized, one of the operations 630 or 640 is omitted, or both are omitted.

再者,圖5的脈衝分布網路500與脈衝注入程序(操作630)可用於其他型式的振盪器,不限於電感電容振諧振盪器(LC tank oscillators)。在一些實施例中,上述的脈衝注入程序或是脈衝注入機制亦可用於特定型式的振盪器,已知為環形振盪器。 Furthermore, the pulse distribution network 500 and pulse injection routine of FIG. 5 (operation 630) can be used with other types of oscillators, not limited to LC tank oscillators. In some embodiments, the pulse injection procedure or pulse injection mechanism described above can also be used with a particular type of oscillator, known as a ring oscillator.

例如,圖7係根據一或多個實施例說明環形振盪器700的概示圖。振盪器700具有輸出節點702以及P個反向器710-1至710-P,其中P為奇數。反向器710-1至710-P係串聯連接。再者,最後階段的反向器710-P的輸出端係耦合輸出節點702,以及第一階段的反向器710-1的輸入端係耦合反向器710-P的輸出端。反向器710-1至710-P係作為主動迴授裝置,並且用於在輸出節點702產生振盪信號。另一反向器720具有用於接收脈衝信號的輸入端,以及與第一節點702耦合的輸出端。反向器720係作為重設裝置,用於響應脈衝信號在節點704將輸出振盪信號設定為預定電壓位準。在一些實施例中,類似於振盪器700的二或多個環形振盪器(例如圖5的振盪器532與534)係連接至類似於脈衝分布網路500之脈衝分布網路的不同端點,用以將二或多個環形振盪器的輸出振盪信號同步化。 For example, FIG. 7 illustrates an overview of ring oscillator 700 in accordance with one or more embodiments. Oscillator 700 has an output node 702 and P inverters 710-1 through 710-P, where P is an odd number. The inverters 710-1 to 710-P are connected in series. Furthermore, the output of the final stage inverter 710-P is coupled to the output node 702, and the input of the first stage inverter 710-1 is coupled to the output of the inverter 710-P. The inverters 710-1 to 710-P are used as active feedback devices and are used to generate an oscillating signal at the output node 702. Another inverter 720 has an input for receiving a pulse signal and an output coupled to the first node 702. The inverter 720 acts as a reset device for setting the output oscillating signal to a predetermined voltage level at node 704 in response to the pulse signal. In some embodiments, two or more ring oscillators (such as oscillators 532 and 534 of FIG. 5) similar to oscillator 700 are coupled to different end points of a pulse distribution network similar to pulse distribution network 500, It is used to synchronize the output oscillation signals of two or more ring oscillators.

圖8係根據一或多個實施例說明另一環形振盪器800的概示圖。振盪器800具有一對輸出節點802與804以及Q個差動放大器 (differential amplifier)810-1至810-Q,其中Q為奇數。放大器810-1至810-Q係串聯連接。最後階段的放大器810-Q的輸出端係耦合輸出節點802與804,以及第一階段的放大器810-1的輸入端係耦合放大器810-Q的輸出端。放大器810-1至810-Q係作為主動迴授裝置,並且在輸出節點802與804產生一對差動振盪信號。放大器之一者,例如放大器810-1,進一步包含切換裝置或是重設裝置,用於響應脈衝信號將放大器810-1的輸出端設定為預定電壓位準。在一些實施例中,放大器810-1至810-Q中的任何差動放大器可用於脈衝信號注入。在一些實施例中,為了將二或多個環形振盪器的輸出振盪信號同步化,類似於振盪器800的二或多個環形振盪器(例如圖5的振盪器532與534)係連接至類似於脈衝分布網路500之脈衝分布網路的不同端點。 FIG. 8 illustrates an overview of another ring oscillator 800 in accordance with one or more embodiments. Oscillator 800 has a pair of output nodes 802 and 804 and Q differential amplifiers (differential amplifier) 810-1 to 810-Q, where Q is an odd number. The amplifiers 810-1 to 810-Q are connected in series. The output of amplifier 810-Q of the final stage is coupled to output nodes 802 and 804, and the input of amplifier 810-1 of the first stage is coupled to the output of amplifier 810-Q. Amplifiers 810-1 through 810-Q act as active feedback devices and generate a pair of differential oscillating signals at output nodes 802 and 804. One of the amplifiers, such as amplifier 810-1, further includes a switching device or reset device for setting the output of amplifier 810-1 to a predetermined voltage level in response to the pulse signal. In some embodiments, any of the amplifiers 810-1 through 810-Q can be used for pulse signal injection. In some embodiments, to synchronize the output oscillating signals of two or more ring oscillators, two or more ring oscillators (such as oscillators 532 and 534 of FIG. 5) similar to oscillator 800 are connected to similar The different ends of the pulse distribution network of the pulse distribution network 500.

圖9係根據一或多實施例說明包含耦合結構910以及對應的第一與第二電感裝置922與924的部分的電路900之俯視圖。在一些實施例中,電感裝置922與924係相當於圖1的電感裝置110A與110B或是圖3的電感裝置310A至310F。在一些實施例中,耦合結構910係用以讓圖1的磁性耦合180更容易些或是讓圖3的磁性耦合308A至380G更容易些。 9 is a top plan view of circuitry 900 including portions of coupling structure 910 and corresponding first and second inductive devices 922 and 924, in accordance with one or more embodiments. In some embodiments, inductive devices 922 and 924 are equivalent to inductive devices 110A and 110B of FIG. 1 or inductive devices 310A through 310F of FIG. In some embodiments, the coupling structure 910 is used to make the magnetic coupling 180 of FIG. 1 easier or to make the magnetic couplings 308A through 380G of FIG. 3 easier.

耦合結構910包含第一傳導迴路912、第二傳導迴路914、以及電性連接第一傳導迴路912與第二傳導迴路914的一組傳導路徑916。第一傳導迴路912與第二傳導迴路914具有八角形迴路的形狀。在一些實施例中,第一傳導迴路912與第二傳導迴路914具有多角形迴路或是圓形迴路的形狀。第一傳導迴路912、第二傳導迴路914以及一組傳導路徑916形成在一或多個晶片的不同互連層中。由俯視方向觀察,第一傳導迴路912環繞第一電感裝置922。由俯視方向觀察,第二電感迴路914環繞第二電感裝置924。 The coupling structure 910 includes a first conductive loop 912, a second conductive loop 914, and a set of conductive paths 916 electrically connected to the first conductive loop 912 and the second conductive loop 914. The first conductive loop 912 and the second conductive loop 914 have the shape of an octagonal loop. In some embodiments, the first conductive loop 912 and the second conductive loop 914 have the shape of a polygonal loop or a circular loop. First conductive loop 912, second conductive loop 914, and a set of conductive paths 916 are formed in different interconnect layers of one or more wafers. The first conduction loop 912 surrounds the first inductive device 922 as viewed in a top view. The second inductive loop 914 surrounds the second inductive device 924 as viewed in a top view.

第一電感裝置922具有對應於電感裝置922的線圈之開 口的信號埠922a、線圈922b的中心以及埠方向922c。第二電感裝置924具有對應於電感裝置924的線圈之開口的信號埠924a、線圈924b的中心以及埠方向924c。在圖10中,埠方向922c與924c指向相同的方向。在一些實施例中,埠方向922c與924c係指向不同方向。 The first inductive device 922 has a coil corresponding to the inductive device 922 The signal 埠 922a of the mouth, the center of the coil 922b, and the 埠 direction 922c. The second inductive device 924 has a signal 埠 924a corresponding to the opening of the coil of the inductive device 924, a center of the coil 924b, and a meandering direction 924c. In Fig. 10, the 埠 directions 922c and 924c point in the same direction. In some embodiments, the turns directions 922c and 924c point in different directions.

第一傳導迴路912包含第一端912a與第二端912b。第二傳導迴路914包含第一端914a與第二端914b。該組傳導路徑916包含第一傳導路徑916a與第二傳導路徑916b。第一傳導路徑916a係電性連接第一傳導路徑912的第一端912a以及第二傳導路徑914的第一端914a。第二傳導路徑916b係電性連接第一傳導迴路912的第二端912b以及第二傳導迴路914的第二端914b。長度L係定義為第一傳導迴路912與第二傳導迴路914之間的空間之長度。在一些實施例中,長度L係等於或大於100微米。 The first conduction loop 912 includes a first end 912a and a second end 912b. The second conduction loop 914 includes a first end 914a and a second end 914b. The set of conductive paths 916 includes a first conductive path 916a and a second conductive path 916b. The first conductive path 916a is electrically connected to the first end 912a of the first conductive path 912 and the first end 914a of the second conductive path 914. The second conductive path 916b is electrically connected to the second end 912b of the first conductive loop 912 and the second end 914b of the second conductive loop 914. The length L is defined as the length of the space between the first conductive loop 912 and the second conductive loop 914. In some embodiments, the length L is equal to or greater than 100 microns.

在一些實施例中,響應於第一電感裝置922所產生的第一磁場在第一傳導迴路912產生感應電流。感應電流經由該組傳導路徑916而傳輸至第二傳導迴路914,並且在第二傳導迴路914內產生第二磁場。據此,第一與第二電感裝置922與924之間的互感係較不受第一磁場的場分布所支配,而較受到感應電流所再生的第二磁場所支配。因此,第一與第二電感裝置922與924之間的互感係不受電感裝置922與924之間距離的支配,例如當長度L等於或大於100微米(μm)時。 In some embodiments, the first magnetic field generated in response to the first inductive device 922 generates an induced current in the first conduction loop 912. The induced current is transmitted to the second conductive loop 914 via the set of conductive paths 916 and a second magnetic field is generated within the second conductive loop 914. Accordingly, the mutual inductance between the first and second inductive devices 922 and 924 is less dominated by the field distribution of the first magnetic field and is governed by the second magnetic field regenerated by the induced current. Thus, the mutual inductance between the first and second inductive devices 922 and 924 is not governed by the distance between the inductive devices 922 and 924, such as when the length L is equal to or greater than 100 micrometers (μm).

圖10係根據一或多個實施例說明兩個電感裝置之間,例如電感裝置922與924之間,有或無耦合結構之耦合因子K與頻率Freq的關係之示意圖。曲線1010係代表當無耦合結構910且電感裝置922與924之間距離設定為1000微米時之電感裝置922與924之間的耦合因子K。曲線1020a係代表當有耦合結構910且長度L設定為500微米時之電感裝置922與924之間的耦合因子K;曲線1020b係代表長度L為 1000微米時之耦合因子K;曲線1020c係代表長度L為2000微米時之耦合因子K;曲線1020d係代表長度L為3000微米時之耦合因子K;以及曲線1020e係代表長度L為5000微米時之耦合因子K。參考線1030係代表K值為0.001(10-3)。 10 is a diagram illustrating the relationship between the coupling factor K and the frequency Freq between two inductive devices, such as inductive devices 922 and 924, with or without a coupled structure, in accordance with one or more embodiments. Curve 1010 represents the coupling factor K between inductive devices 922 and 924 when the coupling structure 910 is uncoupled and the distance between the inductive devices 922 and 924 is set to 1000 microns. The curve 1020a represents the coupling factor K between the inductive devices 922 and 924 when the coupling structure 910 is provided and the length L is set to 500 μm; the curve 1020b represents the coupling factor K when the length L is 1000 μm; the curve 1020c represents the length L is a coupling factor K at 2000 microns; curve 1020d represents a coupling factor K at a length L of 3000 microns; and curve 1020e represents a coupling factor K at a length L of 5000 microns. Reference line 1030 represents a K value of 0.001 (10 -3 ).

耦合因子K係定義為: M係電感裝置922與924之間的相互電感、L1係第一電感裝置922的自感(self-inductance),以及L2係第二電感裝置924的自感。如果K值大於0.001(參考線1030),則對應於電感裝置922與924的振盪器具有有意義的磁性耦合,其足以維持電感裝置922與924間的穩定相位差。 The coupling factor K is defined as: The mutual inductance between the M-based inductive devices 922 and 924, the self-inductance of the L 1 -based first inductive device 922, and the self-inductance of the L 2 -based second inductive device 924. If the K value is greater than 0.001 (reference line 1030), the oscillators corresponding to inductive devices 922 and 924 have a meaningful magnetic coupling sufficient to maintain a stable phase difference between inductive devices 922 and 924.

如圖10的曲線1010所示,在距離為1000微米,無耦合結構910的架構不再確保電感裝置922與924之間足夠的磁性耦合。相對地,曲線1020a-1020e係說明具有耦合結構910的實施例提供電感裝置922與924之間的磁性耦合而不受其間的距離支配。如圖10所示,在500MHz之後,對於長度L設定為500、1000、2000、3000或5000微米,曲線1020a-1020e皆高於參考線1030。 As shown by curve 1010 of FIG. 10, at a distance of 1000 microns, the architecture of the uncoupled structure 910 no longer ensures sufficient magnetic coupling between the inductive devices 922 and 924. In contrast, curves 1020a-1020e illustrate that embodiments having a coupling structure 910 provide magnetic coupling between inductive devices 922 and 924 without being governed by the distance therebetween. As shown in FIG. 10, after 500 MHz, for the length L set to 500, 1000, 2000, 3000 or 5000 microns, the curves 1020a-1020e are all above the reference line 1030.

圖11A至圖15進一步說明隨著圖9的實施例之一些可能的變化。在一些實施例中,圖11A至圖15說明的變化可結合進一步形成與圖9及圖11A至圖15所示之概念一致的不同變化。 Figures 11A through 15 further illustrate some of the possible variations with the embodiment of Figure 9. In some embodiments, the variations illustrated in Figures 11A-15 can be combined with further variations that are consistent with the concepts illustrated in Figures 9 and 11A-15.

圖11A係根據一或多多個實施例說明耦合結構910A以及對應的電感裝置922與924之俯視圖。與圖9所示相同或類似的元件係具有相同的元件符號,並且省略其詳細說明。 FIG. 11A illustrates a top view of coupling structure 910A and corresponding inductive devices 922 and 924 in accordance with one or more embodiments. The same or similar elements as those shown in FIG. 9 have the same component symbols, and a detailed description thereof will be omitted.

相較於耦合結構910,耦合結構910A包含一組傳導路徑916A取代該組傳導路徑916。此組傳導路徑916A係包含第一傳導路徑916Aa與第二傳導路徑916Ab。第一傳導路徑916Aa與第二傳導路徑 916Ab係被路由,因而在俯視方向觀察到第一傳導路徑916Aa在位置1110與第二傳導路徑916Ab相交。 In contrast to coupling structure 910, coupling structure 910A includes a set of conductive paths 916A in place of the set of conductive paths 916. This set of conductive paths 916A includes a first conductive path 916Aa and a second conductive path 916Ab. First conductive path 916Aa and second conductive path The 916Ab is routed such that the first conductive path 916Aa is observed at the location 1110 to intersect the second conductive path 916Ab in a top view.

圖11B係根據一或多個實施例說明耦合結構910B與對應的電感裝置922與924之俯視圖。與圖9所示相同或類似的元件係具有相同的元件符號,並且省略其詳細說明。 FIG. 11B illustrates a top view of coupling structure 910B and corresponding inductive devices 922 and 924 in accordance with one or more embodiments. The same or similar elements as those shown in FIG. 9 have the same component symbols, and a detailed description thereof will be omitted.

相較於耦合結構910,耦合結構910B係包含一組傳導路徑916B取代該組傳導路徑916。此組傳導路徑916B包含第一傳導路徑916Ba與第二傳導路徑916Bb。第一傳導路徑916Ba與第二傳導路徑916Ba係被路由,因而從俯視方向觀察到第一傳導路徑916Ba與第二傳導路徑916Bb各自在位置1120具有有角度的角。 In contrast to coupling structure 910, coupling structure 910B includes a set of conductive paths 916B in place of the set of conductive paths 916. This set of conductive paths 916B includes a first conductive path 916Ba and a second conductive path 916Bb. The first conductive path 916Ba and the second conductive path 916Ba are routed such that the first conductive path 916Ba and the second conductive path 916Bb each have an angular angle at the position 1120 as viewed from a plan view.

圖11C係根據一或多個實施例說明耦合結構910C以及對應的電感裝置922與924的俯視圖。與圖9所示相同或類似的元件係具有相同的元件符號,並且省略其詳細說明。 FIG. 11C illustrates a top view of coupling structure 910C and corresponding inductive devices 922 and 924 in accordance with one or more embodiments. The same or similar elements as those shown in FIG. 9 have the same component symbols, and a detailed description thereof will be omitted.

相較於耦合結構910,耦合結構910C係包含一組傳導路徑916C取代該組傳導路徑916。此組傳導路徑916C係包含第一傳導路徑916Ca與第二傳導路徑916Cb。第一傳導路徑916Ca與第二傳導路徑916Cb係被路由,因而從俯視方向觀察到第一傳導路徑916Ca與第二傳導路徑916Cb各自在位置1130具有有角度的角。同樣地,從俯視方向觀察到第一傳導路徑916Ca與第二傳導路徑916Cb在位置1130相交。 In contrast to the coupling structure 910, the coupling structure 910C includes a set of conduction paths 916C in place of the set of conduction paths 916. The set of conductive paths 916C includes a first conductive path 916Ca and a second conductive path 916Cb. The first conductive path 916Ca and the second conductive path 916Cb are routed such that the first conductive path 916Ca and the second conductive path 916Cb each have an angular angle at the position 1130 as viewed from a top view. Likewise, the first conductive path 916Ca and the second conductive path 916Cb intersect at a position 1130 as viewed from a top view.

圖12A係根據一或多個實施例說明耦合結構1210A以及對應的電感裝置1222與1224之俯視圖。耦合結構1210A係包含第一傳導迴路1212A、第二傳導迴路1214A、電性連接傳導迴路1212A與1214A的第一組傳導路徑1216A、第三傳導迴路1212B、第四傳導迴路1214B、以及電性連接傳導迴路1212B與1214B的第二組傳導路徑1216B。第一電感裝置1222係磁性耦合第一傳導迴路1212A。第二電感裝置1224係磁性耦合第三傳導迴路1212B。第二傳導迴路1214A係 磁性耦合第四傳導迴路1214B。從俯視方向觀察到第二傳導迴路1214A係環繞第四傳導迴路1214B。 FIG. 12A illustrates a top view of coupling structure 1210A and corresponding inductive devices 1222 and 1224 in accordance with one or more embodiments. The coupling structure 1210A includes a first conductive loop 1212A, a second conductive loop 1214A, a first set of conductive paths 1216A, a third conductive loop 1212B, a fourth conductive loop 1214B, and electrical connection conduction electrically connected to the conductive loops 1212A and 1214A. A second set of conduction paths 1216B of loops 1212B and 1214B. The first inductive device 1222 is magnetically coupled to the first conduction loop 1212A. The second inductive device 1224 is magnetically coupled to the third conduction loop 1212B. Second conduction loop 1214A The fourth conductive loop 1214B is magnetically coupled. The second conduction loop 1214A surrounds the fourth conduction loop 1214B as viewed from a top view.

在一些實施例中,響應第一電感裝置1222產生的第一磁場,在第一傳導迴路1212A產生第一感應電流。第一感應電流經由第一組傳導路徑1216A而傳輸至第二傳導迴路1214A,並且在第二傳導迴路1214A內產生第二磁場。響應第二磁場,在第四傳導迴路1214B產生第二感應電流。第二感應電流係經由第二組傳導路徑1216B而傳輸至第三傳導迴路1214B,並且在第三傳導迴路1214B內產生第三磁場。據此,第二電感裝置1224係經由第三傳導迴路1214B內第二感應電流再生的第三磁場,而與第一電感裝置1222磁性耦合。 In some embodiments, a first induced current is generated at the first conduction loop 1212A in response to the first magnetic field generated by the first inductive device 1222. The first induced current is transmitted to the second conductive loop 1214A via the first set of conduction paths 1216A and a second magnetic field is generated within the second conductive loop 1214A. In response to the second magnetic field, a second induced current is generated at the fourth conduction loop 1214B. The second induced current is transmitted to the third conductive loop 1214B via the second set of conduction paths 1216B and a third magnetic field is generated within the third conductive loop 1214B. Accordingly, the second inductive device 1224 is magnetically coupled to the first inductive device 1222 via a third magnetic field regenerated by the second induced current in the third conductive loop 1214B.

圖12B係根據一或多個實施例說明耦合結構1210B以及對應的電感裝置1222與1224之俯視圖。與圖12A所示相同或類似的元件係具有相同的元件符號,並且省略其詳細說明。相較於耦合結構1210A,從俯視方向觀察到第二傳導迴路1214A與第四傳導迴路1214B重疊。換言之,第二傳導迴路1214A與第四傳導迴路1214B具有相同尺寸與形狀,但形成在不同的互連層上。 FIG. 12B illustrates a top view of coupling structure 1210B and corresponding inductive devices 1222 and 1224 in accordance with one or more embodiments. The same or similar elements as those shown in FIG. 12A have the same component symbols, and detailed description thereof is omitted. Compared to the coupling structure 1210A, the second conduction loop 1214A overlaps the fourth conduction loop 1214B as viewed from a plan view. In other words, the second conductive loop 1214A and the fourth conductive loop 1214B have the same size and shape, but are formed on different interconnect layers.

圖12C係根據一或多個實施例說明耦合結構1210C以及對應的電感裝置1222、1224與1226之俯視圖。與圖12A所示相同或類似的元件係具有相同的元件符號,並且省略其詳細說明。相較於耦合結構1210A,第二傳導迴路1214A與第四傳導迴路1214B被配置以與一額外的電感裝置1226磁性耦合。同樣地,從俯視方向觀察到第四傳導迴路1214B係環繞第二傳導迴路1214A。 12C illustrates a top view of coupling structure 1210C and corresponding inductive devices 1222, 1224, and 1226, in accordance with one or more embodiments. The same or similar elements as those shown in FIG. 12A have the same component symbols, and detailed description thereof is omitted. The second conductive loop 1214A and the fourth conductive loop 1214B are configured to magnetically couple with an additional inductive device 1226 as compared to the coupling structure 1210A. Similarly, the fourth conduction loop 1214B surrounds the second conduction loop 1214A as viewed from a top view.

圖12D係根據一或多個實施例說明耦合結構1210D以及對應的電感裝置1222、1224與1226之俯視圖。與圖12B所示相同或類似的元件係具有相同的元件符號,並且省略其詳細說明。相較於耦合結構1210B,第二傳導迴路1214A與第四傳導迴路1214B被配置以與一額外的電感裝置1226磁性耦合。 12D illustrates a top view of coupling structure 1210D and corresponding inductive devices 1222, 1224, and 1226, in accordance with one or more embodiments. The same or similar elements as those shown in FIG. 12B have the same component symbols, and detailed description thereof is omitted. The second conductive loop 1214A and the fourth conductive loop 1214B are configured to magnetically couple with an additional inductive device 1226 as compared to the coupling structure 1210B.

圖12E係根據一或多個實施例說明耦合結構1210E以及對應的電感裝置1222、1224與1226之俯視圖。與圖12D所示相同或類似的元件係具有相同的元件符號,並且省略其詳細說明。相較於耦合結構1210D,使用一組傳導路徑1216B’取代第二組傳導路徑1216B,其中該組傳導路徑1216B’的一傳導路徑係在位置1230與該組傳導路徑1216B’的另一傳導路徑交叉。 12E illustrates a top view of coupling structure 1210E and corresponding inductive devices 1222, 1224, and 1226, in accordance with one or more embodiments. The same or similar elements as those shown in FIG. 12D have the same component symbols, and detailed description thereof is omitted. In contrast to the coupling structure 1210D, a second set of conductive paths 1216B' is replaced with a set of conductive paths 1216B', wherein one conductive path of the set of conductive paths 1216B' crosses another conductive path of the set of conductive paths 1216B' at location 1230 .

圖13A係根據一或多個實施例說明耦合結構1310A以及對應的電感裝置1322、1324與1326之俯視圖。耦合結構1310A係包含三個傳導迴路1312、1314與1316,傳導迴路1312、1314與1316經由一組傳導路徑1318而電性耦合在一起。傳導迴路1312、1314與1316各自磁性耦合至對應的電感裝置1322、1324與1326。 FIG. 13A illustrates a top view of coupling structure 1310A and corresponding inductive devices 1322, 1324, and 1326, in accordance with one or more embodiments. The coupling structure 1310A includes three conductive loops 1312, 1314, and 1316 that are electrically coupled together via a set of conductive paths 1318. Conductive loops 1312, 1314, and 1316 are each magnetically coupled to corresponding inductive devices 1322, 1324, and 1326.

圖13B係根據一或多個實施例說明耦合結構1310B以及對應的電感裝置1322、1324、1326與1327之俯視圖。與圖13A所示相同或類似的元件係具有相同的元件符號,並且省略其詳細說明。耦合結構1310B係包含四個傳導迴路1312、1314、1316與1317,其經由一組傳導路徑1318而電性耦合在一起。傳導迴路1312、1314、1316與1317各自磁性耦合對應的電感裝置1322、1324、1326與1327。 FIG. 13B illustrates a top view of coupling structure 1310B and corresponding inductive devices 1322, 1324, 1326, and 1327, in accordance with one or more embodiments. The same or similar elements as those shown in FIG. 13A have the same component symbols, and detailed description thereof is omitted. The coupling structure 1310B includes four conductive loops 1312, 1314, 1316, and 1317 that are electrically coupled together via a set of conductive paths 1318. Conductive loops 1312, 1314, 1316, and 1317 are each magnetically coupled to corresponding inductive devices 1322, 1324, 1326, and 1327.

圖14係根據一或多個實施例說明耦合結構1410以及對應的電感裝置922與924之俯視圖。與圖9所示相同或類似的元件係具有相同的元件符號,並且省略其詳細說明。耦合結構1410係包含兩個傳導迴路1412與1414,其係經由一組傳導路徑1416而電性耦合在一起。傳導迴路1412與1416各自磁性耦合對應的電感裝置922與924。再者,從俯視方向觀察到電感裝置922係環繞傳導迴路1412;以及從俯視方向觀察到電感裝置924係環繞傳導迴路1414。 14 is a top plan view of coupling structure 1410 and corresponding inductive devices 922 and 924, in accordance with one or more embodiments. The same or similar elements as those shown in FIG. 9 have the same component symbols, and a detailed description thereof will be omitted. The coupling structure 1410 includes two conductive loops 1412 and 1414 that are electrically coupled together via a set of conductive paths 1416. Conductive loops 1412 and 1416 are each magnetically coupled to corresponding inductive devices 922 and 924. Furthermore, the inductive device 922 is surrounded by the conduction loop 1412 as viewed from a top view; and the inductive device 924 is surrounded by the conduction loop 1414 as viewed from a top view.

圖15係根據一或多個實施例說明具有屏蔽結構1512與1514的耦合結構910以及對應的電感裝置922與924之俯視圖。與圖9所示相同或類似的元件係具有相同的元件符號,並且省略其詳細說明。 相較於圖9的電路900,圖15所示之電路進一步包含第一屏蔽結構1512以及第二屏蔽結構1514。從俯視方向觀察到該組傳導路徑916的至少一部分係在第一屏蔽結構1512與第二屏蔽結構1514之間。 15 is a top plan view of a coupling structure 910 having shielding structures 1512 and 1514 and corresponding inductive devices 922 and 924, in accordance with one or more embodiments. The same or similar elements as those shown in FIG. 9 have the same component symbols, and a detailed description thereof will be omitted. In contrast to circuit 900 of FIG. 9, the circuit of FIG. 15 further includes a first shield structure 1512 and a second shield structure 1514. At least a portion of the set of conductive paths 916 is seen between the first shield structure 1512 and the second shield structure 1514 as viewed from a top view.

圖16係根據一或多個實施例說明磁性耦合電感裝置的方法1600之流程圖。在一些實施例中,方法1600可用於結合圖9或圖12的電路。在一些實施例中,方法1600亦可用於結合圖11A至11C、圖12B至12E或圖13A至15的電路。可理解在圖16所示的方法1600進行之前、期間以及/或之後,可進行其他操作,本文中僅簡短描述一些其他程序。 16 is a flow diagram of a method 1600 of a magnetically coupled inductive device in accordance with one or more embodiments. In some embodiments, method 1600 can be used in conjunction with the circuitry of FIG. 9 or FIG. In some embodiments, method 1600 can also be used in conjunction with the circuits of FIGS. 11A-11C, 12B-12E, or 13A-15. It will be appreciated that other operations may be performed before, during, and/or after the method 1600 shown in FIG. 16, and only some other procedures are briefly described herein.

程序開始於操作1610,其中響應第一電感裝置922或1222產生的第一振盪器之第一磁場,在第一傳導迴路912或1212A產生感應電流。 The process begins at operation 1610 where an induced current is generated at the first conduction loop 912 or 1212A in response to a first magnetic field of the first oscillator generated by the first inductive device 922 or 1222.

程序進行至操作1620,其中感應電流係經由電性連接第一與第二傳導迴路之一組傳導路徑916或1216A而傳輸至第二傳導迴路914或1214A。 The process proceeds to operation 1620 where the induced current is transmitted to the second conductive loop 914 or 1214A via a set of conductive paths 916 or 1216A electrically coupled to the first and second conductive loops.

程序進行至操作1630,響應通過第二傳導迴路914或1214A的感應電流,產生第二磁場。 The program proceeds to operation 1630 to generate a second magnetic field in response to the induced current through the second conduction loop 914 or 1214A.

對於具有與圖12或圖12B至E相同或類似的架構之耦合結構,程序進行至操作1640,響應第二磁場,在第三傳導迴路1214B產生另一感應電流。 For a coupling structure having the same or similar architecture as FIG. 12 or FIGS. 12B through E, the program proceeds to operation 1640 to generate another induced current in the third conduction loop 1214B in response to the second magnetic field.

程序進行至操作1650,該另一感應電流係經由電性連接第三與第四傳導迴路的另一組傳導路徑1216B而傳輸至第四傳導迴路1212B。 The process proceeds to operation 1650, which is transmitted to the fourth conduction loop 1212B via another set of conduction paths 1216B that are electrically coupled to the third and fourth conduction loops.

因此,第二振盪器的第二電感裝置924或1224係經由耦合結構910或1210而磁性耦合至第一振盪器的第一電感裝置922或1222。 Thus, the second inductive device 924 or 1224 of the second oscillator is magnetically coupled to the first inductive device 922 or 1222 of the first oscillator via the coupling structure 910 or 1210.

根據一實施例,電路包含耦合結構與第一電感裝置。 該耦合結構包含二或多個傳導迴路以及電性連接至該二或多個傳導迴路的一組傳導路徑。第一電感裝置係磁性耦合至該二或多個傳導迴路的第一傳導迴路。 According to an embodiment, the circuit includes a coupling structure and a first inductive device. The coupling structure includes two or more conductive loops and a set of conductive paths electrically connected to the two or more conductive loops. The first inductive device is magnetically coupled to the first conduction loop of the two or more conduction loops.

根據另一實施例,電路包含第一振盪器,其包括電感裝置、第二振盪器,其包括電感裝置,以及耦合結構。該耦合結構包含與第一振盪器的電感裝置磁性耦合的第一傳導迴路、與第二振盪器的電感裝置磁性耦合的第二傳導迴路,以及電性連接第一傳導迴路與第二傳導迴路的一組傳導路徑。 In accordance with another embodiment, a circuit includes a first oscillator including an inductive device, a second oscillator including an inductive device, and a coupling structure. The coupling structure includes a first conductive loop magnetically coupled to the inductive device of the first oscillator, a second conductive loop magnetically coupled to the inductive device of the second oscillator, and an electrical connection between the first conductive loop and the second conductive loop A set of conduction paths.

根據另一實施例,方法包含響應第一振盪器的第一電感裝置產生的第一磁場-在耦合結構的第一傳導迴路產生感應電流。感應電流經由與第一及第二傳導迴路電性連接的耦合結構之一組傳導路徑而傳輸至該耦合結構的第二傳導迴路。第二振盪器的第二電感裝置係經由該耦合結構而磁性耦合至第一振盪器的第一電感裝置。 In accordance with another embodiment, a method includes generating a induced current in a first conductive loop of a coupled structure in response to a first magnetic field generated by a first inductive device of the first oscillator. The induced current is transmitted to the second conductive loop of the coupling structure via a set of conduction paths of the coupling structure electrically coupled to the first and second conductive loops. A second inductive device of the second oscillator is magnetically coupled to the first inductive device of the first oscillator via the coupling structure.

前述說明概述一些實施例的特徵,因而該技藝之技術人士可更加理解本揭露的各方面。該技藝的技術人士應理解其可輕易使用本揭露作為設計或修飾其他製程與結構的基礎,而產生與本申請案相同之目的以及/或達到相同優點。該技藝之技術人士亦應理解此均等架構並不脫離本揭露的精神與範圍,並且其可進行各種改變、取代與變化而不脫離本揭露的精神與範圍。 The foregoing description summarizes the features of some embodiments, and those skilled in the art can understand the aspects of the disclosure. Those skilled in the art will appreciate that the present disclosure can be readily utilized as a basis for designing or modifying other processes and structures to achieve the same objectives and/or the same advantages as the present application. It should be understood by those skilled in the art that the present invention is not limited to the spirit and scope of the disclosure, and various changes, substitutions and changes can be made without departing from the spirit and scope of the disclosure.

900‧‧‧電路 900‧‧‧ Circuitry

910‧‧‧耦合結構 910‧‧‧Coupling structure

922‧‧‧第一電感裝置 922‧‧‧First Inductive Device

924‧‧‧第二電感裝置 924‧‧‧second inductive device

912‧‧‧第一傳導迴路 912‧‧‧First conduction loop

914‧‧‧第二傳導迴路 914‧‧‧Second conduction loop

916‧‧‧傳導路徑 916‧‧‧Transmission path

922a、924a‧‧‧信號埠 922a, 924a‧‧‧ signal埠

922b、924b‧‧‧線圈 922b, 924b‧‧‧ coil

922c、924c‧‧‧埠方向 922c, 924c‧‧‧ direction

912a、914a‧‧‧第一端 912a, 914a‧‧‧ first end

912b、914b‧‧‧第二端 912b, 914b‧‧‧ second end

916a‧‧‧第一傳導路徑 916a‧‧‧First conduction path

916b‧‧‧第二傳導路徑 916b‧‧‧second conduction path

Claims (9)

一種振盪器電路,其包括:一耦合結構包括一連續的導電材料,該連續的導電材料包括:二或多個傳導迴路;以及一組傳導路徑,其電性連接該二或多個傳導迴路;以及一第一振盪器的一第一電感裝置,與該耦合結構電性分離並且磁性耦合至該二或多個傳導迴路的一第一傳導迴路,其中從俯視方向觀察到該第一電感裝置係環繞該第一傳導迴路。 An oscillator circuit comprising: a coupling structure comprising a continuous conductive material, the continuous conductive material comprising: two or more conductive loops; and a set of conductive paths electrically connected to the two or more conductive loops; And a first inductive device of the first oscillator electrically separated from the coupling structure and magnetically coupled to a first conduction loop of the two or more conduction loops, wherein the first inductive device is viewed from a top view Surrounding the first conduction loop. 如請求項1所述之振盪器電路,其中該二或多個傳導迴路的該第一傳導迴路係包括一第一端與一第二端;該二或多個傳導迴路的一第二傳導迴路係包括一第一端與一第二端;以及該組傳導路徑係包括:一第一傳導路徑,其電性連接該第一傳導迴路的該第一端以及該第二傳導迴路的該第一端;以及一第二傳導路徑,其電性連接該第一傳導迴路的該第二端以及該第二傳導迴路的該第二端。 The oscillator circuit of claim 1, wherein the first conductive loop of the two or more conductive loops comprises a first end and a second end; and a second conductive loop of the two or more conductive loops The system includes a first end and a second end; and the set of conductive paths includes: a first conductive path electrically connected to the first end of the first conductive loop and the first end of the second conductive loop And a second conductive path electrically connected to the second end of the first conductive loop and the second end of the second conductive loop. 如請求項1所述之振盪器電路,更包括一第二電感裝置,其磁性耦合至該二或多個傳導迴路的一第二傳導迴路。 The oscillator circuit of claim 1 further comprising a second inductive device magnetically coupled to a second conductive loop of the two or more conductive loops. 如請求項1所述之振盪器電路,其中該耦合結構更包括:另二或多個傳導迴路;以及另一組傳導路徑,其電性連接該另二或多個傳導迴路;該另二或多個傳導迴路的一第一傳導迴路係磁性耦合至一第二 電感裝置;以及該二或多個傳導迴路的一第二傳導迴路係磁性耦合至該另二或多個傳導迴路的一第二傳導迴路。 The oscillator circuit of claim 1, wherein the coupling structure further comprises: another two or more conductive loops; and another set of conductive paths electrically connected to the other two or more conductive loops; a first conductive loop of the plurality of conductive loops is magnetically coupled to a second An inductive device; and a second conductive loop of the two or more conductive loops are magnetically coupled to a second conductive loop of the other two or more conductive loops. 如請求項4所述之振盪器電路,更包括一第三電感裝置,其磁性耦合至該二或多個傳導迴路的該第二傳導迴路以及該另二或多個傳導迴路的該第二傳導迴路。 The oscillator circuit of claim 4, further comprising a third inductive device magnetically coupled to the second conduction loop of the two or more conduction loops and the second conduction of the other two or more conduction loops Loop. 一種振盪器電路,其包括:一第一振盪器,包括一電感裝置;一第二振盪器,包括一電感裝置;以及一耦合結構,包括:一第一傳導迴路,磁性耦合至該第一振盪器的該電感裝置並與該第一振盪器的該電感裝置電性分離,其中在從上往下的視角中該第一傳導迴路的一內周長的一第一點相較於該第一振盪器的該電感裝置的一外周長的一第二點離該第一傳導迴路的一中心遠,該第一點及該第二點沿著延伸通過該第一傳導迴路的該中心的一線設置;一第二傳導迴路,其磁性耦合至該第二振盪器的該電感裝置;以及一組傳導路徑,其電性連接該第一傳導迴路與該第二傳導迴路。 An oscillator circuit comprising: a first oscillator comprising an inductive device; a second oscillator comprising an inductive device; and a coupling structure comprising: a first conduction loop magnetically coupled to the first oscillation The inductive device is electrically separated from the inductive device of the first oscillator, wherein a first point of an inner circumference of the first conductive loop is compared to the first point in a top-down viewing angle A second point of an outer perimeter of the inductive device of the oscillator is remote from a center of the first conductive loop, the first point and the second point being disposed along a line extending through the center of the first conductive loop a second conduction loop magnetically coupled to the inductive device of the second oscillator; and a set of conductive paths electrically coupled to the first conductive loop and the second conductive loop. 如請求項6所述之振盪器電路,其中該第一傳導迴路係包括一第一端與一第二端;第二傳導迴路係包括一第一端與一第二端;以及該組傳導路徑係包括:一第一傳導路徑,其電性連接該第一傳導迴路的該第一端以及該第二傳導迴路的該第一端;以及 一第二傳導路徑,其電性連接該第一傳導迴路的該第二端以及該第二傳導迴路的該第二端。 The oscillator circuit of claim 6, wherein the first conductive loop includes a first end and a second end; the second conductive loop includes a first end and a second end; and the set of conductive paths The system includes: a first conductive path electrically connected to the first end of the first conductive loop and the first end of the second conductive loop; a second conductive path electrically connected to the second end of the first conductive loop and the second end of the second conductive loop. 如請求項6所述之振盪器電路,進一步包括:一第一屏蔽結構;以及一第二屏蔽結構,從俯視方向觀察到該組傳導路徑的至少一部分係在該第一屏蔽結構與該第二屏蔽結構之間。 The oscillator circuit of claim 6, further comprising: a first shielding structure; and a second shielding structure, wherein at least a portion of the set of conductive paths are seen in the top view from the first shielding structure and the second Between the shielded structures. 一種振盪器電路的操作方法,其包括:在一耦合結構的一第一傳導迴路,響應第一振盪器的第一電感裝置所產生的第一磁場,產生一感應電流,該第一電感裝置與該耦合結構電性分離;將該感應電流經由電性連接該第一與一第二傳導迴路的該耦合結構之一組傳導路徑,傳輸至該耦合結構的該第二傳導迴路,一第二振盪器的一第二電感裝置係經由該耦合結構而磁性耦合至該第一振盪器的該第一電感裝置;響應通過該耦合結構的該第二傳導迴路之該感應電流,產生一第二磁場;響應該第二磁場,在一第三傳導迴路產生另一感應電流;以及將該另一感應電流經由電性連接該第三與一第四傳導迴路的該耦合結構的另一組傳導路徑,而傳輸至該耦合結構的該第四傳導迴路。 An operating method of an oscillator circuit, comprising: a first conducting loop in a coupling structure, generating a sensing current in response to a first magnetic field generated by a first inductive device of the first oscillator, the first inductive device The coupling structure is electrically separated; the induced current is transmitted to the second conduction loop of the coupling structure via a group conduction path electrically connected to the coupling structure of the first and a second conduction loop, and a second oscillation a second inductive device is magnetically coupled to the first inductive device of the first oscillator via the coupling structure; generating a second magnetic field in response to the induced current through the second conductive loop of the coupling structure; Responding to the second magnetic field, generating another induced current in a third conductive loop; and passing the another induced current to another set of conductive paths of the coupling structure electrically connected to the third and fourth conductive loops Transmitted to the fourth conduction loop of the coupling structure.
TW104121048A 2014-06-30 2015-06-30 Oscillator circuit and operating method of oscillator circuit TWI588850B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US14/319,787 US9473152B2 (en) 2013-11-08 2014-06-30 Coupling structure for inductive device

Publications (2)

Publication Number Publication Date
TW201612930A TW201612930A (en) 2016-04-01
TWI588850B true TWI588850B (en) 2017-06-21

Family

ID=55169023

Family Applications (1)

Application Number Title Priority Date Filing Date
TW104121048A TWI588850B (en) 2014-06-30 2015-06-30 Oscillator circuit and operating method of oscillator circuit

Country Status (3)

Country Link
KR (1) KR101729400B1 (en)
CN (1) CN105306040B (en)
TW (1) TWI588850B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020132963A1 (en) * 2018-12-26 2020-07-02 华为技术有限公司 Integrated circuit comprising resonant circuit

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090289727A1 (en) * 2007-05-21 2009-11-26 Atmel Duisburg Gmbh Oscillator for generating different oscillations
US7633352B2 (en) * 2006-05-17 2009-12-15 Atmel Duisburg Gmbh Integrated tunable resonance circuit
TWI406306B (en) * 2008-05-02 2013-08-21 Vishay Dale Electronics Inc Highly coupled inductor

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7151430B2 (en) * 2004-03-03 2006-12-19 Telefonaktiebolaget Lm Ericsson (Publ) Method of and inductor layout for reduced VCO coupling
GB2462885B (en) * 2008-08-29 2013-03-27 Cambridge Silicon Radio Ltd Inductor structure
JP4922369B2 (en) 2009-08-28 2012-04-25 株式会社東芝 Voltage controlled oscillator

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7633352B2 (en) * 2006-05-17 2009-12-15 Atmel Duisburg Gmbh Integrated tunable resonance circuit
US20090289727A1 (en) * 2007-05-21 2009-11-26 Atmel Duisburg Gmbh Oscillator for generating different oscillations
TWI406306B (en) * 2008-05-02 2013-08-21 Vishay Dale Electronics Inc Highly coupled inductor

Also Published As

Publication number Publication date
CN105306040B (en) 2019-01-08
KR20160002400A (en) 2016-01-07
CN105306040A (en) 2016-02-03
TW201612930A (en) 2016-04-01
KR101729400B1 (en) 2017-04-21

Similar Documents

Publication Publication Date Title
US10153728B2 (en) Semiconductor device and method
US8258882B2 (en) Clock signal distributing device
US9899991B2 (en) Circuits and methods of synchronizing differential ring-type oscillators
EP2887551B1 (en) Apparatus and methods for multiphase oscillators
US8115560B2 (en) Ring-shaped voltage control oscillator
US10164570B2 (en) Coupling structure for inductive device
EP1456940A1 (en) Low noise oscillator
US8902007B2 (en) Clock distributor and electronic device
US8791765B2 (en) Force-mode distributed wave oscillator and amplifier systems
KR20160144371A (en) Reducing mismatch caused by power/ground routing in multi-core vco structure
US10749470B2 (en) Method and apparatus for multimode wideband oscillator
TWI588850B (en) Oscillator circuit and operating method of oscillator circuit
US10658975B2 (en) Semiconductor device and method
US9559635B2 (en) Method and apparatus of synchronizing oscillators
CN116155202A (en) Multi-core oscillating circuit and oscillator
KR101770480B1 (en) Circuits and methods of synchronizing differential ring-type oscillators
KR102570537B1 (en) Apparatus for generating microwave signal using frequency multiplier
JP2015154110A (en) oscillator