TWI567400B - Method and apparatus for testing ic - Google Patents

Description

Integrated circuit test method and device

The present invention relates to a method and apparatus for testing an integrated circuit.

The disclosure of the U.S. Provisional Application No. 61/445,839, filed on Feb. 23, 2011, the "variational temperature adjustment in the integrated circuit test" and the US Provisional Application No. 61/507,916, filed on July 14, 2011. Because of the temperature fluctuations, the frequency measurement of the atomic test instrument is adjusted and reference is made to the integrator's interest.

The technical background provided herein is for the general description of the context of this disclosure. The work of the presently known inventors, the degree of work described in this technical background, and the views that may be considered to be prior art descriptions are not explicitly or implicitly recognized as prior art with respect to the present disclosure.

Electronic parameters of the electronic circuit, such as current consumption, maximum operating frequency, etc., are tested to determine the quality of the circuit based on the measured value. Electronic parameters may be temperature sensitive. Therefore, temperature fluctuations may affect the measured value and change the measurement result.

The disclosure provides a test method in various aspects. The test method comprises measuring the electronic parameters of the device to be tested and the corresponding temperature of the device to be tested one or several times, and determining a coefficient of the pre-constructed model based on the measured values of the plurality of electronic parameters and the corresponding measured temperature to be specific The relationship between the electronic parameters and the temperature, and the value of the model and the electronic parameters at the specified temperature to determine the product to be tested quality. The model is pre-constructed by the coefficient of the number of strains of the device to be tested with the relationship between specific electronic parameters and temperature.

To determine the quality of the device under test, in one embodiment, the method includes determining a value of the electronic parameter at the specified temperature based on the model, and comparing the determined value to the limit value to determine the quality of the device under test. In another embodiment, the method includes determining, according to the model, a temperature value when the object to be tested has a limit value of the electronic parameter, and comparing the determined temperature value to the specified temperature to determine the quality of the device to be tested.

According to one aspect of the disclosure, the electronic parameter of the device to be tested and the corresponding temperature of the device to be tested are measured, and the method includes testing the device to be tested according to a test process including a plurality of variables tested in a series of other tests, and measuring Respond to the electronic parameters of the device under test for each variable test and the corresponding temperature.

The disclosure provides a test system in various aspects. The test system includes an interface and a controller. The interface is assembled to measure the electronic parameters of the device under test and the corresponding temperature of the device to be tested. The controller is equipped with a control interface to measure the electronic parameters of the device to be tested and the corresponding temperature of the device to be tested one or several times, and determines a pre-constructed model based on the measured values of the plurality of electronic parameters and the corresponding measured temperature. The coefficients are determined by the relationship between the specific electronic parameters and the temperature, and the limits of the model and the electronic parameters at the specified temperature to determine the quality of the device under test. The model is pre-constructed by the coefficient of the number of strains of the device to be tested with the relationship between specific electronic parameters and temperature.

The present disclosure provides various methods for testing integrated circuit products in various aspects. The method includes constructing a model for simulating electronic parameters of the device as a function of temperature. The model contains a plurality of coefficients that are the number of strains of the device under test. Further, the method includes determining an integer of the electronic parameter and the measured temperature of the corresponding temperature, the integer providing device is not measured The specified temperature satisfies an appropriate indicator of one of the electronic parameters. Then, the method is included in the device to be tested to perform the measurement electronic parameter and the corresponding temperature variable test at least the integer number of times, and determine the quality of the device to be satisfied to meet the threshold of the unmeasured temperature based on the model and the variable test.

1 is a block diagram of an example 100 of a test system in accordance with an embodiment of the present disclosure. The test system 100 includes an automatic test equipment (hereinafter referred to as ATE) 150 and a device under test (hereinafter referred to as DUT) 110. The ATE 150 and DUT 110 are suitably coupled together, such as via a probe or processor. The ATE 150 acts on the DUT 110 in accordance with the test flow 160 and receives test results. The quality of the DUT110 is based on the specified performance requirements and is then determined based on the test results.

According to an embodiment of the present disclosure, the test flow 160 includes a plurality of parametric tests (hereinafter referred to as PTs) 161 separated from other tests, such as I/O tests, central processor tests, memory tests, and the like. Each PT 161 performs measurements of one or more electronic parameters, such as current consumption, operating frequency, and the like. Temperature is also measured because of the dependence of the electronic parameters on temperature. Based on the measurement of electronic parameters (eg, P1, P2) and the corresponding measurements of temperature (eg, T1, T2), the quality of the DUT 110 and, more specifically, the suitability of the DUT 110 to meet the specified performance specifications is determined.

In one embodiment, the quality of the DUT 110 is determined based on the limits of the electronic parameters at a specified temperature (T _SPEC ). In one embodiment, the corresponding temperature (e.g., T1, T2) at which the electronic parameter is measured is not the same as the specified temperature (T _SPEC ) listed in the specification of the product data sheet. Conversely, in one embodiment, the ATE 150 calculates the value of the electronic parameter at the specified temperature (T _SPEC ) at one or more temperatures (eg, T1, T2) based on the measurement of the electronic parameters (eg, P1, P2). The ATE 150 then compares the calculated and limited values of the electronic parameters to determine the quality of the DUT 110.

The DUT 110 can be any suitable device. In one embodiment, the DUT 110 is one of a plurality of integrated circuit wafers on a wafer. In another embodiment, DUT 110 is comprised of an integrated circuit die and other circuit components, such as a ball grid array machine or other suitable circuit interface package integrated circuit, and a generalized conductor.

In accordance with an embodiment of the present disclosure, the DUT 110 includes a temperature sensor 120 that is assembled to measure temperature. In one example, temperature sensor 120 includes a circuit component, such as a suitable temperature sensing circuit on a diode or other integrated circuit chip to measure the temperature on the wafer. In one example, the diode current indicates the junction temperature. In another example, a method and apparatus for measuring temperature is disclosed in U.S. Patent No. 7,726,877, the disclosure of which is incorporated herein by reference.

It is worth noting that in another example, temperature sensor 120 is an off-chip component that measures the temperature of the wafer. In one example, temperature sensor 120 is in contact with an integrated circuit die. In another example, temperature sensor 120 is in close proximity to the integrated circuit wafer to measure the wafer temperature. In another example, temperature sensor 120 need not be in close proximity to the integrated circuit die to measure the wafer temperature.

In accordance with an embodiment of the present disclosure, the temperature profile of the DUT 110 changes due to a variety of factors, such as program variations, processor-to-processor variations, processor settings, device commands, and the like. In one example, a first DUT 110 begins testing at 85 ° C and ends at 140 ° C; a second DUT 110 begins testing at 95 ° C and ends testing Try at 80 °C.

Furthermore, the electronic parameters are sensitive to temperature. For example, a first measurement of quiescent current consumption at a relatively high temperature for the DUT 100 can be greater than a second measurement of quiescent current consumption at a relatively low temperature for the DUT 100. As such, in one embodiment, comparing the measurement and limit values regardless of the temperature at which the DUT 110 is being measured may result in undesired consequences, such as high yield or customer returns.

However, adjusting the temperature of the DUT 110 to a specified temperature can be time consuming and increases test time and expense. Embodiment, the assembly 100 based test system to determine the number of the measured electrical parameters varying according to a pre-construction of other temperatures and electrical parameters in the model specified temperature (T _SPEC) outside the specified temperature value (T _SPEC) according to one embodiment of the present disclosure .

According to one aspect of the disclosure, the ATE 150 includes a controller 170 and an interface 151. The interface 151 includes any suitable components, such as a pin electronic component, a pin driver, a pin sensor, a parametric measurement unit (hereinafter referred to as a PMU), etc., operable to the DUT 110 for testing. In one example, a PMU is assembled to apply a voltage to a pin and measure current to the same pin. The controller 170 controls the interface 151 to operate on the DUT 110 in accordance with the test flow 160, receive test results from the interface 151, and determine the quality of the DUT 110 based on the test results.

In accordance with an embodiment of the present disclosure, test flow 160 includes a plurality of variable tests 161 inserted at different locations in the test sequence. In accordance with one aspect of the present disclosure, the DUT 110 consumes energy during testing and may heat itself up, such that the temperature of the DUT at different locations may vary during testing, and in one embodiment the temperature of the DUT 110 is different from that listed in the product data sheet. The temperature of the limit value of the electronic parameter, in one example, an I/O test consumes relatively little energy, and the DUT 110 The temperature during the test and at the end of the test is relatively low. The central processor and memory tests consume relatively large amounts of energy and the temperature of the DUT increases significantly during central processor and memory testing. The position of the plurality of variable tests 161 in the test flow 160 can be selected by the DUT 110 to have a relatively large variation in the temperature of the plurality of variable tests 161. While the temperature at which the electronic parameters of the DUT 110 are actually being tested by the tester is removed from the specified temperature, in one embodiment, the value of the electronic parameter of the DUT 110 at the specified temperature is derived based on a model of the true measurement of the electronic parameter and a qualitative DUT representation.

In one example, test flow 160 is implemented in the form of a test software program. For example, each test is a test of a module or function in a software program. The controller 170 is implemented as a processor that executes a software program. The processor executes the test software program and the control interface 151 acts continuously on the DUT 110 to perform a series of tests. As a back strain number test 161, interface 151 acts on DUT 110 to measure one or more electronic parameters and measure the temperature of DUT 110.

Further, the controller 170 receives the measured value of the electronic parameter and the corresponding temperature. In one example, the controller 170 receives the first measured value of the electronic parameter and the corresponding temperature (P1, T1) in response to the first variable test 161, and receives the second measured value of the electronic parameter and the corresponding temperature (P2, T2) In response to the second variable test 161.

Still further, in an embodiment, the controller 170 utilizes the pre-constructed model to determine the relationship of electronic parameters to temperature. The pre-constructed model may have one or more unknown coefficients. In one example, the coefficients are the number of DUT strains, and different DUTs may have different coefficients. Based on one or more electronic parameter measurements and corresponding temperatures of the DUT 110, the controller 170 determines the coefficients of the DUT 110.

Further, the controller 170 determines the value of the electronic parameter at the specified temperature (T _SPEC ) according to the model, even if the electronic parameter is tested at a temperature different from the specified temperature. For example, the controller 170 calculates a value of the electronic parameter of the DUT 110 at a specified temperature using a model having the resolved coefficients. Then, the controller 170 determines the quality of the DUT 110 based on the determined value. In an example, controller 170 classifies DUT 110 into different classes based on the decision value, such as a high speed class, a general class, a low speed class, and the like. In another example, controller 170 determines to pass or eliminate based on the determined value.

2 is a flow chart illustrating a flow example 200 for generating a test flow in accordance with an embodiment of the disclosure. This procedure starts at S201 and proceeds to S210.

At S210, a prototype model of the simulated or specific electronic parameter as a function of temperature is determined. In one example, a polynomial model, such as a linear model, a quadratic model, etc., is determined to simulate changes in electronic parameters with temperature. In another example, a non-polynomial model is determined to simulate changes in electronic parameters with temperature. This model can contain coefficients for the number of non-DUT strains.

In an embodiment, a plurality of DUTs are selected to perform a specialization procedure to specify electronic parameters that vary with temperature. In a specific procedure, for each DUT, the electronic parameters are measured at several different temperatures. According to this specificization, the prototype model is constructed.

At S220, a plurality of insertion points in the test flow are selected. In one example, for a linear model, at least two insertion points in the test flow are selected. For example, one of the two insertion points is immediately after the DUT is expected to have a relatively low temperature I/O test, a another insertion point after one or more high energy consumption tests, such as the DUT is expected to have a relatively high Temperature memory test and / Or central processor test. As such, the two insertion points have a relatively large temperature difference.

In another example, for a quadratic equation model, at least three insertion points in the test flow are selected. For example, the first of the three insertion points is immediately after the DUT is expected to have a relatively low temperature I/O test, and the second of the three insertion points is expected to have a better than the I/O test immediately after the DUT After testing one of the high temperature energy consumption tests, the third of the three insertion points is immediately after all the high energy consumption tests for which the DUT is expected to have a higher temperature.

At S230, the variable test is inserted into the selected insertion point in the test flow to form a new test flow. The new test process is then used to test the DUT. This procedure then proceeds to S229 and ends.

In accordance with an embodiment of the present disclosure, the program 200 is executed by a processor to automatically generate a new test flow.

3 is a flow chart illustrating a flow example 300 of a device for testing, for example, ATE 150, in accordance with an embodiment of the disclosure. This procedure starts at S301 and proceeds to S310.

At S310, ATE 150 tests DUT 110 according to test flow 160. In an embodiment, test flow 160 includes a series of tests that include one or more variable tests 161. In accordance with an embodiment of the present disclosure, the location at which one or more of the variable tests 161 are inserted may be selected to have a relatively large variation in the temperature of the DUT at the plurality of variable tests 161. In one example, to return strain number test 161, interface 151 acts on DUT 110 to measure one or more electronic parameters and measure the temperature of DUT 110 when electronic parameters are measured.

At S320, the ATE 150 receives the measured value of the electronic parameter and the corresponding temperature. In one example, the ATE 150 receives the first measured value of the electronic parameter and the corresponding temperature (P1, In response to the first variable test 161, T1) receives the second measured value of the electronic parameter and the corresponding temperature (P2, T2) in response to the second variable test 161.

At S330, ATE 150 determines the coefficients in the circuit type pre-constructed model corresponding to the DUT. According to one embodiment of the present disclosure, the relationship between the model specific electronic parameters and temperature is pre-constructed. The pre-constructed model contains unknown coefficients. In an example. This coefficient is the number of DUT strains.

In one embodiment, the polynomial model is pre-constructed to simulate the behavior of electronic parameter changes as a function of temperature over a range of temperatures. The polynomial model contains unknown coefficients. The unknown coefficient is unlocked based on the value of the received electronic parameter and the corresponding temperature.

In one example, when the polynomial model is a linear model, the linear model has two unknown coefficients. In one example, the two coefficients can be unwrapped based on the measurements of the two variables test using any suitable technique, such as algebraic techniques, vector calculations, and the like. In other examples, the two coefficients can be unwrapped based on measurements of more than two variable tests, such as using a curve.

At S340, ATE 150 determines the value of the electronic parameter at the specified temperature based on the model. In one example, the quality of the DUT 110 is determined by the electronic parameter at a specified temperature limit. In one example, the product data sheet specification lists the lower limit of the electronic parameter at the specified temperature. Then, when the electronic parameter of the DUT at the specified temperature is lower than the low limit value, the DUT conforms to the specification of the product data sheet; when the electronic parameter of the DUT at the specified temperature is lower than the low limit value, the DUT does not conform to the specification of the product data sheet. The ATE 150 uses the model to derive the value of the electronic parameter at the specified temperature for the DUT 110. As such, when the variable test 161 is not executed at the specified temperature, the measured values of the electronic parameters and the corresponding temperatures can be used to predict the electronic parameters of the DUT 110 at the specified temperature.

At S350, ATE 150 determines the quality of DUT 110 based on the derived value. In an embodiment, the ATE 150 makes a decision as to whether the DUT 110 passes or fails based on the derived value. In one example, STE 150 compares the derived and restricted values to make a decision. In another example, ATE 150 classifies DUTs 110 into different classes based on derived values, such as high speed or fast classes, general or standard classes, low prime or slow classes, and the like. This procedure then proceeds to S399 and ends.

4A is a 400A diagram of an electronic parameter (PARA-1) specific in accordance with an embodiment of the disclosure. In Fig. 4A, the X axis represents temperature and the Y axis represents the measured value of the electronic parameter (PARA-1). The 400A map includes a first curve 410A, a second curve 420A, and a third curve 430A. In one example, the first curve 410A corresponds to the measurement of the first device in a particular program, the second curve 420A corresponds to the measurement of the second device in a particular program, and the third curve 430A corresponds to the third device in a particular program. Measurement in the middle.

In a particular procedure, in one embodiment, a plurality of devices, such as first, second, and third devices, are selected and specified to determine a suitable model for simulating PARA-1 as a function of temperature. In one example, the first, second, and third devices correspond to fast, normal, and slow devices. A source of thermal energy, such as a heat source, a heat sink, etc., is then controlled to change the temperature on the device. Further, the corresponding temperature of the device's PARA-1 and device is measured at various temperatures, such as a range of temperatures. According to the measurement, the curve of 410A-430A can be drawn, and the model can be constructed. In the example of FIG. 4A, the quadratic equation model can be selected to simulate the change in temperature of PARA-1 over temperature, as in the quadratic equation model shown in Equation 1.

PARA -1= a ₀ + a ₁ × T + a ₂ × T ²

In one example, the quadratic equation model contains three variable coefficients that are the number of strains of the device, such as a ₀ , a _{1 ,} and a _{2 in} Equation 1.

4A is a diagram showing a specific 400A of an electronic parameter (PARA-2) in accordance with an embodiment of the disclosure. The X axis represents temperature and the Y axis represents the measured value of the electronic parameter (PARA-2). The 400B map includes a first curve 410B, a second curve 420B, and a third curve 430B. In the example of Figure 4B, the linear model can be selected to simulate the change in temperature of PARA-2 over temperature, as shown by the linear model of Equation 2.

PARA -2= b ₀ + b ₁ × T type 2

In one example, the linear model contains two variable coefficients that are the number of strains of the device, such as b ₀ and b _{1 in} Equation 2.

FIG. 5A is a diagram showing a temperature variation diagram 500A in a test flow in accordance with an embodiment of the disclosure. The testing process consists of a series of tests. In the example of Figure 5A, the test flow begins with an I/O test. The I/O test is followed by a central processor test and a memory test.

According to one embodiment of the present disclosure, during testing, the DUT consumes energy and a portion of the energy is converted to thermal energy and heats the DUT. In one example, the I/O test consumes relatively low energy and the temperature increase of the DUT during the I/O test is relatively low. Central processor testing and memory testing consumes a significant amount of energy and the temperature of the DUT increases significantly during central processor testing and memory testing.

According to one embodiment of the present disclosure, the DUT is tested according to a test flow, and the temperature of the DUT is observed during the test. In the example of Figure 5A, curve 520 shows the temperature profile of the DUT during testing.

Further, in accordance with an embodiment of the present disclosure, the temperature profile may vary due to factors such as processor to processor variation, processor settings, device commands, startup temperatures, and the like. In an embodiment, a plurality of DUTs are tested according to a test flow, and The temperature of a plurality of DUTs during the test is observed. In one example, the plurality of DUTs can be selected from grains at different locations on the wafer, grains from different wafers, and grains from different batches. Further, multiple DUTs can be tested using different test equipment.

In the example of FIG. 5A, the temperature of the plurality of DUTs varies between the upper curve 510 and the lower curve 530.

In an embodiment, a plurality of insertion points in the test flow can be selected to insert a variable test based on the temperature profile. For example, to solve the three coefficients of the quadratic equation model of PARA-1 in Figure 4A, three insertion points are selected to insert the variable test (PARA-1_TEST) 550. Each variable test 550 measures the corresponding temperature of the PARA-1 and DUT of the DUT at variable time 550. In an embodiment, for example, one or more DUT frequency parameters and current consumption parameters are measured at each variable test 550.

Note that more than three insertion points can be selected to insert a variable test in the test flow. However, variable testing also consumes test time, and a large number of variable tests can also increase test costs and increase wafer or device cost.

Figure 5B is similar to Figure 5A. To understand the two coefficients of the linear model for the simulated PARA-2 in Figure 4B, two insertion points were selected to insert the variable test (PARA-2_TEST) 560. Each variable test 560 measures the corresponding temperature of the PARA-2 and DUT of the DUT at the variable test time. In an embodiment, for example, one or more DUT frequency parameters and current consumption parameters are measured at each variable test 560.

Note that more than three insertion points can be selected to insert a variable test in the test flow. However, variable tests also consume test time, a large number of variables Testing can also increase test costs and increase wafer or device cost.

In accordance with an embodiment of the present disclosure, a reduced number of variable tests are inserted into the test flow to reduce test costs. In an embodiment, a model that simulates the maximum operating frequency at a specified temperature is determined. In one embodiment, a single measurement of the parameter, such as the maximum operating frequency, is performed at any suitable temperature. This single measured parameter is used in a model of a particular DUT to predict a parameter at a specified temperature that is different from the temperature at which the parameter was measured.

As such, a single frequency test is required in this embodiment and can be inserted anywhere in the test flow. Since only one frequency test is required and this frequency test can be performed at any temperature, the test time and cost can be reduced.

FIG. 6A illustrates a maximum frequency (FREQ) specific map 600A in accordance with an embodiment of the disclosure. The X-axis is the temperature (T), and the Y-axis is the measured value of the parameter. In this example, it is the maximum frequency at which the integrated circuit can operate (FREQ). Graph 600A includes a first curve 610, a second curve 620, and a third curve 630. In one example, the first curve 610 corresponds to the measurement of the maximum frequency of the first device in the specialization procedure, the second curve 620 corresponds to the measurement of the maximum frequency of the second device in the specificization procedure, and the third curve 630 corresponds to The measurement of the maximum frequency of the third device in the specificization procedure.

In a particular procedure, in one embodiment, a plurality of devices, such as first, second, and third devices, are selected and specified to determine a suitable model to vary with temperature at a particular maximum frequency. In one example, the first, second, and third devices correspond to fast, normal, and slow devices. A source of thermal energy, such as a heat source, a heat sink, etc., is then controlled to change the temperature on the device. In another example, the first, second, and third devices are randomly selected from different wafers, different batches, etc. or are spanned from multiple The DUT test time is collected in a database containing all program changes. Further, the maximum frequency and the corresponding temperature are measured at a plurality of temperatures, such as a range of temperatures. Based on this measurement, curves 610-630 can be drawn and the model can be determined. In the example of Figure 6A, a linear model, as shown in Equation 3, can be used to simulate the change in maximum frequency with temperature.

FREQ ( T )= Slope × T + B

Where Slope and B are coefficients. Slope depends on the slope of the linear model, and B is the intercept of the linear model.

Further, in accordance with an embodiment of the present disclosure, the maximum frequency at the specified temperature (T _SPEC ) is a function of the slope of the linear model. Figure 6B shows a 600B plot for a specific slope ( ) and the maximum frequency at the specified temperature (FREQ@ T _SPEC ). In one embodiment, the slope is a function of the maximum frequency at a specified temperature, as shown in Equation 4: Slope = Func ( FREQ ( T _SPEC )) Equation 4

In one example, the linear model is used to simulate the slope and the maximum frequency at the specified temperature, as shown in Equation 5: Slope = α × FREQ ( T _SPEC ) + β Equation 5

Wherein α and β are coefficients which can be determined qualitatively according to Fig. 6B.

Further, in an embodiment, when the maximum frequency of the DUT (FREQ(T _TEST )) is measured at a temperature (T _TEST ), the relationship between the measured frequency and the maximum operating frequency at a specified temperature (T _SPEC ) may be The linear model of Equation 3 is expressed by Equation 6: FREQ ( T _SPEC ) - FREQ ( T _TEST ) = Slope × ( T _SPEC - T _TEST ) Equation 6

Further, by replacing Slope in Equation 6 with Equation 5, the maximum operating frequency at the specified temperature can be calculated by Equation 7:

Thus, according to an embodiment, only a single frequency measurement at a suitable temperature, which may be different from the specified temperature, is required to determine the maximum operating frequency at the specified temperature.

FIG. 7 is a flow chart showing a flow example 700 of a circuit for testing a test instrument such as DUT 110, such as an ATE 150 test instrument, in accordance with an embodiment of the present disclosure. In this embodiment, test flow 160 includes a single variable test 161, such as after a memory test, for testing the maximum operating frequency. This process starts at S710 and proceeds to S710.

At S710, in response to a single variable test 161, the ATE 150 measures the maximum frequency of the DUT 110.

At S720, in response to a single variable test 161, the ATE 150 also measures the temperature of the DUT 110 at the variable test time.

At S730, the ATE 150 determines whether the measured temperature is greater than a specified temperature for the DUT, and whether the measured maximum operating frequency is greater than the limit frequency. When both conditions are satisfied, the program proceeds to S770; otherwise, the program proceeds to S740.

At S740, ATE 150 derives the predicted maximum operating frequency at the specified temperature, for example according to Equation 7.

At S750, ATE 150 determines if the predicted maximum operating frequency at the specified temperature is greater than the limiting frequency. When the predicted maximum operating frequency at the specified temperature is greater than the limit frequency, the process proceeds to S770; otherwise, the process proceeds to S760.

At S760, the ATE determines that the DUT has not passed the maximum frequency test. The program proceeds to S799 and ended.

At S770, ATE determines that the DUT has passed the maximum frequency test. The program proceeds to S799 and ends.

It should be noted that the program 700 can be appropriately adjusted. In one example, at S760, ATE 150 further determines whether the DUT meets another limit, such as a slow limit, for maximum frequency testing, and classifying the DUT as a slow device when the DUT meets the slow limit.

In accordance with an embodiment of the present disclosure, the DUT 110 includes a ring-shaped oscillator on the wafer, the frequency of which can indicate the maximum operating frequency of the DUT 110. In the maximum frequency test, the ATE150 measures the frequency of the ring oscillator.

According to another embodiment of the present disclosure, the ATE 150 provides a clock signal to the DUT 110. In the maximum frequency test, the ATE150 speeds up the clock signal. In each acceleration, the ATE 150 performs a functional test on the DUT 110 to determine if the DUT 110 is functioning properly. When the DUT 110 passes the function test, the hour signal is accelerated; otherwise, the DUT 110 is determined to be the maximum frequency through the last hour frequency of the function test.

While the foregoing description of the preferred embodiments of the invention, the embodiments of the invention The spirit and scope of the principles of the invention. Modifications of many forms, structures, arrangements, ratios, materials, components and components can be made by those skilled in the art to which the invention pertains. Therefore, the embodiments disclosed herein are to be considered as illustrative and not restrictive. The scope of the present invention is defined by the scope of the appended claims, and the legal equivalents thereof are not limited to the foregoing description.

100‧‧‧Test system

110‧‧‧Device under test

120‧‧‧temperature sensor

150‧‧‧Automatic test equipment

151‧‧‧ interface

160‧‧‧Test procedure

161‧‧‧variation test

170‧‧‧ Controller

The various embodiments of the present invention, which are set forth as examples, will be described in the following drawings, in which: FIG. 1 is a block diagram of a test system example 100 in accordance with an embodiment of the disclosure; 2 is a flow chart illustrating a process example 200 for generating a test flow in accordance with an embodiment of the disclosure; FIG. 3 is a schematic diagram of a circuit for testing a circuit according to an embodiment of the disclosure FIG. 4A and FIG. 4B are diagrams showing a parameter and temperature correspondence according to an embodiment of the disclosure; FIGS. 5A and 5B are diagrams showing temperature variation in a test flow according to an embodiment of the disclosure; 6A and 6B are diagrams showing a frequency versus temperature model according to an embodiment of the disclosure; and FIG. 7 is a flow chart illustrating a flow example 700 for testing a circuit in accordance with an embodiment of the disclosure. .

100‧‧‧Test system

110‧‧‧Device under test

120‧‧‧temperature sensor

150‧‧‧Automatic test equipment

151‧‧‧ interface

160‧‧‧Test procedure

161‧‧‧variation test

170‧‧‧ Controller

Claims (20)

A method for testing an integrated circuit, comprising: measuring an electronic parameter of a device to be tested and a temperature corresponding to one of the devices to be tested once or several times; determining a coefficient, measured based on a plurality of the electronic parameters And a pre-constructed model of the measured temperature, the relationship between the electronic parameter of the device under test and the temperature of the device to be tested, wherein the pre-construction model specifies the electronic parameter and the corresponding device to be tested The relationship between the temperature of a circuit type; and the coefficient is the number of strains of the device to be tested of the device to be tested; and determining the fitness of the device to be tested according to the pre-construction model and a limit value of the electronic parameter at a specified temperature Meets a specified performance specification. The method of claim 1, wherein the step of determining the fitness of the device under test according to the pre-construction model and the limit value of the electronic parameter at the specified temperature further comprises: determining the designation according to the pre-construction model a value of the electronic parameter of the temperature; and comparing the determined value with the limit value to determine the suitability of the device under test. The method of claim 1, wherein the step of determining the fitness of the device under test according to the pre-construction model and the limit value of the electronic parameter at the specified temperature further comprises: Determining, according to the pre-construction model, a temperature value when the object to be tested has the limit value of the electronic parameter; and comparing the determined temperature value with the specified temperature to determine a suitability of the device to be tested. The method of claim 1, wherein the step of measuring the electronic parameter of the device under test and the corresponding temperature of the device to be tested further comprises: testing according to a variable comprising a plurality of other tests The test process tests the device under test; and measures the electronic parameter of the device under test in response to each variable test and the corresponding temperature. The method of claim 1, wherein the determining the coefficient based on the plurality of the electronic parameters and the coefficient of the pre-constructed model of the corresponding temperature further comprises: determining a measured value based on the plurality of the electronic parameters and One of the coefficients of the pre-constructed polynomial model corresponding to one of the temperatures. The method of claim 1, wherein the step of measuring the electronic parameter of the device under test and the corresponding temperature of the device to be tested once or several times further comprises: measuring the electronic parameter of the device to be tested and the One of the devices to be tested corresponds to the junction temperature. The method of claim 1, wherein the step of measuring the electronic parameter of the device under test and the corresponding temperature of the device to be tested is further performed one or several times And measuring: measuring at least one of an operating frequency, a current consumption, and an oscillation frequency, and the corresponding temperature of the device under test. The method of claim 1, wherein the step of measuring the electronic parameter of the device under test and the corresponding temperature of the device to be tested once or several times further comprises: measuring an operating frequency of the device to be tested and the The corresponding temperature of the device to be tested is once. The method of claim 8, further comprising: determining a single measured value based on the operating frequency and a coefficient of the pre-constructed model corresponding to the measured temperature of the single measured amount. An integrated circuit chip, which is tested according to a method for testing an integrated circuit, the method comprising: measuring an electronic parameter of a device to be tested and a temperature corresponding to one of the devices to be tested once or several times; determining a coefficient And in a pre-constructed model based on the plurality of measured values of the electronic parameter and the corresponding measured temperature, the relationship between the electronic parameter of the device to be tested and the temperature of the device to be tested is specified, wherein the pre- Constructing a model-specific relationship between the electronic parameter and a temperature corresponding to a circuit type of the device to be tested; and the coefficient is the number of strains of the device to be tested of the device to be tested; and according to the pre-construction model and the electronic parameter at a specified temperature One The limit value is used to determine that one of the devices to be tested conforms to a specified performance specification. A test system comprising: an interface configured to measure an electronic parameter of a device to be tested and a temperature corresponding to one of the devices to be tested; and a controller assembly to control the interface to measure the electron of the device to be tested The parameter and the corresponding temperature of the device to be tested are determined once or several times, and the coefficient is determined. In a pre-constructed model based on the measured value of the electronic parameter and the corresponding measured temperature, the pre-constructed model is specified a relationship between an electronic parameter and a temperature of the pre-constructed model, and a limit value according to the pre-construction model and the electronic parameter at a specified temperature to determine a suitability of the device to be tested conforms to a specified performance specification, wherein the pre-construction The model specifies the relationship between the electronic parameter and the temperature of the circuit type corresponding to one of the devices to be tested, and the coefficient is the number of strains of the device under test of the device to be tested. The test system of claim 11, wherein the controller is configured to determine a value of the electronic parameter at the specified temperature according to the pre-construction model, and compare the determined value with the limit value to determine the test The suitability of the device. The test system of claim 11, wherein the controller is configured to determine, according to the pre-construction model, a temperature value when the object to be tested has the limit value of the electronic parameter, and compare the determined temperature value with The specified temperature to determine the waiting The suitability of the device. The test system of claim 11, wherein the controller is configured to control the interface according to a test flow comprising a plurality of variable tests inserted in a series of other tests, the interface being assembled to measure in response to each variable The electronic parameter of the device under test is tested and the corresponding temperature. The test system of claim 11, wherein the controller is configured to determine a coefficient of the pre-constructed polynomial model based on the measured values of the plurality of electronic parameters and the corresponding temperature. The test system of claim 11, wherein the interface is assembled to receive one of the junction temperatures sensed by a temperature sensor of the device under test. The test system of claim 11, wherein the interface is configured to measure at least one of an operating frequency, a current consumption, and an oscillating frequency. The test system of claim 11, wherein the interface is configured to measure an operating frequency of the device to be tested and the corresponding temperature of the device to be tested, and determine a value based on the plurality of electronic parameters and The coefficient of the pre-constructed model corresponding to the measured temperature. The test system of claim 11 is assembled to test a device under test defined by an integrated circuit device. A method for testing an integrated circuit, comprising: constructing a model for simulating an electronic parameter of a device that varies with temperature, wherein the model includes a plurality of coefficients that are strain numbers of the device to be tested; determining the electronic parameter and the corresponding temperature Measure one of the integers, the integer Providing that the device satisfies an appropriate index of one of the electronic parameters, using the model at an unmeasured specified temperature; performing a measurement of the electronic parameter and the variable of the corresponding temperature is tested at least the integer number of times corresponding to a pair of devices a circuit type of device to be tested; and determining a suitability of the device to conform to a specified performance specification based on the model and the unmeasured temperature of the variable test.