TWI563446B - Method and apparatus for fuzzy stride prefetch - Google Patents

Method and apparatus for fuzzy stride prefetch

Info

Publication number
TWI563446B
TWI563446B TW100128356A TW100128356A TWI563446B TW I563446 B TWI563446 B TW I563446B TW 100128356 A TW100128356 A TW 100128356A TW 100128356 A TW100128356 A TW 100128356A TW I563446 B TWI563446 B TW I563446B
Authority
TW
Taiwan
Prior art keywords
stride prefetch
fuzzy stride
fuzzy
prefetch
stride
Prior art date
Application number
TW100128356A
Other languages
English (en)
Other versions
TW201214279A (en
Inventor
Shiliang Hu
Youfeng Wu
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of TW201214279A publication Critical patent/TW201214279A/zh
Application granted granted Critical
Publication of TWI563446B publication Critical patent/TWI563446B/zh

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0862—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1041—Resource optimization
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/50—Control mechanisms for virtual memory, cache or TLB
    • G06F2212/502—Control mechanisms for virtual memory, cache or TLB using adaptive policy
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/60—Details of cache memory
    • G06F2212/6024—History based prefetching
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/60—Details of cache memory
    • G06F2212/6026—Prefetching based on access pattern detection, e.g. stride based prefetch

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
TW100128356A 2010-08-30 2011-08-09 Method and apparatus for fuzzy stride prefetch TWI563446B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US12/871,164 US8433852B2 (en) 2010-08-30 2010-08-30 Method and apparatus for fuzzy stride prefetch

Publications (2)

Publication Number Publication Date
TW201214279A TW201214279A (en) 2012-04-01
TWI563446B true TWI563446B (en) 2016-12-21

Family

ID=45698682

Family Applications (1)

Application Number Title Priority Date Filing Date
TW100128356A TWI563446B (en) 2010-08-30 2011-08-09 Method and apparatus for fuzzy stride prefetch

Country Status (8)

Country Link
US (1) US8433852B2 (zh)
EP (1) EP2612248B1 (zh)
JP (1) JP5661932B2 (zh)
KR (1) KR101497371B1 (zh)
CN (1) CN103080907B (zh)
AU (1) AU2011296479B2 (zh)
TW (1) TWI563446B (zh)
WO (1) WO2012030466A2 (zh)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8433852B2 (en) 2010-08-30 2013-04-30 Intel Corporation Method and apparatus for fuzzy stride prefetch
US8732406B1 (en) * 2011-03-15 2014-05-20 Netapp, Inc. Mechanism for determining read-ahead length in a storage system
US9519549B2 (en) * 2012-01-11 2016-12-13 International Business Machines Corporation Data storage backup with lessened cache pollution
CN104133780B (zh) 2013-05-02 2017-04-05 华为技术有限公司 一种跨页预取方法、装置及系统
US9280476B2 (en) * 2014-06-04 2016-03-08 Oracle International Corporation Hardware stream prefetcher with dynamically adjustable stride
US9529722B1 (en) 2014-07-31 2016-12-27 Sk Hynix Memory Solutions Inc. Prefetch with localities and performance monitoring
US10866896B2 (en) * 2015-09-30 2020-12-15 Arm Limited Apparatus and method for prefetching access request addresses in an adjacent region of memory
FR3045183B1 (fr) 2015-12-15 2018-01-19 Commissariat Energie Atomique Procede de prediction d'une donnee a precharger dans une memoire cache
US10013357B2 (en) 2016-05-09 2018-07-03 Cavium, Inc. Managing memory access requests with prefetch for streams
US10896130B2 (en) * 2016-10-19 2021-01-19 International Business Machines Corporation Response times in asynchronous I/O-based software using thread pairing and co-execution
US11093248B2 (en) * 2018-09-10 2021-08-17 International Business Machines Corporation Prefetch queue allocation protection bubble in a processor
KR20200065761A (ko) 2018-11-30 2020-06-09 에스케이하이닉스 주식회사 메모리 시스템
KR20200065762A (ko) 2018-11-30 2020-06-09 에스케이하이닉스 주식회사 메모리 시스템
US11544063B2 (en) 2018-11-21 2023-01-03 SK Hynix Inc. Memory system and data processing system including the same
CN109831315B (zh) * 2018-12-14 2022-02-25 中国联合网络通信集团有限公司 一种网络流量的扩容预告方法及装置
US11275691B2 (en) * 2019-04-11 2022-03-15 EMC IP Holding Company LLC Intelligent control of cache
CN110427332B (zh) * 2019-08-05 2021-08-20 上海兆芯集成电路有限公司 数据预取装置、数据预取方法及微处理器
US11442864B2 (en) 2020-06-29 2022-09-13 Marvell Asia Pte, Ltd. Managing prefetch requests based on stream information for previously recognized streams

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW541498B (en) * 2000-12-29 2003-07-11 Intel Corp System and method for prefetching data into a cache based on miss distance
US6976147B1 (en) * 2003-01-21 2005-12-13 Advanced Micro Devices, Inc. Stride-based prefetch mechanism using a prediction confidence value
TW200604797A (en) * 2004-03-04 2006-02-01 Analog Devices Inc Cache memory prefetcher
TWI264017B (en) * 2002-05-28 2006-10-11 Infineon Technologies Ag Integrated memory using prefetch architecture and method for operating an integrated memory
US20090198910A1 (en) * 2008-02-01 2009-08-06 Arimilli Ravi K Data processing system, processor and method that support a touch of a partial cache line of data

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JP3175675B2 (ja) 1997-12-04 2001-06-11 日本電気株式会社 プリフェッチ制御装置
US6134643A (en) 1997-11-26 2000-10-17 Intel Corporation Method and apparatus for cache line prediction and prefetching using a prefetch controller and buffer and access history
JP3149856B2 (ja) * 1998-08-31 2001-03-26 日本電気株式会社 磁気ディスク制御装置
US6401192B1 (en) * 1998-10-05 2002-06-04 International Business Machines Corporation Apparatus for software initiated prefetch and method therefor
US6915415B2 (en) * 2002-01-07 2005-07-05 International Business Machines Corporation Method and apparatus for mapping software prefetch instructions to hardware prefetch logic
CN1726459A (zh) * 2002-12-12 2006-01-25 皇家飞利浦电子股份有限公司 基于用于数据预取的步距预测的计数器
JP4064869B2 (ja) * 2003-05-28 2008-03-19 インターナショナル・ビジネス・マシーンズ・コーポレーション コード変換装置、コード変換方法及びプログラム
JP4452064B2 (ja) * 2003-11-18 2010-04-21 株式会社日立製作所 情報処理システム、情報処理装置、情報処理装置の制御方法及びプログラム
US7603526B2 (en) * 2007-01-29 2009-10-13 International Business Machines Corporation Systems and methods for providing dynamic memory pre-fetch
US7831800B2 (en) * 2007-05-17 2010-11-09 Globalfoundries Inc. Technique for prefetching data based on a stride pattern
US8285941B2 (en) * 2008-02-25 2012-10-09 International Business Machines Corporation Enhancing timeliness of cache prefetching
KR20100005539A (ko) 2008-07-07 2010-01-15 삼성전자주식회사 캐시 메모리 시스템 및 캐시의 프리페칭 방법
US8166251B2 (en) * 2009-04-20 2012-04-24 Oracle America, Inc. Data prefetcher that adjusts prefetch stream length based on confidence
US8433852B2 (en) 2010-08-30 2013-04-30 Intel Corporation Method and apparatus for fuzzy stride prefetch

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW541498B (en) * 2000-12-29 2003-07-11 Intel Corp System and method for prefetching data into a cache based on miss distance
TWI264017B (en) * 2002-05-28 2006-10-11 Infineon Technologies Ag Integrated memory using prefetch architecture and method for operating an integrated memory
US6976147B1 (en) * 2003-01-21 2005-12-13 Advanced Micro Devices, Inc. Stride-based prefetch mechanism using a prediction confidence value
TW200604797A (en) * 2004-03-04 2006-02-01 Analog Devices Inc Cache memory prefetcher
US20090198910A1 (en) * 2008-02-01 2009-08-06 Arimilli Ravi K Data processing system, processor and method that support a touch of a partial cache line of data

Also Published As

Publication number Publication date
KR101497371B1 (ko) 2015-03-02
TW201214279A (en) 2012-04-01
WO2012030466A3 (en) 2012-06-07
AU2011296479A1 (en) 2013-03-14
CN103080907B (zh) 2016-04-27
EP2612248A4 (en) 2014-02-19
CN103080907A (zh) 2013-05-01
JP2013539117A (ja) 2013-10-17
EP2612248B1 (en) 2018-05-30
EP2612248A2 (en) 2013-07-10
WO2012030466A2 (en) 2012-03-08
KR20130057466A (ko) 2013-05-31
US20120054449A1 (en) 2012-03-01
US8433852B2 (en) 2013-04-30
AU2011296479B2 (en) 2014-12-04
JP5661932B2 (ja) 2015-01-28

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