TWI562326B - Stacked chip on film package structure and manufacturing method thereof - Google Patents

Stacked chip on film package structure and manufacturing method thereof

Info

Publication number
TWI562326B
TWI562326B TW104116427A TW104116427A TWI562326B TW I562326 B TWI562326 B TW I562326B TW 104116427 A TW104116427 A TW 104116427A TW 104116427 A TW104116427 A TW 104116427A TW I562326 B TWI562326 B TW I562326B
Authority
TW
Taiwan
Prior art keywords
manufacturing
package structure
film package
stacked chip
stacked
Prior art date
Application number
TW104116427A
Other languages
Chinese (zh)
Other versions
TW201642437A (en
Inventor
Kuei Yu Lai
Original Assignee
Chipmos Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chipmos Technologies Inc filed Critical Chipmos Technologies Inc
Priority to TW104116427A priority Critical patent/TWI562326B/en
Priority to CN201510453927.5A priority patent/CN106169462B/en
Publication of TW201642437A publication Critical patent/TW201642437A/en
Application granted granted Critical
Publication of TWI562326B publication Critical patent/TWI562326B/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
TW104116427A 2015-05-22 2015-05-22 Stacked chip on film package structure and manufacturing method thereof TWI562326B (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
TW104116427A TWI562326B (en) 2015-05-22 2015-05-22 Stacked chip on film package structure and manufacturing method thereof
CN201510453927.5A CN106169462B (en) 2015-05-22 2015-07-29 Thin film flip chip package stack structure and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW104116427A TWI562326B (en) 2015-05-22 2015-05-22 Stacked chip on film package structure and manufacturing method thereof

Publications (2)

Publication Number Publication Date
TW201642437A TW201642437A (en) 2016-12-01
TWI562326B true TWI562326B (en) 2016-12-11

Family

ID=57358882

Family Applications (1)

Application Number Title Priority Date Filing Date
TW104116427A TWI562326B (en) 2015-05-22 2015-05-22 Stacked chip on film package structure and manufacturing method thereof

Country Status (2)

Country Link
CN (1) CN106169462B (en)
TW (1) TWI562326B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11189597B2 (en) * 2018-10-29 2021-11-30 Novatek Microelectronics Corp. Chip on film package

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7503155B2 (en) * 2002-08-26 2009-03-17 Meyers John G Method for packaging a tape substrate
TW201208035A (en) * 2010-08-10 2012-02-16 Powertech Technology Inc Multi-chip stacked assembly with ground connection of EMI shielding
US20150047878A1 (en) * 2012-03-29 2015-02-19 Dexerials Corporation Electroconductive particle, circuit connecting material, mounting body, and method for manufacturing mounting body
TW201513273A (en) * 2013-09-30 2015-04-01 Chipmos Technologies Inc Multi-chip tape package structure

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5641997A (en) * 1993-09-14 1997-06-24 Kabushiki Kaisha Toshiba Plastic-encapsulated semiconductor device
DE69514201T2 (en) * 1994-11-24 2000-08-03 Dow Corning Toray Silicone Method of manufacturing a semiconductor device
US20070267737A1 (en) * 2006-05-17 2007-11-22 Taiwan Semiconductor Manufacturing Co., Ltd. Packaged devices and methods for forming packaged devices
CN101877335B (en) * 2009-04-30 2012-07-25 玮锋科技股份有限公司 Gradient type anisotropic conductive film and manufacturing method thereof
CN102104033A (en) * 2009-12-18 2011-06-22 中国科学院微电子研究所 Three-dimensional mixed signal chip stacking package body and preparation method thereof
US8698288B1 (en) * 2013-05-23 2014-04-15 Freescale Semiconductor, Inc. Flexible substrate with crimping interconnection

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7503155B2 (en) * 2002-08-26 2009-03-17 Meyers John G Method for packaging a tape substrate
TW201208035A (en) * 2010-08-10 2012-02-16 Powertech Technology Inc Multi-chip stacked assembly with ground connection of EMI shielding
US20150047878A1 (en) * 2012-03-29 2015-02-19 Dexerials Corporation Electroconductive particle, circuit connecting material, mounting body, and method for manufacturing mounting body
TW201513273A (en) * 2013-09-30 2015-04-01 Chipmos Technologies Inc Multi-chip tape package structure

Also Published As

Publication number Publication date
TW201642437A (en) 2016-12-01
CN106169462B (en) 2019-02-22
CN106169462A (en) 2016-11-30

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