TWI560846B - Apparatuses and methods for providing capacitance in a multi-chip module - Google Patents

Apparatuses and methods for providing capacitance in a multi-chip module

Info

Publication number
TWI560846B
TWI560846B TW104118204A TW104118204A TWI560846B TW I560846 B TWI560846 B TW I560846B TW 104118204 A TW104118204 A TW 104118204A TW 104118204 A TW104118204 A TW 104118204A TW I560846 B TWI560846 B TW I560846B
Authority
TW
Taiwan
Prior art keywords
apparatuses
methods
chip module
providing capacitance
capacitance
Prior art date
Application number
TW104118204A
Other languages
English (en)
Other versions
TW201535671A (zh
Inventor
Timothy M Hollis
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Publication of TW201535671A publication Critical patent/TW201535671A/zh
Application granted granted Critical
Publication of TWI560846B publication Critical patent/TWI560846B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64Impedance arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5222Capacitive arrangements or effects of, or between wiring layers
    • H01L23/5223Capacitor integral with wiring layers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/01Details
    • H03K3/013Modifications of generator to prevent operation by noise or interference
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/002Details
    • H01G4/228Terminals
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/33Thin- or thick-film capacitors 
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/38Multiple capacitors, i.e. structural combinations of fixed capacitors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K7/00Constructional details common to different types of electric apparatus
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/01Manufacture or treatment
    • H10B12/02Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03Making the capacitor or connections thereto
    • H10B12/033Making the capacitor or connections thereto the capacitor extending over the transistor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/1302Disposition
    • H01L2224/13025Disposition the bump connector being disposed on a via connection of the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/131Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16135Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/16145Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16265Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being a discrete passive component
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/481Internal lead connections, e.g. via connections, feedthrough structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64Impedance arrangements
    • H01L23/642Capacitive arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40Capacitors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Integrated Circuits (AREA)
TW104118204A 2012-01-27 2013-01-25 Apparatuses and methods for providing capacitance in a multi-chip module TWI560846B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US13/359,769 US8779849B2 (en) 2012-01-27 2012-01-27 Apparatuses and methods for providing capacitance in a multi-chip module

Publications (2)

Publication Number Publication Date
TW201535671A TW201535671A (zh) 2015-09-16
TWI560846B true TWI560846B (en) 2016-12-01

Family

ID=48869704

Family Applications (2)

Application Number Title Priority Date Filing Date
TW102103021A TWI520303B (zh) 2012-01-27 2013-01-25 在多晶片模組中用於提供電容之裝置及方法
TW104118204A TWI560846B (en) 2012-01-27 2013-01-25 Apparatuses and methods for providing capacitance in a multi-chip module

Family Applications Before (1)

Application Number Title Priority Date Filing Date
TW102103021A TWI520303B (zh) 2012-01-27 2013-01-25 在多晶片模組中用於提供電容之裝置及方法

Country Status (5)

Country Link
US (2) US8779849B2 (zh)
KR (1) KR101642624B1 (zh)
CN (1) CN104081522B (zh)
TW (2) TWI520303B (zh)
WO (1) WO2013112723A1 (zh)

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US9213386B2 (en) 2012-10-22 2015-12-15 Micron Technology, Inc. Apparatuses and methods and for providing power responsive to a power loss
US9202785B2 (en) * 2013-11-08 2015-12-01 Taiwan Semiconductor Manufacturing Company, Ltd. Three dimensional integrated circuit capacitor having vias
US9455189B1 (en) 2015-06-14 2016-09-27 Darryl G. Walker Package including a plurality of stacked semiconductor devices including a capacitance enhanced through via and method of manufacture
US9767962B2 (en) 2016-01-22 2017-09-19 Micron Technology, Inc. Apparatuses, multi-chip modules and capacitive chips
US10587195B2 (en) * 2016-04-29 2020-03-10 Apple Inc. Integrated passive devices to reduce power supply voltage droop
US9875959B2 (en) 2016-06-09 2018-01-23 International Business Machines Corporation Forming a stacked capacitor
CN107342281B (zh) * 2017-06-29 2019-05-21 厦门市三安集成电路有限公司 一种化合物半导体mim电容结构的制作方法
CN109216292B (zh) * 2017-06-29 2020-11-03 晟碟信息科技(上海)有限公司 包含降低针脚电容的控制开关的半导体装置
DE102018217001B4 (de) * 2018-10-04 2020-06-25 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Verfahren zur Herstellung von Halbleiterkondensatoren unterschiedlicher Kapazitätswerte in einem Halbleitersubstrat
US20200373224A1 (en) * 2019-05-21 2020-11-26 Microsoft Technology Licensing, Llc Through-silicon vias and decoupling capacitance
US11710726B2 (en) 2019-06-25 2023-07-25 Microsoft Technology Licensing, Llc Through-board power control arrangements for integrated circuit devices
US11270975B2 (en) * 2020-07-21 2022-03-08 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor packages including passive devices and methods of forming same

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US6344961B1 (en) * 1999-11-19 2002-02-05 Murata Manufacturing Co., Ltd Multi-layer capacitator, wiring substrate, decoupling circuit, and high-frequency circuit
US20110309475A1 (en) * 2010-06-18 2011-12-22 Samsung Electronics Co., Ltd. Three-dimensional stacked structure semiconductor device having through-silicon via and signaling method for the semiconductor device

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US6344961B1 (en) * 1999-11-19 2002-02-05 Murata Manufacturing Co., Ltd Multi-layer capacitator, wiring substrate, decoupling circuit, and high-frequency circuit
US20110309475A1 (en) * 2010-06-18 2011-12-22 Samsung Electronics Co., Ltd. Three-dimensional stacked structure semiconductor device having through-silicon via and signaling method for the semiconductor device

Also Published As

Publication number Publication date
TWI520303B (zh) 2016-02-01
US20130194032A1 (en) 2013-08-01
CN104081522B (zh) 2017-08-22
US20140320201A1 (en) 2014-10-30
CN104081522A (zh) 2014-10-01
WO2013112723A1 (en) 2013-08-01
KR20140116202A (ko) 2014-10-01
TW201342571A (zh) 2013-10-16
KR101642624B1 (ko) 2016-07-25
TW201535671A (zh) 2015-09-16
US8779849B2 (en) 2014-07-15

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