TWI540813B - Signal Modulation Method and Signal Rectification and Modulation Device - Google Patents
Signal Modulation Method and Signal Rectification and Modulation Device Download PDFInfo
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J50/00—Circuit arrangements or systems for wireless supply or distribution of electric power
- H02J50/10—Circuit arrangements or systems for wireless supply or distribution of electric power using inductive coupling
- H02J50/12—Circuit arrangements or systems for wireless supply or distribution of electric power using inductive coupling of the resonant type
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J50/00—Circuit arrangements or systems for wireless supply or distribution of electric power
- H02J50/80—Circuit arrangements or systems for wireless supply or distribution of electric power involving the exchange of data, concerning supply or distribution of electric power, between transmitting devices and receiving devices
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Description
本發明係指一種訊號調制方法及訊號整流及調制裝置,尤指一種錯動式訊號調制方法及其訊號整流及調制裝置。The invention relates to a signal modulation method and a signal rectification and modulation device, in particular to a misaligned signal modulation method and a signal rectification and modulation device thereof.
感應式電源供應器中,為了安全運作,需要在供應端確認其供電線圈上感應區域為正確之受電裝置,且在可以接收電力的狀況下才進行電力發送,為了使供電端能夠辨識受電端是否為正確的受電裝置,需要透過傳送資料碼來進行識別。資料碼的傳送係藉由供電端驅動供電線圈產生諧振,發送電磁能量傳送到受電端,以進行電力傳送,而在受電端接收電力時,可透過訊號調制技術改變接收線圈上的阻抗狀態,再透過反饋影響供電線圈上的諧振載波訊號變化,以傳送資料碼。In the inductive power supply, in order to operate safely, it is necessary to confirm that the sensing area on the power supply coil is the correct power receiving device at the supply end, and to transmit power only when the power can be received, in order to enable the power supply end to recognize whether the power receiving end can recognize the power receiving end. For the correct power receiving device, it needs to be identified by transmitting the data code. The transmission of the data code is generated by the power supply terminal driving the power supply coil to generate resonance, transmitting electromagnetic energy to the power receiving end for power transmission, and when receiving power at the power receiving end, the impedance state on the receiving coil can be changed by the signal modulation technique, and then The feedback of the resonant carrier signal on the power supply coil is affected by feedback to transmit the data code.
上述資料碼係由多個調制訊號所構成。在先前技術中,受電端同時在感應線圈兩端進行訊號調制。例如,在美國專利公開案US 2013/0342027 A1之受電模組20中,受電微處理器21同時開啟對應於感應線圈兩端的開關元件A6及B6,以同時對感應線圈兩端進行調制。詳細來說,在調制期間,開關元件A6及B6會同時導通,使得訊號調制電阻A3及B3同時進行調制,此時,由於控制二極體A4及B4的運作,下橋開關元件A2及B2會同時停止進行整流。在此情況下,若欲使反射至供電線圈的訊號振幅加大,需要增加調制時間,然而調制時間的加長代表整流器停止工作的時間加長,使其對後端供電能力降低。另一方面,當訊號調制電阻A3及B3之阻值愈小時,反射至供電端的訊號愈大,同時帶來的是調制期間損耗的功率愈大。亦即,加大反射訊號的另一個實現方式為縮小訊號調制電阻,但縮小的幅度仍受限於功率損耗的瓶頸。The above data code is composed of a plurality of modulated signals. In the prior art, the power receiving end performs signal modulation on both ends of the induction coil. For example, in the power receiving module 20 of the US Patent Publication No. US 2013/0342027 A1, the power receiving microprocessor 21 simultaneously turns on the switching elements A6 and B6 corresponding to both ends of the induction coil to simultaneously modulate both ends of the induction coil. In detail, during modulation, the switching elements A6 and B6 are turned on at the same time, so that the signal modulation resistors A3 and B3 are simultaneously modulated. At this time, due to the operation of the control diodes A4 and B4, the lower bridge switching elements A2 and B2 will At the same time stop rectification. In this case, if the amplitude of the signal reflected to the power supply coil is to be increased, the modulation time needs to be increased. However, the lengthening of the modulation time means that the time for the rectifier to stop operating is lengthened, so that the power supply capability to the back end is lowered. On the other hand, the smaller the resistance of the signal modulation resistors A3 and B3, the larger the signal reflected to the power supply terminal, and the greater the power lost during modulation. That is, another implementation of increasing the reflected signal is to reduce the signal modulation resistance, but the magnitude of the reduction is still limited by the bottleneck of power loss.
此外,用來進行整流的下橋開關元件A2及B2分別透過保護電阻B1及A1連接至感應線圈,並透過線圈電壓來控制下橋開關元件A2及B2之閘極電壓,以控制下橋開關元件A2及B2導通或斷開來進行整流運作。然而,若欲提高下橋開關元件A2及B2的運作速度,需降低保護電阻A1及B1的大小以提高下橋開關元件A2及B2之閘極充放電速度。在此情形下,阻值較低的保護電阻A1及B1將使得齊納二極體A5及B5承受較大的功率而容易燒毀,整流開關的切換速度因此而受限。In addition, the lower bridge switching elements A2 and B2 for rectification are respectively connected to the induction coil through the protection resistors B1 and A1, and the gate voltages of the lower bridge switching elements A2 and B2 are controlled by the coil voltage to control the lower bridge switching elements. A2 and B2 are turned on or off for rectification operation. However, if the operating speeds of the lower bridge switching elements A2 and B2 are to be increased, the magnitudes of the protection resistors A1 and B1 need to be reduced to increase the gate charge and discharge speed of the lower bridge switching elements A2 and B2. In this case, the lower resistances of the protection resistors A1 and B1 will cause the Zener diodes A5 and B5 to withstand a large power and be easily burned, and the switching speed of the rectifier switch is thus limited.
另一方面,在美國專利公開案US 2013/0342027 A1之受電模組20中,穩壓電路25需要穩壓電容251來維持輸出電壓的穩定,由於穩壓電容251往往具有較大的電容值,在穩壓電容251與整流與訊號反饋電路23之間設置有斷路保護電路24,以在供電端與受電端感應初期整流與訊號反饋電路23開始輸出電力時,可先將電力提供予受電微處理器21使用,避免穩壓電容251吸收過多電荷而無法順利啟動受電微處理器21。此外,在受電線圈271剛離開供電端時,穩壓電容251仍存在大量電荷,此電荷會逆流至受電微處理器21,使受電微處理器21無法判別目前是否處於感應供電階段。再者,上述電路結構可能存在另一個問題,即剛開始感應到電力時,斷路保護電路24是關閉的,也就是說,整流與訊號反饋電路23端在沒有大電容輔助吸收電荷的情況下,瞬間的高電壓可能會造成電路元件損毀。此外,在斷路保護電路24打開的瞬間,穩壓電容251開始大量吸收電荷,使得受電微處理器21之工作電壓瞬間降低,可能會造成受電微處理器21停止運作或產生其它不良影響。On the other hand, in the power receiving module 20 of the US Patent Publication No. US 2013/0342027 A1, the voltage stabilizing circuit 25 requires a voltage stabilizing capacitor 251 to maintain the stability of the output voltage, since the stabilizing capacitor 251 tends to have a large capacitance value. An open circuit protection circuit 24 is disposed between the voltage stabilizing capacitor 251 and the rectifying and signal feedback circuit 23, so that when the power supply end and the power receiving end sense that the initial rectifying and signal feedback circuit 23 starts outputting power, the power can be first supplied to the power receiving micro processing. The device 21 is used to prevent the voltage stabilizing capacitor 251 from absorbing too much electric charge and failing to start the power receiving microprocessor 21 smoothly. In addition, when the power receiving coil 271 just leaves the power supply terminal, the voltage stabilizing capacitor 251 still has a large amount of electric charge, and this electric charge will flow back to the power receiving microprocessor 21, so that the power receiving microprocessor 21 cannot judge whether it is currently in the induction power supply stage. Furthermore, the above circuit structure may have another problem, that is, when the power is initially sensed, the circuit breaker protection circuit 24 is turned off, that is, the rectification and signal feedback circuit 23 terminal does not have a large capacitance to assist the absorption of the charge. Instantaneous high voltages can cause damage to circuit components. In addition, at the moment when the circuit breaker protection circuit 24 is turned on, the voltage stabilizing capacitor 251 starts to absorb a large amount of electric charge, so that the operating voltage of the power receiving microprocessor 21 is instantaneously lowered, which may cause the power receiving microprocessor 21 to stop operating or cause other adverse effects.
請參考第1圖,第1圖為訊號調制的波形示意圖。如第1圖所示,波形W1_1繪示美國專利公開案US 2013/0342027 A1之受電模組20中的開關元件A6及B6之閘極訊號,其在高電位時同時導通開關元件A6及B6,以產生調制訊號。波形W1_2則繪示上述調制訊號反射至供電端再經由訊號解析電路13處理後得到的訊號。由波形W1_2可知,每一調制訊號反饋至供電端的訊號變化量大小不一,這是因為在先前技術中,調制控制訊號(即開關元件A6及B6之閘極訊號)與線圈振盪週期無任何對應關係。換句話說,調制訊號是隨機性地出現在供電線圈的振盪週期上,使得每一調制區間所反射的供電線圈振盪週期的起點與振盪數量都不固定,進而使受到調制改變供電線圈振幅的變化量也不固定。根據美國專利公開案US 2013/0342027 A1的內容,由於供電端可根據線圈訊號的變化量來動態調整訊號判別的準位,大小不一的線圈振幅變化量容易造成訊號的誤判。Please refer to Figure 1, which is a waveform diagram of signal modulation. As shown in FIG. 1 , the waveform W1_1 shows the gate signals of the switching elements A6 and B6 in the power receiving module 20 of US 2013/0342027 A1, which simultaneously turns on the switching elements A6 and B6 at a high potential. To generate a modulated signal. The waveform W1_2 is a signal obtained by reflecting the modulated signal to the power supply terminal and then processed by the signal analysis circuit 13. It can be seen from the waveform W1_2 that the amount of change of the signal fed back to the power supply terminal of each modulation signal is different, because in the prior art, the modulation control signal (ie, the gate signals of the switching elements A6 and B6) does not correspond to the coil oscillation period. relationship. In other words, the modulation signal appears randomly on the oscillation period of the power supply coil, so that the starting point of the oscillation period of the power supply coil reflected by each modulation interval and the number of oscillations are not fixed, thereby causing the modulation to change the amplitude of the power supply coil. The amount is not fixed. According to the content of the US Patent Publication No. US 2013/0342027 A1, since the power supply terminal can dynamically adjust the level of signal discrimination according to the amount of change of the coil signal, the amplitude variation of the coil of different sizes is likely to cause misjudgment of the signal.
進一步地,請參考第2圖,第2圖為訊號調制之一調制區間的訊號波形示意圖。如第2圖所示,波形W2_1繪示美國專利公開案US 2013/0342027 A1之受電模組20中的開關元件A6及B6之閘極訊號,其在高電位時同時導通開關元件A6及B6,以產生調制訊號。波形W2_2繪示下橋開關元件B2之閘極電壓。由上述可知,在進行調制時,控制二極體A4及B4的運作使得下橋開關元件A2及B2同時停止進行整流,即下橋開關元件A2及B2之閘極電壓應為零電位,以斷開下橋開關元件A2及B2。然而,如第2圖之波形W2_2所示,在調制期間(即開關元件A6及B6之閘極訊號為高電位時),下橋開關元件B2之閘極仍有殘存電壓,無法完全達到零電位,造成下橋開關元件B2無法完全斷開,進而使調制過程中產生多餘的功率消耗。Further, please refer to FIG. 2, and FIG. 2 is a schematic diagram of signal waveforms of one modulation interval of signal modulation. As shown in FIG. 2, the waveform W2_1 shows the gate signals of the switching elements A6 and B6 in the power receiving module 20 of the US Patent Publication No. US 2013/0342027 A1, which simultaneously turns on the switching elements A6 and B6 at a high potential. To generate a modulated signal. Waveform W2_2 shows the gate voltage of the lower bridge switching element B2. It can be seen from the above that when the modulation is performed, the operation of the diodes A4 and B4 is controlled such that the lower bridge switching elements A2 and B2 are simultaneously stopped for rectification, that is, the gate voltages of the lower bridge switching elements A2 and B2 should be zero potential. The bridge switching elements A2 and B2 are opened. However, as shown in the waveform W2_2 of FIG. 2, during the modulation period (ie, when the gate signals of the switching elements A6 and B6 are at a high potential), the gate of the lower bridge switching element B2 still has a residual voltage, and cannot completely reach the zero potential. As a result, the lower bridge switching element B2 cannot be completely disconnected, thereby causing excessive power consumption in the modulation process.
由上述可知,習知技術仍存在許多尚待解決的問題。因此,實有必要提出一種訊號調制方法,使得受電模組更有效地產生調制訊號,同時克服上述缺點。As can be seen from the above, there are still many problems to be solved in the prior art. Therefore, it is necessary to propose a signal modulation method, so that the power receiving module can more effectively generate the modulated signal while overcoming the above disadvantages.
因此,本發明之主要目的即在於提供一種訊號調制方法及其訊號整流及調制裝置,以有效地產生調制訊號,並解決上述問題。Accordingly, it is a primary object of the present invention to provide a signal modulation method and signal rectification and modulation apparatus for efficiently generating a modulation signal and solving the above problems.
本發明揭露一種訊號調制方法,用於一感應式電源供應器之一受電模組。該訊號調制方法包含有設定一調制訊號所對應的複數個調制區間;在該複數個調制區間中的第i個調制區間對該受電模組之一感應線圈之一第一端進行調制,其中i為奇數;以及在該複數個調制區間中的第j個調制區間對該受電模組之該感應線圈之一第二端進行調制,其中j為偶數;其中,在對該第一端進行調制時不調制該第二端,在對該第二端進行調制時不調制該第一端。The invention discloses a signal modulation method for a power receiving module of an inductive power supply. The signal modulation method includes a plurality of modulation intervals corresponding to setting a modulation signal; and an i-th modulation interval of the plurality of modulation intervals modulates a first end of one of the induction coils of the power receiving module, wherein An odd number; and modulating a second end of the induction coil of the power receiving module in a jth modulation interval of the plurality of modulation intervals, wherein j is an even number; wherein, when modulating the first end The second end is not modulated, and the first end is not modulated when the second end is modulated.
本發明另揭露一種訊號調制方法,用於一感應式電源供應器之一受電模組。該訊號調制方法包含有設定一調制訊號所對應的複數個調制區間;比較該受電模組之一感應線圈之一第一端或一第二端的電壓與一參考電壓,以產生一比較結果;以及根據該比較結果,決定該複數個調制區間開始及停止的時間點。The invention further discloses a signal modulation method for a power receiving module of an inductive power supply. The signal modulation method includes: setting a plurality of modulation intervals corresponding to a modulation signal; comparing a voltage of a first end or a second end of one of the induction coils with a reference voltage to generate a comparison result; Based on the comparison result, the time point at which the plurality of modulation intervals start and stop is determined.
本發明另揭露一種訊號整流及調制裝置,用於一感應式電源供應器之一受電模組,該受電模組包含一感應線圈,用來從該感應式電源供應器之一供電模組接收電源。該整流及調制裝置包含有一第一整流電晶體、一第二整流電晶體、一第一整流控制模組、一第二整流控制模組、一第一調制控制模組、一第二調制控制模組、一參考電壓產生器、一比較器以及一處理器。該第一整流電晶體耦接於該感應線圈之一第一端與一地端之間,用來對該感應線圈之該第一端進行整流。該第二整流電晶體耦接於該感應線圈之一第二端與該地端之間,用來對該感應線圈之該第二端進行整流。該第一整流控制模組耦接於該感應線圈之該第一端、該第二端及該第一整流電晶體,用來根據該感應線圈之該第一端與該第二端之電壓,輸出一第一整流控制訊號,以控制該第一整流電晶體進行整流。該第二整流控制模組耦接於該感應線圈之該第一端、該第二端及該第二整流電晶體,用來根據該感應線圈之該第一端與該第二端之電壓,輸出一第二整流控制訊號,以控制該第二整流電晶體進行整流。該第一調制控制模組耦接於該感應線圈之該第一端,用來對該第一端進行訊號調制。該第二調制控制模組耦接於該感應線圈之該第二端,用來對該第二端進行訊號調制。該參考電壓產生器用來產生一參考電壓。該比較器耦接於該參考電壓產生器及該第一整流控制模組或該第二整流控制模組,用來比較該參考電壓及該感應線圈之一線圈電壓,以產生一比較結果。該處理器耦接於該比較器、該第一整流控制模組、該第二整流控制模組、該第一調制控制模組及該第二調制控制模組,用來根據該比較結果,控制該第一調制控制模組及該第二調制控制模組交替對該感應線圈之該第一端及該第二端進行調制。其中,該處理器在控制該第一調制控制模組對該感應線圈之該第一端進行調制的同時,透過該第二整流控制模組斷開該第二整流電晶體,以暫停對該感應線圈之該第二端進行整流,在控制該第二調制控制模組對該感應線圈之該第二端進行調制的同時,透過該第一整流控制模組斷開該第一整流電晶體,以暫停對該感應線圈之該第一端進行整流。The invention further discloses a signal rectification and modulation device for a power receiving module of an inductive power supply, the power receiving module comprising an induction coil for receiving power from a power supply module of the inductive power supply . The rectifying and modulating device comprises a first rectifying transistor, a second rectifying transistor, a first rectifying control module, a second rectifying control module, a first modulation control module, and a second modulation control mode. A set, a reference voltage generator, a comparator, and a processor. The first rectifying transistor is coupled between the first end and the ground end of the inductive coil for rectifying the first end of the inductive coil. The second rectifying transistor is coupled between the second end of the inductive coil and the ground end for rectifying the second end of the inductive coil. The first rectifying control module is coupled to the first end, the second end, and the first rectifying transistor of the inductive coil for determining a voltage between the first end and the second end of the inductive coil. A first rectification control signal is output to control the first rectifying transistor for rectification. The second rectification control module is coupled to the first end, the second end, and the second rectifying transistor of the inductive coil, and is configured to apply a voltage between the first end and the second end of the inductive coil. A second rectification control signal is output to control the second rectifying transistor for rectification. The first modulation control module is coupled to the first end of the induction coil for signal modulation of the first end. The second modulation control module is coupled to the second end of the induction coil for signal modulation of the second end. The reference voltage generator is used to generate a reference voltage. The comparator is coupled to the reference voltage generator and the first rectification control module or the second rectification control module for comparing the reference voltage and a coil voltage of the induction coil to generate a comparison result. The processor is coupled to the comparator, the first rectification control module, the second rectification control module, the first modulation control module, and the second modulation control module, and is configured to control according to the comparison result. The first modulation control module and the second modulation control module alternately modulate the first end and the second end of the induction coil. The processor, after controlling the first modulation control module to modulate the first end of the induction coil, disconnects the second rectifying transistor through the second rectification control module to suspend the sensing Reconfiguring the second end of the coil, and controlling the second modulation control module to modulate the second end of the induction coil, and disconnecting the first rectifying transistor through the first rectifying control module to Suspending the first end of the induction coil is rectified.
請參考第3圖,第3圖為本發明實施例一受電模組30之示意圖。受電模組30可用於一感應式電源供應器,用以從感應式電源供應器中相對應之一供電模組接收電源。如第3圖所示,受電模組30包含有一感應線圈300、整流二極體11及21、整流電晶體12及22、保護二極體121及221、整流控制模組R1及R2、調制控制模組M1及M2、一參考電壓產生器72、一比較器71、一處理器60、一穩壓器40及一電源輸出端50。此外,為提供處理器60穩定的工作電壓,受電模組30另包含一整流二極體61及一濾波電容62,設置於處理器60之電源輸入端。為提供穩壓器40穩定的輸入電力,受電模組30另包含電容值較大的一穩壓電容41,設置於穩壓器40之電力輸入端。Please refer to FIG. 3 , which is a schematic diagram of a power receiving module 30 according to an embodiment of the present invention. The power receiving module 30 can be used for an inductive power supply for receiving power from a corresponding one of the inductive power supplies. As shown in FIG. 3, the power receiving module 30 includes an induction coil 300, rectifying diodes 11 and 21, rectifying transistors 12 and 22, protection diodes 121 and 221, rectification control modules R1 and R2, and modulation control. Modules M1 and M2, a reference voltage generator 72, a comparator 71, a processor 60, a voltage regulator 40, and a power supply output 50. In addition, in order to provide a stable operating voltage of the processor 60, the power receiving module 30 further includes a rectifying diode 61 and a filtering capacitor 62 disposed at the power input end of the processor 60. In order to provide stable input power of the voltage regulator 40, the power receiving module 30 further includes a voltage stabilizing capacitor 41 having a large capacitance value, and is disposed at the power input end of the voltage regulator 40.
其中,感應線圈300包含有一線圈及一電容,其可和供電模組之線圈進行諧振,以產生電力,並反饋調制訊號和資料至供電端。整流二極體11耦接於感應線圈300之第一端S1與電源輸出端50之間,可透過穩壓器40輸出電源至電源輸出端50。整流二極體21耦接於感應線圈300之第二端S2與電源輸出端50之間,可透過穩壓器40輸出電源至電源輸出端50。整流二極體11及21可分別在不同相位輸出電源至電源輸出端50。整流電晶體12耦接於感應線圈300之第一端S1與地端之間,可用來控制感應線圈300之第一端S1進行整流。整流電晶體22耦接於感應線圈300之第二端S2與地端之間,可用來控制感應線圈300之第二端S2進行整流。整流控制模組R1耦接於感應線圈300之第一端S1、第二端S2及整流電晶體12,可根據感應線圈300之第一端S1與第二端S2之電壓,輸出一整流控制訊號S12至整流電晶體12,以控制整流電晶體12進行整流。整流控制模組R2耦接於感應線圈300之第一端S1、第二端S2及整流電晶體22,可根據感應線圈300之第一端S1與第二端S2之電壓,輸出一整流控制訊號S22至整流電晶體22,以控制整流電晶體22進行整流。在此例中,整流電晶體12及22皆為一N型金氧半場效電晶體(N-type Metal Oxide Semiconductor Field-Effect Transistor,NMOS),因此當整流控制訊號S12及S22為高電位時可導通整流電晶體12及22之兩端,當整流控制訊號S12及S22為低電位時可斷開整流電晶體12及22之兩端。The induction coil 300 includes a coil and a capacitor that can resonate with the coil of the power supply module to generate power and feed back the modulated signal and data to the power supply end. The rectifier diode 11 is coupled between the first end S1 of the induction coil 300 and the power output terminal 50, and can output power to the power output terminal 50 through the regulator 40. The rectifier diode 21 is coupled between the second terminal S2 of the induction coil 300 and the power output terminal 50, and can output power to the power output terminal 50 through the regulator 40. The rectifying diodes 11 and 21 can respectively output power to the power output terminal 50 at different phases. The rectifying transistor 12 is coupled between the first end S1 of the inductive coil 300 and the ground, and can be used to control the first end S1 of the inductive coil 300 for rectification. The rectifying transistor 22 is coupled between the second end S2 of the inductive coil 300 and the ground end, and can be used to control the second end S2 of the inductive coil 300 for rectification. The rectification control module R1 is coupled to the first end S1, the second end S2 and the rectifying transistor 12 of the induction coil 300, and can output a rectification control signal according to the voltage of the first end S1 and the second end S2 of the induction coil 300. S12 to the rectifying transistor 12 to control the rectifying transistor 12 for rectification. The rectifier control module R2 is coupled to the first end S1, the second end S2 and the rectifying transistor 22 of the induction coil 300, and outputs a rectification control signal according to the voltage of the first end S1 and the second end S2 of the induction coil 300. S22 to the rectifying transistor 22 to control the rectifying transistor 22 for rectification. In this example, the rectifying transistors 12 and 22 are both N-type Metal Oxide Semiconductor Field-Effect Transistors (NMOS), so that when the rectification control signals S12 and S22 are high, Both ends of the rectifying transistors 12 and 22 are turned on, and both ends of the rectifying transistors 12 and 22 can be turned off when the rectifying control signals S12 and S22 are at a low potential.
詳細來說,當感應線圈300之電流從整流二極體11輸出時,感應線圈300之第一端S1為高電位,第二端S2為低電位,此時根據感應線圈300之第一端S1與第二端S2的電位關係,整流控制模組R2會導通整流電晶體22,使電流可從地端流向感應線圈300,以達到平衡;當感應線圈300之電流從整流二極體21輸出時,感應線圈300之第二端S2為高電位,第一端S1為低電位,此時根據感應線圈300之第一端S1與第二端S2的電位關係,整流控制模組R1會導通整流電晶體12,使電流可從地端流向感應線圈300,以達到平衡。保護二極體121及221則分別耦接至整流電晶體12及22之閘極與地端之間,用來限制整流電晶體12及22之閘極電壓於一定範圍內。也就是說,根據整流電晶體12及22之元件特性,保護二極體121及221可分別鎖定整流電晶體12及22之閘極電壓的上限,以避免整流電晶體12及22之閘極電壓超過其元件耐壓而燒毀。一般來說,保護二極體121及221可採用齊納二極體(Zener diode)來實現,但不應以此為限。In detail, when the current of the induction coil 300 is output from the rectifying diode 11, the first end S1 of the induction coil 300 is at a high potential, and the second end S2 is at a low potential. At this time, according to the first end S1 of the induction coil 300 In relation to the potential of the second terminal S2, the rectification control module R2 turns on the rectifying transistor 22 so that current can flow from the ground end to the induction coil 300 to achieve balance; when the current of the induction coil 300 is output from the rectifying diode 21 The second end S2 of the induction coil 300 is at a high potential, and the first end S1 is at a low potential. At this time, according to the potential relationship between the first end S1 and the second end S2 of the induction coil 300, the rectification control module R1 turns on the rectification power. The crystal 12 allows current to flow from the ground to the induction coil 300 to achieve equilibrium. The protection diodes 121 and 221 are respectively coupled between the gates and the ground terminals of the rectifying transistors 12 and 22 to limit the gate voltage of the rectifying transistors 12 and 22 within a certain range. That is, according to the component characteristics of the rectifying transistors 12 and 22, the protective diodes 121 and 221 can respectively lock the upper limit of the gate voltage of the rectifying transistors 12 and 22 to avoid the gate voltage of the rectifying transistors 12 and 22. Burned out of its components under pressure. In general, the protection diodes 121 and 221 can be implemented by a Zener diode, but should not be limited thereto.
請繼續參考第3圖。調制控制模組M1耦接於感應線圈300之第一端S1,可用來對第一端S1進行訊號調制。調制控制模組M2耦接於感應線圈300之第二端S2,可用來對第二端S2進行訊號調制。調制控制模組M1及M2的運作由處理器60來進行控制。詳細來說,處理器60在控制調制控制模組M1對感應線圈300之第一端S1進行調制的同時,會透過整流控制模組R2斷開整流電晶體22,以暫停對感應線圈300之第二端S2進行整流;另一方面,處理器60在控制調制控制模組M2對感應線圈300之第二端S2進行調制的同時,會透過整流控制模組R1斷開整流電晶體12,以暫停對感應線圈300之第一端S1進行整流。參考電壓產生器72可用來產生一參考電壓Vref予比較器71。比較器71耦接於參考電壓產生器72及整流控制模組R1,用來比較參考電壓Vref及感應線圈300之一線圈電壓VS,以產生一比較結果CR,並輸出比較結果CR至處理器60。詳細來說,比較器71可比較感應線圈300之第一端S1或第二端S2的線圈電壓VS與參考電壓Vref,以產生比較結果CR。在第3圖之受電模組30中,比較器71之一輸入端係耦接於整流控制模組R1,以接收來自於感應線圈300之第一端S1的線圈電壓VS,並將其與參考電壓Vref進行比較。在另一實施例中,亦可將比較器71之輸入端耦接至整流控制模組R2,以接收來自於感應線圈300之第二端S2的線圈電壓VS,並將其與參考電壓Vref進行比較。Please continue to refer to Figure 3. The modulation control module M1 is coupled to the first end S1 of the induction coil 300 and can be used for signal modulation of the first end S1. The modulation control module M2 is coupled to the second end S2 of the induction coil 300 and can be used for signal modulation of the second end S2. The operation of the modulation control modules M1 and M2 is controlled by the processor 60. In detail, the processor 60 controls the modulation control module M1 to modulate the first end S1 of the induction coil 300, and simultaneously disconnects the rectifying transistor 22 through the rectification control module R2 to suspend the comparison of the induction coil 300. The two ends S2 are rectified; on the other hand, the processor 60 controls the modulation control module M2 to modulate the second end S2 of the induction coil 300, and simultaneously disconnects the rectifying transistor 12 through the rectification control module R1 to suspend The first end S1 of the induction coil 300 is rectified. The reference voltage generator 72 can be used to generate a reference voltage Vref to the comparator 71. The comparator 71 is coupled to the reference voltage generator 72 and the rectification control module R1 for comparing the reference voltage Vref and the coil voltage VS of the induction coil 300 to generate a comparison result CR, and outputting the comparison result CR to the processor 60. . In detail, the comparator 71 compares the coil voltage VS of the first end S1 or the second end S2 of the induction coil 300 with the reference voltage Vref to generate a comparison result CR. In the power receiving module 30 of FIG. 3, one input end of the comparator 71 is coupled to the rectification control module R1 to receive the coil voltage VS from the first end S1 of the induction coil 300, and to refer to it. The voltage Vref is compared. In another embodiment, the input end of the comparator 71 can also be coupled to the rectification control module R2 to receive the coil voltage VS from the second end S2 of the induction coil 300 and perform the same with the reference voltage Vref. Comparison.
除此之外,處理器60耦接於比較器71、整流控制模組R1及R2、調制控制模組M1及M2,用來根據比較結果CR,控制調制控制模組M1及M2交替進行在感應線圈300之第一端S1及第二端S2的訊號調制運作。詳細來說,處理器60可分別輸出調制控制訊號C13及C23,以在不同時間分別控制調制控制模組M1及M2進行調制。相對應地,處理器60亦分別輸出整流關閉訊號C14及C24,以在調制時分別控制整流控制模組R1及R2暫停整流。處理器60可以是一微處理器(Microprocessor)、一微控制器(Micro Controller Unit,MCU)或任何類型的處理裝置。此外,穩壓器40受控於處理器60,可用來接收來自於感應線圈300之電源。穩壓電容41則耦接於穩壓器40與整流二極體11、21之間,用來穩定穩壓器40所接收之電源。In addition, the processor 60 is coupled to the comparator 71, the rectification control modules R1 and R2, and the modulation control modules M1 and M2 for controlling the modulation control modules M1 and M2 to alternately perform sensing according to the comparison result CR. The signal modulation of the first end S1 and the second end S2 of the coil 300 operates. In detail, the processor 60 can output the modulation control signals C13 and C23, respectively, to control the modulation control modules M1 and M2 to perform modulation at different times. Correspondingly, the processor 60 also outputs rectification off signals C14 and C24, respectively, to control the rectification control modules R1 and R2 to suspend rectification respectively during modulation. Processor 60 can be a microprocessor, a Micro Controller Unit (MCU), or any type of processing device. Additionally, the voltage regulator 40 is controlled by the processor 60 and can be used to receive power from the induction coil 300. The voltage stabilizing capacitor 41 is coupled between the voltage regulator 40 and the rectifying diodes 11, 21 for stabilizing the power received by the voltage regulator 40.
有別於習知技術中,受電模組同時在感應線圈兩端進行訊號調制,本發明以錯動方式對感應線圈兩端進行訊號調制。換句話說,在本發明之實施例中,處理器交替開啟二個調制控制模組,以在不同調制區間內分別對感應線圈之第一端及第二端進行訊號調制,其詳細運作方式說明如下。Different from the prior art, the power receiving module simultaneously performs signal modulation on both ends of the induction coil, and the present invention performs signal modulation on both ends of the induction coil in a dislocation manner. In other words, in the embodiment of the present invention, the processor alternately turns on two modulation control modules to separately perform signal modulation on the first end and the second end of the induction coil in different modulation intervals, and the detailed operation mode thereof as follows.
請參考第4A圖及第4B圖,第4A圖及第4B圖分別為第3圖之調制控制模組M1及M2之一種實施方式之示意圖。如第4A圖所示,調制控制模組M1包含有一調制電晶體13及一調制負載電阻131。調制電晶體13受控於處理器60,可用來對感應線圈300之第一端S1進行調制。調制負載電阻131則耦接於調制電晶體13及感應線圈300之第一端S1之間,用來提供調制所需之負載。詳細來說,處理器60可輸出調制控制訊號C13至調制電晶體13,以控制調制電晶體13導通或斷開。當調制電晶體13導通時,會改變感應線圈300之第一端S1對地端的阻抗,使感應線圈300上的電性產生變化,上述電性變化會反饋至供電端,並透過供電端的訊號解析及解碼還原調制資料。在此例中,調制電晶體13為一N型金氧半場效電晶體,當調制控制訊號C13為高電位時可導通調制電晶體13,當調制控制訊號C13為低電位時可斷開調制電晶體13。另一方面,如第4B圖所示,調制控制模組M2包含有一調制電晶體23及一調制負載電阻231。調制電晶體23受控於處理器60,可用來對感應線圈300之第二端S2進行調制。調制負載電阻231則耦接於調制電晶體23及感應線圈300之第二端S2之間,用來提供調制所需之負載。同樣地,處理器60透過調制控制訊號C23來控制調制電晶體23導通或斷開,詳細運作方式可參考上述相關於調制控制模組M1的說明,在此不贅述。Please refer to FIG. 4A and FIG. 4B. FIG. 4A and FIG. 4B are schematic diagrams showing an embodiment of the modulation control modules M1 and M2 of FIG. 3 respectively. As shown in FIG. 4A, the modulation control module M1 includes a modulation transistor 13 and a modulation load resistor 131. The modulating transistor 13 is controlled by the processor 60 and can be used to modulate the first end S1 of the inductive coil 300. The modulation load resistor 131 is coupled between the modulation transistor 13 and the first end S1 of the induction coil 300 to provide a load required for modulation. In detail, the processor 60 can output the modulation control signal C13 to the modulation transistor 13 to control the modulation transistor 13 to be turned on or off. When the modulating transistor 13 is turned on, the impedance of the first end S1 of the induction coil 300 to the ground end is changed, and the electrical property of the induction coil 300 is changed. The electrical change is fed back to the power supply terminal, and the signal is analyzed through the power supply terminal. And decoding and reducing the modulation data. In this example, the modulating transistor 13 is an N-type MOSFET, which can turn on the modulating transistor 13 when the modulation control signal C13 is high, and can be turned off when the modulation control signal C13 is low. Crystal 13. On the other hand, as shown in FIG. 4B, the modulation control module M2 includes a modulation transistor 23 and a modulation load resistor 231. The modulating transistor 23 is controlled by the processor 60 and can be used to modulate the second end S2 of the inductive coil 300. The modulation load resistor 231 is coupled between the modulation transistor 23 and the second end S2 of the induction coil 300 to provide a load required for modulation. Similarly, the processor 60 controls the modulation transistor 23 to be turned on or off through the modulation control signal C23. For detailed operation, refer to the description of the modulation control module M1, which is not described herein.
請參考第5A圖及第5B圖,第5A圖及第5B圖分別為第3圖之整流控制模組R1及R2之一種實施方式之示意圖。如第5A圖所示,整流控制模組R1包含有一整流控制電晶體14、電壓轉換電阻141及143、加速放電二極體142及144、一整流關閉電晶體146及一保護二極體145。整流控制電晶體14係一N型金氧半場效電晶體,其汲極耦接於整流電晶體12,用來輸出整流控制訊號S12至整流電晶體12;其源極耦接於地端;其閘極則透過電壓轉換電阻141及加速放電二極體142連接至感應線圈300之第一端S1,以受控於感應線圈300之第一端S1的電壓。當整流控制電晶體14導通時,可控制整流控制訊號S12到達零電位,以完整斷開整流電晶體12。電壓轉換電阻141耦接於感應線圈300之第一端S1與整流控制電晶體14之閘極之間,可用來控制整流控制電晶體14之閘極電壓隨著感應線圈300之第一端S1的電壓變化。此外,加速放電二極體142亦耦接於感應線圈300之第一端S1與整流控制電晶體14之閘極之間,當感應線圈300之第一端S1的電壓下降時,可用來控制整流控制電晶體14之閘極電壓快速下降,以快速斷開整流控制電晶體14,進而加速提升整流控制訊號S12。換句話說,整流控制電晶體14之閘極電壓可隨著感應線圈300之第一端S1的電壓進行變化,以在感應線圈300之第一端S1的電壓上升時導通整流控制電晶體14,進而斷開整流電晶體12以停止在第一端S1的整流。除此之外,加速放電二極體142的運作使得整流控制電晶體14之閘極可在感應線圈300之第一端S1的電壓下降時迅速放電,以加速斷開整流控制電晶體14。如此一來,在整流切換時可提升整流電晶體12的導通速度。Please refer to FIG. 5A and FIG. 5B , and FIG. 5A and FIG. 5B are respectively schematic diagrams of an embodiment of the rectification control modules R1 and R2 of FIG. 3 . As shown in FIG. 5A, the rectification control module R1 includes a rectification control transistor 14, voltage conversion resistors 141 and 143, acceleration discharge diodes 142 and 144, a rectification shutdown transistor 146, and a protection diode 145. The rectifier control transistor 14 is an N-type MOS field-effect transistor, the drain of which is coupled to the rectifying transistor 12 for outputting the rectification control signal S12 to the rectifying transistor 12; the source is coupled to the ground; The gate is connected to the first end S1 of the induction coil 300 through the voltage conversion resistor 141 and the acceleration discharge diode 142 to be controlled by the voltage of the first end S1 of the induction coil 300. When the rectification control transistor 14 is turned on, the rectification control signal S12 can be controlled to reach a zero potential to completely turn off the rectifying transistor 12. The voltage conversion resistor 141 is coupled between the first end S1 of the induction coil 300 and the gate of the rectification control transistor 14 and can be used to control the gate voltage of the rectification control transistor 14 along with the first end S1 of the induction coil 300. Voltage changes. In addition, the acceleration discharge diode 142 is also coupled between the first end S1 of the induction coil 300 and the gate of the rectification control transistor 14, and can be used to control rectification when the voltage of the first end S1 of the induction coil 300 drops. The gate voltage of the control transistor 14 is rapidly lowered to quickly turn off the rectification control transistor 14, thereby accelerating the rise of the rectification control signal S12. In other words, the gate voltage of the rectification control transistor 14 can be varied with the voltage of the first terminal S1 of the induction coil 300 to turn on the rectification control transistor 14 when the voltage of the first terminal S1 of the induction coil 300 rises. The rectifying transistor 12 is then turned off to stop rectification at the first end S1. In addition, the operation of the accelerating discharge diode 142 causes the gate of the rectifying control transistor 14 to be rapidly discharged when the voltage at the first end S1 of the inductive coil 300 drops to accelerate the opening of the rectifying control transistor 14. In this way, the conduction speed of the rectifying transistor 12 can be increased during the switching of the rectification.
進一步地,電壓轉換電阻143耦接於感應線圈300之第二端S2與整流控制電晶體14之汲極之間,可用來控制整流控制訊號S12隨著感應線圈300之第二端S2的電壓進行變化。此外,加速放電二極體144耦接於感應線圈300之第二端S2與整流控制電晶體14之汲極之間,當感應線圈300之第二端S2的電壓下降時,可用來加速降低整流控制訊號S12之電壓。換句話說,整流控制訊號S12可隨著感應線圈300之第二端S2的電壓進行變化,以在感應線圈300之第二端S2的電壓上升時導通整流電晶體12,以開始在感應線圈300之第一端S1進行整流。除此之外,加速放電二極體144的運作使得整流控制訊號S12可在感應線圈300之第二端S2的電壓下降時迅速放電。如此一來,在整流切換時可提升整流電晶體12的斷開速度。Further, the voltage conversion resistor 143 is coupled between the second end S2 of the induction coil 300 and the drain of the rectification control transistor 14 and can be used to control the rectification control signal S12 along with the voltage of the second end S2 of the induction coil 300. Variety. In addition, the acceleration discharge diode 144 is coupled between the second end S2 of the induction coil 300 and the drain of the rectification control transistor 14, and can be used to accelerate the rectification when the voltage of the second end S2 of the induction coil 300 decreases. Control the voltage of signal S12. In other words, the rectification control signal S12 can be varied with the voltage of the second terminal S2 of the induction coil 300 to turn on the rectifying transistor 12 when the voltage of the second end S2 of the induction coil 300 rises to start at the induction coil 300. The first end S1 is rectified. In addition, the operation of the accelerating discharge diode 144 causes the rectification control signal S12 to be rapidly discharged when the voltage of the second terminal S2 of the induction coil 300 drops. In this way, the breaking speed of the rectifying transistor 12 can be raised during the switching of the rectification.
請繼續參考第5A圖。整流關閉電晶體146耦接於處理器60及整流控制電晶體14之汲極,可在調制控制模組M2對感應線圈300之第二端S2進行調制時,控制整流控制訊號S12持續斷開整流電晶體12,以暫停對感應線圈300之第一端S1進行整流。詳細來說,由於訊號調制係在感應線圈300上產生對地的低阻抗路徑,以在感應線圈300之第一端S1或第二端S2為高電位時將線圈訊號拉低,此時感應線圈300之對向端需暫停整流,以避免上述拉低線圈訊號的運作造成大量電流通過整流二極體使其消耗過大功率。亦即,當感應線圈300之第二端S2正在進行調制時,第一端S1應暫停整流;當感應線圈300之第一端S1正在進行調制時,第二端S2應暫停整流。在此情況下,當處理器60透過調制控制訊號C23導通調制電晶體23以對感應線圈300之第二端S2進行調制時,也會同步透過整流關閉訊號C14導通整流關閉電晶體146,使整流控制訊號S12下降至零電位以持續斷開整流電晶體12。除此之外,保護二極體145耦接於整流控制電晶體14之閘極與地端之間,可用來限制整流控制電晶體14之閘極電壓於一定範圍內。也就是說,根據整流控制電晶體14之元件特性,保護二極體145可鎖定整流控制電晶體14之閘極電壓的上限,以避免整流控制電晶體14之閘極電壓超過其元件耐壓而燒毀。一般來說,保護二極體145可採用齊納二極體來實現,但不應以此為限。Please continue to refer to Figure 5A. The rectifying and closing transistor 146 is coupled to the drain of the processor 60 and the rectifying control transistor 14 to control the rectification control signal S12 to continuously turn off the rectification when the modulation control module M2 modulates the second end S2 of the inductive coil 300. The transistor 12 rectifies the first end S1 of the induction coil 300 by suspending. In detail, since the signal modulation generates a low impedance path to the ground on the induction coil 300, the coil signal is pulled low when the first end S1 or the second end S2 of the induction coil 300 is at a high potential, and the induction coil is at this time. The opposite end of 300 needs to suspend rectification to avoid the operation of pulling the low coil signal to cause a large amount of current to pass through the rectifying diode to consume excessive power. That is, when the second end S2 of the induction coil 300 is being modulated, the first end S1 should be suspended for rectification; when the first end S1 of the induction coil 300 is being modulated, the second end S2 should be suspended for rectification. In this case, when the processor 60 turns on the modulation transistor 23 through the modulation control signal C23 to modulate the second end S2 of the induction coil 300, it also synchronously turns the rectification off transistor 146 through the rectification off signal C14 to rectify. The control signal S12 drops to zero potential to continuously turn off the rectifying transistor 12. In addition, the protection diode 145 is coupled between the gate of the rectification control transistor 14 and the ground terminal, and can be used to limit the gate voltage of the rectification control transistor 14 within a certain range. That is, according to the element characteristics of the rectification control transistor 14, the protection diode 145 can lock the upper limit of the gate voltage of the rectification control transistor 14, so as to prevent the gate voltage of the rectification control transistor 14 from exceeding its component withstand voltage. burn. In general, the protective diode 145 can be implemented by a Zener diode, but should not be limited thereto.
另一方面,如第5B圖所示,整流控制模組R2包含有一整流控制電晶體24、電壓轉換電阻241及243、加速放電二極體242及244、一整流關閉電晶體246及一保護二極體245。整流控制電晶體24係一N型金氧半場效電晶體,其汲極耦接於整流電晶體22,用來輸出整流控制訊號S22至整流電晶體22;其源極耦接於地端;其閘極則透過電壓轉換電阻241及加速放電二極體242連接至感應線圈300之第二端S2,以受控於感應線圈300之第二端S2的電壓。電壓轉換電阻241耦接於感應線圈300之第二端S2與整流控制電晶體24之閘極之間,可用來控制整流控制電晶體24之閘極電壓隨著感應線圈300之第二端S2的電壓變化。此外,加速放電二極體242亦耦接於感應線圈300之第二端S2與整流控制電晶體24之閘極之間,當感應線圈300之第二端S2的電壓下降時,可用來控制整流控制電晶體24之閘極電壓快速下降,以快速斷開整流控制電晶體24,進而加速提升整流控制訊號S22。進一步地,電壓轉換電阻243耦接於感應線圈300之第一端S1與整流控制電晶體24之汲極之間,可用來控制整流控制訊號S22隨著感應線圈300之第一端S1的電壓進行變化。此外,加速放電二極體244耦接於感應線圈300之第一端S1與整流控制電晶體24之汲極之間,當感應線圈300之第一端S1的電壓下降時,可用來加速降低整流控制訊號S22之電壓。整流關閉電晶體246耦接於處理器60及整流控制電晶體24之汲極,可在調制控制模組M1對感應線圈300之第一端S1進行調制時,控制整流控制訊號S22持續斷開整流電晶體22,以暫停對感應線圈300之第二端S2進行整流。在此情況下,當處理器60透過調制控制訊號C13導通調制電晶體13以對感應線圈300之第一端S1進行調制時,也會同步透過整流關閉訊號C24導通整流關閉電晶體246,使整流控制訊號S22下降至零電位以持續斷開整流電晶體22。除此之外,保護二極體245耦接於整流控制電晶體24之閘極與地端之間,可用來限制整流控制電晶體24之閘極電壓於一定範圍內。相關於整流控制模組R2之詳細運作方式可參考上述對於整流控制模組R1的說明,在此不贅述。On the other hand, as shown in FIG. 5B, the rectification control module R2 includes a rectification control transistor 24, voltage conversion resistors 241 and 243, acceleration discharge diodes 242 and 244, a rectification shutdown transistor 246, and a protection device. Polar body 245. The rectifying control transistor 24 is an N-type MOS field-effect transistor, and the drain is coupled to the rectifying transistor 22 for outputting the rectification control signal S22 to the rectifying transistor 22; the source is coupled to the ground; The gate is connected to the second terminal S2 of the induction coil 300 through the voltage conversion resistor 241 and the acceleration discharge diode 242 to be controlled by the voltage of the second terminal S2 of the induction coil 300. The voltage conversion resistor 241 is coupled between the second end S2 of the induction coil 300 and the gate of the rectification control transistor 24, and can be used to control the gate voltage of the rectification control transistor 24 along with the second end S2 of the induction coil 300. Voltage changes. In addition, the acceleration discharge diode 242 is also coupled between the second end S2 of the induction coil 300 and the gate of the rectification control transistor 24, and can be used to control rectification when the voltage of the second end S2 of the induction coil 300 drops. The gate voltage of the control transistor 24 drops rapidly to quickly turn off the rectification control transistor 24, thereby accelerating the riser control signal S22. Further, the voltage conversion resistor 243 is coupled between the first end S1 of the induction coil 300 and the drain of the rectification control transistor 24, and can be used to control the rectification control signal S22 along with the voltage of the first end S1 of the induction coil 300. Variety. In addition, the accelerating discharge diode 244 is coupled between the first end S1 of the induction coil 300 and the drain of the rectification control transistor 24, and can be used to accelerate the rectification when the voltage of the first end S1 of the induction coil 300 decreases. Control the voltage of signal S22. The rectifier-off transistor 246 is coupled to the drain of the processor 60 and the rectification control transistor 24, and can control the rectification control signal S22 to continuously turn off the rectification when the modulation control module M1 modulates the first end S1 of the induction coil 300. The transistor 22 rectifies the second end S2 of the induction coil 300 by suspending. In this case, when the processor 60 turns on the modulation transistor 13 through the modulation control signal C13 to modulate the first end S1 of the induction coil 300, it also synchronously turns the rectification off transistor 246 through the rectification off signal C24 to rectify. Control signal S22 drops to zero potential to continuously turn off rectifying transistor 22. In addition, the protection diode 245 is coupled between the gate of the rectification control transistor 24 and the ground terminal, and can be used to limit the gate voltage of the rectification control transistor 24 within a certain range. For the detailed operation mode of the rectification control module R2, reference may be made to the above description of the rectification control module R1, and details are not described herein.
有別於習知技術中,整流控制僅在線圈兩端各透過單一電阻輸入線圈電壓來控制整流電晶體,在本發明之實施例中,可透過整流控制模組來控制整流電晶體,以提升整流切換時整流電晶體導通與斷開之速度,同時使整流電晶體在斷開時其控制訊號(即閘極電壓)可完全達到零電位,以避免調制時整流電晶體無法完全斷開而產生多餘的功率損耗。請參考第6圖,第6圖為在受電模組30中進行訊號調制時訊號波形之示意圖。如第6圖所示,波形W6_1繪示處理器60輸出至調制控制模組M1的調制控制訊號C13,其亦可代表處理器60輸出至整流控制模組R2的整流關閉訊號C24;波形W6_2繪示整流控制模組R2所輸出之整流控制訊號S22,即整流電晶體22之閘極訊號;波形W6_3則繪示訊號調制反饋至供電端線圈上的波形。由第6圖可知,在進行訊號調制時,訊號會反饋至供電線圈以產生振盪幅度的變化,且相較於習知技術中整流電晶體在進行訊號調制時無法完全持續斷開(如第2圖之波形W2_2所示),本發明可在進行訊號調制時完全持續斷開整流電晶體,以避免整流電晶體產生額外的功率損耗,進而提升調制的效能。Different from the prior art, the rectification control controls the rectifying transistor only through the single resistor input coil voltage at both ends of the coil. In the embodiment of the invention, the rectifying transistor can be controlled by the rectifying control module to improve The speed at which the rectifying transistor is turned on and off during rectification switching, and at the same time, the control signal (ie, the gate voltage) of the rectifying transistor can completely reach zero potential when the rectifying transistor is turned off, so as to prevent the rectifying transistor from being completely disconnected during modulation. Excess power loss. Please refer to FIG. 6. FIG. 6 is a schematic diagram of signal waveforms when signal modulation is performed in power receiving module 30. As shown in FIG. 6, the waveform W6_1 shows the modulation control signal C13 outputted by the processor 60 to the modulation control module M1, which may also represent the rectification off signal C24 output by the processor 60 to the rectification control module R2; the waveform W6_2 is drawn. The rectification control signal S22 outputted by the rectification control module R2 is the gate signal of the rectifying transistor 22; the waveform W6_3 is the waveform of the signal modulation feedback to the power supply end coil. As can be seen from Fig. 6, when signal modulation is performed, the signal is fed back to the power supply coil to generate a change in the amplitude of the oscillation, and the rectifying transistor cannot be completely continuously disconnected during signal modulation as in the prior art (e.g., 2nd). As shown in the waveform W2_2 of the figure, the present invention can completely and continuously disconnect the rectifying transistor during signal modulation to avoid additional power loss of the rectifying transistor, thereby improving the modulation performance.
值得注意的是,根據受電模組30所繪示的電路結構,本發明可在不影響電流承受導通能力的情況下,同時達到快速的整流切換。詳細來說,根據金氧半場效電晶體的特性,可用來承受導通大電流的電晶體往往具有較大的寄生電容,此寄生電容限制了閘極訊號的切換速度;另一方面,對於閘極具有較小寄生電容其訊號具有高速切換能力之電晶體而言,其電流承受導通能力必定較為薄弱。在此情況下,習知技術所採用的整流電晶體(如美國專利公開案US 2013/0342027 A1中的下橋開關元件A2及B2)必須在電流承受導通能力以及整流切換速度之間進行取捨,使整流的能力受到限制。相較之下,在本發明之受電模組30中,整流電晶體12及22可採用電流承受導通能力較強的元件,以承受感應線圈300上的大電流。整流切換速度則可透過整流控制模組R1及R2來協助提升。也就是說,整流控制模組R1及R2中的整流控制電晶體14及24可採用切換速度較快的電晶體,並透過加速放電二極體142、144、242及244分別在整流控制電晶體14及24之閘極與汲極端產生快速放電的效果,以提升整流控制訊號S12及S22的切換速度,進而加速整流電晶體12及22的開關切換。如此一來,本發明可同時提升電流承受導通能力及整流切換速度。It should be noted that, according to the circuit structure illustrated by the power receiving module 30, the present invention can achieve fast rectification switching without affecting the current receiving capability. In detail, according to the characteristics of the gold-oxygen half-field effect transistor, the transistor that can be used to withstand a large current tends to have a large parasitic capacitance, which limits the switching speed of the gate signal; on the other hand, for the gate For a transistor with a small parasitic capacitance and a signal with high-speed switching capability, its current withstand capability must be weak. In this case, the rectifying transistor used in the prior art (such as the lower bridge switching elements A2 and B2 in U.S. Patent Publication No. US 2013/0342027 A1) must be traded between the current withstand capability and the rectification switching speed. The ability to rectify is limited. In contrast, in the power receiving module 30 of the present invention, the rectifying transistors 12 and 22 can employ a component having a high current carrying capability to withstand a large current on the induction coil 300. The rectification switching speed can be assisted by the rectification control modules R1 and R2. That is to say, the rectification control transistors 14 and 24 in the rectification control modules R1 and R2 can adopt a transistor with a fast switching speed, and pass through the accelerating discharge diodes 142, 144, 242, and 244 respectively in the rectification control transistor. The gates of the 14 and 24 and the 汲 extremes produce a rapid discharge effect to increase the switching speed of the rectification control signals S12 and S22, thereby accelerating the switching of the rectifying transistors 12 and 22. In this way, the present invention can simultaneously improve the current receiving conduction capability and the rectification switching speed.
如上所述,本發明係採用錯動方式對感應線圈兩端進行訊號調制。以受電模組30為例,處理器60可交替開啟調制控制模組M1及M2,以在不同調制區間內分別對感應線圈300之第一端S1及第二端S2進行訊號調制。詳細來說,針對一調制訊號,處理器60可先設定相對應的複數個調制區間。接著,在此複數個調制區間中的第i個調制區間內,處理器60可控制調制控制模組M1對感應線圈300之第一端S1進行調制,其中i為奇數;在此複數個調制區間中的第j個調制區間內,處理器60可控制調制控制模組M2對感應線圈300之第二端S2進行調制,其中j為偶數。換句話說,在受電模組30中,對感應線圈300之第一端S1進行調制時不調制第二端S2,對感應線圈300之第二端S2進行調制時不調制第一端S1。較佳地,上述複數個調制區間所包含的調制區間數目為偶數,使得感應線圈300之第一端S1與第二端S2進行訊號調制的次數相同。As described above, the present invention uses a shifting method to perform signal modulation on both ends of the induction coil. Taking the power receiving module 30 as an example, the processor 60 can alternately turn on the modulation control modules M1 and M2 to separately modulate the first end S1 and the second end S2 of the induction coil 300 in different modulation intervals. In detail, for a modulated signal, the processor 60 may first set a corresponding plurality of modulation intervals. Then, in the i-th modulation interval of the plurality of modulation intervals, the processor 60 can control the modulation control module M1 to modulate the first end S1 of the induction coil 300, where i is an odd number; and the plurality of modulation intervals In the jth modulation interval, the processor 60 can control the modulation control module M2 to modulate the second end S2 of the induction coil 300, where j is an even number. In other words, in the power receiving module 30, the second end S2 is not modulated when the first end S1 of the induction coil 300 is modulated, and the first end S1 is not modulated when the second end S2 of the induction coil 300 is modulated. Preferably, the number of modulation intervals included in the plurality of modulation intervals is an even number, so that the first end S1 of the induction coil 300 and the second end S2 are modulated by the same number of times.
詳細來說,在上述第i個調制區間內,處理器60可透過調制控制訊號C13導通耦接於感應線圈300之第一端S1的調制電晶體13,以對感應線圈300之第一端S1進行調制;在上述第j個調制區間內,處理器60可透過調制控制訊號C23導通耦接於感應線圈300之第二端S2的調制電晶體23,以對感應線圈300之第二端S2進行調制。亦即,調制電晶體13及23係交替導通以產生調制訊號。如上所述,當感應線圈300之一端進行調制時,其對向端需暫停整流,以避免整流迴路通過大量電流而消耗過大的功率。由於感應線圈300之兩端係以錯動方式進行調制,因此,在進行調制時,同一時間僅有一端停止整流而另一端可正常輸出電力,可降低訊號調制期間對供電輸出功率所造成的影響。相較之下,習知技術往往在同一時間對感應線圈的兩端進行調制,使得線圈兩端需同時暫停整流,造成了整流輸出電壓瞬間大幅下降而影響供電輸出能力。In detail, in the ith modulation interval, the processor 60 can conduct the modulation transistor C13 to the modulation transistor 13 coupled to the first end S1 of the induction coil 300 to the first end S1 of the induction coil 300. The modulating transistor 23 is coupled to the modulating transistor 23 coupled to the second end S2 of the inductive coil 300 to perform the second end S2 of the inductive coil 300 through the modulation control signal C23. modulation. That is, the modulation transistors 13 and 23 are alternately turned on to generate a modulation signal. As described above, when one end of the induction coil 300 is modulated, its opposite end needs to be rectified to avoid excessive power consumption by the rectifier circuit through a large amount of current. Since both ends of the induction coil 300 are modulated in a dislocation manner, only one end stops rectifying at the same time and the other end can output power normally at the same time, which can reduce the influence on the power supply output during signal modulation. . In contrast, conventional techniques often modulate both ends of the induction coil at the same time, so that both ends of the coil need to be simultaneously suspended and rectified, causing the rectified output voltage to drop sharply and affect the power supply output capability.
請參考第7圖,第7圖為在受電模組30中進行訊號調制時訊號波形之示意圖。如第7圖所示,波形W7_1繪示處理器60輸出至調制控制模組M1的調制控制訊號C13,波形W7_2繪示處理器60輸出至調制控制模組M2的調制控制訊號C23,波形W7_3繪示感應線圈300中線圈與電容之間的訊號,波形W7_4繪示感應線圈300之第一端S1的電壓訊號,波形W7_5繪示整流控制模組R2輸出至整流電晶體22之整流控制訊號S22,波形W7_6繪示整流控制模組R1輸出至整流電晶體12之整流控制訊號S12。在第7圖中,一調制訊號係對應至4個調制區間,其中,在第1個和第3個調制區間內僅導通調制控制模組M1內部之調制電晶體13,以對感應線圈300之第一端S1進行訊號調制;在第2個和第4個調制區間內僅導通調制控制模組M2內部之調制電晶體23,以對感應線圈300之第二端S2進行訊號調制。藉由上述訊號調制方式,可在線圈上產生電性變化,其可反饋至供電端再透過訊號解析及解碼而還原調制資料。除此之外,在進行訊號調制時,感應線圈300的對向端會同步暫停整流,由波形W7_5及W7_6可看出,透過整流關閉電晶體146及246的控制,整流控制訊號S12及S22皆能夠完全到達零電位,以完全持續斷開整流電晶體12及22,且感應線圈300兩端的整流不會同時暫停,亦即,在任何時間點至少會有一端整流輸出電力,使得訊號調制運作不至於對電力輸出效能造成太大影響。Please refer to FIG. 7. FIG. 7 is a schematic diagram of signal waveforms when signal modulation is performed in power receiving module 30. As shown in FIG. 7, the waveform W7_1 shows the modulation control signal C13 outputted by the processor 60 to the modulation control module M1, and the waveform W7_2 shows the modulation control signal C23 output by the processor 60 to the modulation control module M2, and the waveform W7_3 is drawn. The signal between the coil and the capacitor in the induction coil 300 is shown, the waveform W7_4 shows the voltage signal of the first end S1 of the induction coil 300, and the waveform W7_5 shows the rectification control signal S22 of the rectifier control module R2 outputted to the rectifying transistor 22. The waveform W7_6 shows the rectification control signal S12 outputted from the rectification control module R1 to the rectifying transistor 12. In FIG. 7, a modulation signal corresponds to four modulation intervals, wherein only the modulation transistor 13 inside the modulation control module M1 is turned on in the first and third modulation intervals to the induction coil 300. The first end S1 performs signal modulation; in the second and fourth modulation intervals, only the modulation transistor 23 inside the modulation control module M2 is turned on to perform signal modulation on the second end S2 of the induction coil 300. By the above signal modulation method, an electrical change can be generated on the coil, which can be fed back to the power supply end and then the signal is reconstructed and decoded to restore the modulated data. In addition, during the signal modulation, the opposite ends of the induction coil 300 are synchronously suspended and rectified. As can be seen from the waveforms W7_5 and W7_6, the rectification control signals S12 and S22 are controlled by the rectification to turn off the transistors 146 and 246. The zero potential can be completely reached to completely and continuously disconnect the rectifying transistors 12 and 22, and the rectification at both ends of the induction coil 300 is not suspended at the same time, that is, at least one end of the rectified output power at any time point, so that the signal modulation operation is not As for the power output performance has a great impact.
值得注意的是,相較於習知感應線圈兩端同時進行訊號調制的方式而言,本發明之錯動式調制方式亦可對供電端線圈產生明顯的訊號反射,特別是在供電負載較大的情況下,本發明之錯動式調制方式更不易受到負載的影響,而能夠維持其訊號調制效果。It is worth noting that the shift modulation method of the present invention can also generate significant signal reflection on the power supply end coil, especially in the power supply load, compared with the conventional method of performing signal modulation on both ends of the induction coil. In the case of the present invention, the shift modulation method of the present invention is less susceptible to the load and maintains its signal modulation effect.
除此之外,在第7圖之實施例中,一調制訊號包含有4個調制區間,但在其它實施例中,調制訊號可包含任意數目的調制區間,且調制區間的長度亦可根據系統需求而任意調整,只要每一調制區間的長度大致相等即可。此外,在上述實施例中,處理器60係先啟動調制控制訊號C13,再啟動調制控制訊號C23,但在其它實施例中,亦可改變啟動的順序,亦即,先啟動調制控制訊號C23,再啟動調制控制訊號C13,而不限於此。In addition, in the embodiment of FIG. 7, a modulation signal includes four modulation intervals, but in other embodiments, the modulation signal may include any number of modulation intervals, and the length of the modulation interval may also be according to the system. Any adjustment can be made as long as the length of each modulation interval is approximately equal. In addition, in the above embodiment, the processor 60 starts the modulation control signal C13 and then starts the modulation control signal C23. However, in other embodiments, the startup sequence may also be changed, that is, the modulation control signal C23 is started. The modulation control signal C13 is restarted, without being limited thereto.
另一方面,透過比較器及參考電壓產生器的運作,本發明亦解決了習知技術中每一調制訊號反饋至供電端的訊號變化量大小不一的缺點。有別於習知技術中調制訊號係隨機性地出現在線圈的振盪週期上,在本發明之實施例中,處理器可透過比較器來偵測感應線圈兩端電位切換的時間點,以根據電位切換的週期(即整流切換週期)來發送調制控制訊號,使得每一調制訊號皆可對應至固定的電位切換週期。請再次參考第3圖,並以第3圖之受電模組30為例。處理器60可先設定對應於一調制訊號之複數個調制區間。接著,比較器71比較感應線圈300之第一端S1或第二端S2所對應的線圈電壓VS與參考電壓Vref,以產生比較結果CR,並輸出比較結果CR至處理器60。處理器60再根據比較結果CR,決定上述複數個調制區間開始及停止的時間點。詳細來說,比較器71之一輸入端可接收整流控制模組R1中的整流控制電晶體14或整流控制模組R2中的整流控制電晶體24之閘極電壓,由整流控制模組R1及R2之電路結構可知,整流控制電晶體14及24之閘極係分別透過電壓轉換電阻141、加速放電二極體142以及電壓轉換電阻241、加速放電二極體242連結至感應線圈300之第一端S1及第二端S2,其閘極電壓並隨著感應線圈300之線圈電壓VS變化。在此情況下,整流控制電晶體14及24之閘極電壓可對應至感應線圈300之線圈電壓VS。比較器71之另一輸入端則從參考電壓產生器72接收參考電壓Vref,並在輸出端輸出上述閘極電壓與參考電壓Vref的比較結果。參考電壓Vref應設定在整流控制電晶體14及24之閘極電壓的高電位與低電位之間的一電壓準位,以判斷感應線圈300兩端所處的電位高低。On the other hand, through the operation of the comparator and the reference voltage generator, the present invention also solves the shortcomings of the difference in the amount of signal feedback that each modulated signal is fed back to the power supply terminal in the prior art. Different from the prior art, the modulation signal randomly appears on the oscillation period of the coil. In the embodiment of the present invention, the processor can detect the time point of the potential switching between the two ends of the induction coil through the comparator, according to The period of the potential switching (ie, the rectification switching period) transmits the modulation control signal such that each modulation signal can correspond to a fixed potential switching period. Please refer to FIG. 3 again, and take the power receiving module 30 of FIG. 3 as an example. The processor 60 may first set a plurality of modulation intervals corresponding to a modulated signal. Next, the comparator 71 compares the coil voltage VS corresponding to the first end S1 or the second end S2 of the induction coil 300 with the reference voltage Vref to generate a comparison result CR, and outputs the comparison result CR to the processor 60. The processor 60 determines the time point at which the plurality of modulation intervals start and stop based on the comparison result CR. In detail, one input end of the comparator 71 can receive the gate voltage of the rectification control transistor 14 in the rectification control module R1 or the rectification control transistor 24 in the rectification control module R2, and is controlled by the rectification control module R1 and The circuit structure of R2 is that the gates of the rectifier control transistors 14 and 24 are respectively connected to the first of the induction coils 300 through the voltage conversion resistor 141, the acceleration discharge diode 142, the voltage conversion resistor 241, and the acceleration discharge diode 242. The terminal S1 and the second terminal S2 have gate voltages that vary with the coil voltage VS of the induction coil 300. In this case, the gate voltages of the rectification control transistors 14 and 24 may correspond to the coil voltage VS of the induction coil 300. The other input terminal of the comparator 71 receives the reference voltage Vref from the reference voltage generator 72, and outputs a comparison result of the gate voltage and the reference voltage Vref at the output terminal. The reference voltage Vref should be set at a voltage level between the high potential and the low potential of the gate voltages of the rectification control transistors 14 and 24 to determine the potential level at both ends of the induction coil 300.
值得注意的是,受電模組30中僅包含單一比較器71,其連接於整流控制模組R1以接收整流控制電晶體14之閘極電壓。由於感應線圈300之第一端S1及第二端S2之切換週期相同且電位高低互為反相,因此比較器71只需要取得感應線圈300之第一端S1的週期與電位高低,即等同於取得第二端S2的週期與電位高低。在另一實施例中,亦可將比較器71改為連結至整流控制模組R2以取得感應線圈300之第二端S2的週期與電位高低,而不限於此。除此之外,比較器71亦可透過其它方式取得線圈電壓VS及切換週期,而不限於透過整流控制模組R1或R2的方式。It should be noted that the power receiving module 30 only includes a single comparator 71 connected to the rectifier control module R1 to receive the gate voltage of the rectifier control transistor 14. Since the switching period of the first end S1 and the second end S2 of the induction coil 300 is the same and the potential is opposite to each other, the comparator 71 only needs to obtain the period and the potential of the first end S1 of the induction coil 300, which is equivalent to The period of the second terminal S2 and the potential are obtained. In another embodiment, the comparator 71 can be connected to the rectification control module R2 to obtain the period and the potential of the second end S2 of the induction coil 300, without limitation. In addition, the comparator 71 can also obtain the coil voltage VS and the switching period by other means, and is not limited to the manner of passing through the rectification control module R1 or R2.
接著,處理器60可根據比較結果CR(其包含感應線圈300兩端的切換週期與電位高低),來決定每一調制區間開始及停止的時間點。以下範例係對應於第3圖中受電模組30之電路結構來說明,即比較器71比較對應於感應線圈300之第一端S1的線圈電壓VS與參考電壓Vref而產生比較結果CR的情形。本領域具通常知識者應可藉由本範例所揭露的內容推知比較器71連接至感應線圈300之第二端S2的情形。Next, the processor 60 can determine the time point at which each modulation interval starts and stops according to the comparison result CR (which includes the switching period of the induction coil 300 and the potential level). The following example corresponds to the circuit configuration of the power receiving module 30 in FIG. 3, that is, the comparator 71 compares the coil voltage VS corresponding to the first end S1 of the induction coil 300 with the reference voltage Vref to produce a comparison result CR. Those skilled in the art should be able to infer from the disclosure of the present example that the comparator 71 is connected to the second end S2 of the induction coil 300.
首先,針對一調制訊號所對應的複數個調制區間,處理器60可設定每一調制區間所對應的一預定時間,一般來說,可設定每一調制區間所對應的預定時間皆相同,其可大致等於數個(例如3或4個)線圈電壓VS切換的週期。接著,當處理器60接收到一訊號調制指示時,可依據比較結果CR判斷感應線圈300之第一端S1所處的電位高低,並據以決定是否開始對應於第一端S1之一調制區間,同時在該調制區間開始時啟動計時器。當計時器的計時時間到達該預定時間時(即經過數個週期後),處理器60即可依據比較結果CR判斷感應線圈300之第一端S1所處的電位高低,並據以決定是否停止調制區間。First, for a plurality of modulation intervals corresponding to a modulation signal, the processor 60 may set a predetermined time corresponding to each modulation interval. Generally, the predetermined time corresponding to each modulation interval may be set to be the same. It is approximately equal to the number of cycles (eg, 3 or 4) of coil voltage VS switching. Then, when the processor 60 receives a signal modulation indication, it can determine, according to the comparison result CR, the potential of the first end S1 of the induction coil 300, and determine whether to start a modulation interval corresponding to the first end S1. At the same time, the timer is started at the beginning of the modulation interval. When the timer time of the timer reaches the predetermined time (that is, after several cycles), the processor 60 can determine the level of the potential of the first end S1 of the induction coil 300 according to the comparison result CR, and decide whether to stop or not. Modulation interval.
詳細來說,針對調制區間的開始時間,處理器60可在接收到訊號調制指示之後,透過比較結果CR來判斷感應線圈300之第一端S1的電位下降至低於參考電壓Vref之一低電位的時間點,並在此時間點控制調制區間開始(即導通調制控制模組M1中的調制電晶體13),使得感應線圈300之第一端S1在位於低電位時開始進行調制。同樣地,針對調制區間的停止時間,處理器60亦可在預定時間到達之後,透過比較結果CR來判斷感應線圈300之第一端S1的電位下降至低於參考電壓Vref之一低電位的時間點,並在此時間點控制調制區間停止(即斷開調制控制模組M1中的調制電晶體13),使得感應線圈300之第一端S1在位於低電位時停止進行調制。需注意的是,訊號調制之運作係透過分別耦接於感應線圈300之第一端S1及第二端S2的調制電晶體13及23來拉低第一端S1及第二端S2的電壓訊號,在此情形下,由於感應線圈300之第一端S1及第二端S2的電壓訊號近似方波,其低電位接近零電位而無法產生拉低效果,只有高電位的部分會受到調制影響。換句話說,根據比較結果CR,處理器60可控制訊號調制運作在相對應線圈電壓VS為低電位時(即不受到調制影響時)開始或結束,使得訊號調制區間可包含完整的線圈電壓VS之切換週期,即線圈電壓VS位於高電位的數個完整期間。進一步來說,由於每一調制區間所對應的預定時間皆相同,因此每一調制區間可包含相同數目且完整的線圈電壓VS之切換週期。如此一來,每一調制訊號皆可在線圈上產生相同幅度的訊號變化量,以提升供電端進行訊號判別的準確度。In detail, for the start time of the modulation interval, after receiving the signal modulation indication, the processor 60 may determine, by the comparison result CR, that the potential of the first end S1 of the induction coil 300 falls below a low potential of the reference voltage Vref. At the point in time, and at this point in time, the modulation interval begins (ie, the modulation transistor 13 in the modulation control module M1 is turned on) so that the first end S1 of the induction coil 300 begins to modulate when it is at a low potential. Similarly, for the stop time of the modulation interval, the processor 60 may also determine, after the predetermined time has elapsed, the comparison result CR to determine that the potential of the first end S1 of the induction coil 300 falls below a low potential of the reference voltage Vref. At this point in time, the control modulation interval is stopped (i.e., the modulation transistor 13 in the modulation control module M1 is turned off), so that the first end S1 of the induction coil 300 stops modulating when it is at a low potential. It should be noted that the operation of the signal modulation is to lower the voltage signals of the first end S1 and the second end S2 through the modulation transistors 13 and 23 respectively coupled to the first end S1 and the second end S2 of the induction coil 300. In this case, since the voltage signals of the first end S1 and the second end S2 of the induction coil 300 are approximately square waves, the low potential is close to zero potential and the pull-down effect cannot be produced, and only the high potential portion is affected by the modulation. In other words, according to the comparison result CR, the processor 60 can control the signal modulation operation to start or end when the corresponding coil voltage VS is low (ie, not affected by modulation), so that the signal modulation interval can include the complete coil voltage VS. The switching period, that is, the coil voltage VS is located at several high periods of high potential. Further, since the predetermined time corresponding to each modulation interval is the same, each modulation interval may include the same number and complete switching period of the coil voltage VS. In this way, each modulation signal can generate the same amplitude signal variation on the coil to improve the accuracy of the signal discrimination at the power supply end.
另一方面,比較器71對感應線圈300之第一端S1的電壓與參考電壓Vref進行比較而產生的比較結果CR亦可用來判別感應線圈300之第二端S2的電位高低。詳細來說,當處理器60接收到一訊號調制指示且欲對感應線圈300之第二端S2進行調制時,可依據比較結果CR判斷感應線圈300之第一端S1所處的電位高低,進而判斷感應線圈300之第二端S2所處的電位高低,並據以決定是否開始對應於第二端S2之一調制區間,同時在該調制區間開始時啟動計時器。當計時器的計時時間到達預定時間時(即經過數個週期後),處理器60即可依據比較結果CR判斷感應線圈300之第一端S1所處的電位高低,進而判斷感應線圈300之第二端S2所處的電位高低,並據以決定是否停止調制區間。如上所述,感應線圈300之第一端S1與第二端S2互為反相訊號,當第一端S1為高電位時第二端S2為低電位,當第一端S1為低電位時第二端S2為高電位,因此,只需要透過單一比較器71即可取得感應線圈300兩端的電位狀態。On the other hand, the comparison result CR generated by the comparator 71 comparing the voltage of the first terminal S1 of the induction coil 300 with the reference voltage Vref can also be used to determine the potential level of the second terminal S2 of the induction coil 300. In detail, when the processor 60 receives a signal modulation indication and wants to modulate the second end S2 of the induction coil 300, the potential of the first end S1 of the induction coil 300 can be determined according to the comparison result CR. The potential of the second end S2 of the induction coil 300 is judged to be high or low, and accordingly, it is determined whether to start a modulation section corresponding to the second end S2, and the timer is started at the beginning of the modulation section. When the timing of the timer reaches a predetermined time (that is, after several cycles), the processor 60 can determine the potential of the first end S1 of the induction coil 300 according to the comparison result CR, and then determine the first of the induction coil 300. The potential of the two-terminal S2 is high and low, and it is decided whether to stop the modulation interval. As described above, the first end S1 and the second end S2 of the induction coil 300 are mutually inverted signals, and the second end S2 is low when the first end S1 is at a high potential, and the first end S1 is low when the first end S1 is low. The two terminals S2 are at a high potential, and therefore, it is only necessary to obtain the potential state across the induction coil 300 through the single comparator 71.
詳細來說,針對調制區間的開始時間,處理器60可在接收到訊號調制指示之後,透過比較結果CR來判斷感應線圈300之第一端S1的電位上升至高於參考電壓Vref之一高電位的時間點,並據以判斷感應線圈300之第二端S2位於一低電位,處理器60即可在此時間點控制調制區間開始(即導通調制控制模組M2中的調制電晶體23),使得感應線圈300之第二端S2在位於低電位時開始進行調制。同樣地,針對調制區間的停止時間,處理器60亦可在預定時間到達之後,透過比較結果CR來判斷感應線圈300之第一端S1的電位上升至高於參考電壓Vref之一高電位的時間點,並據以判斷感應線圈300之第二端S2位於一低電位,處理器60即可在此時間點控制調制區間停止(即斷開調制控制模組M2中的調制電晶體23),使得感應線圈300之第二端S2在位於低電位時停止進行調制。In detail, for the start time of the modulation interval, after receiving the signal modulation indication, the processor 60 may determine, by the comparison result CR, that the potential of the first end S1 of the induction coil 300 rises to a high level higher than the reference voltage Vref. At the time point, and judging that the second end S2 of the induction coil 300 is at a low potential, the processor 60 can control the start of the modulation interval (ie, turn on the modulation transistor 23 in the modulation control module M2) at this point in time, so that The second end S2 of the induction coil 300 begins to modulate when it is at a low potential. Similarly, for the stop time of the modulation interval, the processor 60 may also determine, after the predetermined time has elapsed, the comparison result CR to determine the time point at which the potential of the first terminal S1 of the induction coil 300 rises to a high level higher than the reference voltage Vref. And determining that the second end S2 of the induction coil 300 is at a low potential, the processor 60 can control the modulation interval to stop at this point in time (ie, disconnect the modulation transistor 23 in the modulation control module M2), so that the sensing The second end S2 of the coil 300 stops modulation when it is at a low potential.
請參考第8A圖及第8B圖,第8A圖及第8B圖為在受電模組30中進行訊號調制時訊號波形之示意圖。第8A圖放大了第7圖中的部分波形,以明確繪示調制區間開始及結束的時間點與線圈電壓VS的對應關係;第8B圖則繪示多筆調制訊號的波形。如第8A圖所示,波形W8_1為波形W7_4的放大,其繪示感應線圈300之第一端S1的電壓訊號;波形W8_2為波形W7_1的放大,其繪示調制控制訊號C13;波形W8_3則繪示比較器71所輸出之比較結果CR。由第8A圖可知,調制控制訊號C13開始及停止的時間點皆發生在感應線圈300之第一端S1的電壓為低電位時,即相對應比較結果CR輸出低電位時。一般來說,由於線圈電壓VS切換的速度相當快,而處理器60的處理延遲可能造成調制控制訊號C13無法恰好在線圈電壓VS切換至低電位的時間點啟動或關閉,然而,調制控制訊號C13只要在感應線圈300之第一端S1位於低電位時啟動或關閉,即可確保調制區間包含完整的線圈電壓VS切換週期,即線圈電壓VS位於高電位的數個完整期間。舉例來說,在第8A圖中,調制區間(即調制控制訊號C13導通調制電晶體13的時間)包含了4個線圈電壓VS位於高電位的完整期間。Please refer to FIG. 8A and FIG. 8B. FIG. 8A and FIG. 8B are schematic diagrams of signal waveforms when signal modulation is performed in the power receiving module 30. Fig. 8A is an enlarged view of a portion of the waveform in Fig. 7 to clearly show the correspondence between the time point at which the modulation interval starts and ends and the coil voltage VS; and Fig. 8B shows the waveform of the plurality of modulated signals. As shown in FIG. 8A, the waveform W8_1 is an amplification of the waveform W7_4, which shows the voltage signal of the first end S1 of the induction coil 300; the waveform W8_2 is an amplification of the waveform W7_1, which shows the modulation control signal C13; and the waveform W8_3 is drawn. The comparison result CR outputted by the comparator 71 is shown. As can be seen from Fig. 8A, the timing at which the modulation control signal C13 starts and stops occurs when the voltage at the first terminal S1 of the induction coil 300 is low, that is, when the comparison result CR outputs a low potential. In general, since the coil voltage VS is switched at a relatively fast speed, the processing delay of the processor 60 may cause the modulation control signal C13 not to be turned on or off just at the time when the coil voltage VS is switched to the low potential. However, the modulation control signal C13 As long as the first end S1 of the induction coil 300 is turned on or off at the low potential, it is ensured that the modulation interval contains the complete coil voltage VS switching period, that is, the coil voltage VS is located at several high periods of high potential. For example, in Fig. 8A, the modulation interval (i.e., the time at which the modulation control signal C13 turns on the modulation transistor 13) includes a complete period in which the four coil voltages VS are at a high potential.
除此之外,如第8B圖所示,波形W8_4及W8_5分別繪示調制控制訊號C13及C23,波形W8_6則繪示受電模組30產生之調制訊號反射至供電端再經由訊號解析電路處理後得到的訊號。由第8B圖可知,每一調制訊號皆包含完整且數量相同的線圈電壓VS切換週期,因此在線圈上產生的訊號變化量與變化型態都相同,反射至供電端經由訊號解析而得到的訊號波形亦相同。In addition, as shown in FIG. 8B, waveforms W8_4 and W8_5 respectively show modulation control signals C13 and C23, and waveform W8_6 shows that the modulation signal generated by power receiving module 30 is reflected to the power supply terminal and then processed by the signal analysis circuit. The signal obtained. It can be seen from FIG. 8B that each modulated signal includes a complete and identical number of coil voltages VS switching period, so that the amount of signal change generated on the coil is the same as the variation pattern, and the signal reflected from the power supply end is analyzed by signal analysis. The waveform is also the same.
值得注意的是,比較器71除了可控制處理器60執行訊號調制的時間點之外,亦可用來啟動或關閉處理器60的運作。在習知技術中,處理器是根據其接收到的電源電壓是否到達工作電壓來決定是否開啟。由於受電模組之電力輸出端的穩壓器需使用一穩壓電容,其具有相當大的電容值,使得穩壓電容與處理器之間需設置一開關,此開關在處理器啟動之前需關閉,以避免感應線圈連接整流輸出的電力需對穩壓電容充電而延緩處理器所需工作電壓提高後開啟的時間,甚至於無法到達其工作電壓而無法開啟處理器。例如,美國專利公開案US 2013/0342027 A1之受電模組20中的斷路保護電路24即可用來處理上述問題。相較之下,在本發明之實施例中,處理器60可根據比較器71所輸出之比較結果CR來決定是否開啟。詳細來說,當受電模組30靠近一供電裝置或放置在一供電裝置上時,供電裝置會先傳送少量電力,受電模組30之感應線圈300在接收到電力之後會開始諧振,亦即,在感應線圈300之兩端產生電壓變化,此電壓變化可透過整流控制模組R1或R2傳送至比較器71,進而產生高低電位持續切換的比較結果CR。處理器60即可在接收到比較結果CR之後,判斷受電模組30位於一供電裝置附近,並開始產生調制訊號以反射至供電端。另一方面,當受電模組30之感應線圈300離開供電端時,感應線圈300也會立即停止諧振,即使穩壓電容41存在的電荷仍足以供處理器60使用,處理器60仍可透過比較器71得知感應線圈300已停止接收電力,並據以停止相關運作。在此情況下,由於處理器60是根據比較結果CR來進行運作,而不是根據其接收到的電源電壓,因此,在本發明之受電模組30中,整流二極體11及21可直接輸出電力至穩壓器40及電源輸出端50,而不需要在穩壓電容41之前設置任何開關。It should be noted that the comparator 71 can also be used to enable or disable the operation of the processor 60 in addition to controlling the time point at which the processor 60 performs signal modulation. In the prior art, the processor determines whether to turn on according to whether the power supply voltage it receives reaches the operating voltage. Since the voltage regulator of the power output terminal of the power receiving module needs to use a voltage stabilizing capacitor, it has a relatively large capacitance value, so that a switch needs to be set between the voltage stabilizing capacitor and the processor, and the switch needs to be turned off before the processor starts. In order to avoid the power of the induction coil connected to the rectified output, it is necessary to charge the voltage stabilizing capacitor to delay the time when the operating voltage of the processor is increased, and even if the operating voltage cannot be reached, the processor cannot be turned on. For example, the circuit breaker protection circuit 24 in the power receiving module 20 of U.S. Patent Publication No. US 2013/0342027 A1 can be used to address the above problems. In the embodiment of the present invention, the processor 60 can determine whether to turn on according to the comparison result CR output by the comparator 71. In detail, when the power receiving module 30 is close to a power supply device or placed on a power supply device, the power supply device transmits a small amount of power first, and the induction coil 300 of the power receiving module 30 starts to resonate after receiving the power, that is, A voltage change is generated across the induction coil 300. The voltage change can be transmitted to the comparator 71 through the rectification control module R1 or R2, thereby generating a comparison result CR of high and low potential continuous switching. After receiving the comparison result CR, the processor 60 determines that the power receiving module 30 is located near a power supply device, and starts generating a modulation signal to be reflected to the power supply end. On the other hand, when the induction coil 300 of the power receiving module 30 leaves the power supply terminal, the induction coil 300 also stops the resonance immediately, even if the charge of the voltage stabilization capacitor 41 is still sufficient for the processor 60 to use, the processor 60 can still compare The device 71 knows that the induction coil 300 has stopped receiving power and accordingly stops the related operation. In this case, since the processor 60 operates according to the comparison result CR, instead of the power supply voltage received thereby, the rectifying diodes 11 and 21 can be directly outputted in the power receiving module 30 of the present invention. Power is supplied to the regulator 40 and the power supply output 50 without the need to provide any switches before the voltage stabilizing capacitor 41.
在此實施例中,由於感應線圈300接收到的電力不需透過開關,可在整流之後直接傳送至穩壓器40及電源輸出端50,以避免電流通過開關所造成的功率損耗。除此之外,在習知技術中,由於穩壓電容設置在開關後方,在開關導通的瞬間,會因電容吸收大量電力使得電壓瞬間大幅下降,若電壓過度下降會造成處理器無法正常運作。相較之下,本發明之實施例不需使用開關來隔絕穩壓電容與處理器,可避免上述問題的發生。In this embodiment, since the power received by the induction coil 300 does not need to pass through the switch, it can be directly transmitted to the voltage regulator 40 and the power output terminal 50 after rectification to avoid power loss caused by the current passing through the switch. In addition, in the prior art, since the voltage stabilizing capacitor is disposed behind the switch, when the switch is turned on, the voltage is greatly reduced due to the large amount of power absorbed by the capacitor. If the voltage is excessively lowered, the processor may not operate normally. In contrast, embodiments of the present invention do not require the use of a switch to isolate the voltage stabilizing capacitor from the processor, thereby avoiding the above problems.
上述關於受電模組30之運作方式可歸納為一訊號調制流程90,如第9圖所示。訊號調制流程90包含以下步驟:The operation mode of the power receiving module 30 can be summarized as a signal modulation process 90, as shown in FIG. The signal modulation process 90 includes the following steps:
步驟900: 開始。Step 900: Start.
步驟902: 處理器60設定一調制訊號所對應的複數個調制區間。Step 902: The processor 60 sets a plurality of modulation intervals corresponding to a modulated signal.
步驟904: 處理器60在複數個調制區間中進行調制。若為第i個調制區間(i為奇數),則執行步驟906;若為第j個調制區間(j為偶數),則執行步驟910。Step 904: The processor 60 performs modulation in a plurality of modulation intervals. If it is the i-th modulation interval (i is an odd number), step 906 is performed; if it is the j-th modulation interval (j is an even number), step 910 is performed.
步驟906: 比較器71比較感應線圈300之第一端S1或第二端S2的電壓與參考電壓Vref,以產生比較結果CR,並根據比較結果CR,決定第i個調制區間開始及停止的時間點。Step 906: The comparator 71 compares the voltage of the first end S1 or the second end S2 of the induction coil 300 with the reference voltage Vref to generate a comparison result CR, and determines the start and stop time of the i-th modulation interval according to the comparison result CR. point.
步驟908: 在第i個調制區間內,處理器60透過調制控制訊號C13導通調制電晶體13,以對感應線圈300之第一端S1進行調制,並透過整流關閉訊號C24控制整流控制訊號S22下降至零電位以斷開整流電晶體22,進而暫停感應線圈300之第二端S2的整流,再執行步驟914。Step 908: In the ith modulation interval, the processor 60 turns on the modulation transistor 13 through the modulation control signal C13 to modulate the first end S1 of the induction coil 300, and controls the rectification control signal S22 to decrease through the rectification off signal C24. The zero potential is turned off to turn off the rectifying transistor 22, thereby suspending the rectification of the second end S2 of the inductive coil 300, and then step 914 is performed.
步驟910: 比較器71比較感應線圈300之第一端S1或第二端S2的電壓與參考電壓Vref,以產生比較結果CR,並根據比較結果CR,決定第j個調制區間開始及停止的時間點。Step 910: The comparator 71 compares the voltage of the first end S1 or the second end S2 of the induction coil 300 with the reference voltage Vref to generate a comparison result CR, and determines the start and stop time of the jth modulation interval according to the comparison result CR. point.
步驟912: 在第j個調制區間內,處理器60透過調制控制訊號C23導通調制電晶體23,以對感應線圈300之第二端S2進行調制,並透過整流關閉訊號C14控制整流控制訊號S12下降至零電位以斷開整流電晶體12,進而暫停感應線圈300之第一端S1的整流。Step 912: In the jth modulation interval, the processor 60 turns on the modulation transistor 23 through the modulation control signal C23 to modulate the second end S2 of the induction coil 300, and controls the rectification control signal S12 to decrease through the rectification off signal C14. The zero potential is applied to turn off the rectifying transistor 12, thereby suspending rectification of the first end S1 of the inductive coil 300.
步驟914: 處理器60判斷是否完成該調制訊號所對應的所有調制區間中的訊號調制。若是,則執行步驟916;若否,則執行步驟904。Step 914: The processor 60 determines whether the signal modulation in all the modulation intervals corresponding to the modulated signal is completed. If yes, go to step 916; if no, go to step 904.
步驟916: 結束。Step 916: End.
關於訊號調制流程90之詳細運作方式及變化可參考前述說明,在此不贅述。For detailed operation modes and changes of the signal modulation process 90, reference may be made to the foregoing description, and details are not described herein.
綜上所述,本發明藉由錯動方式來進行訊號調制,即交替進行在感應線圈之第一端及第二端的訊號調制,可在供電端產生明顯的訊號反射,且位於感應線圈兩端的整流電晶體不需同時斷開,可降低訊號調制對供電輸出功率所造成的影響。此外,透過比較器的運作,訊號調制的時間點可對應至線圈電壓的切換週期,處理器可根據比較器之比較結果,在特定時間點開始或停止進行訊號調制,使得每一調制訊號可在線圈上產生相同幅度的訊號變化量,以提升供電端進行訊號判別的準確度。另外,處理器亦可透過比較器,根據線圈電壓的切換來決定是否開始運作,而不是由接收到的電壓大小來決定,因而不需在穩壓電容與處理器之間設置開關來控制處理器的工作電壓。再者,透過本發明之受電模組的電路結構,整流電晶體可由整流控制模組進行控制,以同時實現高電流承受導通能力和高整流切換速度。 以上所述僅為本發明之較佳實施例,凡依本發明申請專利範圍所做之均等變化與修飾,皆應屬本發明之涵蓋範圍。In summary, the present invention performs signal modulation by a shifting method, that is, alternately performs signal modulation at the first end and the second end of the induction coil, which can generate significant signal reflection at the power supply end and is located at both ends of the induction coil. The rectifying transistor does not need to be disconnected at the same time, which can reduce the influence of signal modulation on the output power of the power supply. In addition, through the operation of the comparator, the time point of the signal modulation can correspond to the switching period of the coil voltage, and the processor can start or stop the signal modulation at a specific time point according to the comparison result of the comparator, so that each modulated signal can be The signal amplitude of the same amplitude is generated on the coil to improve the accuracy of the signal discrimination at the power supply end. In addition, the processor can also determine whether to start operation according to the switching of the coil voltage through the comparator, instead of determining the magnitude of the received voltage, so that there is no need to set a switch between the voltage stabilizing capacitor and the processor to control the processor. Working voltage. Furthermore, through the circuit structure of the power receiving module of the present invention, the rectifying transistor can be controlled by the rectifying control module to simultaneously achieve high current withstand capability and high rectification switching speed. The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should be within the scope of the present invention.
W1_1、W1_2、W2_1、W2_2、W6_1、W6_2、W6_3、W7_1、W7_2、W7_3、W7_4、W7_5、W7_6、W8_1、W8_2、W8_3、W8_4、W8_5、W8_6‧‧‧波形
30‧‧‧受電模組
300‧‧‧感應線圈
R1、R2‧‧‧整流控制模組
M1、M2‧‧‧調制控制模組
11、21‧‧‧整流二極體
12、22‧‧‧整流電晶體
121、221‧‧‧保護二極體
40‧‧‧穩壓器
41‧‧‧穩壓電容
W1_1, W1_2, W2_1, W2_2, W6_1, W6_2, W6_3, W7_1, W7_2, W7_3, W7_4, W7_5, W7_6, W8_1, W8_2, W8_3, W8_4, W8_5, W8_6‧‧‧ waveform
30‧‧‧Power-receiving module
300‧‧‧Induction coil
R1, R2‧‧‧ Rectifier Control Module
M1, M2‧‧‧ modulation control module
11, 21 ‧ ‧ rectifying diode
12, 22‧‧‧ rectifying transistor
121, 221‧ ‧ protective diodes
40‧‧‧Regulator
41‧‧‧Steady capacitor
50‧‧‧電源輸出端 50‧‧‧Power output
60‧‧‧處理器 60‧‧‧ processor
61‧‧‧整流二極體 61‧‧‧Rected diode
62‧‧‧濾波電容 62‧‧‧Filter capacitor
71‧‧‧比較器 71‧‧‧ Comparator
72‧‧‧參考電壓產生器 72‧‧‧Reference voltage generator
S1‧‧‧感應線圈之第一端 The first end of the S1‧‧‧ induction coil
S2‧‧‧感應線圈之第二端 S2‧‧‧ second end of the induction coil
S12、S22‧‧‧整流控制訊號 S12, S22‧‧‧ rectification control signals
C13、C23‧‧‧調制控制訊號 C13, C23‧‧‧ modulation control signals
C14、C24‧‧‧整流關閉訊號 C14, C24‧‧‧ rectification off signal
VS‧‧‧線圈電壓 VS‧‧‧ coil voltage
Vref‧‧‧參考電壓 Vref‧‧‧reference voltage
CR‧‧‧比較結果 CR‧‧‧ comparison results
13、23‧‧‧調制電晶體 13, 23‧‧‧Modulated transistor
131、231‧‧‧調制負載電阻 131, 231‧‧‧ Modulated load resistor
14、24‧‧‧整流控制電晶體 14, 24 ‧ ‧ rectification control transistor
141、143、241、243‧‧‧電壓轉換電阻 141, 143, 241, 243‧‧‧ voltage conversion resistors
142、144、242、244‧‧‧加速放電二極體 142, 144, 242, 244‧‧‧ Accelerated discharge diodes
145、245‧‧‧保護二極體 145, 245‧ ‧ protective diodes
146、246‧‧‧整流關閉電晶體 146, 246‧‧ ‧ rectification off the transistor
90‧‧‧訊號調制流程 90‧‧‧ Signal Modulation Process
900~916‧‧‧步驟 900~916‧‧‧Steps
第1圖為訊號調制的波形示意圖。 第2圖為訊號調制之一調制區間的訊號波形示意圖。 第3圖為本發明實施例一受電模組之示意圖。 第4A圖及第4B圖分別為第3圖之調制控制模組之一種實施方式之示意圖。 第5A圖及第5B圖分別為第3圖之整流控制模組之一種實施方式之示意圖。 第6圖為在受電模組中進行訊號調制時訊號波形之示意圖。 第7圖為在受電模組中進行訊號調制時訊號波形之示意圖。 第8A圖及第8B圖為在受電模組中進行訊號調制時訊號波形之示意圖。 第9圖為本發明實施例一訊號調制流程之流程圖。Figure 1 is a waveform diagram of signal modulation. Figure 2 is a schematic diagram of the signal waveform of one of the modulation intervals of the signal modulation. FIG. 3 is a schematic diagram of a power receiving module according to an embodiment of the present invention. 4A and 4B are schematic views of an embodiment of the modulation control module of FIG. 3, respectively. 5A and 5B are schematic views of an embodiment of the rectification control module of FIG. 3, respectively. Figure 6 is a schematic diagram of the signal waveform when signal modulation is performed in the power receiving module. Figure 7 is a schematic diagram of the signal waveform when signal modulation is performed in the power receiving module. 8A and 8B are schematic diagrams of signal waveforms when signal modulation is performed in a power receiving module. FIG. 9 is a flow chart of a signal modulation process according to an embodiment of the present invention.
90‧‧‧訊號調制流程 90‧‧‧ Signal Modulation Process
900~916‧‧‧步驟 900~916‧‧‧Steps
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