TWI525853B - Light emitting diode device, manufacturing method thereof, and flip-chip light emitting diode device - Google Patents

Light emitting diode device, manufacturing method thereof, and flip-chip light emitting diode device Download PDF

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TWI525853B
TWI525853B TW101125864A TW101125864A TWI525853B TW I525853 B TWI525853 B TW I525853B TW 101125864 A TW101125864 A TW 101125864A TW 101125864 A TW101125864 A TW 101125864A TW I525853 B TWI525853 B TW I525853B
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semiconductor layer
substrate
light
doped semiconductor
type doped
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TW201405863A (en
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陳正言
蔡勝傑
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新世紀光電股份有限公司
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發光二極體元件、其製造方法及覆晶式發光二極體元 件 Light-emitting diode element, method of manufacturing the same, and flip-chip light-emitting diode element Piece

本發明是有關於一種光電元件及其製造方法,且特別是有關於一種發光二極體元件及其製造方法。 The present invention relates to a photovoltaic element and a method of fabricating the same, and more particularly to a light emitting diode element and a method of fabricating the same.

自湯瑪斯.愛迪生發明白熾燈(incandescent lamp)起,世界已廣泛使用電力進行照明,迄今更發展出高亮度且耐用的照明裝置,如螢光燈(fluorescent lamp)。相較於白熾燈泡,螢光燈具有高效率與低工作溫度之優點。然而,螢光燈中含有重金屬(汞),於廢棄時易對環境造成傷害。隨著照明技術的發展,一種更為節能環保的光源,即發光二極體(light emitting diode),已被開發出來。發光二極體藉由在P-N接面中重組電子與電洞來發光。相較於白熾燈或螢光燈,發光二極體具有低消耗功率(power consumption)及長壽命的優點。此外,發光二極體不需使用汞而更為環保。 Since Thomas. Since Edison invented the incandescent lamp, the world has widely used electric lighting, and has developed a high-brightness and durable lighting device such as a fluorescent lamp. Fluorescent lamps have the advantages of high efficiency and low operating temperature compared to incandescent bulbs. However, fluorescent lamps contain heavy metals (mercury), which can cause environmental damage when discarded. With the development of lighting technology, a more energy-saving and environmentally friendly light source, namely a light emitting diode, has been developed. The light-emitting diode emits light by recombining electrons and holes in the P-N junction. Compared to incandescent or fluorescent lamps, light-emitting diodes have the advantages of low power consumption and long life. In addition, the light-emitting diodes are more environmentally friendly without the use of mercury.

發光二極體元件的基本結構包含P型半導體磊晶層、N型半導體磊晶層及其間的發光層。發光二極體元件的發光效率高低係取決於發光層的量子效率以及發光二極體元件的光取出效率(light extraction efficiency)。增加量子效率的方法主要是改善發光層的磊晶品質及其結構設計,而增加光取出效率的關鍵則在於減少發光層所發出的光在發光二極體元件內部反射所造成的能量損失。為了提升發光二極體元件的發光效率,曾有習知技術在發光二極體元件中 製作光學微結構,並希望藉由此光學微結構增加發光二極體元件的光取出效率。這樣的結構雖能增加光的擴散效果,但其仍然不能達到良好的抗反射效果。 The basic structure of the light-emitting diode element includes a P-type semiconductor epitaxial layer, an N-type semiconductor epitaxial layer, and a light-emitting layer therebetween. The luminous efficiency of the light-emitting diode element depends on the quantum efficiency of the light-emitting layer and the light extraction efficiency of the light-emitting diode element. The method of increasing the quantum efficiency mainly improves the epitaxial quality of the luminescent layer and its structural design, and the key to increasing the light extraction efficiency is to reduce the energy loss caused by the reflection of the light emitted by the luminescent layer inside the luminescent diode element. In order to improve the luminous efficiency of the light-emitting diode element, there have been conventional techniques in the light-emitting diode element. An optical microstructure is fabricated and it is desirable to increase the light extraction efficiency of the light emitting diode element by the optical microstructure. Although such a structure can increase the diffusion effect of light, it still cannot achieve a good anti-reflection effect.

本發明提供一種發光二極體元件,其具有高光提取效率(light extraction efficiency)。 The present invention provides a light emitting diode element having high light extraction efficiency.

本發明提供一種覆晶式發光二極體元件,其亦具有高光提取效率。 The present invention provides a flip chip type light emitting diode element which also has high light extraction efficiency.

本發明提供一種發光二極體元件的製造方法,其可製造出具有高光提取效率之發光二極體元件。 The present invention provides a method of manufacturing a light-emitting diode element which can produce a light-emitting diode element having high light extraction efficiency.

本發明之一實施例提出一種發光二極體元件,包括基板、未摻雜半導體層、第一型摻雜半導體層、第二型摻雜半導體層、發光層、第一電極以及第二電極。基板具有相對之第一表面與第二表面且包括多個光學微結構。這些光學微結構間設有多個空隙,且這些光學微結構配置於第二表面。未摻雜半導體層配置於基板的第一表面上。第一型摻雜半導體層配置於未摻雜半導體層上。第二型摻雜半導體層配置於第一型摻雜半導體層上。發光層配置於第一型摻雜半導體層與第二型摻雜半導體層之間。第一電極配置於第一型摻雜半導體層上,且與第一型摻雜半導體層電性連接。第二電極配置於第二型摻雜半導體層上且與第二型摻雜半導體層電性連接。各光學微結構之高度h滿足下式: An embodiment of the present invention provides a light emitting diode element including a substrate, an undoped semiconductor layer, a first type doped semiconductor layer, a second type doped semiconductor layer, a light emitting layer, a first electrode, and a second electrode. The substrate has opposing first and second surfaces and includes a plurality of optical microstructures. A plurality of voids are disposed between the optical microstructures, and the optical microstructures are disposed on the second surface. The undoped semiconductor layer is disposed on the first surface of the substrate. The first type doped semiconductor layer is disposed on the undoped semiconductor layer. The second type doped semiconductor layer is disposed on the first type doped semiconductor layer. The light emitting layer is disposed between the first type doped semiconductor layer and the second type doped semiconductor layer. The first electrode is disposed on the first type doped semiconductor layer and electrically connected to the first type doped semiconductor layer. The second electrode is disposed on the second type doped semiconductor layer and electrically connected to the second type doped semiconductor layer. The height h of each optical microstructure satisfies the following formula:

n eff =n a .(1-x)+n s x其中λ為發光層所發出之光束的中心波長,na為在基板外且相鄰於第二表面的介質之折射率,ns為基板之折射率,x為光學微結構在第二表面上所佔的面積之比值。 n eff = n a . (1- x )+ n s . x where λ is the center wavelength of the light beam emitted by the light-emitting layer, n a is the refractive index of the medium outside the substrate and adjacent to the second surface, n s is the refractive index of the substrate, and x is the optical microstructure on the second surface The ratio of the area occupied.

本發明之另一實施例提出一種覆晶式發光二極體元件,包括封裝基板以及發光二極體元件。發光二極體元件包括基板、未摻雜半導體層、第一型摻雜半導體層、第二型摻雜半導體層、發光層、第一電極、第二電極。基板具有相對之第一表面與第二表面,且包括多個光學微結構。這些光學微結構間設有多個空隙,且這些光學微結構配置於第二表面。未摻雜半導體層配置於基板的第一表面上。第一型摻雜半導體層配置於未摻雜半導體層上。第二型摻雜半導體層配置於第一型摻雜半導體層上。發光層配置於第一型摻雜半導體層與第二型摻雜半導體層之間。第一電極配置於第一型摻雜半導體層上,且與第一型摻雜半導體層電性連接。第二電極配置於第二型摻雜半導體層上,且與第二型摻雜半導體層電性連接。各光學微結構之高度h滿足下式: Another embodiment of the present invention provides a flip-chip light emitting diode device including a package substrate and a light emitting diode element. The light emitting diode element includes a substrate, an undoped semiconductor layer, a first type doped semiconductor layer, a second type doped semiconductor layer, a light emitting layer, a first electrode, and a second electrode. The substrate has opposing first and second surfaces and includes a plurality of optical microstructures. A plurality of voids are disposed between the optical microstructures, and the optical microstructures are disposed on the second surface. The undoped semiconductor layer is disposed on the first surface of the substrate. The first type doped semiconductor layer is disposed on the undoped semiconductor layer. The second type doped semiconductor layer is disposed on the first type doped semiconductor layer. The light emitting layer is disposed between the first type doped semiconductor layer and the second type doped semiconductor layer. The first electrode is disposed on the first type doped semiconductor layer and electrically connected to the first type doped semiconductor layer. The second electrode is disposed on the second type doped semiconductor layer and electrically connected to the second type doped semiconductor layer. The height h of each optical microstructure satisfies the following formula:

n eff =n a .(1-x)+n s x其中λ為發光層所發出之光束的中心波長,na為在基板外且相鄰於第二表面的介質之折射率,ns為基板之折射率,x為光學微結構在第二表面上所佔的面積之比值。 n eff = n a . (1- x )+ n s . x where λ is the center wavelength of the light beam emitted by the light-emitting layer, n a is the refractive index of the medium outside the substrate and adjacent to the second surface, n s is the refractive index of the substrate, and x is the optical microstructure on the second surface The ratio of the area occupied.

本發明之又一實施例提出一種發光二極體元件的製造方法包括下列步驟。提供基板,基板具有相對之第一表面與第二表面。於基板之第一表面上形成未摻雜半導體層。於未摻雜半導體層上形成第一型摻雜半導體層。於第一型摻雜半導體層上形成發光層。於發光層上形成第二型摻雜半導體層。分別於第一型摻雜半導體層上及第二型摻雜半導體層上形成第一電極與第二電極。圖案化基板之第二表面,以形成多個光學微結構,其中這些光學微結構間設有多個空隙。 Yet another embodiment of the present invention provides a method of fabricating a light emitting diode device comprising the following steps. A substrate is provided, the substrate having opposing first and second surfaces. An undoped semiconductor layer is formed on the first surface of the substrate. A first type doped semiconductor layer is formed on the undoped semiconductor layer. A light emitting layer is formed on the first type doped semiconductor layer. A second type doped semiconductor layer is formed on the light emitting layer. A first electrode and a second electrode are formed on the first type doped semiconductor layer and the second type doped semiconductor layer, respectively. The second surface of the substrate is patterned to form a plurality of optical microstructures, wherein a plurality of voids are provided between the optical microstructures.

基於上述,依本發明之實施例之發光二極體元件的製造方法可在基板的第二表面上形成彼此間有空隙的光學微結構,而這些光學微結構可減少光被第二表面反射而局限於發光二極體元件內部的情形,進而提升發光二極體元件的光提取效率。在本發明之實施例之發光二極體元件及覆晶式發光二極體元件中,由於基板的第二表面上設有光學微結構,且這些光學微結構間設有多個空隙,因此這些光學微結構可減少光被第二表面反射而局限於發光二極體元件及覆晶式發光二極體元件內部的情形,進而提升發光二極體元件的光提取效率。 Based on the above, the method of fabricating a light-emitting diode element according to an embodiment of the present invention can form optical microstructures having voids between each other on the second surface of the substrate, and the optical microstructures can reduce light reflection by the second surface. It is limited to the inside of the light-emitting diode element, thereby improving the light extraction efficiency of the light-emitting diode element. In the light-emitting diode element and the flip-chip light-emitting diode element of the embodiment of the invention, since the optical microstructure is provided on the second surface of the substrate, and a plurality of voids are provided between the optical microstructures, The optical microstructure can reduce the light being reflected by the second surface and is limited to the inside of the light-emitting diode element and the flip-chip light-emitting diode element, thereby improving the light extraction efficiency of the light-emitting diode element.

為讓本發明之上述特徵和優點能更明顯易懂,下文特舉實施例,並配合所附圖式作詳細說明如下。 The above described features and advantages of the present invention will be more apparent from the following description.

圖1A為本發明一實施例之發光二極體元件的剖面示 意圖。請參照圖1A,本實施例之發光二極體元件100包括基板110、未摻雜半導體層190、第一型摻雜半導體層120、第二型摻雜半導體層130、發光層140、第一電極150、第二電極160。在本實施例中,基板110可為藍寶石(sapphire)基板,但本發明不以上述為限。 1A is a cross-sectional view showing a light emitting diode device according to an embodiment of the present invention; intention. Referring to FIG. 1A, the LED component 100 of the present embodiment includes a substrate 110, an undoped semiconductor layer 190, a first type doped semiconductor layer 120, a second type doped semiconductor layer 130, a light emitting layer 140, and a first Electrode 150 and second electrode 160. In the present embodiment, the substrate 110 may be a sapphire substrate, but the invention is not limited thereto.

本實施例之基板110具有相對之兩表面110a、110b。本實施例之未摻雜半導體層190配置於基板110的表面110a上。第一型摻雜半導體層120配置於未摻雜半導體層190上。本實施例之第二型摻雜半導體層130配置於第一型摻雜半導體層120上。本實施例之發光層140配置於第一型摻雜半導體層120與第二型摻雜半導體層130之間。第一電極150配置於第一型摻雜半導體層120上且與第一型摻雜半導體層120電性連接。第二電極160配置於第二型摻雜半導體層130上且與第二型摻雜半導體層130電性連接。 The substrate 110 of this embodiment has opposite surfaces 110a, 110b. The undoped semiconductor layer 190 of the present embodiment is disposed on the surface 110a of the substrate 110. The first type doped semiconductor layer 120 is disposed on the undoped semiconductor layer 190. The second type doped semiconductor layer 130 of the present embodiment is disposed on the first type doped semiconductor layer 120. The light emitting layer 140 of the present embodiment is disposed between the first type doped semiconductor layer 120 and the second type doped semiconductor layer 130. The first electrode 150 is disposed on the first type doped semiconductor layer 120 and electrically connected to the first type doped semiconductor layer 120 . The second electrode 160 is disposed on the second type doped semiconductor layer 130 and electrically connected to the second type doped semiconductor layer 130 .

詳言之,本實施例之第一型摻雜半導體層120具有相連接之平台部122與下陷部124。平台部122的厚度D1大於下陷部124的厚度D2。發光層140與第二型摻雜半導體層130配置於平台部122上。第一電極150配置於下陷部124上。第二電極160配置於平台部122上。在本實施例中,第一型掺雜半導體層120例如為N型半導體層,而第二型掺雜130半導體層例如為P型半導體層。發光層140例如為氮化鎵(gallium nitride,GaN)層與氮化銦鎵(indium gallium nitride,InGaN)層交替堆疊的多重量子井結構 (Multiple Quantum Well,MQW)。然而,在其他實施例中,發光層140亦可以是量子井結構。第一電極150與第二電極160之材質為導電材料,其包括鈦、鋁、鉻、鉑、金、其他導電材料或這些材料的組合。但本發明不以上述為限。 In detail, the first type doped semiconductor layer 120 of the present embodiment has the connected land portion 122 and the depressed portion 124. The thickness D1 of the platform portion 122 is greater than the thickness D2 of the depressed portion 124. The light emitting layer 140 and the second type doped semiconductor layer 130 are disposed on the land portion 122. The first electrode 150 is disposed on the depressed portion 124. The second electrode 160 is disposed on the platform portion 122. In the present embodiment, the first type doped semiconductor layer 120 is, for example, an N type semiconductor layer, and the second type doped 130 semiconductor layer is, for example, a P type semiconductor layer. The luminescent layer 140 is, for example, a multiple quantum well structure in which a gallium nitride (GaN) layer and an indium gallium nitride (InGaN) layer are alternately stacked. (Multiple Quantum Well, MQW). However, in other embodiments, the luminescent layer 140 can also be a quantum well structure. The material of the first electrode 150 and the second electrode 160 is a conductive material including titanium, aluminum, chromium, platinum, gold, other conductive materials or a combination of these materials. However, the invention is not limited to the above.

圖1B為本發明之另一實施例之發光二極體元件100可為覆晶式發光二極體元件。換言之,發光二極體元件100倒覆於封裝基板180而與封裝基板180電性連接。更進一步地說,發光二極體元件100可藉由導電凸塊170與封裝基板180電性連接。二導電凸塊170分別配置於第一電極150及第二電極160上且分別與第一電極150及第二電極160電性連接。導電凸塊170位於基板110與封裝基板180之間。在本實施例中,封裝基板可為一電路板,而導電凸塊為共晶材料,第一電極150與第二電極160可透過共晶材料與此電路板連接。然而,本發明不限於此,在其他實施例中,發光二極體元件100可不包括導電凸塊170,而採用接合導線來接合第一電極150與封裝基板180以及接合第二電極160與封裝基板180,而此時第一電極150與第二電極160背對封裝基板180。 FIG. 1B shows a light-emitting diode element 100 according to another embodiment of the present invention, which may be a flip-chip light-emitting diode element. In other words, the light emitting diode element 100 is overlaid on the package substrate 180 and electrically connected to the package substrate 180 . Furthermore, the LED component 100 can be electrically connected to the package substrate 180 by the conductive bumps 170. The two conductive bumps 170 are respectively disposed on the first electrode 150 and the second electrode 160 and electrically connected to the first electrode 150 and the second electrode 160 respectively. The conductive bump 170 is located between the substrate 110 and the package substrate 180. In this embodiment, the package substrate can be a circuit board, and the conductive bumps are eutectic materials, and the first electrode 150 and the second electrode 160 can be connected to the circuit board through the eutectic material. However, the present invention is not limited thereto. In other embodiments, the LED component 100 may not include the conductive bump 170, but the bonding wire is used to bond the first electrode 150 with the package substrate 180 and the second electrode 160 and the package substrate. 180, while the first electrode 150 and the second electrode 160 face away from the package substrate 180.

值得特別注意的是,本實施例之基板110包括多個光學微結構112。光學微結構112可形成抗反射層。這些光學微結構112配置於表面110b上,且這些光學微結構112之間設有多個空隙H。光學微結構112為凸起結構。各光學微結構112之直徑可小於300奈米。更進一步地說,本實施例之各光學微結構之高度h滿足下式: It is worth noting that the substrate 110 of the present embodiment includes a plurality of optical microstructures 112. Optical microstructures 112 may form an anti-reflective layer. These optical microstructures 112 are disposed on the surface 110b, and a plurality of voids H are disposed between the optical microstructures 112. Optical microstructures 112 are raised structures. Each optical microstructure 112 can have a diameter of less than 300 nanometers. Furthermore, the height h of each optical microstructure of the embodiment satisfies the following formula:

n eff =n a .(1-x)+n s x其中λ為發光層140所發出之光束L的中心波長,na為在基板110外且相鄰於表面110b的介質之折射率,ns為基板110之折射率,x為所有光學微結構112在第二表面110b上所佔的面積之比值。舉例而言,較佳為0.35≦x≦0.5,而本實施例之光學微結構112之直徑d可介於25奈米至250奈米。 n eff = n a . (1- x )+ n s . x where λ is the center wavelength of the light beam L emitted by the light-emitting layer 140, n a is the refractive index of the medium outside the substrate 110 and adjacent to the surface 110b, n s is the refractive index of the substrate 110, and x is all optical microstructures The ratio of the area occupied by 112 on the second surface 110b. For example, it is preferably 0.35 ≦ x ≦ 0.5, and the diameter d of the optical microstructure 112 of the present embodiment may be between 25 nm and 250 nm.

本實施例之光學微結構112可形成抗反射層,藉由使用抗反射層於基板110與外部介質之間,則可避免折射率的突然變化,如此減少基板110與外部介質之邊界處的內反射光量,而使發光層140所發出之光束有效地自表面110b穿出。換言之,本實施例之光學微結構112可減少光束被表面110b反射回發光二極體元件100中的機率,進而有效地提升發光二極體元件100之光提取效率(light extraction efficiency)。 The optical microstructure 112 of the present embodiment can form an anti-reflection layer. By using an anti-reflection layer between the substrate 110 and the external medium, sudden changes in the refractive index can be avoided, thus reducing the inner boundary between the substrate 110 and the external medium. The amount of light is reflected so that the light beam emitted from the light-emitting layer 140 is effectively passed out from the surface 110b. In other words, the optical microstructure 112 of the present embodiment can reduce the probability that the light beam is reflected back into the light-emitting diode element 100 by the surface 110b, thereby effectively improving the light extraction efficiency of the light-emitting diode element 100.

圖2A至圖2K為本發明一實施例之發光二極體元件的製造流程示意圖。請參照圖2A,首先,提供一基板110,基板110具有相對之表面110a與表面110b。在本實施例中,基板110可藍寶石(sapphire)基板,但本發明不以上述為限。 2A to 2K are schematic views showing a manufacturing process of a light emitting diode element according to an embodiment of the present invention. Referring to FIG. 2A, first, a substrate 110 having an opposite surface 110a and a surface 110b is provided. In the present embodiment, the substrate 110 may be a sapphire substrate, but the invention is not limited to the above.

請依序參照圖2B至圖2G,接著,於基板110之第一表面110a上形成未摻雜半導體層190。然後,於未摻雜半 導體層190上形成第一型摻雜半導體層120。接著,於第一型摻雜半導體層120上形成發光層140。接著,於發光層140上形成第二型摻雜半導體層130。然後,蝕刻部份之第二型摻雜半導體層130、部份之發光層140以及部份之第一型摻雜半導體層120,以形成第一型摻雜半導體層120的平台區122與下陷區124,其中未被蝕刻的部分發光層140與部分第二型摻雜態半導體層130配置於平台區122上。之後,分別於第一型摻雜半導體層120上及第二型摻雜半導體層130上形成第一電極150與第二電極160。在本實施例中,第一電極150例如是形成於下陷區124上。接著,薄化基板110。薄化基板110之方法包括以機械研磨(mechanical polish)的方式研磨基板110的第二表面110b。在本實施例中,第一型掺雜半導體層120例如為N型半導體層,而第二型掺雜130半導體層例如為P型半導體層。發光層140例如為氮化鎵(gallium nitride,GaN)層與氮化銦鎵(indium gallium nitride,InGaN)層交替堆疊的多重量子井結構(Multiple Quantum Well,MQW)。然而,在其他實施例中,發光層140亦可以是量子井結構。第一電極150與第二電極160之材質為導電材料,其包括鈦、鋁、鉻、鉑、金、其他導電材料或這些材料的組合。但本發明不以上述為限。 Referring to FIG. 2B to FIG. 2G in sequence, an undoped semiconductor layer 190 is formed on the first surface 110a of the substrate 110. Then, in the undoped half A first type doped semiconductor layer 120 is formed on the conductor layer 190. Next, a light-emitting layer 140 is formed on the first-type doped semiconductor layer 120. Next, a second type doped semiconductor layer 130 is formed on the light emitting layer 140. Then, a portion of the second type doped semiconductor layer 130, a portion of the light emitting layer 140, and a portion of the first type doped semiconductor layer 120 are etched to form the land region 122 and the depressed portion of the first type doped semiconductor layer 120. A region 124 in which a portion of the light-emitting layer 140 that is not etched and a portion of the second-type doped-state semiconductor layer 130 are disposed on the land region 122. Thereafter, the first electrode 150 and the second electrode 160 are formed on the first type doped semiconductor layer 120 and the second type doped semiconductor layer 130, respectively. In the present embodiment, the first electrode 150 is formed, for example, on the depressed region 124. Next, the substrate 110 is thinned. The method of thinning the substrate 110 includes grinding the second surface 110b of the substrate 110 in a mechanical polish manner. In the present embodiment, the first type doped semiconductor layer 120 is, for example, an N type semiconductor layer, and the second type doped 130 semiconductor layer is, for example, a P type semiconductor layer. The light-emitting layer 140 is, for example, a multiple quantum well structure (MQW) in which a gallium nitride (GaN) layer and an indium gallium nitride (InGaN) layer are alternately stacked. However, in other embodiments, the luminescent layer 140 can also be a quantum well structure. The material of the first electrode 150 and the second electrode 160 is a conductive material including titanium, aluminum, chromium, platinum, gold, other conductive materials or a combination of these materials. However, the invention is not limited to the above.

接著,圖案化基板110之表面110b,以形成多個光學微結構112。這些光學微結構112間設有多個空隙H。以下將配合圖2H至圖2K詳細說明之。 Next, the surface 110b of the substrate 110 is patterned to form a plurality of optical microstructures 112. A plurality of voids H are provided between the optical microstructures 112. The details will be described below in conjunction with FIGS. 2H to 2K.

上段所述之形成光學微結構112的方法包括下列步驟。請參照圖2H,首先,於基板110之表面110b上形成金屬層200。在本實施例中,金屬層200之材質包括銀、鎳、鋁或金。請參照圖2I,接著,對金屬層200進行退火處理,以使金屬層200形成多個金屬微球210,其中金屬微球210固定於基板110之表面110b上。在本實施例中,退火處理包括雷射退火(laser anneal)或熱退火(thermal anneal)。退火處理之製程溫度可介於200℃至600℃。請參照圖2J,接著,金屬微球210為罩幕而蝕刻基板110之表面110b,而形成光學微結構112。這些光學微結構112間設有多個空隙。其中各該光學微結構之高度h滿足下式: The method of forming optical microstructures 112 described in the previous paragraph includes the following steps. Referring to FIG. 2H, first, a metal layer 200 is formed on the surface 110b of the substrate 110. In this embodiment, the material of the metal layer 200 includes silver, nickel, aluminum or gold. Referring to FIG. 2I, the metal layer 200 is annealed to form the metal layer 200 to form a plurality of metal microspheres 210, wherein the metal microspheres 210 are fixed on the surface 110b of the substrate 110. In this embodiment, the annealing treatment includes laser anneal or thermal anneal. The annealing process temperature can range from 200 ° C to 600 ° C. Referring to FIG. 2J, the metal microspheres 210 are etched to etch the surface 110b of the substrate 110 to form the optical microstructures 112. A plurality of voids are provided between the optical microstructures 112. The height h of each of the optical microstructures satisfies the following formula:

n eff =n a .(1-x)+n s x其中λ為該發光層所發出之一光束的中心波長,na為在該基板外且相鄰於該第二表面的介質之折射率,ns為該基板之折射率,x為該些光學微結構在該第二表面上所佔的面積之比值。在本實施例中,較佳為0.35≦x≦0.5。蝕刻基板110的方式可為濕蝕刻或是乾蝕刻,濕蝕刻之蝕刻液包括:硫酸(H2SO4)、磷酸(H3PO4)、及其組合,乾蝕刻則為感應耦合電漿蝕刻(ICP)。請參照圖2K,最後,移除金屬微球210。接著,劈裂基板110,而初步完成了本實施例之發光二極體元件100。 n eff = n a . (1- x )+ n s . x where λ is the center wavelength of a beam emitted by the luminescent layer, n a is the refractive index of the medium outside the substrate and adjacent to the second surface, n s is the refractive index of the substrate, x is the The ratio of the area occupied by the optical microstructure on the second surface. In the present embodiment, it is preferably 0.35 ≦ x ≦ 0.5. The etching of the substrate 110 may be wet etching or dry etching. The etching solution for wet etching includes: sulfuric acid (H 2 SO 4 ), phosphoric acid (H 3 PO 4 ), and combinations thereof, and dry etching is inductively coupled plasma etching. (ICP). Referring to FIG. 2K, finally, the metal microspheres 210 are removed. Next, the substrate 110 is cleaved, and the light-emitting diode element 100 of the present embodiment is initially completed.

需特別說明的是,在上段所述之形成光學微結構112 的方法中,可精準控制金屬微球210之大小,而可容易地控制所有光學微結構112在第二表面110b上所佔的面積之比值,進而使這些光學微結構112具有良好之抗反射作用。 It should be particularly noted that the optical microstructure 112 is formed as described in the above paragraph. In the method, the size of the metal microspheres 210 can be precisely controlled, and the ratio of the area occupied by all the optical microstructures 112 on the second surface 110b can be easily controlled, so that the optical microstructures 112 have good anti-reflection effects. .

另外,本實施例之發光二極體元件100可利用覆晶(flip chip)的方式來封裝。如圖2L所示,本實施例可利用導電凸塊170接合(bounding)第一電極150與封裝基板180及接合第二電極160與封裝基板180。如此一來,使用者便可透過封裝基板180操作本實施例之發光二極體元件100。 In addition, the light-emitting diode element 100 of the present embodiment can be packaged by means of a flip chip. As shown in FIG. 2L , the first bump 150 and the package substrate 180 and the second electrode 160 and the package substrate 180 are bonded by the conductive bumps 170 . In this way, the user can operate the light emitting diode element 100 of the embodiment through the package substrate 180.

綜上所述,依本發明之實施例之發光二極體元件的製造方法可在基板的第二表面上形成彼此間有空隙的光學微結構,而這些光學微結構可減少光被第二表面反射而局限於發光二極體元件內部的情形,進而提升發光二極體元件的光提取效率。在本發明之實施例之發光二極體元件及覆晶式發光二極體元件中,由於基板的第二表面上設有光學微結構,且這些光學微結構間設有多個空隙,因此這些光學微結構可減少光被第二表面反射而局限於發光二極體元件及覆晶式發光二極體元件內部的情形,進而提升發光二極體元件的光提取效率。 In summary, the method for fabricating a light-emitting diode element according to an embodiment of the present invention can form optical microstructures having voids on each other on the second surface of the substrate, and the optical microstructures can reduce light by the second surface. The reflection is limited to the inside of the light-emitting diode element, thereby improving the light extraction efficiency of the light-emitting diode element. In the light-emitting diode element and the flip-chip light-emitting diode element of the embodiment of the invention, since the optical microstructure is provided on the second surface of the substrate, and a plurality of voids are provided between the optical microstructures, The optical microstructure can reduce the light being reflected by the second surface and is limited to the inside of the light-emitting diode element and the flip-chip light-emitting diode element, thereby improving the light extraction efficiency of the light-emitting diode element.

雖然本發明已以實施例揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明之精神和範圍內,當可作些許之更動與潤飾,故本發明之保護範圍當視後附之申請專利範圍所界定者為準。 Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims.

100‧‧‧發光二極體元件 100‧‧‧Lighting diode components

110‧‧‧基板 110‧‧‧Substrate

110a、110b‧‧‧表面 110a, 110b‧‧‧ surface

112‧‧‧光學微結構 112‧‧‧Optical microstructure

120‧‧‧第一型摻雜半導體層 120‧‧‧First type doped semiconductor layer

122‧‧‧平台部 122‧‧‧ Platform Department

124‧‧‧下陷部 124‧‧‧Sag

130‧‧‧第二型摻雜半導體層 130‧‧‧Second type doped semiconductor layer

140‧‧‧發光層 140‧‧‧Lighting layer

150‧‧‧第一電極 150‧‧‧first electrode

160‧‧‧第二電極 160‧‧‧second electrode

170‧‧‧導電凸塊 170‧‧‧Electrical bumps

180‧‧‧基座 180‧‧‧Base

190‧‧‧未摻雜半導體層 190‧‧‧Undoped semiconductor layer

200‧‧‧金屬層 200‧‧‧ metal layer

210‧‧‧金屬微球 210‧‧‧Metal Microspheres

D1、D2‧‧‧厚度 D1, D2‧‧‧ thickness

d‧‧‧光學微結構直徑 d‧‧‧Optical microstructure diameter

g‧‧‧間距 G‧‧‧ spacing

H‧‧‧空隙 H‧‧‧Void

h‧‧‧光學微結構高度 h‧‧‧Optical microstructure height

圖1A、1B為本發明實施例之發光二極體元件的剖面示意圖。 1A and 1B are schematic cross-sectional views showing a light emitting diode device according to an embodiment of the present invention.

圖2A至圖2L為本發明一實施例之發光二極體元件的製造流程示意圖。 2A to 2L are schematic diagrams showing a manufacturing process of a light-emitting diode element according to an embodiment of the present invention.

110‧‧‧基板 110‧‧‧Substrate

110a、110b‧‧‧表面 110a, 110b‧‧‧ surface

112‧‧‧光學微結構 112‧‧‧Optical microstructure

120‧‧‧第一型摻雜半導體層 120‧‧‧First type doped semiconductor layer

130‧‧‧第二型摻雜半導體層 130‧‧‧Second type doped semiconductor layer

140‧‧‧發光層 140‧‧‧Lighting layer

150‧‧‧第一電極 150‧‧‧first electrode

160‧‧‧第二電極 160‧‧‧second electrode

190‧‧‧未摻雜半導體層 190‧‧‧Undoped semiconductor layer

210‧‧‧金屬微球 210‧‧‧Metal Microspheres

Claims (16)

一種發光二極體元件,包括:一基板,具有相對之一第一表面與一第二表面,且包括多個光學微結構,其中該些光學微結構間設有多個空隙,且該些光學微結構配置於該第二表面;一未摻雜半導體層,配置於該基板的該第一表面上;一第一型摻雜半導體層,配置於該未摻雜半導體層上;一第二型摻雜半導體層,配置於該第一型摻雜半導體層上;一發光層,配置於該第一型摻雜半導體層與該第二型摻雜半導體層之間;一第一電極,配置於該第一型摻雜半導體層上,且與該第一型摻雜半導體層電性連接;以及一第二電極,配置於該第二型摻雜半導體層上,且與該第二型摻雜半導體層電性連接,其中各該光學微結構之高度h滿足下式: n eff =n a .(1-x)+n s x其中λ為該發光層所發出之一光束的中心波長,na為在該基板外且相鄰於該第二表面的介質之折射率,ns為該基板之折射率,x為該些光學微結構在該第二表面上所佔的面積之比值。 A light emitting diode device comprising: a substrate having a first surface and a second surface, and comprising a plurality of optical microstructures, wherein the plurality of optical structures are provided with a plurality of spaces, and the optical The microstructure is disposed on the second surface; an undoped semiconductor layer is disposed on the first surface of the substrate; a first type doped semiconductor layer is disposed on the undoped semiconductor layer; a doped semiconductor layer disposed on the first type doped semiconductor layer; a light emitting layer disposed between the first type doped semiconductor layer and the second type doped semiconductor layer; a first electrode disposed on The first type doped semiconductor layer is electrically connected to the first type doped semiconductor layer; and a second electrode is disposed on the second type doped semiconductor layer and doped with the second type The semiconductor layer is electrically connected, wherein the height h of each of the optical microstructures satisfies the following formula: n eff = n a . (1- x )+ n s . x where λ is the center wavelength of a beam emitted by the luminescent layer, n a is the refractive index of the medium outside the substrate and adjacent to the second surface, n s is the refractive index of the substrate, x is the The ratio of the area occupied by the optical microstructure on the second surface. 如申請專利範圍第1項所述之發光二極體元件,其中0.35≦x≦0.5。 The light-emitting diode element according to claim 1, wherein 0.35≦x≦0.5. 如申請專利範圍第1項所述之發光二極體元件,其中該些光學微結構形成一抗反射層。 The luminescent diode component of claim 1, wherein the optical microstructures form an anti-reflective layer. 如申請專利範圍第1項所述之發光二極體元件,其中各該光學微結構之直徑小於300奈米。 The luminescent diode component of claim 1, wherein each of the optical microstructures has a diameter of less than 300 nm. 如申請專利範圍第1項所述之發光二極體元件,其中該第一型摻雜半導體層具有相連接之一平台部與一下陷部,該平台部的厚度大於該下陷部的厚度,該發光層與該第二型摻雜半導體層配置於該平台部上,且該第一電極配置於該下陷部上。 The light-emitting diode element according to claim 1, wherein the first-type doped semiconductor layer has a platform portion and a lower trap portion, and the thickness of the land portion is greater than a thickness of the depressed portion. The light emitting layer and the second type doped semiconductor layer are disposed on the land portion, and the first electrode is disposed on the depressed portion. 一種覆晶式發光二極體元件,包括:一封裝基板;一發光二極體元件,倒覆於該封裝基板而與該封裝基板電性連接,該發光二極體元件包括:一基板,具有相對之一第一表面與一第二表面,且包括多個光學微結構,其中該些光學微結構間設有多個空隙,且該些光學微結構配置於該第二表面;一未摻雜半導體層,配置於該基板的該第一表面上;一第一型摻雜半導體層,配置於該未摻雜半導體層上;一第二型摻雜半導體層,配置於該第一型摻雜半導體層上;一發光層,配置於該第一型摻雜半導體層與該第二型 摻雜半導體層之間;一第一電極,配置於該第一型摻雜半導體層上,且與該第一型摻雜半導體層電性連接;以及一第二電極,配置於該第二型摻雜半導體層上,且與該第二型摻雜半導體層電性連接;其中各該光學微結構之高度h滿足下式: n eff =n a .(1-x)+n s x其中λ為該發光層所發出之一光束的中心波長,na為在該基板外且相鄰於該第二表面的介質之折射率,ns為該基板之折射率,x為該些光學微結構在該第二表面上所佔的面積之比值。 A flip-chip light-emitting diode component, comprising: a package substrate; a light-emitting diode component electrically connected to the package substrate and electrically connected to the package substrate, the light-emitting diode component comprising: a substrate having a first surface and a second surface, and comprising a plurality of optical microstructures, wherein the plurality of optical structures are disposed between the optical microstructures, and the optical microstructures are disposed on the second surface; a semiconductor layer disposed on the first surface of the substrate; a first type doped semiconductor layer disposed on the undoped semiconductor layer; and a second type doped semiconductor layer disposed on the first type doping On the semiconductor layer, a light-emitting layer is disposed between the first-type doped semiconductor layer and the second-type doped semiconductor layer; a first electrode is disposed on the first-type doped semiconductor layer, and The first type of doped semiconductor layer is electrically connected; and a second electrode is disposed on the second type doped semiconductor layer and electrically connected to the second type doped semiconductor layer; wherein each of the optical microstructures The height h satisfies the following formula: n eff = n a . (1- x )+ n s . x where λ is the center wavelength of a beam emitted by the luminescent layer, n a is the refractive index of the medium outside the substrate and adjacent to the second surface, n s is the refractive index of the substrate, x is the The ratio of the area occupied by the optical microstructure on the second surface. 如申請專利範圍第6項所述之發光二極體元件,其中0.35≦x≦0.5。 The light-emitting diode element according to claim 6, wherein 0.35 ≦ x ≦ 0.5. 如申請專利範圍第6項所述之覆晶式發光二極體元件,其中該些光學微結構形成一抗反射層。 The flip-chip light-emitting diode element of claim 6, wherein the optical microstructures form an anti-reflection layer. 如申請專利範圍第6項所述之覆晶式發光二極體元件,其中該發光二極體元件係藉由導電凸塊與該封裝基板電性連接。 The flip-chip light emitting diode device of claim 6, wherein the light emitting diode device is electrically connected to the package substrate by a conductive bump. 如申請專利範圍第9項所述之覆晶式發光二極體元件,其中該導電凸塊係為共晶材料。 The flip-chip light-emitting diode element according to claim 9, wherein the conductive bump is a eutectic material. 一種發光二極體元件的製造方法,包括:提供一基板,該基板具有相對之一第一表面與一第二 表面;於該基板之該第一表面上形成一未摻雜半導體層;於該未摻雜半導體層上形成一第一型摻雜半導體層;於該第一型摻雜半導體層上形成一發光層;於該發光層上形成一第二型摻雜半導體層;於該第一型摻雜半導體層上及該第二型摻雜半導體層上分別形成一第一電極與一第二電極;以及圖案化該基板之第二表面,以形成多個光學微結構,其中該些光學微結構間設有多個空隙,其中形成該些光學微結構的方法,包括:於該基板之該第二表面上形成一金屬層;對該金屬層進行一退火處理,以使該金屬層形成多個金屬微球,其中該些金屬微球固定於該基板之該第二表面上;以該些金屬微球為罩幕而蝕刻該基板之該第二表面,以形成該些光學微結構;以及移除該些金屬微球。 A method of fabricating a light emitting diode device, comprising: providing a substrate having a first surface and a second a surface; an undoped semiconductor layer is formed on the first surface of the substrate; a first type doped semiconductor layer is formed on the undoped semiconductor layer; and a light is formed on the first type doped semiconductor layer Forming a second type doped semiconductor layer on the light emitting layer; forming a first electrode and a second electrode on the first type doped semiconductor layer and the second type doped semiconductor layer; Patterning a second surface of the substrate to form a plurality of optical microstructures, wherein the plurality of optical microstructures are provided with a plurality of voids, wherein the method of forming the optical microstructures comprises: the second surface of the substrate Forming a metal layer thereon; annealing the metal layer to form the metal layer to form a plurality of metal microspheres, wherein the metal microspheres are fixed on the second surface of the substrate; and the metal microspheres The second surface of the substrate is etched for masking to form the optical microstructures; and the metal microspheres are removed. 如申請專利範圍第11項所述之發光二極體元件的製造方法,其中該金屬層之材質包括:銀、鎳、鋁或金。 The method for manufacturing a light-emitting diode element according to claim 11, wherein the material of the metal layer comprises silver, nickel, aluminum or gold. 如申請專利範圍第11項所述之發光二極體元件的製造方法,其中該退火處理包括雷射退火(laser anneal)或熱退火(thermal anneal)。 The method of fabricating a light-emitting diode element according to claim 11, wherein the annealing treatment comprises laser anneal or thermal anneal. 如申請專利範圍第11項所述之發光二極體元件的製造方法,其中該退火處理之製程溫度介於200℃至600℃。 The method of manufacturing a light-emitting diode element according to claim 11, wherein the annealing process has a process temperature of from 200 ° C to 600 ° C. 如申請專利範圍第11項所述之發光二極體元件的製造方法,更包括:在圖案化該基板之第二表面前,薄化該基板。 The method for fabricating a light-emitting diode element according to claim 11, further comprising: thinning the substrate before patterning the second surface of the substrate. 如申請專利範圍第15項所述之發光二極體元件的製造方法,其中薄化該基板之方法包括:以機械研磨的方式研磨該基板的該第二表面。 The method of manufacturing a light-emitting diode element according to claim 15, wherein the method of thinning the substrate comprises: grinding the second surface of the substrate by mechanical grinding.
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