TWI524555B - Shunting layer arrangement for leds - Google Patents

Shunting layer arrangement for leds Download PDF

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TWI524555B
TWI524555B TW100128409A TW100128409A TWI524555B TW I524555 B TWI524555 B TW I524555B TW 100128409 A TW100128409 A TW 100128409A TW 100128409 A TW100128409 A TW 100128409A TW I524555 B TWI524555 B TW I524555B
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metal
metal contacts
shunt
wire bond
led die
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TW100128409A
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TW201308670A (en
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東尼 洛培茲
拉菲爾 伊格奈修 艾爾達茲
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皇家飛利浦電子股份有限公司
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Description

發光二極體之分流層配置 Diverter configuration of light-emitting diode

本發明係關於發光二極體(LED),且特定言之,本發明係關於一種改良電流分佈但不增加光阻擋之LED晶粒之發光表面上之圖案化金屬層。 The present invention relates to light emitting diodes (LEDs) and, in particular, to a patterned metal layer on a light emitting surface of an LED die that improves current distribution without increasing light blocking.

先前技術之圖1係一LED晶粒10之一俯視圖,且圖2係沿圖1中之線2-2之LED晶粒10之一簡化橫截面圖。在實例中,LED晶粒10係基於GaN且使其生長基板移除。結構已為人所熟知。通常,一底部金屬陽極12係直接接合至一子基板墊或一電路板。電極12上之一金屬反射器14使光向上反射。LED晶粒之磊晶生長半導體層包含一第一p型層16、一p型包覆層18、一作用層20、一n型包覆層22、一第一n型層24及一第二n型層26。介於包覆層與金屬接點之間之各種p型及n型層可具有不同摻雜量及不同構成以實現不同功能,諸如晶格匹配及電流散佈。可具有更多層。半導體層係透明的。 Figure 1 of the prior art is a top view of one of the LED dies 10, and Figure 2 is a simplified cross-sectional view of one of the LED dies 10 along line 2-2 of Figure 1. In an example, the LED die 10 is based on GaN and has its growth substrate removed. The structure is well known. Typically, a bottom metal anode 12 is bonded directly to a sub-substrate pad or a circuit board. One of the metal reflectors 14 on the electrode 12 reflects the light upward. The epitaxial growth semiconductor layer of the LED die comprises a first p-type layer 16, a p-type cladding layer 18, an active layer 20, an n-type cladding layer 22, a first n-type layer 24 and a second N-type layer 26. The various p-type and n-type layers between the cladding layer and the metal contacts can have different doping amounts and different compositions to achieve different functions, such as lattice matching and current spreading. There can be more layers. The semiconductor layer is transparent.

一透明電流散佈層28係形成於第二n型層26上,且一金屬陰極30係電連接至電流散佈層28之一邊緣。一引線(圖中未展示)係接合至陽極30。電流散佈層材料係經選擇以具有低光損失、低電阻率及良好電接觸。適合於電流散佈層28之材料包含銦錫氧化物、鋅氧化物或其他透明導電氧化物。電流散佈層28僅數微米厚,因此具有一低垂直電阻及一極高側向電阻。重要的是p型包覆層18及n型包覆層22 上之電流分佈相當均勻以實現橫穿作用層20之均勻光產生。 A transparent current spreading layer 28 is formed on the second n-type layer 26, and a metal cathode 30 is electrically connected to one of the edges of the current spreading layer 28. A lead (not shown) is bonded to the anode 30. The current spreading layer material is selected to have low light loss, low electrical resistivity, and good electrical contact. Materials suitable for the current spreading layer 28 comprise indium tin oxide, zinc oxide or other transparent conductive oxide. Current spreading layer 28 is only a few microns thick and therefore has a low vertical resistance and a very high lateral resistance. What is important is the p-type cladding layer 18 and the n-type cladding layer 22 The current distribution thereon is fairly uniform to achieve uniform light generation across the active layer 20.

為補償電流散佈層28之較高側向電阻,一低電阻金屬分流層32係經圖案化以延伸穿過電流散佈層28但僅阻擋少量光。使電流擁擠最小化與使光阻擋最小化之間存在一權衡。圖1中所示之分流圖案具典型性,其中沿LED晶粒10之周邊之金屬匯流條及垂直金屬匯流條將該等層連接。形成非常窄之此等分流條以使光阻擋最小化。 To compensate for the higher lateral resistance of the current spreading layer 28, a low resistance metal shunt layer 32 is patterned to extend through the current spreading layer 28 but only blocks a small amount of light. There is a trade-off between minimizing current crowding and minimizing light blocking. The shunt pattern shown in Figure 1 is typical in that the metal bus bars and the vertical metal bus bars along the periphery of the LED die 10 are connected to the layers. These shunt bars are formed to be very narrow to minimize light blocking.

圖2展示以粗箭頭36表示之通過LED晶粒10之電流及以細箭頭38表示之一些光子軌道。圖中亦展示一簡化發射光圖案39。 2 shows the current through the LED die 10 as indicated by the thick arrow 36 and some of the photon tracks indicated by the thin arrow 38. A simplified emission light pattern 39 is also shown.

LED晶粒10之頂面係經粗糙化以增加光提取。 The top surface of the LED die 10 is roughened to increase light extraction.

習知分流設計之一問題在於細分流條展示條與電流散佈層28之界面處之一接觸電阻,其中該接觸電阻係與條之寬度直接相關。 One problem with conventional shunt designs is the contact resistance at one of the interfaces of the subdivided stream bar and the current spreading layer 28, wherein the contact resistance is directly related to the width of the strip.

對於以如圖1中所示之匯流條為特徵之一圖案化分流層之特定情況,三個內交叉匯流條之一者之接觸電阻可表達為: For the particular case of patterning the shunt layer as one of the features of the bus bar as shown in Figure 1, the contact resistance of one of the three inner cross-bundle bars can be expressed as:

其中Rs係電流散佈層28之薄片電阻(以每方形歐姆(Ω/□)為單位),L係匯流條區段之長度,w係匯流條之寬度,且Lt係傳遞長度,表達為單位長度。傳遞長度係定義為: Wherein R s is the sheet resistance of the current spreading layer 28 (in units of square ohms (Ω / □)), the length of the L-series bus bar section, w is the width of the bus bar, and the L t transmission length is expressed as unit length. The transfer length is defined as:

其中ρc係金屬半導體界面之接觸電阻率,以歐姆平方米(Ω.m2)為單位。 The contact resistivity of the ρ c- based metal semiconductor interface is in units of ohm square meters (Ω·m 2 ).

如所熟知,一導電層與一金屬接點之間之側向電流不均勻地橫跨金屬接點。電壓在金屬接點之邊緣附近最高且隨距離而呈指數下降。電壓曲線之1/e距離係判定傳遞長度之另一方式。 As is well known, the lateral current between a conductive layer and a metal contact does not evenly traverse the metal contacts. The voltage is highest near the edge of the metal contact and exponentially decreases with distance. The 1/e distance of the voltage curve is another way of determining the transfer length.

圖3表示L=Lt時以正規化量w/Lt為函數之經Rs正規化之以上接觸電阻表達。曲線指示:在接觸寬度小於2Lt時,接觸電阻與w成反比例增大,如RC(ric)趨向於。另一方 面,在接觸寬度高於2Lt時,接觸電阻隨著趨向於1 而接近於量3 when L = L t represents normalized to the amount of w / L t is the contact resistance R s of expressing a function of normalized above. The curve indicates that when the contact width is less than 2L t , the contact resistance increases inversely proportional to w, such as R C(ric) tends to . On the other hand, when the contact width is higher than 2L t , the contact resistance follows Tend to 1 and close to the amount .

如所見,雖然窄寬度可期望阻擋較少光,但圖1中之匯流條之寬度不能太小,否則接觸電阻會非常高。 As can be seen, although the narrow width can be expected to block less light, the width of the bus bar in Figure 1 should not be too small, otherwise the contact resistance would be very high.

因此,期望減小一金屬分流層與電流散佈層之間之接觸電阻且不負面影響LED晶粒之光提取。相反地,期望增加LED晶粒之光提取且不減小一金屬分流層與電流散佈層之間之接觸電阻。亦期望改良橫跨LED晶粒之表面之電流分佈均勻度。 Therefore, it is desirable to reduce the contact resistance between a metal shunt layer and a current spreading layer without adversely affecting light extraction of the LED dies. Conversely, it is desirable to increase the light extraction of the LED dies without reducing the contact resistance between a metal shunt layer and the current spreading layer. It is also desirable to improve the uniformity of current distribution across the surface of the LED die.

本文中揭示在不減少光提取之情況下減小接觸電阻且改良電流分佈均勻度之各種金屬分流圖案。 Various metal shunt patterns that reduce contact resistance and improve current distribution uniformity without reducing light extraction are disclosed herein.

在一實施例中,分流圖案包括直徑寬於習知匯流條及交叉條之寬度但為2Lt至10Lt級以便不阻擋大量光之一陣列之金屬圓形點。在一實施例中,各點之半徑大於2Lt且小於 10Lt,且較佳為小於5Lt。點之總面積小於先前技術之匯流條及交叉條之總面積,所以光阻擋更少。可使用除圓形點以外之形狀,諸如多邊形(例如方形及矩形)。全部此等形狀在本文中均稱為點。 In one embodiment, the shunt pattern comprises metal circular dots having a diameter that is wider than the width of the conventional bus bar and the crossbar but that is in the order of 2 L t to 10 L t so as not to block an array of a large amount of light. In one embodiment, the radius of each point is greater than 2 L t and less than 10 L t , and preferably less than 5 L t . The total area of the dots is smaller than the total area of the prior art bus bars and cross bars, so the light blocking is less. Shapes other than circular points, such as polygons (such as squares and rectangles), can be used. All such shapes are referred to herein as points.

在一實施例中,對於所使用之典型金屬及所使用之電流散佈層,點之寬度(2Lt至10Lt之間)約為15微米以確保低接觸電阻。各點表示一電流注入區。通常,將具有用於良好電流分佈之每平方毫米50個至60個離散注入區之一密度。對於一最小2Lt寬度及每平方毫米50個方形點,一LED晶粒之頂面面積之約1%將由點覆蓋。對於1平方毫米之一大小的LED晶粒,點之總面積將約為0.01平方毫米。在一實施例中,由點覆蓋之一LED晶粒之頂面面積較佳為小於5%。 In one embodiment, a typical metal used for the current spreading layer and used, the width of point (between 2L t to 10L t) of about 15 microns to ensure low contact resistance. Each point represents a current injection zone. Typically, there will be a density of one of 50 to 60 discrete implant zones per square millimeter for a good current distribution. For a minimum 2 L t width and 50 square dots per square millimeter, about 1% of the top surface area of an LED die will be covered by dots. For an LED die of one size of 1 square millimeter, the total area of the dots will be approximately 0.01 square millimeters. In one embodiment, the top surface area of one of the LED dies covered by the dots is preferably less than 5%.

為使電流均勻分佈在LED晶粒之頂面上,點係與極細金屬連接器之一網格連接,其中金屬連接器與電流散佈層之間之接觸電阻由於連接器之寬度遠小於2Lt而較高,但因為電流係藉由點而注入,所以不影響電流注入。 In order to evenly distribute the current on the top surface of the LED die, the point system is meshed with one of the very fine metal connectors, wherein the contact resistance between the metal connector and the current spreading layer is much smaller than 2L t due to the width of the connector. Higher, but because the current is injected by the point, it does not affect the current injection.

由於點陣列,所以具有一較低總接觸電阻及較少光阻擋,因此改良LED晶粒之效率。 Due to the dot array, there is a lower total contact resistance and less light blocking, thus improving the efficiency of the LED die.

在一實施例中,一引線接合電極係形成於LED晶粒之頂面之中間附近以產生一更均勻電流分佈。 In one embodiment, a wire bond electrode is formed adjacent the middle of the top surface of the LED die to create a more uniform current distribution.

在一實施例中,除點陣列係藉由細金屬連接器之一網格而互連以外,一些點係經由徑向延伸細金屬連接器而亦連接至引線接合電極以導致點與引線接合電極之間之連接電阻更均勻。 In one embodiment, the point array is interconnected by a grid of fine metal connectors, some of which are also connected to the wire bond electrodes via radially extending thin metal connectors to cause point and wire bond electrodes The connection resistance between them is more uniform.

在一實施例中,點隨點更遠離引線接合電極而變大以產生LED晶粒之整個表面上之更均勻電流分佈。 In one embodiment, the dots become larger as the points are further away from the wire bond electrodes to produce a more uniform current distribution across the entire surface of the LED die.

在一實施例中,點隨點延伸遠離引線接合電極而越來越靠近以產生更均勻電流分佈。 In an embodiment, the dots extend closer to the wire bonding electrode as the dots extend closer to produce a more uniform current distribution.

在一實施例中,引線接合電極與電流散佈層之間存在一介電質以減少引線接合電極之周邊下方及周圍之電流擁擠。 In one embodiment, a dielectric is present between the wire bond electrode and the current spreading layer to reduce current crowding below and around the perimeter of the wire bond electrode.

在一替代實施例中且為避免使用引線接合電極與電流散佈層之間之一介電層,以一特定距離包圍引線接合電極之一同心分流環係用以減少引線接合電極之周邊下方及周圍之電流擁擠。 In an alternative embodiment and to avoid the use of a dielectric layer between the wire bond electrode and the current spreading layer, a concentric shunt ring system surrounding the wire bond electrode at a specific distance is used to reduce the perimeter and surroundings of the wire bond electrode perimeter The current is crowded.

在其中存在圍繞LED晶粒之頂面之周邊延伸之一分流條之一實施例中,條之寬度在拐角附近被減小以減少或消除拐角附近之電流擁擠。 In one embodiment in which there is one of the shunt bars extending around the perimeter of the top surface of the LED die, the width of the strip is reduced near the corner to reduce or eliminate current crowding near the corner.

在一實施例中,一有角鏡面結構係形成於各點及連接網格下方。各點及連接器下方之鏡面不僅使光反射遠離各點/連接器之吸收底側,且藉由使各點下方之作用層不產生光而避免各點正下方(及各連接器下方(較小程度而言))之任何電流擁擠。在一實施例中,各鏡面係形成於延伸穿過各點及連接器下方之作用層之溝槽中。 In one embodiment, a cornered mirror structure is formed at each point and below the connection grid. The mirrors underneath the dots and connectors not only reflect light away from the bottom side of the dots/connectors, but also avoid the dots directly below (and below the connectors) by causing the active layer below each point to not produce light. To a small extent)) any current crowded. In one embodiment, each mirror is formed in a groove extending through the points and the active layer below the connector.

本發明描述其他實施例。 Other embodiments of the invention are described.

相同或等效元件係以相同元件符號標記。 Identical or equivalent elements are labeled with the same element symbols.

圖4繪示根據本發明之一實施例之一LED晶粒之頂面上 之一金屬分流圖案40之一實施例。該LED晶粒可具有與圖2中之先前技術LED晶粒相同之層。 4 illustrates a top surface of an LED die according to an embodiment of the present invention. One embodiment of one of the metal shunt patterns 40. The LED die can have the same layer as the prior art LED die of FIG.

根據以上方程式1,藉由適當調整幾何參數w而控制沿匯流條進入半導體之電流注入之位置。圓形金屬接點42(點)係由於其等之實質上均勻電流圖案而較佳。半徑為rc之一圓形金屬接點之接觸電阻可表達如下: According to Equation 1 above, the position of the current injection into the semiconductor along the bus bar is controlled by appropriately adjusting the geometric parameter w. The round metal contacts 42 (dots) are preferred due to their substantially uniform current pattern. The contact resistance of a circular metal contact with a radius of r c can be expressed as follows:

在方程式3中,I0及I1分別為第一及第二類之修正Bessel函數。與匯流條之情況一樣,一圓形金屬接點之接觸電阻在rc<2Lt時急劇增大。因此,在較佳實施例中,各圓形金屬接點之半徑係介於約2Lt與10Lt之間。 In Equation 3, I0 and I1 are the modified Bessel functions of the first and second classes, respectively. As in the case of the bus bar, the contact resistance of a circular metal contact sharply increases at r c < 2L t . Thus, in a preferred embodiment, the radius of each of the circular metal contacts is between about 2 L t and 10 L t .

因此,一分流層圖案可由諸多幾何形狀組成,該等形狀之特性允許選擇性控制電流注入之位置但尺寸係受限制以不負面影響光輸出。此可用於(例如)改良通過裝置之作用層之電流均勻度且使金屬半導體接觸區最小。 Thus, a shunt pattern can be composed of a number of geometries that allow for selective control of the location of current injection but are limited in size to not adversely affect light output. This can be used, for example, to improve current uniformity across the active layer of the device and to minimize metal semiconductor contact regions.

窄金屬連接器44係配置成一網格以將金屬接點42連接在一起。連接器44具有較佳小於2Lt之寬度,因為其等無需將電流注入至LED晶粒中,且較寬連接器將增加光之阻擋。 The narrow metal connectors 44 are configured as a grid to connect the metal contacts 42 together. The connector 44 has a width preferably less than the 2L t, because it will be like without the current injected into the LED die, and the wider the connector block of light increases.

金屬接點42與連接器44較佳為提供低電阻之一多層金屬構成,但不遷移至半導體層中。 The metal contacts 42 and the connectors 44 are preferably constructed of a multilayer metal of low resistance, but do not migrate into the semiconductor layer.

圖5展示圖4之分流圖案,其中一較大引線接合電極46定位在LED晶粒表面之中間附近以使電流分佈實質上均勻。 電極46之尺寸較佳為一最小尺寸以實現一良好引線接合。 Figure 5 shows the shunt pattern of Figure 4 with a larger wire bond electrode 46 positioned near the middle of the LED die surface to provide a substantially uniform current distribution. The size of the electrode 46 is preferably a minimum size to achieve a good wire bond.

圖6展示圖5之分流圖案,其中額外徑向連接器48介於引線接合電極46與各種金屬接點42之間。此等徑向連接器48將一平行連接器路徑提供至外金屬接點42以使電流分佈更均勻,因為網格連接器44路徑之組合電阻自引線接合電極46增大。 6 shows the shunt pattern of FIG. 5 with additional radial connectors 48 interposed between wire bond electrodes 46 and various metal contacts 42. These radial connectors 48 provide a parallel connector path to the outer metal contacts 42 to make the current distribution more uniform because the combined resistance of the mesh connector 44 paths increases from the wire bond electrodes 46.

圖7係一LED晶粒之頂面之一俯視圖,其展示具有尺寸(直徑)隨金屬接點50越來越遠離引線接合電極46而增大之金屬接點50之一金屬分流圖案。更大面積之金屬接點必然減小周邊附近之金屬接點之間之空間,此增加周邊附近之電流注入以抵消引導至外金屬接點50之連接器44及48之增大電阻。 7 is a top plan view of a top surface of an LED die showing a metal shunt pattern having a size (diameter) of metal contacts 50 that increases as the metal contacts 50 are moved further away from the wire bond electrodes 46. A larger area of metal contacts necessarily reduces the space between the metal contacts near the perimeter, which increases current injection near the perimeter to counteract the increased resistance of the connectors 44 and 48 that are routed to the outer metal contacts 50.

圖8係一LED晶粒之頂面之一俯視圖,其展示具有密度隨金屬接點54越來越遠離引線接合電極46而增大以實現一更均勻電流密度之金屬接點54之一金屬分流圖案。 Figure 8 is a top plan view of a top surface of an LED die showing a metal shunt of a metal contact 54 having a density that increases as the metal contact 54 moves further away from the wire bond electrode 46 to achieve a more uniform current density. pattern.

圖9係一LED晶粒55之頂面之一俯視圖,其展示具有方形點56、一放大中心引線接合點57及連接該等點之窄連接器58之一金屬分流圖案。方形點之配置及寬度可類似於上述圓形點之情況。 9 is a top plan view of a top surface of an LED die 55 showing a metal shunt pattern having a square dot 56, an enlarged center wire bond 57, and a narrow connector 58 connecting the dots. The configuration and width of the square dots can be similar to the above-mentioned circular dots.

在一實施例中,對於所使用之典型金屬及所使用之電流散佈層,點之寬度(2Lt至10Lt之間)約為15微米以確保低接觸電阻(基於針對所使用之特定材料之類似於圖3之一曲線圖)。各點表示一電流注入區。通常,將具有用於良好電流分佈之每平方毫米50個至60個離散注入區之一密度。對 於一最小2Lt寬度及每平方毫米50個方形點,一LED晶粒之頂面面積之約1%將由點覆蓋。對於1平方毫米之一大小的LED晶粒,點之總面積將約為0.01平方毫米。寬度與方形點相同之圓形點覆蓋更少面積,所以將阻擋更少光。在一實施例中,由點覆蓋之一LED晶粒之頂面面積較佳為小於5%,諸如2%。點之寬度較佳為小於5Lt但稍大於2Lt,因為大於2Lt之寬度不會提供明顯減小之接觸電阻,且會使光阻擋最小化。 In one embodiment, the width of the dots (between 2 L t and 10 L t ) is about 15 microns for the typical metal used and the current spreading layer used to ensure low contact resistance (based on the particular material used) Similar to one of the graphs in Figure 3.) Each point represents a current injection zone. Typically, there will be a density of one of 50 to 60 discrete implant zones per square millimeter for a good current distribution. For a minimum 2 L t width and 50 square dots per square millimeter, about 1% of the top surface area of an LED die will be covered by dots. For an LED die of one size of 1 square millimeter, the total area of the dots will be approximately 0.01 square millimeters. A circular point with the same width as the square point covers less area, so it will block less light. In one embodiment, the top surface area of one of the LED dies covered by the dots is preferably less than 5%, such as 2%. The width of the dots is preferably less than 5 L t but slightly greater than 2 L t because a width greater than 2 L t does not provide a significantly reduced contact resistance and minimizes light blocking.

圖10係具有一下伏介電層64以避免電極46之周邊下方及周圍之電流擁擠之引線接合電極46區之一橫截面圖。金屬接觸電流散佈層28且一環具有一寬度Wx。Wx較佳為0.5Lt<Wx<Lt。圖中亦展示一引線60及接合金屬62。 Figure 10 is a cross-sectional view of one of the wire bond electrodes 46 regions having a lower dielectric layer 64 to avoid current crowding below and around the periphery of the electrode 46. The metal contacts the current spreading layer 28 and a ring has a width Wx. Wx is preferably 0.5 L t < Wx < L t . A lead 60 and bonding metal 62 are also shown.

圖11展示以一特定距離包圍引線接合電極46之一同心分流環65。同心分流環65減少引線接合電極46之周邊下方及周圍之電流擁擠。同心分流環65之寬度(Wr)係與Lt成比例(較佳為高於0.1Lt且低於Lt)以提供一足夠低之電流電阻。同心分流環65之直徑(D)較佳為比引線接合電極46之直徑大至少20%。 Figure 11 shows a concentric shunt ring 65 surrounding one of the wire bonding electrodes 46 at a particular distance. The concentric shunt ring 65 reduces current crowding below and around the perimeter of the wire bond electrode 46. The width (Wr) of the concentric shunt ring 65 is proportional to L t (preferably above 0.1 L t and below L t ) to provide a sufficiently low current resistance. The diameter (D) of the concentric shunt ring 65 is preferably at least 20% larger than the diameter of the wire bonding electrode 46.

圖12係一先前技術LED晶粒之頂面之一俯視圖(類似於圖1),其展示圍繞LED晶粒之頂面之周邊之一金屬分流器66,其中一引線接合電極68在一拐角附近。由於金屬分流器66之支路(arm)於各拐角處彼此接近,所以拐角附近將存在電流擁擠,從而導致不均勻光輸出及此等區中之一可能過電流。可使用圖13之金屬分流器組態以實質上防止拐 角處之此電流擁擠。 Figure 12 is a top plan view of a top surface of a prior art LED die (similar to Figure 1) showing a metal shunt 66 surrounding the perimeter of the top surface of the LED die with a wire bond electrode 68 near a corner . Since the arms of the metal shunt 66 are close to each other at the corners, there will be current crowding near the corners, resulting in uneven light output and one of these zones may be overcurrent. The metal shunt configuration of Figure 13 can be used to substantially prevent the turn This current is crowded at the corner.

圖13係一LED晶粒之一拐角之一特寫圖,其展示金屬分流器70具有拐角處之一減小寬度Wc以減少來自拐角附近之各支路之電流注入。Wc較佳為小於Lt(例如0.1Lt)以增大產生拐角附近之一實質上均勻電流分佈所需之接觸電阻。金屬分流器之剩餘部分之寬度大於Lt。與內金屬接點不同,在邊緣金屬接點中,電流僅自接觸區之一側流出,因此,2Lt最小寬度在此不適用。較佳地,一引線接合電極係定位在沿一金屬分流器支路之半路中以避免一拐角附近之電流擁擠。各拐角將類似於圖13。 Figure 13 is a close-up view of one of the corners of an LED die showing the metal shunt 70 having a reduced width Wc at one of the corners to reduce current injection from each leg near the corner. Wc preferably less than L t (e.g. 0.1L t) desired to increase the contact resistance is generated near the corners of one of the substantially uniform distribution of current. The width of the remainder of the metal shunt is greater than L t . Unlike the inner metal contacts, in the edge metal contacts, the current flows only from one side of the contact area, so the minimum width of 2L t is not applicable here. Preferably, a wire bond electrode is positioned along a halfway of a metal shunt branch to avoid current crowding near a corner. Each corner will be similar to Figure 13.

相同技術將用於任何交叉匯流條之拐角。 The same technique will be used for the corners of any cross bus bars.

LED晶粒之中間區中之金屬接點42、50、56係使用前述窄連接器44、48來連接至金屬分流器70。 The metal contacts 42, 50, 56 in the intermediate region of the LED die are connected to the metal shunt 70 using the aforementioned narrow connectors 44, 48.

圖14係根據本發明之一實施例之一LED晶粒之一橫截面圖,其中有角鏡面76係形成於各圓形金屬接點80及網格連接器下方之溝槽78中。鏡面76藉由上覆圓形金屬接點80及連接器而減少光阻擋且防止在各圓形金屬接點80下方及較小程度而言之連接器下方產生高電流密度區。有關此等鏡面76構造之細節係在以引用方式併入本文中之於2010年4月30日申請之Rafael Aldaz之美國申請案第12/770,550號中找到。 14 is a cross-sectional view of one of the LED dies in accordance with an embodiment of the present invention, wherein a corner mirror 76 is formed in each of the circular metal contacts 80 and the trenches 78 below the mesh connectors. Mirror surface 76 reduces light blocking by overlying circular metal contacts 80 and connectors and prevents high current density regions from being created under and below the respective circular metal contacts 80. The details of the construction of such mirrors 76 are found in U.S. Patent Application Serial No. 12/770,550, the entire disclosure of which is incorporated herein by reference.

鏡面76之幾何形狀可經裁剪以提高光提取效率。假定頂部金屬接點80(類似或等同於前述金屬接點之任何者)可與定位在金屬接點80下方之半導體中之鏡面壁一起使用,如 圖14中所描繪。說明圖展示鏡面76(通常為一金屬)穿入至半導體中且橫跨金屬接點80下方之區中之作用層20之一情況。鏡面76係由一透明介電質84覆蓋以防止層之間之電短路。在晶片內裝入此等鏡面壁增強光提取,但不利於減小產生光子之作用區。由於此權衡,較佳地使各金屬接點80之寬度Ws最小化且因此使鏡面之數量最小化。接著,此轉化為使光提取最大化之鏡面之間之距離之最小化。 The geometry of the mirror 76 can be tailored to increase light extraction efficiency. It is assumed that the top metal contact 80 (similar or identical to any of the foregoing metal contacts) can be used with a mirrored wall in a semiconductor positioned below the metal contact 80, such as It is depicted in Figure 14. The illustration shows the case where mirror 76 (usually a metal) penetrates into the semiconductor and spans one of the active layers 20 in the region below the metal contacts 80. The mirror 76 is covered by a transparent dielectric 84 to prevent electrical shorting between the layers. The inclusion of such mirror walls in the wafer enhances light extraction, but is not conducive to reducing the area of action that produces photons. Due to this trade-off, the width Ws of each metal joint 80 is preferably minimized and thus the number of mirrors is minimized. This translates into a minimization of the distance between the mirrors that maximizes light extraction.

較佳地,分流層之圖案應經設計以最佳化以下效能相關態樣:- 進入半導體作用層之電流注入之均勻化(例如控制金屬接點之分佈);- 橫跨分流層之電壓降之最小化(例如使用細金屬連接器);- 光提取之最大化(例如最佳化金屬接點之尺寸且形成鏡面);- 作用區之最大化(例如最佳化鏡面之尺寸)。 Preferably, the pattern of the shunt layer should be designed to optimize the following performance-related aspects: - homogenization of current injection into the semiconductor active layer (eg, control of the distribution of metal contacts); - voltage drop across the shunt layer Minimization (eg using a thin metal connector); - maximizing light extraction (eg optimizing the size of the metal contacts and forming a mirror); - maximizing the action area (eg optimizing the size of the mirror).

雖然已展示及描述本發明之特定實施例,但顯而易見地,熟習技術者可在本發明之更廣態樣中作出不背離本發明之改變及修改,因此,附屬申請專利範圍將使落在本發明之準確精神及範疇內之全部此等改變及修改涵蓋在申請專利範圍之範疇內。 While the invention has been shown and described with respect to the specific embodiments of the embodiments of the invention All such changes and modifications within the precise spirit and scope of the invention are covered by the scope of the claims.

10‧‧‧發光二極體(LED)晶粒 10‧‧‧Light Emitting Diode (LED) Grains

12‧‧‧陽極 12‧‧‧Anode

14‧‧‧反射器 14‧‧‧ reflector

16‧‧‧第一p型層 16‧‧‧First p-type layer

18‧‧‧p型包覆層 18‧‧‧p-type cladding

20‧‧‧作用層 20‧‧‧Working layer

22‧‧‧n型包覆層 22‧‧‧n type cladding

24‧‧‧第一n型層 24‧‧‧First n-type layer

26‧‧‧第二n型層 26‧‧‧Second n-type layer

28‧‧‧電流散佈層 28‧‧‧current distribution layer

30‧‧‧陰極 30‧‧‧ cathode

32‧‧‧分流層 32‧‧‧Diversion Layer

36‧‧‧電流 36‧‧‧ Current

38‧‧‧光子軌道 38‧‧‧Photon orbit

39‧‧‧發射光圖案 39‧‧‧emitting light pattern

40‧‧‧分流圖案 40‧‧‧Split pattern

42‧‧‧金屬接點 42‧‧‧Metal joints

44‧‧‧連接器 44‧‧‧Connector

46‧‧‧引線接合電極 46‧‧‧ wire bonding electrode

48‧‧‧徑向連接器 48‧‧‧radial connectors

50‧‧‧金屬接點 50‧‧‧Metal joints

54‧‧‧金屬接點 54‧‧‧Metal joints

55‧‧‧LED晶粒 55‧‧‧LED dies

56‧‧‧金屬接點 56‧‧‧Metal joints

57‧‧‧中心引線接合點 57‧‧‧Center wire bonding point

58‧‧‧連接器 58‧‧‧Connector

60‧‧‧引線 60‧‧‧ lead

62‧‧‧接合金屬 62‧‧‧Joint metal

64‧‧‧下伏介電層 64‧‧‧ underlying dielectric layer

65‧‧‧同心分流環 65‧‧‧Concentric Shunt Ring

66‧‧‧金屬分流器 66‧‧‧Metal shunt

68‧‧‧引線接合電極 68‧‧‧ wire bonding electrode

70‧‧‧金屬分流器 70‧‧‧Metal shunt

76‧‧‧有角鏡面 76‧‧‧With a mirror

78‧‧‧溝槽 78‧‧‧ trench

80‧‧‧金屬接點 80‧‧‧Metal joints

84‧‧‧介電質 84‧‧‧ dielectric

圖1係一先前技術LED晶粒之一頂面之一俯視圖,其展示一金屬分流圖案。 1 is a top plan view of one of the top surfaces of a prior art LED die showing a metal shunt pattern.

圖2係沿圖1中之線2-2之一橫截面圖。 Figure 2 is a cross-sectional view taken along line 2-2 of Figure 1.

圖3係一金屬接點之經正規化寬度與經正規化接觸電阻之一曲線圖,其展示小於2Lt之經正規化寬度導致越來越高之接觸電阻。 Fig 3 a graph of lines of one of the ohmic contact metal contacts the normalized and the normalized width, which is smaller than the display width 2L t of the normalized result in increasing the contact resistance.

圖4係一LED晶粒之頂面之一俯視圖,其展示根據本發明之一實施例之一金屬分流圖案。 4 is a top plan view of a top surface of an LED die showing a metal shunt pattern in accordance with an embodiment of the present invention.

圖5展示圖4之分流圖案,其中一較大引線接合電極定位在LED晶粒表面之中間附近以使電流分佈實質上均勻。 Figure 5 shows the shunt pattern of Figure 4 with a larger wire bond electrode positioned near the middle of the LED die surface to provide a substantially uniform current distribution.

圖6展示圖5之分流圖案,其中額外徑向連接器介於引線接合電極與各種點之間。 Figure 6 shows the shunt pattern of Figure 5 with an additional radial connector interposed between the wire bond electrodes and various points.

圖7係一LED晶粒之頂面之一俯視圖,其展示具有尺寸隨點越來越遠離引線接合電極而增大之點之一金屬分流圖案。 Figure 7 is a top plan view of a top surface of an LED die showing a metal shunt pattern having a point that increases in size as the point increases from the wire bond electrode.

圖8係一LED晶粒之頂面之一俯視圖,其展示具有密度隨點越來越遠離引線接合電極而增大之點之一金屬分流圖案。 Figure 8 is a top plan view of a top surface of an LED die showing a metal shunt pattern having a point at which the density increases as the point moves further away from the wire bond electrode.

圖9係一LED晶粒之頂面之一俯視圖,其展示具有方形點及一放大中心引線接合點之一金屬分流圖案。 Figure 9 is a top plan view of a top surface of an LED die showing a metal shunt pattern having a square dot and an enlarged center wire bond.

圖10係具有一下伏介電層以避免電極下方之電流擁擠之引線接合電極區之一橫截面圖。 Figure 10 is a cross-sectional view of one of the wire bond electrode regions having a lower dielectric layer to avoid current crowding under the electrodes.

圖11係一LED晶粒之頂面之一俯視圖,其展示包圍引線接合電極以緩和引線接合電極之周邊下方及周圍之電流擁擠之一金屬分流環圖案。 Figure 11 is a top plan view of a top surface of an LED die showing a metal shunt ring pattern surrounding the wire bond electrodes to mitigate current crowding below and around the perimeter of the wire bond electrodes.

圖12係一先前技術LED晶粒之頂面之一俯視圖(類似於 圖1),其展示圍繞頂面之周邊之一金屬分流器。 Figure 12 is a top plan view of a top surface of a prior art LED die (similar to Figure 1) shows a metal shunt around the perimeter of the top surface.

圖13係一LED晶粒之拐角之一放大俯視圖,其展示拐角附近之電流擁擠可如何藉由減小金屬分流器拐角處之寬度而避免。相同技術將用於任何交叉匯流條之拐角。 Figure 13 is an enlarged plan view of one of the corners of an LED die showing how current crowding near the corner can be avoided by reducing the width at the corners of the metal shunt. The same technique will be used for the corners of any cross bus bars.

圖14係根據本發明之一實施例之一LED晶粒之一橫截面圖,其中有角鏡面係形成於各點下方之溝槽中。 Figure 14 is a cross-sectional view of one of the LED dies in accordance with one embodiment of the present invention, wherein a corner mirror is formed in the trench below each point.

40‧‧‧分流圖案 40‧‧‧Split pattern

42‧‧‧金屬接點 42‧‧‧Metal joints

44‧‧‧連接器 44‧‧‧Connector

Claims (18)

一種發光二極體(LED)裝置,其包括:一LED晶粒,其具有包括一電流散佈層之一頂面;及該頂面上之一金屬電極圖案,其用於使電流傳導通過該LED晶粒以供能給該LED晶粒,該電極圖案包括:該頂面上之複數個金屬接點,其等具有該等金屬接點之一傳遞長度Lt之約2倍至10倍之間之寬度,其中該傳遞長度係定義為 其中Rs係該電流散佈層之薄片電阻,以每方形歐姆(Ω/□)為單位,且ρc係該等金屬接點之一者與該電流散佈層之界面之接觸電阻率,以歐姆平方米(Ω.m2)為單位;及將該等金屬接點之複數個連接在一起之複數個金屬連接器,該等金屬連接器具有小於2Lt之寬度。 A light emitting diode (LED) device comprising: an LED die having a top surface including a current spreading layer; and a metal electrode pattern on the top surface for conducting current through the LED The die is energized to the LED die, the electrode pattern comprising: a plurality of metal contacts on the top surface, such as having a transfer length L t of the metal contacts of between about 2 and 10 times Width, where the transfer length is defined as Where R s is the sheet resistance of the current spreading layer in units of ohms per square (Ω/□), and ρ c is the contact resistivity of the interface between one of the metal contacts and the current spreading layer, in ohms The square meter (Ω.m 2 ) is a unit; and a plurality of metal connectors that connect the plurality of metal contacts together, the metal connectors having a width of less than 2 L t . 如請求項1之裝置,其中該頂面上之該複數個金屬接點具有該等金屬接點之一傳遞長度Lt之約2倍至5倍之間之寬度。 The device of claim 1, wherein the plurality of metal contacts on the top surface have a width between about 2 and 5 times the transfer length L t of one of the metal contacts. 如請求項1之裝置,其中該等金屬接點之一總面積小於該LED晶粒之一發光表面之2%。 The device of claim 1, wherein a total area of one of the metal contacts is less than 2% of a light emitting surface of the LED die. 如請求項1之裝置,其中該等金屬接點之一總面積小於該LED晶粒之一發光表面之5%。 The device of claim 1, wherein a total area of one of the metal contacts is less than 5% of a light emitting surface of the LED die. 如請求項1之裝置,其中該等金屬接點之一總面積小於 該LED晶粒之一發光表面之10%。 The device of claim 1, wherein the total area of one of the metal contacts is less than 10% of the light-emitting surface of one of the LED dies. 如請求項1之裝置,其中該等金屬接點實質上為圓形,且該等寬度為該等金屬接點之直徑。 The device of claim 1, wherein the metal contacts are substantially circular and the widths are the diameters of the metal contacts. 如請求項1之裝置,其中該等金屬接點為多邊形。 The device of claim 1, wherein the metal contacts are polygonal. 如請求項1之裝置,其進一步包括藉由該等金屬連接器之至少一者而連接至該等金屬接點之一引線接合電極。 The device of claim 1, further comprising a wire bond electrode connected to one of the metal contacts by at least one of the metal connectors. 如請求項8之裝置,其中該等金屬連接器形成平行及垂直連接器之一網格。 The device of claim 8, wherein the metal connectors form a grid of one of parallel and vertical connectors. 如請求項8之裝置,其中該等金屬連接器自該引線接合電極徑向延伸。 The device of claim 8 wherein the metal connectors extend radially from the wire bond electrode. 如請求項8之裝置,其中該等金屬接點之至少一些之尺寸隨該等金屬接點更遠離該引線接合電極而增大。 The device of claim 8, wherein at least some of the metal contacts are increased in size as the metal contacts are further away from the wire bonding electrode. 如請求項8之裝置,其中該等金屬接點之一密度隨該等金屬接點更遠離該引線接合電極而增大。 The device of claim 8 wherein the density of one of the metal contacts increases as the metal contacts are further away from the wire bond electrode. 如請求項8之裝置,其進一步包括該引線接合電極與該電流散佈層之間之一介電層以減小該引線接合電極與該電流散佈層之間之一電流密度。 The device of claim 8, further comprising a dielectric layer between the wire bond electrode and the current spreading layer to reduce a current density between the wire bond electrode and the current spreading layer. 如請求項13之裝置,其中該引線接合電極圍繞該介電層而在該介電層之一邊緣上延伸一距離Wx,其中0.5Lt<Wx<LtThe device of claim 13, wherein the wire bonding electrode extends around the dielectric layer over a distance Wx of one of the edges of the dielectric layer, wherein 0.5 L t < Wx < L t . 如請求項8之裝置,其進一步包括以一特定距離包圍該引線接合電極之一同心分流環以減少該引線接合電極之一周邊下方及周圍之電流擁擠,其中該同心分流環與該引線接合電極之間不存在該等金屬接點。 The device of claim 8, further comprising surrounding a concentric shunt ring of the wire bond electrode at a specific distance to reduce current crowding below and around a perimeter of the wire bond electrode, wherein the concentric shunt ring and the wire bond electrode There are no such metal contacts between them. 如請求項15之裝置,其中該同心分流環之一寬度係介於0.1Lt與Lt之間,且其中該同心分流環之一直徑比該引線接合電極之一直徑大至少20%。 The device of claim 15, wherein one of the concentric shunt rings has a width between 0.1 L t and L t , and wherein one of the concentric shunt rings has a diameter that is at least 20% larger than a diameter of one of the wire bond electrodes. 如請求項1之裝置,其進一步包括圍繞該LED晶粒頂面之一周邊之一金屬分流器,該金屬分流器具有沿該LED晶粒之邊緣之一第一寬度及用於減小該LED晶粒之拐角處之電流密度之該LED晶粒之該等拐角處之一較窄寬度。 The device of claim 1 further comprising a metal shunt surrounding one of the perimeters of the top surface of the LED die, the metal shunt having a first width along an edge of the LED die and for reducing the LED The current density at the corners of the die is one of the narrower widths of the corners of the LED die. 如請求項17之裝置,其中沿該LED晶粒之該等邊緣之該金屬分流器之該第一寬度大於Lt,且該LED晶粒之該等拐角處之該金屬分流器之該較窄寬度小於0.1Lt以減小該LED晶粒之該等拐角處之電流密度。 The device of claim 17, wherein the first width of the metal shunt along the edges of the LED die is greater than Lt , and the metal shunt at the corners of the LED die is narrower width less than 0.1L t to reduce the current density at the corner of the die such that the LED.
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