TWI524171B - A circuit with a replacement type storage system - Google Patents

A circuit with a replacement type storage system Download PDF

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TWI524171B
TWI524171B TW103141321A TW103141321A TWI524171B TW I524171 B TWI524171 B TW I524171B TW 103141321 A TW103141321 A TW 103141321A TW 103141321 A TW103141321 A TW 103141321A TW I524171 B TWI524171 B TW I524171B
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speed
chip
battery
low
wafer
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TW103141321A
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TW201619741A (en
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Po Yuan Huang
Xin Xian Lin
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Univ Taipei Chengshih Science
Po Yuan Huang
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具有置換式可蓄電晶片系統之電路 Circuit with a replaceable chargeable wafer system

本項發明創作係關於一種「具有置換式可蓄電晶片系統之電路」,尤指一種利用一可置換式電池組晶片與一電氣裝置電路晶片結合成雙層晶片供電結構,以該電池組晶片作電能蓄電並經由雙層晶片供電結構提供該電路晶片工作所需之電源電能,使一電氣裝置電路晶片工作無需額外之電池設備或供電設備的新式電路晶片供電電路者。 The present invention relates to a circuit having a replaceable power storage chip system, and more particularly to a dual-chip power supply structure using a replaceable battery chip and an electrical device circuit chip, The electrical energy is stored and provided by the dual layer wafer power supply structure to provide the power required for the operation of the circuit wafer to operate an electrical device circuit wafer without the need for additional battery devices or power supply devices.

按,在現今石油供應短缺、油價高漲的時代,石油相關能源的使用成本皆大幅提高;同時,為了地球環境考量,避免因使用石油過度排放二氧化碳而造成環境的劇烈改變,各方均倡導節能減碳的相關做法。其中,創新電氣裝置使用供電設備之方式,也可以是節能減碳的一種具體做法。 According to the current era of oil shortages and high oil prices, the cost of using petroleum-related energy has increased substantially. At the same time, in order to avoid the drastic changes in the environment caused by excessive carbon dioxide emissions from the use of oil, all parties have advocated energy conservation. Carbon related practices. Among them, the way in which innovative electrical devices use power supply equipment can also be a specific practice of energy saving and carbon reduction.

習用電氣裝置(如可攜式裝置或手持裝置:筆記型電腦、平板電腦、智慧型手機等)內部電路晶片用電之方式,請參閱第1圖所示,主要係利用電氣裝置之一般晶片系統01與電氣裝置之一蓄電池02(可充電電池)電氣連接,由外部電力電源經一整流器03將轉換之直流電能儲存於蓄電池02,該蓄電池02再提供一般晶片系統01內部各個電路晶片工作所需之電源電能。如第2圖所示,一電氣裝置經由蓄電池02供應一般晶片 系統01內部中央處理器電路晶片010(CPU晶片)及一般電路晶片011、一般電路晶片012、一般電路晶片013、一般電路晶片014(如:記憶體晶片、繪圖晶片、週邊控制晶片等)工作所需之電源電能。 The use of electrical devices (such as portable devices or handheld devices: notebook computers, tablets, smart phones, etc.) internal circuit chip power, please refer to Figure 1, mainly using the general chip system of electrical devices 01 is electrically connected to one of the electrical devices, the battery 02 (rechargeable battery), and the external power source is stored in the battery 02 via a rectifier 03, and the battery 02 is further provided for the operation of each circuit chip in the general wafer system 01. Power supply. As shown in FIG. 2, an electrical device supplies a general wafer via a battery 02. System 01 internal CPU chip 010 (CPU chip) and general circuit chip 011, general circuit chip 012, general circuit chip 013, general circuit chip 014 (such as: memory chip, graphics chip, peripheral control chip, etc.) Required power supply.

一般電氣裝置如可攜式裝置或手持裝置均講求「輕、薄、短、小」之整體設計,一方面可以節省產品材料成本(節能減碳)、提高產品技術水準,另一方面也可以迎合使用需求、提升消費意願。然而,由於電氣裝置經常使用之供電設備(蓄電池)往往佔據電氣裝置相當空間,以致無法達成輕薄短小之設計要求;或者,電氣裝置之使用者必須經常準備笨重的供電設備(蓄電池),亦造成電氣裝置使用上之不方便性。因此,如何創新電氣裝置使用供電設備之方式,現已成為各個電氣裝置製造廠商之研究方向與努力目標。 Generally, electrical devices such as portable devices or handheld devices are designed to be "light, thin, short, and small". On the one hand, they can save product material costs (energy saving and carbon reduction) and improve product technology standards. On the other hand, they can also cater to the needs. Use demand and increase consumer willingness. However, power supply equipment (batteries) often used in electrical installations often occupy a considerable space of electrical equipment, so that it is impossible to achieve a light and short design requirement; or, users of electrical equipment must always prepare bulky power supply equipment (batteries) and also cause electrical The inconvenience of using the device. Therefore, how to innovate the way in which electrical devices use power supply equipment has become the research direction and goal of various electrical device manufacturers.

鑑於上述先前技術所衍生的各項缺點,本案創作人乃亟思加以改良創新,並經苦心孤詣潛心研究後,終於成功研發完成本案之一種「具有置換式可蓄電晶片系統之電路」。 In view of the shortcomings arising from the above prior art, the creator of the case was improved and innovated by the singer, and after painstaking research, he finally succeeded in research and development of a "circuit with a replaceable storable wafer system".

本項發明創作之目的,在於提供一電氣裝置一種利用可置換式電池組晶片作電能蓄電,此蓄電電能再提供電氣裝置電路晶片工作所需電源電能之新式電路晶片供電電路。請參閱第3圖所示,其概念係在一電氣裝置設一可蓄電晶片系統11,該可蓄電晶片系統11經由一整流器03與電氣裝置外部之電力電源電氣連接。該可蓄電晶片系統11內部設有可置換式電池組晶片,該電池組晶片與可蓄電晶片系統11內部設有之電氣裝置電路晶片結合成雙層晶片供電結構;該電池組晶片可接受外部之電力電源 作電能蓄電,此蓄電電能經由雙層晶片供電結構提供該電氣裝置電路晶片工作所需之電源電能。如此,令一電氣裝置即能以內部可置換式之電池組晶片供電予電路晶片使用,該電氣裝置電路晶片工作無需額外之電池設備或供電設備。 The purpose of the invention is to provide an electrical device, a novel circuit chip power supply circuit that utilizes a replaceable battery cell for power storage, which provides power and power required for operation of the circuit chip of the electrical device. Referring to Fig. 3, the concept is to provide an electrical storage chip system 11 in an electrical device. The rechargeable silicon wafer system 11 is electrically connected to a power source external to the electrical device via a rectifier 03. The rechargeable battery system 11 is internally provided with a replaceable battery chip, which is combined with an electrical device circuit chip disposed inside the power storage chip system 11 to form a two-layer wafer power supply structure; the battery chip can be externally received. Electric power supply As electrical energy storage, the stored electrical energy provides power supply power required for operation of the electrical device circuit wafer via a two-layer wafer power supply structure. In this way, an electrical device can be powered by an internal replaceable battery chip that is used by the circuit chip without the need for additional battery or power supply equipment.

為達上述之目的,本項發明創作之技術手段在於,在一電氣裝置(如可攜式裝置或手持裝置:筆記型電腦、平板電腦、智慧型手機等)設一可蓄電晶片系統,該可蓄電晶片系統內部設有一中央處理器蓄電電路晶片、多個高速蓄電電路晶片及多個低速蓄電電路晶片,其中,該中央處理器蓄電電路晶片由一上層電池組晶片(中央處理器電池組晶片)及一下層中央處理器電路晶片(CPU晶片)組成一雙層中央處理器晶片供電結構,該高速蓄電電路晶片由一上層電池組晶片(高速電池組晶片)及一下層高速電路晶片(一般高速電路晶片,如:記憶體晶片、繪圖晶片等)組成一雙層高速晶片供電結構,而該低速蓄電電路晶片由一上層電池組晶片(低速電池組晶片)及一下層低速電路晶片(一般低速電路晶片,如:週邊控制晶片)組成一雙層低速晶片供電結構。該電氣裝置可蓄電晶片系統之該中央處理器蓄電電路晶片與該多個高速蓄電電路晶片、該多個低速蓄電電路晶片分別信號電氣連接,使得該中央處理器電路晶片可對該多個高速電路晶片、該多個低速電路晶片作信號控制(執行該電氣裝置之功能)。 For the above purposes, the technical means of the invention is to provide an electricity storage chip system in an electrical device (such as a portable device or a handheld device: a notebook computer, a tablet computer, a smart phone, etc.). A central processing battery chip, a plurality of high-speed storage circuit chips, and a plurality of low-speed storage circuit chips are disposed in the power storage chip system, wherein the central processing battery chip is composed of an upper battery chip (central processing battery chip) And a lower layer central processor circuit chip (CPU chip) constitutes a two-layer central processor chip power supply structure, the high speed storage circuit chip comprises an upper battery chip (high speed battery chip) and a lower high speed circuit chip (general high speed circuit The wafer, such as a memory chip, a graphics wafer, etc., constitutes a two-layer high-speed chip power supply structure, and the low-speed power storage circuit chip comprises an upper battery chip (low-speed battery chip) and a lower-level low-speed circuit chip (generally low-speed circuit chip) For example, the peripheral control chip constitutes a double-layer low-speed wafer power supply structure. The central processor storage circuit chip of the electrical storage chip system is electrically connected to the plurality of high speed storage circuit chips and the plurality of low speed storage circuit chips, so that the central processing circuit chip can be used for the plurality of high speed circuits The chip and the plurality of low-speed circuit chips are signal-controlled (executing the function of the electrical device).

該雙層中央處理器晶片供電結構之上層電池組晶片可接受電氣裝置外部之電力電源(如:市電、行動電源等)並轉換成直流電能以作電能蓄電(中央處理器電池組晶片蓄電),該上層電池組晶片並將其蓄電 電能經由雙層中央處理器晶片供電結構內部直接並穩定地供電予下層中央處理器電路晶片使用(中央處理器電池組晶片供電)。此外,上層電池組晶片與下層中央處理器電路晶片可機械連接及電氣連接以直接作電池組晶片蓄電(中央處理器電池組晶片直接蓄電)與供電,上層電池組晶片與下層中央處理器電路晶片亦可機械分離及電氣分離以間接作電池組晶片蓄電(中央處理器電池組晶片間接蓄電)或作電池組晶片更換(中央處理器電池組晶片可置換)。 The upper battery chip of the dual-layer central processor chip power supply structure can receive power sources (such as: mains, mobile power, etc.) external to the electrical device and convert it into DC power for power storage (central processor battery chip storage). The upper battery chip and store it The power is directly and stably supplied to the underlying central processor circuit chip via the dual layer central processor chip power supply structure (powered by the central processor battery chip). In addition, the upper battery chip and the lower central processing circuit chip can be mechanically and electrically connected for direct storage of the battery chip (direct storage of the central processor battery chip) and power supply, the upper battery chip and the lower central processing circuit chip. It can also be mechanically separated and electrically separated for indirect battery cell storage (indirect storage of the central processor battery chip) or for battery chip replacement (the central processor battery chip can be replaced).

該雙層高速晶片供電結構之上層電池組晶片亦可接受電氣裝置外部之電力電源並轉換成直流電能以作電能蓄電(高速電池組晶片蓄電),該上層電池組晶片亦將其蓄電電能經由雙層高速晶片供電結構內部直接並穩定地供電予下層高速電路晶片使用(高速電池組晶片供電)。此外,上層電池組晶片與下層高速電路晶片可機械連接及電氣連接以直接作電池組晶片蓄電(高速電池組晶片直接蓄電)與供電,上層電池組晶片與下層高速電路晶片亦可機械分離及電氣分離以間接作電池組晶片蓄電(高速電池組晶片間接蓄電)或作高速電池組晶片更換(高速電池組晶片可置換)。 The upper layer battery chip of the double-layer high-speed chip power supply structure can also receive power supply external to the electrical device and convert it into DC power for power storage (high-speed battery chip storage), and the upper battery chip also stores its electric energy through the double The layer high-speed chip power supply structure directly and stably supplies power to the lower layer high-speed circuit chip (high-speed battery chip power supply). In addition, the upper battery chip and the lower high-speed circuit chip can be mechanically and electrically connected for direct storage of the battery chip (direct storage of the high-speed battery chip) and power supply, and the upper battery chip and the lower high-speed circuit chip can be mechanically separated and electrically connected. Separation is used for indirect battery cell storage (high-speed battery chip indirect storage) or high-speed battery wafer replacement (high-speed battery wafer replacement).

再者,該雙層低速晶片供電結構之上層電池組晶片亦可接受電氣裝置外部之電力電源並轉換成直流電能以作電能蓄電(低速電池組晶片蓄電),該上層電池組晶片亦將其蓄電電能經由雙層低速晶片供電結構內部直接並穩定地供電予下層低速電路晶片使用(低速電池組晶片供電)。此外,上層電池組晶片與下層低速電路晶片可機械連接及電氣連接以直接作電池組晶片蓄電(低速電池組晶片直接蓄電)與供電,上層電池組晶片 與下層低速電路晶片亦可機械分離及電氣分離以間接作電池組晶片蓄電(低速電池組晶片間接蓄電)或作低速電池組晶片更換(低速電池組晶片可置換)。 Furthermore, the upper layer battery chip of the double-layer low-speed chip power supply structure can also receive power supply external to the electrical device and convert it into DC power for power storage (low-speed battery chip storage), and the upper battery chip also stores power. The power is directly and stably supplied to the underlying low speed circuit chip (powered by the low speed battery chip) via the double low speed wafer power supply structure. In addition, the upper battery chip and the lower low-speed circuit chip can be mechanically and electrically connected for direct storage of the battery chip (direct storage of the low-speed battery chip) and power supply, the upper battery chip The lower-level low-speed circuit chip can also be mechanically separated and electrically separated for indirect battery cell storage (indirect storage of low-speed battery chips) or low-speed battery chip replacement (low-speed battery wafer replacement).

由此,該中央處理器蓄電電路晶片利用其雙層中央處理器晶片供電結構可作蓄電供電(中央處理器電池組晶片蓄電供電)、該多個高速蓄電電路晶片利用其雙層高速晶片供電結構亦可作蓄電供電(高速電池組晶片蓄電供電)、該多個低速蓄電電路晶片利用其雙層低速晶片供電結構則亦可作蓄電供電(低速電池組晶片蓄電供電),如此,運用本項發明創作之「具有置換式可蓄電晶片系統之電路」,令一電氣裝置即能以內部可置換式之電池組晶片供電予電路晶片使用,該電氣裝置電路晶片工作無需額外之電池設備或供電設備(如:蓄電池等)。 Thus, the central processor power storage circuit chip can be used for power storage (the central processing unit battery chip storage power supply) by using the dual-layer central processor chip power supply structure, and the plurality of high-speed storage circuit chips utilize the double-layer high-speed chip power supply structure. It can also be used for power storage (high-speed battery pack wafer storage and power supply), and the plurality of low-speed storage circuit chips can also be used for power storage (low-speed battery pack chip storage and power supply) by using the double-layer low-speed chip power supply structure, and thus, the invention is applied. The "circuit with a replaceable power storage chip system" is created to enable an electrical device to be powered by an internal replaceable battery chip for use in a circuit chip that does not require additional battery equipment or power supply equipment ( Such as: battery, etc.).

請參閱以下有關於本項發明創作「具有置換式可蓄電晶片系統之電路」一較佳實施例之詳細說明及其附圖,將可進一步瞭解本創作之技術內容及其目的與功效: Please refer to the following detailed description of a preferred embodiment of the present invention for "circuits with a replaceable power storage chip system" and the accompanying drawings, which will further understand the technical content of the creation and its purpose and effect:

01‧‧‧一般晶片系統 01‧‧‧General wafer system

010‧‧‧中央處理器電路晶片 010‧‧‧Central Processor Circuit Wafer

011‧‧‧一般電路晶片 011‧‧‧General circuit chip

012‧‧‧一般電路晶片 012‧‧‧General circuit chip

013‧‧‧一般電路晶片 013‧‧‧General circuit chip

014‧‧‧一般電路晶片 014‧‧‧General circuit chip

02‧‧‧蓄電池 02‧‧‧Battery

03‧‧‧整流器 03‧‧‧Rectifier

11‧‧‧可蓄電晶片系統 11‧‧‧Power storage chip system

110‧‧‧中央處理器蓄電電路晶片 110‧‧‧Central processor storage circuit chip

1101‧‧‧上層中央處理器電池組晶片 1101‧‧‧Upper central processing unit battery chip

1102‧‧‧下層中央處理器電路晶片 1102‧‧‧lower central processor circuit chip

111‧‧‧大型高速蓄電電路晶片 111‧‧‧ Large high-speed storage circuit chip

1111‧‧‧上層第一高速電池組晶片 1111‧‧‧Upper first high speed battery chip

1112‧‧‧下層大型高速電路晶片 1112‧‧‧Lower large-scale high-speed circuit chip

112‧‧‧大型低速蓄電電路晶片 112‧‧‧ Large low-speed storage circuit chip

1121‧‧‧上層第一低速電池組晶片 1121‧‧‧Upper first low-speed battery chip

1122‧‧‧下層大型低速電路晶片 1122‧‧‧Lower large low-speed circuit chip

113‧‧‧小型高速蓄電電路晶片 113‧‧‧Small high-speed storage circuit chip

1131‧‧‧上層第二高速電池組晶片 1131‧‧‧Upper second high speed battery chip

1132‧‧‧下層小型高速電路晶片 1132‧‧‧Lower small high speed circuit chip

114‧‧‧小型低速蓄電電路晶片 114‧‧‧Small low-speed storage circuit chip

1141‧‧‧上層第二低速電池組晶片 1141‧‧‧Upper second low speed battery chip

1142‧‧‧下層小型低速電路晶片 1142‧‧‧Lower small low-speed circuit chip

第1圖為一般晶片系統使用外部電池設備(蓄電池)之關係圖。 Figure 1 is a diagram showing the relationship between the use of external battery devices (batteries) for a typical wafer system.

第2圖為一般晶片系統使用外部電池設備(蓄電池)之結構方塊圖與連接圖。 Figure 2 is a block diagram and connection diagram of an external battery device (battery) for a general wafer system.

第3圖為本項發明創作可蓄電晶片系統無使用外部電池設備(蓄電池)之示意圖。 Fig. 3 is a schematic view showing the creation of a rechargeable wafer system without using an external battery device (battery) according to the present invention.

第4圖為本項發明創作可蓄電晶片系統一較佳實施例之內部結構方塊圖 與連接圖。 Figure 4 is a block diagram showing the internal structure of a preferred embodiment of the present invention. With the connection diagram.

第5圖為本項發明創作可蓄電晶片系統一較佳實施例之中央處理器蓄電電路晶片內部結構示意圖。 FIG. 5 is a schematic diagram showing the internal structure of a central processing circuit of a central processing unit of a preferred embodiment of the present invention.

第6圖為本項發明創作可蓄電晶片系統一較佳實施例之大型高速蓄電電路晶片內部結構示意圖。 Figure 6 is a schematic view showing the internal structure of a large-scale high-speed storage circuit chip according to a preferred embodiment of the present invention.

第7圖為本項發明創作可蓄電晶片系統一較佳實施例之大型低速蓄電電路晶片內部結構示意圖。 FIG. 7 is a schematic diagram showing the internal structure of a large-sized low-speed storage circuit chip according to a preferred embodiment of the present invention.

第8圖為本項發明創作可蓄電晶片系統一較佳實施例之小型高速蓄電電路晶片內部結構示意圖。 FIG. 8 is a schematic diagram showing the internal structure of a small high-speed power storage circuit chip according to a preferred embodiment of the present invention.

第9圖為本項發明創作可蓄電晶片系統一較佳實施例之小型低速蓄電電路晶片內部結構示意圖。 FIG. 9 is a schematic diagram showing the internal structure of a small low-speed power storage circuit chip according to a preferred embodiment of the present invention.

本項發明創作所提供之一種「具有置換式可蓄電晶片系統之電路」,請參閱第3圖及第4圖所示,其係在一電氣裝置設一可蓄電晶片系統11(電氣裝置之蓄電供電設備、信號處理設備),該可蓄電晶片系統11內部設有一中央處理器蓄電電路晶片110、一大型高速蓄電電路晶片111、一大型低速蓄電電路晶片112及一小型高速蓄電電路晶片113、一小型低速蓄電電路晶片114,該中央處理器蓄電電路晶片110與該大型高速蓄電電路晶片111、該小型高速蓄電電路晶片113信號電氣連接(高速晶片信號控制),該中央處理器蓄電電路晶片110亦與該大型低速蓄電電路晶片112、該小型低速蓄電電路晶片114信號電氣連接(低速晶片信號控制),使得該中央處理器蓄電電路晶片110可對多個高速電路晶片、多個低速電路晶片 作一般信號控制以執行該電氣裝置之功能。 A "circuit with a replaceable power storage chip system" provided by the present invention, as shown in FIGS. 3 and 4, is an electric device capable of storing a power storage wafer system 11 (electrical device storage) The power storage device and the signal processing device are provided with a central processing circuit chip 110, a large high-speed storage circuit chip 111, a large low-speed storage circuit chip 112, and a small high-speed storage circuit chip 113. The small-sized low-speed storage circuit chip 114 is electrically connected to the large-sized high-speed storage circuit chip 111 and the small-sized high-speed storage circuit chip 113 (high-speed chip signal control), and the central processing battery chip 110 is also The signal is electrically connected to the large low-speed storage circuit chip 112 and the small low-speed storage circuit chip 114 (low-speed wafer signal control), so that the central processing circuit chip 110 can be used for a plurality of high-speed circuit chips and a plurality of low-speed circuit chips. General signal control is performed to perform the functions of the electrical device.

請參閱第5圖所示,該中央處理器蓄電電路晶片110內部係由一上層中央處理器電池組晶片1101(蓄電晶片)及一下層中央處理器電路晶片1102(CPU晶片)組成雙層中央處理器晶片供電物理與電路結構,其中,該上層中央處理器電池組晶片1101經由該中央處理器蓄電電路晶片110之雙層晶片供電結構內部,可與該下層中央處理器電路晶片1102電氣連接(電源電氣連接)。該上層中央處理器電池組晶片1101可接受該中央處理器蓄電電路晶片110外部之電力電源(市電、行動電源)並轉換成直流電能以作電能蓄電(中央處理器電池組晶片蓄電),該上層中央處理器電池組晶片1101並將其蓄電電能經由該中央處理器蓄電電路晶片110雙層晶片供電結構內部,直接(電源電氣連接)並穩定地供電予下層中央處理器電路晶片1102使用(中央處理器電池組晶片供電)。此外,該上層中央處理器電池組晶片1101與該下層中央處理器電路晶片1102可機械連接及電氣連接以直接作電池組晶片蓄電與供電(中央處理器電池組晶片直接蓄電),該上層中央處理器電池組晶片1101與該下層中央處理器電路晶片1102亦可機械分離及電氣分離以間接作電池組晶片蓄電(中央處理器電池組晶片間接蓄電),或者,可機械分離及電氣分離以作電池組晶片更換(中央處理器電池組晶片可置換)。 Referring to FIG. 5, the CPU of the CPU circuit 110 is composed of an upper layer central processing unit battery chip 1101 (storage chip) and a lower layer central processing circuit chip 1102 (CPU chip). And the upper layer of the central processing unit battery chip 1101 is electrically connected to the lower layer of the central processing unit circuit 1102 via the dual-layer chip power supply structure of the central processing battery chip 110 (power supply) Electrical connections). The upper central processing unit battery chip 1101 can receive the power source (mains, mobile power) external to the central processing circuit chip 110 and convert it into DC power for power storage (central processing unit battery chip storage), the upper layer The central processing unit battery chip 1101 and the stored electric energy thereof are directly connected (the power supply is electrically connected) to the lower central processing circuit chip 1102 via the central processing circuit 110. Battery pack wafer power supply). In addition, the upper central processing unit battery chip 1101 and the lower central processing unit circuit 1102 can be mechanically and electrically connected to directly store and supply battery chips (direct storage of the central processing battery chip), and the upper layer is processed centrally. The battery pack wafer 1101 and the lower layer central processor circuit chip 1102 can also be mechanically separated and electrically separated for indirect battery cell storage (indirect storage of the central processing unit battery chip), or mechanically separated and electrically separated for use as a battery. Group wafer replacement (central processor battery pack wafers are replaceable).

請參閱第6圖所示,該大型高速蓄電電路晶片111內部係由一上層第一高速電池組晶片1111(蓄電晶片)及一下層大型高速電路晶片1112(一般高速電路晶片)組成雙層大型高速晶片供電物理與電路結構,其中,該上層第一高速電池組晶片1111經由該大型高速蓄電電路晶片111 之雙層晶片供電結構內部,可與該下層大型高速電路晶片1112電氣連接(電源電氣連接)。該上層第一高速電池組晶片1111可接受該大型高速蓄電電路晶片111外部之電力電源(市電、行動電源)並轉換成直流電能以作電能蓄電(第一高速電池組晶片蓄電),該上層第一高速電池組晶片1111並將其蓄電電能經由該大型高速蓄電電路晶片111雙層晶片供電結構內部,直接(電源電氣連接)並穩定地供電予下層大型高速電路晶片1112使用(第一高速電池組晶片供電)。除此之外,該上層第一高速電池組晶片1111與該下層大型高速電路晶片1112可機械連接及電氣連接以直接作電池組晶片蓄電與供電(第一高速電池組晶片直接蓄電),該上層第一高速電池組晶片1111與該下層大型高速電路晶片1112亦可機械分離及電氣分離以間接作電池組晶片蓄電(第一高速電池組晶片間接蓄電),或者,可機械分離及電氣分離以作電池組晶片更換(第一高速電池組晶片可置換)。 Referring to FIG. 6, the large high-speed power storage circuit chip 111 is composed of an upper first high-speed battery chip 1111 (storage chip) and a lower large-scale high-speed circuit chip 1112 (generally high-speed circuit chip). a wafer power supply physics and circuit structure, wherein the upper first high speed battery chip 1111 passes through the large high speed power storage circuit chip 111 The inside of the two-layer wafer power supply structure can be electrically connected to the lower large-scale high-speed circuit chip 1112 (electrical connection of the power source). The upper first high-speed battery chip 1111 can receive the power source (mains, mobile power) outside the large-speed high-speed storage circuit chip 111 and convert it into DC power for power storage (the first high-speed battery chip storage), the upper layer A high-speed battery cell wafer 1111 and the stored electric energy thereof are passed through the large-scale high-speed storage circuit wafer 111 in a two-layer wafer power supply structure, directly (power supply electrical connection) and stably supplied to the lower large-scale high-speed circuit wafer 1112 (first high-speed battery pack) Wafer powered). In addition, the upper first high-speed battery chip 1111 and the lower large-sized high-speed circuit chip 1112 can be mechanically and electrically connected to directly store and supply the battery wafer (the first high-speed battery wafer directly stores power), the upper layer The first high-speed battery chip 1111 and the lower large-sized high-speed circuit chip 1112 can also be mechanically separated and electrically separated to indirectly be used for battery chip storage (indirect storage of the first high-speed battery chip), or mechanically separated and electrically separated. Battery pack wafer replacement (the first high speed battery chip can be replaced).

另外請參閱第8圖所示,該小型高速蓄電電路晶片113內部係由一上層第二高速電池組晶片1131(蓄電晶片)及一下層小型高速電路晶片1132(一般高速電路晶片)組成雙層小型高速晶片供電物理與電路結構,其中,該上層第二高速電池組晶片1131經由該小型高速蓄電電路晶片113之雙層晶片供電結構內部,可與該下層小型高速電路晶片1132電氣連接(電源電氣連接)。該上層第二高速電池組晶片1131可接受該小型高速蓄電電路晶片113外部之電力電源(市電、行動電源)並轉換成直流電能以作電能蓄電(第二高速電池組晶片蓄電),該上層第二高速電池組晶片1131並將其蓄電電能經由該小型高速蓄電電路晶片113雙層晶片供電結構 內部,直接(電源電氣連接)並穩定地供電予下層小型高速電路晶片1132使用(第二高速電池組晶片供電)。此外,該上層第二高速電池組晶片1131與該下層小型高速電路晶片1132可機械連接及電氣連接以直接作電池組晶片蓄電與供電(第二高速電池組晶片直接蓄電),該上層第二高速電池組晶片1131與該下層小型高速電路晶片1132亦可機械分離及電氣分離以間接作電池組晶片蓄電(第二高速電池組晶片間接蓄電),或者,可機械分離及電氣分離以作電池組晶片更換(第二高速電池組晶片可置換)。 In addition, as shown in FIG. 8, the small high-speed power storage circuit chip 113 is internally composed of an upper second high-speed battery chip 1131 (storage chip) and a lower-layer small high-speed circuit chip 1132 (generally high-speed circuit chip). The high-speed chip power supply physical and circuit structure, wherein the upper second high-speed battery cell wafer 1131 is electrically connected to the lower-layer small high-speed circuit chip 1132 via the double-layer wafer power supply structure of the small high-speed power storage circuit chip 113 (electrical connection of the power supply) ). The upper second high-speed battery cell wafer 1131 can receive the power source (mains, mobile power) outside the small high-speed storage circuit chip 113 and convert it into DC power for power storage (second high-speed battery chip storage), the upper layer Two high-speed battery cell wafer 1131 and its stored electric energy via the small high-speed storage circuit chip 113 double-layer wafer power supply structure Internally, direct (power supply electrical connection) and stable power supply to the lower small high speed circuit chip 1132 (second high speed battery chip power supply). In addition, the upper second high speed battery chip 1131 and the lower small high speed circuit chip 1132 can be mechanically and electrically connected to directly store and supply the battery wafer (the second high speed battery wafer directly stores power), the upper second high speed The battery cell wafer 1131 and the lower layer small high speed circuit chip 1132 can also be mechanically separated and electrically separated to indirectly perform battery cell wafer storage (second high speed battery chip wafer indirect storage), or can be mechanically separated and electrically separated for use as a battery chip. Replacement (second high speed battery pack wafer can be replaced).

請參閱第7圖所示,該大型低速蓄電電路晶片112內部係由一上層第一低速電池組晶片1121(蓄電晶片)及一下層大型低速電路晶片1122(一般低速電路晶片)組成雙層大型低速晶片供電物理與電路結構,其中,該上層第一低速電池組晶片1121經由該大型低速蓄電電路晶片112之雙層晶片供電結構內部,可與該下層大型低速電路晶片1122電氣連接(電源電氣連接)。該上層第一低速電池組晶片1121可接受該大型低速蓄電電路晶片112外部之電力電源(市電、行動電源)並轉換成直流電能以作電能蓄電(第一低速電池組晶片蓄電),該上層第一低速電池組晶片1121並將其蓄電電能經由該大型低速蓄電電路晶片112雙層晶片供電結構內部,直接(電源電氣連接)並穩定地供電予下層大型低速電路晶片1122使用(第一低速電池組晶片供電)。除此之外,該上層第一低速電池組晶片1121與該下層大型低速電路晶片1122可機械連接及電氣連接以直接作電池組晶片蓄電與供電(第一低速電池組晶片直接蓄電),該上層第一低速電池組晶片1121與該下層大型低速電路晶片1122亦可機械分離及電氣分 離以間接作電池組晶片蓄電(第一低速電池組晶片間接蓄電),或者,可機械分離及電氣分離以作電池組晶片更換(第一低速電池組晶片可置換)。 Referring to FIG. 7, the large low-speed power storage circuit chip 112 is internally composed of an upper first low-speed battery cell wafer 1121 (storage chip) and a lower-layer large low-speed circuit chip 1122 (generally low-speed circuit chip). The wafer-powered physical and circuit structure, wherein the upper first low-speed battery chip 1121 is electrically connected to the lower-sized large-speed low-speed circuit chip 1122 via the double-layer wafer power supply structure of the large low-speed storage circuit chip 112 (electrical connection of the power source) . The upper first low-speed battery chip 1121 can receive the power source (mains, mobile power) outside the large-sized low-speed storage circuit chip 112 and convert it into DC power for power storage (the first low-speed battery chip storage), the upper layer A low-speed battery cell wafer 1121 and its stored electrical energy is passed through the large low-speed storage circuit chip 112 in a two-layer wafer power supply structure, directly (power supply electrical connection) and stably supplied to the lower large-scale low-speed circuit chip 1122 (first low-speed battery pack) Wafer powered). In addition, the upper first low-speed battery chip 1121 and the lower large-sized low-speed circuit chip 1122 can be mechanically and electrically connected to directly store and supply the battery wafer (the first low-speed battery wafer directly stores power), the upper layer The first low speed battery chip 1121 and the lower large low speed circuit chip 1122 can also be mechanically separated and electrically divided. The battery is indirectly stored as a battery (indirect storage of the first low-speed battery chip), or mechanically separated and electrically separated for replacement of the battery (the first low-speed battery can be replaced).

再者,請參閱第9圖所示,該小型低速蓄電電路晶片114內部係由一上層第二低速電池組晶片1141(蓄電晶片)及一下層小型低速電路晶片1142(一般低速電路晶片)組成雙層小型低速晶片供電物理與電路結構,其中,該上層第二低速電池組晶片1141經由該小型低速蓄電電路晶片114之雙層晶片供電結構內部構,可與該下層小型低速電路晶片1142電氣連接(電源電氣連接)。該上層第二低速電池組晶片1141可接受該小型低速蓄電電路晶片114外部之電力電源(市電、行動電源)並轉換成直流電能以作電能蓄電(第二低速電池組晶片蓄電),該上層第二低速電池組晶片1141並將其蓄電電能經由該小型低速蓄電電路晶片114雙層晶片供電結構內部,直接(電源電氣連接)並穩定地供電予下層小型低速電路晶片1142使用(第二低速電池組晶片供電)。此外,該上層第二低速電池組晶片1141與該下層小型低速電路晶片1142可機械連接及電氣連接以直接作電池組晶片蓄電與供電(第二低速電池組晶片直接蓄電),該上層第二低速電池組晶片1141與該下層小型低速電路晶片1142亦可機械分離及電氣分離以間接作電池組晶片蓄電(第二低速電池組晶片間接蓄電),或者,可機械分離及電氣分離以作電池組晶片更換(第二低速電池組晶片可置換)。 Furthermore, as shown in FIG. 9, the small low-speed power storage circuit chip 114 is internally composed of an upper second low-speed battery cell wafer 1141 (storage chip) and a lower-layer small low-speed circuit chip 1142 (generally low-speed circuit chip). The layered small low-speed chip power supply physical and circuit structure, wherein the upper second low-speed battery cell wafer 1141 is electrically connected to the lower-layer small low-speed circuit chip 1142 via the dual-layer wafer power supply structure of the small low-speed storage circuit chip 114 ( Power supply electrical connection). The upper second low-speed battery chip 1141 can receive the power source (mains, mobile power) outside the small low-speed storage circuit chip 114 and convert it into DC power for power storage (second low-speed battery chip storage), the upper layer The second low-speed battery pack wafer 1141 and the stored electric energy thereof are directly connected to the lower-layer small-sized low-speed circuit wafer 1142 via the small-sized low-speed storage circuit wafer 114 in the double-layer wafer power supply structure (second low-speed battery pack) Wafer powered). In addition, the upper second low-speed battery cell wafer 1141 and the lower-layer small low-speed circuit chip 1142 can be mechanically and electrically connected to directly store and supply power to the battery chip (the second low-speed battery chip directly stores power), and the upper second low speed The battery chip 1141 and the lower small-sized low-speed circuit wafer 1142 can also be mechanically separated and electrically separated to indirectly be used for battery chip storage (second low-speed battery chip indirect storage), or mechanically separated and electrically separated for use as a battery chip. Replacement (the second low-speed battery pack wafer can be replaced).

由此,本項發明創作提出一電氣裝置可設一可蓄電晶片系統11,使得該可蓄電晶片系統11內部之該中央處理器蓄電電路晶片110利用 其雙層中央處理器晶片供電結構可作蓄電供電(中央處理器電池組晶片蓄電、中央處理器電池組晶片供電予中央處理器電路晶片),該大型高速蓄電電路晶片111、該小型高速蓄電電路晶片113利用其雙層高速晶片供電結構亦可作蓄電供電(高速電池組晶片蓄電、高速電池組晶片供電予高速電路晶片),而該大型低速蓄電電路晶片112、該小型低速蓄電電路晶片114利用其雙層低速晶片供電結構則亦可作蓄電供電(低速電池組晶片蓄電、低速電池組晶片供電予低速電路晶片)。如此,運用本項發明創作之「具有置換式可蓄電晶片系統之電路」,令一電氣裝置即能以內部可置換式之電池組晶片供電予電路晶片使用,該電氣裝置電路晶片工作無需額外之電池設備或供電設備,因而不致於發生電氣裝置經常使用之供電設備佔據電氣裝置相當空間,以致無法達成輕薄短小之要求,或者,電氣裝置使用者經常準備笨重的供電設備,造成電氣裝置使用上不方便等之情形。 Thus, the present invention proposes that an electrical device can be provided with an storable wafer system 11 such that the central processor storage circuit wafer 110 within the storable wafer system 11 utilizes The dual-layer central processor chip power supply structure can be used for power storage (central processor battery pack wafer storage, central processor battery pack wafer power supply to central processor circuit chip), the large high-speed storage circuit chip 111, the small high-speed storage circuit The wafer 113 can also be used for power storage (high-speed battery cell wafer storage, high-speed battery chip power supply to the high-speed circuit wafer) by using the double-layer high-speed wafer power supply structure, and the large low-speed storage circuit chip 112 and the small low-speed storage circuit wafer 114 are utilized. The dual-layer low-speed chip power supply structure can also be used for power storage (low-speed battery pack chip storage, low-speed battery chip power supply to low-speed circuit chips). Thus, by using the "circuit with a replaceable power storage chip system" created by the present invention, an electrical device can be powered by an internal replaceable battery chip to a circuit chip, and the circuit of the electrical device does not need to be used. Battery equipment or power supply equipment, so that the power supply equipment frequently used in electrical installations does not occupy a considerable space of the electrical equipment, so that the requirements of lightness and thinness cannot be achieved, or the users of the electrical equipment often prepare bulky power supply equipment, resulting in the use of electrical equipment. Convenient and so on.

上列詳細說明係針對本項發明創作之可行實施例的具體說明,惟該等實施例並非用以限制本創作之專利範圍,凡未脫離本項發明創作技藝精神所為之等效實施或變更,例如:等變化之等效性實施例,均應包含於本創作之專利範圍中。 The detailed description above is a detailed description of the possible embodiments of the present invention, but the embodiments are not intended to limit the scope of the invention, and the equivalent implementation or modification of the inventive concept is not deviated from the spirit of the invention. For example, equivalent embodiments of variations, etc., should be included in the scope of the patent of the present invention.

03‧‧‧整流器 03‧‧‧Rectifier

11‧‧‧可蓄電晶片系統 11‧‧‧Power storage chip system

110‧‧‧中央處理器蓄電電路晶片 110‧‧‧Central processor storage circuit chip

111‧‧‧大型高速蓄電電路晶片 111‧‧‧ Large high-speed storage circuit chip

112‧‧‧大型低速蓄電電路晶片 112‧‧‧ Large low-speed storage circuit chip

113‧‧‧小型高速蓄電電路晶片 113‧‧‧Small high-speed storage circuit chip

114‧‧‧小型低速蓄電電路晶片 114‧‧‧Small low-speed storage circuit chip

Claims (6)

一種具有置換式可蓄電晶片系統之電路,包括:一可蓄電晶片系統,設於一電氣裝置中,該可蓄電晶片系統為該電氣裝置內部之蓄電供電及信號處理設備;一中央處理器蓄電電路晶片,設於該可蓄電晶片系統中,該中央處理器蓄電電路晶片為該可蓄電晶片系統之一蓄電供電及中央處理器電路晶片元件設備,該中央處理器蓄電電路晶片具有雙層中央處理器晶片供電結構;一大型高速蓄電電路晶片,設於該可蓄電晶片系統中,該大型高速蓄電電路晶片為該可蓄電晶片系統之一蓄電供電及大型高速電路晶片元件設備,該大型高速蓄電電路晶片具有雙層大型高速晶片供電結構,該中央處理器蓄電電路晶片與該大型高速蓄電電路晶片信號電氣連接以作高速晶片信號控制;一小型高速蓄電電路晶片,設於該可蓄電晶片系統中,該小型高速蓄電電路晶片為該可蓄電晶片系統之一蓄電供電及小型高速電路晶片元件設備,該小型高速蓄電電路晶片具有雙層小型高速晶片供電結構,該中央處理器蓄電電路晶片與該小型高速蓄電電路晶片信號電氣連接以作高速晶片信號控制;一大型低速蓄電電路晶片,設於該可蓄電晶片系統中,該大型低速蓄電電路晶片為該可蓄電晶片系統之一蓄電供電及大型低速電路晶片元件設備,該大型低速蓄電電路晶片具有雙層大型低速晶片供電結構, 該中央處理器蓄電電路晶片與該大型低速蓄電電路晶片信號電氣連接以作低速晶片信號控制;一小型低速蓄電電路晶片,設於該可蓄電晶片系統中,該小型低速蓄電電路晶片為該可蓄電晶片系統之一蓄電供電及小型低速電路晶片元件設備,該小型低速蓄電電路晶片具有雙層小型低速晶片供電結構,該中央處理器蓄電電路晶片與該小型低速蓄電電路晶片信號電氣連接以作低速晶片信號控制;由此,使得該可蓄電晶片系統內部之該中央處理器蓄電電路晶片利用其雙層中央處理器晶片供電結構可作蓄電供電予中央處理器電路晶片,該大型高速蓄電電路晶片、該小型高速蓄電電路晶片利用其雙層高速晶片供電結構亦可作蓄電供電予高速電路晶片,而該大型低速蓄電電路晶片、該小型低速蓄電電路晶片利用其雙層低速晶片供電結構則亦可作蓄電供電予低速電路晶片;如此,運用本項發明創作之具有置換式可蓄電晶片系統之電路,令一電氣裝置即能以內部之蓄電電路晶片供電予電路晶片使用,該電氣裝置電路晶片工作無需額外之電池設備或供電設備。 A circuit having a replaceable power storage chip system, comprising: an energy storage chip system disposed in an electrical device, wherein the power storage chip system is a power storage and signal processing device inside the electrical device; and a central processor power storage circuit a chip, disposed in the power storage chip system, the central processor power storage circuit chip is a power storage power supply of the power storage chip system and a central processor circuit chip component device, the central processor power storage circuit chip has a double layer central processing unit a wafer power supply structure; a large-scale high-speed storage circuit chip disposed in the power storage chip system, the large-scale high-speed storage circuit chip is a power storage power supply of the power storage chip system and a large-scale high-speed circuit chip component device, the large-scale high-speed storage circuit chip The utility model has a double-layer large-scale high-speed chip power supply structure, wherein the central processor storage circuit chip is electrically connected to the large-scale high-speed storage circuit chip signal for high-speed wafer signal control; and a small high-speed storage circuit chip is disposed in the power storage chip system. Small high-speed storage circuit chip for this A power storage and small high-speed circuit chip component device of a wafer system having a double-layer small high-speed wafer power supply structure, the central processor power storage circuit chip being electrically connected to the small high-speed power storage circuit chip signal for high-speed wafer Signal control; a large low-speed power storage circuit chip disposed in the power storage chip system, the large low-speed power storage circuit chip is a power storage power supply of the power storage chip system and a large low-speed circuit chip component device, the large low-speed storage circuit chip has Double-layer large low-speed chip power supply structure, The central processor power storage circuit chip is electrically connected to the large low speed power storage circuit chip signal for low speed wafer signal control; and a small low speed power storage circuit chip is disposed in the power storage chip system, wherein the small low speed power storage circuit chip is capable of storing electricity One of the wafer system power storage and small low-speed circuit chip device, the small low-speed power storage circuit chip has a double-layer small low-speed wafer power supply structure, and the central processor power storage circuit chip is electrically connected to the small low-speed storage circuit chip signal for low-speed wafer Signal control; thereby, the central processor power storage circuit chip inside the power storage chip system can be used for power storage and power supply to the central processor circuit chip by using the double-layer central processor chip power supply structure, the large high-speed storage circuit chip, The small high-speed power storage circuit chip can also be used for power storage and high-speed circuit chip by using the double-layer high-speed chip power supply structure, and the large low-speed power storage circuit chip and the small low-speed power storage circuit chip can also be used for power storage by using the double-layer low-speed chip power supply structure. Power supply to low speed power Wafer; thus, with the circuit of the present invention having a replaceable rechargeable wafer system, an electrical device can be powered by an internal storage circuit chip for use in a circuit wafer that does not require additional battery equipment or Power supply equipment. 如請求項1所述之具有置換式可蓄電晶片系統之電路,該中央處理器蓄電電路晶片內部係由一上層中央處理器電池組晶片即蓄電晶片及一下層中央處理器電路晶片即CPU晶片組成雙層中央處理器晶片供電結構,其中,該上層中央處理器電池組晶片經由該中央處理器蓄電電路晶片之雙層晶片供電結構內部,可與該下層中央處理器電路晶片電源電氣連接;該上層中央處理器電池組晶片可接受外部之電力電源並轉 換成直流電能以作電能蓄電即中央處理器電池組晶片蓄電,該上層中央處理器電池組晶片並將其蓄電電能經由該中央處理器蓄電電路晶片雙層晶片供電結構內部,直接並穩定地供電予下層中央處理器電路晶片使用即中央處理器電池組晶片供電;此外,該上層中央處理器電池組晶片與該下層中央處理器電路晶片可機械連接及電氣連接以直接作電池組晶片蓄電與供電使中央處理器電池組晶片直接蓄電,該上層中央處理器電池組晶片與該下層中央處理器電路晶片亦可機械分離及電氣分離以間接作電池組晶片蓄電使中央處理器電池組晶片間接蓄電,或者,可機械分離及電氣分離以作電池組晶片更換使中央處理器電池組晶片可置換。 The circuit of the circuit-capable storage battery system of claim 1, wherein the internal processing circuit of the central processing unit is composed of an upper central processing unit battery chip, that is, a power storage chip and a lower central processing circuit chip, that is, a CPU chip. a dual-layer central processor chip power supply structure, wherein the upper central processing unit battery chip is electrically connected to the lower central processing circuit chip power supply via the dual-layer wafer power supply structure of the central processing circuit chip; the upper layer The central processor battery pack chip can accept external power supply and turn The DC power is stored for power storage, that is, the central processing unit battery chip is stored, and the upper central processing unit battery chip and the stored electric energy thereof are directly and stably supplied through the central processing circuit of the central processing battery chip double-layer chip power supply structure. The lower central processing unit circuit chip is powered by the central processing unit battery chip; in addition, the upper central processing unit battery chip and the lower central processing unit circuit are mechanically and electrically connected to directly store and power the battery chip. The central processing unit battery chip is directly stored, and the upper central processing unit battery chip and the lower central processing circuit chip are mechanically separated and electrically separated to indirectly perform battery storage of the battery unit to indirectly store the central processing unit battery chip. Alternatively, mechanical separation and electrical separation for battery pack wafer replacement allows the central processor battery pack wafer to be replaced. 如請求項1所述之具有置換式可蓄電晶片系統之電路,該大型高速蓄電電路晶片內部係由一上層第一高速電池組晶片即蓄電晶片及一下層大型高速電路晶片即一般高速電路晶片組成雙層大型高速晶片供電結構,其中,該上層第一高速電池組晶片經由該大型高速蓄電電路晶片之雙層晶片供電結構內部,可與該下層大型高速電路晶片電源電氣連接;該上層第一高速電池組晶片可接受外部之電力電源並轉換成直流電能以作電能蓄電即第一高速電池組晶片蓄電,該上層第一高速電池組晶片並將其蓄電電能經由該大型高速蓄電電路晶片雙層晶片供電結構內部,直接並穩定地供電予下層大型高速電路晶片使用即第一高速電池組晶片供電;此外,該上層第一高速電池組晶片與該下層大型高速電路晶片可機械連接及電氣連接以直接作電池組晶片蓄電與供電使第一高速電池組晶片直接蓄電,該上層第一高速電池組晶片 與該下層大型高速電路晶片亦可機械分離及電氣分離以間接作電池組晶片蓄電使第一高速電池組晶片間接蓄電,或者,可機械分離及電氣分離以作電池組晶片更換使第一高速電池組晶片可置換。 The circuit of claim 1, wherein the large-scale high-speed storage circuit chip comprises an upper-layer first high-speed battery chip, that is, a power storage chip, and a lower-layer large-speed high-speed circuit chip, that is, a general high-speed circuit chip. a double-layer large-scale high-speed wafer power supply structure, wherein the upper first high-speed battery chip is electrically connected to the lower-layer large-speed high-speed circuit chip power supply via the double-layer wafer power supply structure of the large-sized high-speed storage circuit chip; The battery pack wafer can receive external power supply and convert it into DC power for power storage, that is, the first high-speed battery pack wafer is stored, and the upper first high-speed battery pack wafer and the stored electric energy thereof pass through the large-scale high-speed storage circuit wafer double-layer wafer. The power supply structure directly and stably supplies power to the lower large-scale high-speed circuit chip, that is, the first high-speed battery chip is used for power supply; in addition, the upper first high-speed battery chip and the lower large-sized high-speed circuit chip are mechanically and electrically connected directly Battery pack wafer storage and power supply make the first high speed The battery chip directly stores electricity, and the upper first high speed battery chip The lower-level large-scale high-speed circuit chip can also be mechanically separated and electrically separated to indirectly charge the battery of the battery pack to indirectly store the first high-speed battery chip, or can be mechanically separated and electrically separated for replacement of the battery wafer to make the first high-speed battery. The group wafer can be replaced. 如請求項1所述之具有置換式可蓄電晶片系統之電路,該小型高速蓄電電路晶片內部係由一上層第二高速電池組晶片即蓄電晶片及一下層小型高速電路晶片即一般高速電路晶片組成雙層小型高速晶片供電結構,其中,該上層第二高速電池組晶片經由該小型高速蓄電電路晶片之雙層晶片供電結構內部,可與該下層小型高速電路晶片電源電氣連接;該上層第二高速電池組晶片可接受外部之電力電源並轉換成直流電能以作電能蓄電即第二高速電池組晶片蓄電,該上層第二高速電池組晶片並將其蓄電電能經由該小型高速蓄電電路晶片雙層晶片供電結構內部,直接並穩定地供電予下層小型高速電路晶片使用即第二高速電池組晶片供電;此外,該上層第二高速電池組晶片與該下層小型高速電路晶片可機械連接及電氣連接以直接作電池組晶片蓄電與供電使第二高速電池組晶片直接蓄電,該上層第二高速電池組晶片與該下層小型高速電路晶片亦可機械分離及電氣分離以間接作電池組晶片蓄電使第二高速電池組晶片間接蓄電,或者,可機械分離及電氣分離以作電池組晶片更換使第二高速電池組晶片可置換。 The circuit of claim 1, wherein the small high-speed power storage circuit chip is composed of an upper second high-speed battery chip, that is, a power storage chip, and a lower-layer small high-speed circuit chip, that is, a general high-speed circuit chip. a double-layer small high-speed wafer power supply structure, wherein the upper second high-speed battery chip is electrically connected to the lower-sized small-speed high-speed circuit chip power supply via the double-layer wafer power supply structure of the small high-speed power storage circuit chip; the upper second high speed The battery chip can receive an external power source and convert it into DC power for power storage, that is, the second high-speed battery chip is stored, and the upper second high-speed battery chip and the stored power thereof pass through the small high-speed storage circuit wafer double-layer wafer. The power supply structure directly and stably supplies power to the lower small-sized high-speed circuit chip, that is, the second high-speed battery chip is used for power supply; in addition, the upper second high-speed battery chip and the lower small-sized high-speed circuit chip are mechanically and electrically connected directly Battery pack wafer storage and power supply for the second high speed The battery cell wafer is directly stored, and the upper second high-speed battery chip and the lower small-sized high-speed circuit chip are mechanically separated and electrically separated to indirectly operate as a battery chip to indirectly store the second high-speed battery chip, or mechanically separate. And electrical separation for battery chip replacement allows the second high speed battery wafer to be replaced. 如請求項1所述之具有置換式可蓄電晶片系統之電路,該大型低速蓄電電路晶片內部係由一上層第一低速電池組晶片即蓄電晶片及一下層大型低速電路晶片即一般低速電路晶片組成雙層大型低速晶片供電結構,其中,該上層第一低速電池組晶片經由該大型低速蓄電電路晶片 之雙層晶片供電結構內部,可與該下層大型低速電路晶片電源電氣連接;該上層第一低速電池組晶片可接受外部之電力電源並轉換成直流電能以作電能蓄電即第一低速電池組晶片蓄電,該上層第一低速電池組晶片並將其蓄電電能經由該大型低速蓄電電路晶片雙層晶片供電結構內部,直接並穩定地供電予下層大型低速電路晶片使用即第一低速電池組晶片供電;此外,該上層第一低速電池組晶片與該下層大型低速電路晶片可機械連接及電氣連接以直接作電池組晶片蓄電與供電使第一低速電池組晶片直接蓄電,該上層第一低速電池組晶片與該下層大型低速電路晶片亦可機械分離及電氣分離以間接作電池組晶片蓄電使第一低速電池組晶片間接蓄電,或者,可機械分離及電氣分離以作電池組晶片更換使第一低速電池組晶片可置換。 The circuit of claim 1, wherein the internal circuit of the large-sized low-speed storage circuit is composed of an upper first low-speed battery chip, that is, a power storage chip, and a lower-level large-speed low-speed circuit chip, that is, a general low-speed circuit chip. a double-layer large low-speed wafer power supply structure, wherein the upper first low-speed battery chip passes the large low-speed storage circuit chip The double-layer wafer power supply structure can be electrically connected to the lower-level large-scale low-speed circuit chip power supply; the upper first low-speed battery chip can receive an external power supply and convert it into DC power for power storage, that is, the first low-speed battery chip. Charging, the upper first low-speed battery chip and storing the stored electric energy through the large low-speed storage circuit wafer double-layer wafer power supply structure, directly and stably supplying power to the lower large-scale low-speed circuit chip to use the first low-speed battery chip to supply power; In addition, the upper first low-speed battery chip and the lower large-sized low-speed circuit chip are mechanically and electrically connected to directly store and supply the battery of the battery, and the first low-speed battery chip is directly stored. The upper first low-speed battery chip The lower-level large-scale low-speed circuit chip can also be mechanically separated and electrically separated to indirectly charge the battery of the battery pack to indirectly store the first low-speed battery chip, or can be mechanically separated and electrically separated for replacement of the battery chip to make the first low-speed battery. The group wafer can be replaced. 如請求項1所述之具有置換式可蓄電晶片系統之電路,該小型低速蓄電電路晶片內部係由一上層第二低速電池組晶片即蓄電晶片及一下層小型低速電路晶片即一般低速電路晶片組成雙層小型低速晶片供電結構,其中,該上層第二低速電池組晶片經由該小型低速蓄電電路晶片之雙層晶片供電結構內部,可與該下層小型低速電路晶片電源電氣連接;該上層第二低速電池組晶片可接受外部之電力電源並轉換成直流電能以作電能蓄電即第二低速電池組晶片蓄電,該上層第二低速電池組晶片並將其蓄電電能經由該小型低速蓄電電路晶片雙層晶片供電結構內部,直接並穩定地供電予下層小型低速電路晶片使用即第二低速電池組晶片供電;此外,該上層第二低速電池組晶片與該下層小型低速電路晶片可機械連接及電氣連接以直接作電池組晶片蓄電與供 電使第二低速電池組晶片直接蓄電,該上層第二低速電池組晶片與該下層小型低速電路晶片亦可機械分離及電氣分離以間接作電池組晶片蓄電使第二低速電池組晶片間接蓄電,或者,可機械分離及電氣分離以作電池組晶片更換使第二低速電池組晶片可置換。 The circuit of claim 1, wherein the small low-speed power storage circuit chip is internally composed of an upper second low-speed battery chip, that is, a power storage chip, and a lower-sized small low-speed circuit chip, that is, a general low-speed circuit chip. The double-layer small low-speed chip power supply structure, wherein the upper second low-speed battery chip is electrically connected to the lower-layer small-speed circuit chip power supply via the double-layer wafer power supply structure of the small low-speed power storage circuit chip; the upper second low speed The battery chip can receive an external power source and convert it into DC power for power storage, that is, the second low-speed battery chip, and the upper second low-speed battery chip and store the stored energy through the small low-speed storage circuit wafer double-layer wafer The power supply structure directly and stably supplies power to the lower small-sized low-speed circuit chip to be powered by the second low-speed battery chip; further, the upper second low-speed battery chip is mechanically and electrically connected to the lower small-sized low-speed circuit chip directly Battery pack wafer storage and supply The second low-speed battery chip is electrically stored, and the upper second low-speed battery chip and the lower small-sized low-speed circuit chip are mechanically separated and electrically separated to indirectly operate as a battery chip to indirectly store the second low-speed battery chip. Alternatively, mechanical separation and electrical separation for battery chip replacement allows the second low speed battery wafer to be replaced.
TW103141321A 2014-11-28 2014-11-28 A circuit with a replacement type storage system TWI524171B (en)

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