TWI521716B - Thin film transistor and display device - Google Patents
Thin film transistor and display device Download PDFInfo
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- TWI521716B TWI521716B TW102109038A TW102109038A TWI521716B TW I521716 B TWI521716 B TW I521716B TW 102109038 A TW102109038 A TW 102109038A TW 102109038 A TW102109038 A TW 102109038A TW I521716 B TWI521716 B TW I521716B
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- Prior art keywords
- protective film
- channel protective
- film
- semiconductor layer
- conductive layer
- Prior art date
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- 239000010409 thin film Substances 0.000 title claims description 33
- 239000010408 film Substances 0.000 claims description 366
- 230000001681 protective effect Effects 0.000 claims description 195
- 239000004065 semiconductor Substances 0.000 claims description 181
- 238000002161 passivation Methods 0.000 claims description 54
- 239000001257 hydrogen Substances 0.000 claims description 13
- 229910052739 hydrogen Inorganic materials 0.000 claims description 13
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims description 12
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 12
- 239000001301 oxygen Substances 0.000 claims description 12
- 229910052760 oxygen Inorganic materials 0.000 claims description 12
- 229910052782 aluminium Inorganic materials 0.000 claims description 10
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 8
- 125000004429 atom Chemical group 0.000 claims description 8
- 229910000420 cerium oxide Inorganic materials 0.000 claims description 7
- BMMGVYCKOGBVEV-UHFFFAOYSA-N oxo(oxoceriooxy)cerium Chemical compound [Ce]=O.O=[Ce]=O BMMGVYCKOGBVEV-UHFFFAOYSA-N 0.000 claims description 7
- 229910052684 Cerium Inorganic materials 0.000 claims description 6
- BCZWPKDRLPGFFZ-UHFFFAOYSA-N azanylidynecerium Chemical compound [Ce]#N BCZWPKDRLPGFFZ-UHFFFAOYSA-N 0.000 claims description 6
- GWXLDORMOJMVQZ-UHFFFAOYSA-N cerium Chemical compound [Ce] GWXLDORMOJMVQZ-UHFFFAOYSA-N 0.000 claims description 6
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical group [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 5
- 125000004430 oxygen atom Chemical group O* 0.000 claims description 5
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 4
- 229910052733 gallium Inorganic materials 0.000 claims description 4
- 229910052732 germanium Inorganic materials 0.000 claims description 4
- 229910052738 indium Inorganic materials 0.000 claims description 4
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 4
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims description 3
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 claims 2
- 229910052725 zinc Inorganic materials 0.000 claims 2
- 239000011701 zinc Substances 0.000 claims 2
- 125000004435 hydrogen atom Chemical class [H]* 0.000 claims 1
- 239000010410 layer Substances 0.000 description 265
- 239000000758 substrate Substances 0.000 description 23
- 238000005401 electroluminescence Methods 0.000 description 22
- 239000000463 material Substances 0.000 description 16
- 238000007254 oxidation reaction Methods 0.000 description 13
- 239000012044 organic layer Substances 0.000 description 12
- 230000003647 oxidation Effects 0.000 description 12
- 238000012986 modification Methods 0.000 description 11
- 230000004048 modification Effects 0.000 description 11
- 230000000052 comparative effect Effects 0.000 description 9
- 238000004519 manufacturing process Methods 0.000 description 9
- 230000004888 barrier function Effects 0.000 description 7
- 238000000137 annealing Methods 0.000 description 6
- 229910000449 hafnium oxide Inorganic materials 0.000 description 5
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 4
- 239000003990 capacitor Substances 0.000 description 4
- 230000005669 field effect Effects 0.000 description 4
- 229910052735 hafnium Inorganic materials 0.000 description 4
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 description 4
- 239000011347 resin Substances 0.000 description 4
- 229920005989 resin Polymers 0.000 description 4
- 238000007789 sealing Methods 0.000 description 4
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 4
- 229910007541 Zn O Inorganic materials 0.000 description 3
- 230000007547 defect Effects 0.000 description 3
- 230000005684 electric field Effects 0.000 description 3
- 230000005525 hole transport Effects 0.000 description 3
- 238000002347 injection Methods 0.000 description 3
- 239000007924 injection Substances 0.000 description 3
- 239000011810 insulating material Substances 0.000 description 3
- 239000010936 titanium Substances 0.000 description 3
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 2
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 description 2
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 description 2
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 2
- 239000002253 acid Substances 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 229910052750 molybdenum Inorganic materials 0.000 description 2
- 230000035515 penetration Effects 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 239000003870 refractory metal Substances 0.000 description 2
- 229910052707 ruthenium Inorganic materials 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- 229910000838 Al alloy Inorganic materials 0.000 description 1
- 241001239379 Calophysus macropterus Species 0.000 description 1
- 229910016024 MoTa Inorganic materials 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 238000002441 X-ray diffraction Methods 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000002425 crystallisation Methods 0.000 description 1
- 230000008025 crystallization Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000001307 helium Substances 0.000 description 1
- 229910052734 helium Inorganic materials 0.000 description 1
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- SJCKRGFTWFGHGZ-UHFFFAOYSA-N magnesium silver Chemical compound [Mg].[Ag] SJCKRGFTWFGHGZ-UHFFFAOYSA-N 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 239000013081 microcrystal Substances 0.000 description 1
- DTSBBUTWIOVIBV-UHFFFAOYSA-N molybdenum niobium Chemical compound [Nb].[Mo] DTSBBUTWIOVIBV-UHFFFAOYSA-N 0.000 description 1
- MGRWKWACZDFZJT-UHFFFAOYSA-N molybdenum tungsten Chemical compound [Mo].[W] MGRWKWACZDFZJT-UHFFFAOYSA-N 0.000 description 1
- BPUBBGLMJRNUCC-UHFFFAOYSA-N oxygen(2-);tantalum(5+) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ta+5].[Ta+5] BPUBBGLMJRNUCC-UHFFFAOYSA-N 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 1
- 238000009832 plasma treatment Methods 0.000 description 1
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 1
- 239000002985 plastic film Substances 0.000 description 1
- 229920006255 plastic film Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 229910001936 tantalum oxide Inorganic materials 0.000 description 1
- JBQYATWDVHIOAR-UHFFFAOYSA-N tellanylidenegermanium Chemical compound [Te]=[Ge] JBQYATWDVHIOAR-UHFFFAOYSA-N 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- 239000011787 zinc oxide Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
- H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1025—Channel region of field-effect devices
- H01L29/1029—Channel region of field-effect devices of field-effect transistors
- H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Thin Film Transistor (AREA)
- Electroluminescent Light Sources (AREA)
- Electrodes Of Semiconductors (AREA)
Description
此處所述的實施例大致上係有關於薄膜電晶體及顯示裝置。 The embodiments described herein relate generally to thin film transistors and display devices.
薄膜電晶體(TFT)被廣泛使用於液晶顯示裝置、有機電致發光(EL)顯示裝置、等等。 Thin film transistors (TFTs) are widely used in liquid crystal display devices, organic electroluminescence (EL) display devices, and the like.
用於大型顯示裝置中的非晶矽TFT具有約1cm2/V．s的遷移率、由電漿CVD(化學氣相沈積)所形成、及因而均勻地及不昂貴地形成於大表面積上。 The amorphous germanium TFT used in a large display device has about 1 cm 2 /V. The mobility of s, formed by plasma CVD (chemical vapor deposition), and thus uniformly and inexpensively formed on a large surface area.
用於小型到中型尺寸的顯示裝置中的低溫多晶矽TFT具有約100cm2/V．s的遷移率以及當長時間操作時具有高可靠度。 The low temperature polycrystalline germanium TFT used in a small to medium size display device has a size of about 100 cm 2 /V. The mobility of s and high reliability when operating for a long time.
近年來，希望具有更高可靠度的TFT。因此，作為TFT的半導體層材料之氧化物半導體正引起注意。 In recent years, TFTs with higher reliability have been desired. Therefore, an oxide semiconductor which is a material of a semiconductor layer of a TFT is attracting attention.
1‧‧‧像素單元 1‧‧‧pixel unit
2‧‧‧訊號線驅動單元 2‧‧‧Signal line drive unit
3‧‧‧控制線驅動單元 3‧‧‧Control line drive unit
4‧‧‧控制器 4‧‧‧ Controller
11‧‧‧有機EL元件 11‧‧‧Organic EL components
16‧‧‧像素電極 16‧‧‧pixel electrode
20‧‧‧基板 20‧‧‧Substrate
20a‧‧‧主表面 20a‧‧‧Main surface
21‧‧‧主體 21‧‧‧ Subject
22‧‧‧障壁層 22‧‧‧Baffle layer
23‧‧‧閘極電極 23‧‧‧gate electrode
24‧‧‧閘極絕緣膜 24‧‧‧gate insulating film
24a‧‧‧主表面 24a‧‧‧Main surface
25‧‧‧半導體層 25‧‧‧Semiconductor layer
25a‧‧‧第一部份 25a‧‧‧ first part
25b‧‧‧第二部份 25b‧‧‧ second part
25c‧‧‧第三部份 25c‧‧‧ third part
25d‧‧‧第四部份 25d‧‧‧Part 4
25e‧‧‧第五部份 25e‧‧‧Part 5
25f‧‧‧第六部份 25f‧‧‧Part VI
25g‧‧‧第七部份 25g‧‧‧Part 7
25t‧‧‧側表面 25t‧‧‧ side surface
25X‧‧‧端部 25X‧‧‧ end
25Y‧‧‧端部 25Y‧‧‧End
25da‧‧‧部份 25da‧‧‧parts
25db‧‧‧部份 25db‧‧‧parts
25ea‧‧‧部份 25ea‧‧‧Parts
26‧‧‧通道保護膜 26‧‧‧Channel protective film
26a‧‧‧第一開口 26a‧‧‧First opening
26b‧‧‧第二開口 26b‧‧‧second opening
27‧‧‧第一導電層 27‧‧‧First conductive layer
28‧‧‧第二導電層 28‧‧‧Second conductive layer
29‧‧‧鈍化膜 29‧‧‧ Passivation film
30‧‧‧濾光器 30‧‧‧ Filter
31‧‧‧像素電極 31‧‧‧pixel electrode
32‧‧‧平坦化膜 32‧‧‧flat film
32a‧‧‧開口 32a‧‧‧ openings
33‧‧‧有機層 33‧‧‧Organic layer
34‧‧‧對立電極 34‧‧‧ opposite electrodes
35‧‧‧密封單元 35‧‧‧ Sealing unit
100‧‧‧顯示區 100‧‧‧ display area
110‧‧‧週邊區 110‧‧‧The surrounding area
121‧‧‧寫入薄膜電晶體 121‧‧‧Write film transistor
122‧‧‧驅動薄膜電晶體 122‧‧‧Drive film transistor
123‧‧‧電容器 123‧‧‧ capacitor
124‧‧‧電源線 124‧‧‧Power cord
200‧‧‧有機EL顯示裝置 200‧‧‧Organic EL display device
261‧‧‧第一通道保護膜 261‧‧‧First channel protective film
261a‧‧‧部份 261a‧‧‧Parts
261s‧‧‧側表面 261s‧‧‧ side surface
261t‧‧‧側表面 261t‧‧‧ side surface
261aT‧‧‧上表面 261aT‧‧‧ upper surface
262‧‧‧第二通道保護膜 262‧‧‧Second channel protective film
262a‧‧‧部份 262a‧‧‧Parts
262p‧‧‧部份 262p‧‧‧parts
312‧‧‧薄膜電晶體 312‧‧‧film transistor
323‧‧‧閘極電極 323‧‧‧gate electrode
324‧‧‧閘極絕緣膜 324‧‧‧gate insulating film
325‧‧‧通道保護膜 325‧‧‧channel protective film
325b‧‧‧第二部份 325b‧‧‧ second part
326‧‧‧通道保護膜 326‧‧‧channel protective film
326a‧‧‧開口 326a‧‧‧ openings
326b‧‧‧開口 326b‧‧‧ openings
327‧‧‧第一導電層 327‧‧‧First conductive layer
328‧‧‧第二導電層 328‧‧‧Second conductive layer
412‧‧‧驅動薄膜電晶體 412‧‧‧Drive film transistor
423‧‧‧閘極電極 423‧‧‧gate electrode
424‧‧‧閘極絕緣膜 424‧‧‧gate insulating film
425‧‧‧半導體層 425‧‧‧Semiconductor layer
426‧‧‧通道保護膜 426‧‧‧channel protective film
426A‧‧‧第一通道保護膜 426A‧‧‧First channel protective film
426B‧‧‧第二通道保護膜 426B‧‧‧Second channel protective film
429‧‧‧鈍化膜 429‧‧‧passivation film
512‧‧‧驅動薄膜電晶體 512‧‧‧Drive film transistor
523‧‧‧閘極電極 523‧‧‧gate electrode
524‧‧‧閘極絕緣膜 524‧‧‧gate insulating film
525‧‧‧半導體層 525‧‧‧Semiconductor layer
526‧‧‧通道保護膜 526‧‧‧channel protective film
526A‧‧‧第一通道保護膜 526A‧‧‧First channel protective film
526B‧‧‧第二通道保護膜 526B‧‧‧Second channel protective film
529‧‧‧鈍化膜 529‧‧‧passivation film
612‧‧‧驅動薄膜電晶體 612‧‧‧Drive film transistor
623‧‧‧閘極電極 623‧‧‧gate electrode
624‧‧‧閘極絕緣膜 624‧‧‧Gate insulation film
625‧‧‧半導體層 625‧‧‧Semiconductor layer
625a‧‧‧第一部份 625a‧‧‧ first part
625b‧‧‧第二部份 625b‧‧‧ second part
625c‧‧‧第三部份 625c‧‧‧Part III
625d‧‧‧第四部份 625d‧‧‧Part 4
625e‧‧‧第五部份 625e‧‧‧Part 5
625f‧‧‧第六部份 625f‧‧‧Part 6
625g‧‧‧第七部份 625g‧‧‧Part 7
625da‧‧‧部份 625da‧‧‧parts
625db‧‧‧部份 625db‧‧‧parts
626‧‧‧通道保護膜 626‧‧‧channel protective film
626A‧‧‧第一通道保護膜 626A‧‧‧First channel protective film
626B‧‧‧第二通道保護膜 626B‧‧‧Second channel protective film
627‧‧‧第一導電層 627‧‧‧First conductive layer
628‧‧‧第二導電層 628‧‧‧Second conductive layer
629‧‧‧鈍化膜 629‧‧‧passivation film
圖1是平面視圖，顯示根據第一實施例之顯示裝置； 圖2是平面視圖，顯示根據第一實施例之薄膜電晶體；圖3是剖面視圖，顯示根據第一實施例之薄膜電晶體；圖4是另一剖面視圖，顯示根據第一實施例之薄膜電晶體；圖5是部份剖面視圖，顯示根據第一實施例之顯示裝置；圖6是圖形，顯示根據第一實施例之薄膜電晶體的特徵；圖7是平面視圖，顯示根據比較實例之薄膜電晶體；圖8是圖形，顯示根據比較實例之薄膜電晶體的特徵；圖9是剖面視圖，顯示根據第一實施例之第一變型的薄膜電晶體；圖10是剖面視圖，顯示根據第一實施例之第二變型的薄膜電晶體；圖11是平面視圖，顯示根據第二實施例之薄膜電晶體；圖12是剖面視圖，顯示根據第二實施例之薄膜電晶體；圖13A至圖13F是剖面視圖，顯示根據第三實施例之薄膜電晶體的製造方法；圖14A至圖14D是剖面視圖，顯示根據第三實施例 之薄膜電晶體的製造方法；圖15是流程圖，顯示根據第三實施例之顯示裝置的製造方法。 Figure 1 is a plan view showing a display device according to a first embodiment; Figure 2 is a plan view showing a thin film transistor according to a first embodiment; Figure 3 is a cross-sectional view showing a thin film transistor according to the first embodiment; and Figure 4 is another cross-sectional view showing the film according to the first embodiment FIG. 5 is a partial cross-sectional view showing a display device according to the first embodiment; FIG. 6 is a view showing features of the thin film transistor according to the first embodiment; FIG. 7 is a plan view showing a comparative example according to a comparative example FIG. 8 is a view showing a characteristic of a thin film transistor according to a comparative example; FIG. 9 is a cross-sectional view showing a thin film transistor according to a first modification of the first embodiment; FIG. 10 is a cross-sectional view showing A thin film transistor of a second modification of an embodiment; FIG. 11 is a plan view showing a thin film transistor according to a second embodiment; FIG. 12 is a cross-sectional view showing a thin film transistor according to the second embodiment; FIG. 13A to FIG. 13F is a cross-sectional view showing a method of manufacturing a thin film transistor according to a third embodiment; FIGS. 14A to 14D are cross-sectional views showing a third embodiment according to the third embodiment A method of manufacturing a thin film transistor; and Fig. 15 is a flow chart showing a method of manufacturing the display device according to the third embodiment.
根據一個實施例，顯示裝置包含薄膜電晶體。薄膜電晶體包含閘極絕緣膜、半導體層、閘極電極、第一通道保護膜、第二通道保護膜、第一導電層、第二導電層、及鈍化膜。閘極絕緣膜具有主表面。半導體層係設於主表面的一部份上。半導體層包含第一部份、在與主表面平行的平面中與第一部份分離的第二部份、設在第一部份與第二部份之間的第三部份、設在第一部份與第三部份之間的第四部份、設在第二部份與第三部份之間的第五部份、設在第一部份與第四部份之間的第六部份、以及設在第二部份與第五部份之間的第七部份。閘極絕緣膜係配置在半導體層與閘極電極之間。第一通道保護膜遮蓋半導體層的第三部份。第二通道保護膜遮蓋第五部份、第四部份、及第一通道保護膜的上表面。第一導電層遮蓋第六部份。第二通道保護膜的部份係配置在第一導電層與第四部份之間。第二導電層遮蓋第七部份。第二通道保護膜的一部份係配置在第二導電層與第五部份之間。鈍化膜遮蓋第一部份、第二部份、第一導電層、第二導電層、及第二通道保護膜。鈍化膜包含不小於1.0×1020原子/cm3的氫。 According to one embodiment, the display device comprises a thin film transistor. The thin film transistor includes a gate insulating film, a semiconductor layer, a gate electrode, a first channel protective film, a second channel protective film, a first conductive layer, a second conductive layer, and a passivation film. The gate insulating film has a main surface. The semiconductor layer is disposed on a portion of the major surface. The semiconductor layer includes a first portion, a second portion separated from the first portion in a plane parallel to the main surface, and a third portion disposed between the first portion and the second portion, and is disposed in the first portion a fourth portion between a portion and a third portion, a fifth portion between the second portion and the third portion, and a portion between the first portion and the fourth portion Six parts, and the seventh part between the second part and the fifth part. The gate insulating film is disposed between the semiconductor layer and the gate electrode. The first channel protective film covers the third portion of the semiconductor layer. The second channel protective film covers the fifth portion, the fourth portion, and the upper surface of the first channel protective film. The first conductive layer covers the sixth portion. A portion of the second channel protective film is disposed between the first conductive layer and the fourth portion. The second conductive layer covers the seventh portion. A portion of the second channel protective film is disposed between the second conductive layer and the fifth portion. The passivation film covers the first portion, the second portion, the first conductive layer, the second conductive layer, and the second channel protective film. The passivation film contains not less than 1.0 × 10 20 atoms/cm 3 of hydrogen.
根據一個實施例，薄膜電晶體包含閘極絕緣膜、半導 體層、閘極電極、第一通道保護膜、第二通道保護膜、第一導電層、第二導電層、及鈍化膜。閘極絕緣膜具有主表面。半導體層係設於主表面的一部份上。半導體層包含第一部份、在與主表面平行的平面中與第一部份分離的第二部份、設在第一部份與第二部份之間的第三部份、設在第一部份與第三部份之間的第四部份、設在第二部份與第三部份之間的第五部份、設在第一部份與第四部份之間的第六部份、以及設在第二部份與第五部份之間的第七部份。閘極絕緣膜係配置在半導體層與閘極電極之間。第一通道保護膜遮蓋半導體層的第三部份。第二通道保護膜遮蓋第五部份、第四部份、及第一通道保護膜的上表面。第一導電層遮蓋第六部份。第二通道保護膜的部份係配置在第一導電層與第四部份之間。第二導電層遮蓋第七部份。第二通道保護膜的一部份配置在第二導電層與第五部份之間。鈍化膜遮蓋第一部份、第二部份、第一導電層、第二導電層、及第二通道保護膜。鈍化膜包含不小於1.0×1020原子/cm3的氫。 According to an embodiment, the thin film transistor includes a gate insulating film, a semiconductor layer, a gate electrode, a first channel protective film, a second channel protective film, a first conductive layer, a second conductive layer, and a passivation film. The gate insulating film has a main surface. The semiconductor layer is disposed on a portion of the major surface. The semiconductor layer includes a first portion, a second portion separated from the first portion in a plane parallel to the main surface, and a third portion disposed between the first portion and the second portion, and is disposed in the first portion a fourth portion between a portion and a third portion, a fifth portion between the second portion and the third portion, and a portion between the first portion and the fourth portion Six parts, and the seventh part between the second part and the fifth part. The gate insulating film is disposed between the semiconductor layer and the gate electrode. The first channel protective film covers the third portion of the semiconductor layer. The second channel protective film covers the fifth portion, the fourth portion, and the upper surface of the first channel protective film. The first conductive layer covers the sixth portion. A portion of the second channel protective film is disposed between the first conductive layer and the fourth portion. The second conductive layer covers the seventh portion. A portion of the second channel protective film is disposed between the second conductive layer and the fifth portion. The passivation film covers the first portion, the second portion, the first conductive layer, the second conductive layer, and the second channel protective film. The passivation film contains not less than 1.0 × 10 20 atoms/cm 3 of hydrogen.
由於半導體材料具有薄膜電晶體(TFT)中要使用的高可靠度，因此，氧化物半導體正引起注意。舉例而言，例如銦鎵鋅氧化物(In-Ga-Zn-O(於下稱為IGZO))等氧化物半導體引起注意。氧化物半導體藉由例如濺射而在室溫下以膜形式而被均勻地形成於大表面積之上，並且，在可見光區中是透明的。因此，使用此氧化物半導體的TFT被形成於具有低熱穩定的塑膠膜基板上；以及，能夠使用 此TFT以形成可撓顯示裝置。此氧化物半導體具有高場效遷移率，約為非晶矽的場效遷移率的10倍。而且，藉由執行300℃至400℃的氧化物半導體的高溫後置退火，取得BTS(偏壓溫度應力)測試中的高可靠度。因此，由於氧化物半導體具有高均勻性、高場效遷移率、及低製造成本，所以，使用氧化物半導體的TFT是顯示裝置的下一代底板元件之領先的候選元件。 Oxide semiconductors are attracting attention because semiconductor materials have high reliability to be used in thin film transistors (TFTs). For example, an oxide semiconductor such as indium gallium zinc oxide (In-Ga-Zn-O (hereinafter referred to as IGZO)) is attracting attention. The oxide semiconductor is uniformly formed over a large surface area in a film form at room temperature by, for example, sputtering, and is transparent in the visible light region. Therefore, a TFT using the oxide semiconductor is formed on a plastic film substrate having low heat stability; and, can be used This TFT is used to form a flexible display device. This oxide semiconductor has a high field-effect mobility of about 10 times the field-effect mobility of amorphous germanium. Moreover, high reliability in the BTS (bias temperature stress) test is obtained by performing high temperature post annealing of an oxide semiconductor of 300 ° C to 400 ° C. Therefore, since an oxide semiconductor has high uniformity, high field-effect mobility, and low manufacturing cost, a TFT using an oxide semiconductor is a leading candidate element of a next-generation backplane element of a display device.
但是，在使用低溫製程以形成使用氧化物半導體的薄膜電晶體之情況中，希望增加可靠度。 However, in the case of using a low temperature process to form a thin film transistor using an oxide semiconductor, it is desirable to increase reliability.
現在，將參考附圖，詳細說明本發明的實施例。 Embodiments of the present invention will now be described in detail with reference to the accompanying drawings.
圖示是概念圖；以及，部份之間的厚度及寬度之間的關係、部份之間的尺寸的比例、等等不一定與其真實值相同。此外，在不同圖式之間，即使是相同部份，仍不同地顯示尺寸及/或比例。 The illustration is a conceptual diagram; and the relationship between the thickness and the width between the portions, the ratio of the dimensions between the portions, and the like are not necessarily the same as their true values. In addition, the dimensions and/or ratios are displayed differently between different patterns, even if they are the same part.
在申請案的圖式及說明書中，與上述圖式相關說明的組件類似的組件以類似代號標示，並適當省略其詳細說明。 In the drawings and the description of the application, components similar to those described in the above drawings are denoted by like reference numerals, and detailed description thereof will be omitted as appropriate.
圖1是平面視圖，顯示根據第一實施例之顯示裝置。雖然顯示裝置包含有機EL顯示裝置或是液晶顯示裝置，但是，於此說明主動矩陣有機EL顯示裝置200。有機EL顯示裝置200包含顯示區中以矩陣配置的多個像素單元1。圖1顯示一個放大的像素單元1。有機EL顯示裝置 200包含顯示區100及顯示區100以外的區域之週邊區110，在顯示區100中，配置有多個像素單元1。 Fig. 1 is a plan view showing a display device according to a first embodiment. Although the display device includes an organic EL display device or a liquid crystal display device, the active matrix organic EL display device 200 will be described here. The organic EL display device 200 includes a plurality of pixel units 1 arranged in a matrix in a display region. Figure 1 shows an enlarged pixel unit 1. Organic EL display device The peripheral area 110 includes a display area 100 and a region other than the display area 100. In the display area 100, a plurality of pixel units 1 are disposed.
訊號線驅動電路2、控制線驅動電路3、及控制器係設在週邊區110中。控制器4係連接至訊號線驅動電路2及控制線驅動電路3。控制器4執行訊號線驅動電路2的操作及控制線驅動電路3的操作之時機。 The signal line drive circuit 2, the control line drive circuit 3, and the controller are disposed in the peripheral area 110. The controller 4 is connected to the signal line drive circuit 2 and the control line drive circuit 3. The controller 4 performs the operation of the signal line drive circuit 2 and the timing of controlling the operation of the line drive circuit 3.
訊號線驅動電路2及像素單元1由沿著圖式中的行方向設置的多個訊號線D1所連接。控制線驅動電路3及像素單元1由沿著圖式中的列方向設置的多個控制線CL所連接。訊號線驅動電路2經由訊號線DL而供應對應於影像訊號的訊號電壓給像素單元1。控制線驅動電路3經由控制線CL而供應掃描線驅動訊號給像素單元1。 The signal line driving circuit 2 and the pixel unit 1 are connected by a plurality of signal lines D1 arranged along the row direction in the drawing. The control line drive circuit 3 and the pixel unit 1 are connected by a plurality of control lines CL arranged along the column direction in the drawing. The signal line driving circuit 2 supplies a signal voltage corresponding to the image signal to the pixel unit 1 via the signal line DL. The control line drive circuit 3 supplies the scan line drive signal to the pixel unit 1 via the control line CL.
像素單元1包含電容器123、驅動TFT 122、寫入TFT 121、及有機EL元件11，有機EL元件11根據供應的電流而發光。寫入TFT 121及驅動電晶體122是背閘極型TFT。訊號線DL係連接至寫入TFT 121的源極電極；以及，控制線CL係連接至寫入TFT 121的閘極電極。寫入TFT 121的汲極電極係連接至驅動TFT 122的閘極電極。 The pixel unit 1 includes a capacitor 123, a driving TFT 122, a writing TFT 121, and an organic EL element 11, and the organic EL element 11 emits light in accordance with a supplied current. The write TFT 121 and the drive transistor 122 are back gate type TFTs. The signal line DL is connected to the source electrode of the write TFT 121; and the control line CL is connected to the gate electrode of the write TFT 121. The gate electrode of the write TFT 121 is connected to the gate electrode of the drive TFT 122.
有機EL元件包含有機EL層、陽極電極、及陰極電極。驅動TFT 122的源極電極係連接至有機EL元件11的陽極電極。電源線124係連接至驅動TFT 122的汲極電極以供應正電源電壓Vdd。電容器123係連接在寫入TFT 121的汲極電極與驅動TFT 122的汲極電極之間。有機EL 元件11的陰極電極的電壓係設定為Vss。舉例而言，寫入TFT 121的配置與驅動TFT 122的配置相同。 The organic EL element includes an organic EL layer, an anode electrode, and a cathode electrode. The source electrode of the driving TFT 122 is connected to the anode electrode of the organic EL element 11. The power supply line 124 is connected to the drain electrode of the driving TFT 122 to supply the positive power supply voltage Vdd. The capacitor 123 is connected between the gate electrode of the write TFT 121 and the drain electrode of the drive TFT 122. Organic EL The voltage of the cathode electrode of the element 11 is set to Vss. For example, the configuration of the write TFT 121 is the same as that of the drive TFT 122.
現在使用圖2至圖4，說明驅動TFT 122的實例。圖3是剖面視圖，顯示根據第一實施例的驅動TFT。圖3的剖面視圖顯示圖2的A-A剖面。圖4是另一剖面視圖，顯示根據第一實施例之驅動TFT。圖4的剖面視圖顯示圖2的B-B剖面。 An example of the driving TFT 122 will now be described using Figs. 2 to 4 . Fig. 3 is a cross-sectional view showing a driving TFT according to the first embodiment. 3 is a cross-sectional view showing the A-A section of FIG. 2. Fig. 4 is another cross-sectional view showing the driving TFT according to the first embodiment. 4 is a cross-sectional view showing the B-B section of FIG. 2.
驅動TFT 122包含第一導電層27、第二導電層28、閘極電極23、閘極絕緣膜24、半導體層25、通道保護膜26、及鈍化膜29。 The driving TFT 122 includes a first conductive layer 27, a second conductive layer 28, a gate electrode 23, a gate insulating film 24, a semiconductor layer 25, a channel protective film 26, and a passivation film 29.
閘極電極23係設在基板20的一部份上。舉例而言，閘極電極23包含例如鉬-鎢(MoW)、鉬-鉭(MoTa)、鎢(W)、等等耐火金屬。閘極電極23包含具有被執行防鬚部措施之鋁(Al)主成分的鋁合金；以及，可以使用鋁及耐火金屬的堆疊膜。基板20具有主表面20a(參考圖3)。閘極電極23係設於主表面20a上。將垂直於設有閘極電極23的基板20的主表面20a之方向取為Z方向。將平行於基板20的主表面20a的一方向取為X方向。將平行於基板20的主表面20a及垂直於X方向之方向取為Y方向。基板20、閘極電極23、及閘極絕緣膜24係沿著Z方向而堆疊。 The gate electrode 23 is provided on a portion of the substrate 20. For example, the gate electrode 23 contains a refractory metal such as molybdenum-tungsten (MoW), molybdenum-niobium (MoTa), tungsten (W), or the like. The gate electrode 23 includes an aluminum alloy having an aluminum (Al) main component to be subjected to a mooring measure; and a stacked film of aluminum and refractory metal may be used. The substrate 20 has a main surface 20a (refer to FIG. 3). The gate electrode 23 is provided on the main surface 20a. The direction perpendicular to the main surface 20a of the substrate 20 on which the gate electrode 23 is provided is taken as the Z direction. A direction parallel to the main surface 20a of the substrate 20 is taken as the X direction. The main surface 20a parallel to the substrate 20 and the direction perpendicular to the X direction are taken as the Y direction. The substrate 20, the gate electrode 23, and the gate insulating film 24 are stacked in the Z direction.
閘極絕緣膜24係設在閘極電極23上。在實例中，閘極絕緣膜24係設在整個基板20之上，並遮蓋閘極電極23。閘極絕緣膜24具有一個主表面24a。該一個主表面 24a係平行於XY平面。舉例而言，閘極絕緣膜24包含絕緣的及透光的材料。閘極絕緣膜24包含絕緣材料。閘極絕緣膜24包含選自氧化矽、氮化矽、氧氮化矽、及氧化鋁的至少其中之一。閘極絕緣膜24包含氧化矽膜(SiOx，其中，x是任何正值)、氮化矽膜(SiNx)、氧氮化矽膜(SiON)、或是鋁膜(Al2O3)。閘極絕緣膜24包含這些膜的堆疊膜。 The gate insulating film 24 is provided on the gate electrode 23. In the example, the gate insulating film 24 is provided over the entire substrate 20 and covers the gate electrode 23. The gate insulating film 24 has a main surface 24a. The one major surface 24a is parallel to the XY plane. For example, the gate insulating film 24 includes an insulating and light transmissive material. The gate insulating film 24 contains an insulating material. The gate insulating film 24 contains at least one selected from the group consisting of cerium oxide, cerium nitride, cerium oxynitride, and aluminum oxide. The gate insulating film 24 includes a hafnium oxide film (SiO x , where x is any positive value), a tantalum nitride film (SiN x ), a hafnium oxynitride film (SiON), or an aluminum film (Al 2 O 3 ). . The gate insulating film 24 contains a stacked film of these films.
半導體層25係設在閘極絕緣膜24的一個主表面24a上。閘極絕緣膜24係設在閘極電極23與半導體層25之間，以使閘極電極23與半導體層25絕緣。換言之，閘極電極23與半導體層25相對立，而以閘極絕緣膜24介於其間。舉例而言，半導體層25包含氧化物半導體，氧化物半導體包含選自銦(In)、鎵(Ga)、及鋅(Zn)的至少其中之一。換言之，半導體層25包含例如選自In-Ga-Zn-O氧化物半導體、In-Ga-O氧化物半導體、及In-Zn-O氧化物半導體。氧化物半導體可為非晶狀態或是多晶狀態。在實施例中，使用非晶狀態的氧化物半導體。半導體層25是p型的、n型的、CMOS、等等。舉例而言，半導體層25的膜厚不小於5nm且不大於100nm；以及，較佳的是，半導體層25的膜厚不小於5nm且不大於20nm。考慮電特徵，半導體層25的膜厚為例如約10nm。 The semiconductor layer 25 is provided on one main surface 24a of the gate insulating film 24. The gate insulating film 24 is provided between the gate electrode 23 and the semiconductor layer 25 to insulate the gate electrode 23 from the semiconductor layer 25. In other words, the gate electrode 23 is opposed to the semiconductor layer 25 with the gate insulating film 24 interposed therebetween. For example, the semiconductor layer 25 includes an oxide semiconductor including at least one selected from the group consisting of indium (In), gallium (Ga), and zinc (Zn). In other words, the semiconductor layer 25 contains, for example, an In—Ga—Zn—O oxide semiconductor, an In—Ga—O oxide semiconductor, and an In—Zn—O oxide semiconductor. The oxide semiconductor may be in an amorphous state or a polycrystalline state. In the embodiment, an oxide semiconductor in an amorphous state is used. The semiconductor layer 25 is p-type, n-type, CMOS, or the like. For example, the film thickness of the semiconductor layer 25 is not less than 5 nm and not more than 100 nm; and, preferably, the film thickness of the semiconductor layer 25 is not less than 5 nm and not more than 20 nm. The film thickness of the semiconductor layer 25 is, for example, about 10 nm in consideration of electrical characteristics.
當以透射電子顯微鏡(TEM)或是X光繞射(XRD)來加以觀測時，對於包含非晶氧化物半導體的半導體層25並未觀察到表示結晶等等的繞射圖案。以掃描式電子顯微鏡 (SEM)、TEM、等等，觀察半導體層25的膜品質及配置。 When observed by a transmission electron microscope (TEM) or X-ray diffraction (XRD), a diffraction pattern indicating crystallization or the like is not observed for the semiconductor layer 25 containing an amorphous oxide semiconductor. Scanning electron microscope (SEM), TEM, and the like, the film quality and arrangement of the semiconductor layer 25 were observed.
半導體層25包含上述的氧化物半導體的微晶係散佈於上述非晶氧化物半導體中的材料。 The semiconductor layer 25 includes a material in which the above-described microcrystal system of the oxide semiconductor is dispersed in the amorphous oxide semiconductor.
通道保護膜26係設於半導體層25之上。通道保護膜26係設置成遮蓋半導體層25及閘極絕緣膜24。通道保護膜26包含第一通道保護膜261及第二通道保護膜262。第一通道保護膜261係設置成遮蓋半導體層25及閘極絕緣膜24。第二通道保護膜262係設於第一通道保護膜261上。第一通道保護膜261及第二通道保護膜262保護半導體層25。 The channel protective film 26 is provided on the semiconductor layer 25. The channel protective film 26 is provided to cover the semiconductor layer 25 and the gate insulating film 24. The channel protection film 26 includes a first channel protection film 261 and a second channel protection film 262. The first channel protective film 261 is provided to cover the semiconductor layer 25 and the gate insulating film 24. The second channel protection film 262 is disposed on the first channel protection film 261. The first channel protective film 261 and the second channel protective film 262 protect the semiconductor layer 25.
第一通道保護膜261及第二通道保護膜262包含選自氧化矽、氮化矽、氧氮化矽、及氧化鋁的至少其中之一。舉例而言，第一通道保護膜261及第二通道保護膜262包含例如氧化矽膜(SiOx，其中，x是任何正值)、氮化矽膜(SiNx)、氧氮化矽膜(SiON)、鋁膜(Al2O3)、等等絕緣材料。舉例而言，第一通道保護膜261包含例如氧化矽等等含有氧的絕緣材料，具有比半導體層25還高的抗酸性。第二通道保護膜262也包含具有比半導體層25還高的抗酸性之氧化矽等等。第二通道保護膜262比第一通道保護膜261具有更高的氧化程度。換言之，第二通道保護膜262比第一通道保護膜261含有更多個氧原子。舉例而言，第二通道保護膜262的氧濃度比第一通道保護膜261的氧濃度更高。舉例而言，第二通道保護膜262之氧原子的數目對矽原好的數目之比例高於第一通道保護膜261之 氧原子的數目對矽原好的數目之比例。 The first channel protective film 261 and the second channel protective film 262 include at least one selected from the group consisting of cerium oxide, cerium nitride, cerium oxynitride, and aluminum oxide. For example, the first channel protective film 261 and the second channel protective film 262 include, for example, a hafnium oxide film (SiO x , where x is any positive value), a tantalum nitride film (SiN x ), a hafnium oxynitride film ( SiON), aluminum film (Al 2 O 3 ), and the like. For example, the first channel protective film 261 contains an oxygen-containing insulating material such as hafnium oxide, and has higher acid resistance than the semiconductor layer 25. The second channel protective film 262 also includes cerium oxide having a higher acid resistance than the semiconductor layer 25, and the like. The second channel protective film 262 has a higher degree of oxidation than the first channel protective film 261. In other words, the second channel protective film 262 contains more oxygen atoms than the first channel protective film 261. For example, the oxygen concentration of the second channel protective film 262 is higher than the oxygen concentration of the first channel protective film 261. For example, the ratio of the number of oxygen atoms of the second channel protective film 262 to the number of ruthenium is higher than the ratio of the number of oxygen atoms of the first channel protective film 261 to the number of ruthenium.
通道保護膜26具有第一開口26a和第二開口26b。舉例而言，第一開口26a和第二開口26b係設置成沿著X方向而彼此相對立。如圖3所示，第一開口26a和第二開口26b使半導體層25的一部份。第一通道保護膜的部份261a以及第二通道保護膜的部份262a在X方向上係設置在第一開口26a與第二開口26b之間。在與第二開口26b相對立的第一開口26a的側上之第一通道保護膜的側表面261s係由第二通道保護膜的部份262a所遮蓋。在與第一開口26a相對立的第二開口26b的側上之第一通道保護膜的側表面261s係由第二通道保護膜的部份262a所遮蓋。 The channel protective film 26 has a first opening 26a and a second opening 26b. For example, the first opening 26a and the second opening 26b are disposed to be opposed to each other along the X direction. As shown in FIG. 3, the first opening 26a and the second opening 26b form a portion of the semiconductor layer 25. The portion 261a of the first channel protective film and the portion 262a of the second channel protective film are disposed between the first opening 26a and the second opening 26b in the X direction. The side surface 261s of the first passage protective film on the side of the first opening 26a opposed to the second opening 26b is covered by the portion 262a of the second passage protective film. The side surface 261s of the first passage protective film on the side of the second opening 26b opposed to the first opening 26a is covered by the portion 262a of the second passage protective film.
如圖4所示，在Y方向上半導體層25的側表面25t由第一通道保護膜261遮蓋。在Y方向上第一通道保護膜261的側表面261t從第二通道保護膜262曝露出。 As shown in FIG. 4, the side surface 25t of the semiconductor layer 25 is covered by the first channel protective film 261 in the Y direction. The side surface 261t of the first channel protective film 261 is exposed from the second channel protective film 262 in the Y direction.
第一導電層27係設置在第一開口26a的一部份中。第一導電層27也遮蓋第一開口26a側上的第二通道保護膜的部份262p。第二導電層28係設置在第二開口26b的一部份中。第二導電層28也遮蓋第二開口26b側上的第二通道保護膜的部份262p。第一導電層27與第二導電層28彼此相對立，而以通道保護膜26在X方上予以插入。 The first conductive layer 27 is disposed in a portion of the first opening 26a. The first conductive layer 27 also covers the portion 262p of the second channel protective film on the side of the first opening 26a. The second conductive layer 28 is disposed in a portion of the second opening 26b. The second conductive layer 28 also covers the portion 262p of the second channel protective film on the side of the second opening 26b. The first conductive layer 27 and the second conductive layer 28 are opposed to each other, and the channel protective film 26 is inserted on the X side.
第一導電層27係電連接至半導體層25。第二導電層28係電連至半導體層25。舉例而言，第一導電層27及第二導電層28包含鈦(Ti)、Al、Mo、等等。舉例而言，第一導電層27及第二導電層28包括堆疊體，堆疊體包含 選自Ti、Al、及Mo的至少其中之一。第一導電層27及第二導電層28可為銦錫氧化物(ITO)。或者，藉由執行未被通道保護膜26遮蓋的半導體層25的一部份之氬(Ar)電漿處理，第一導電層27及第二導電層28可為具有低電阻的部份。第一導電層27是選自驅動TFT 122的源極電極和汲極電極的其中之一。第二導電層28是選自驅動TFT 122的源極電極和汲極電極中之另一電極。在實施例中，第一導電層27是汲極電極；第二導電層28是源極電極。 The first conductive layer 27 is electrically connected to the semiconductor layer 25. The second conductive layer 28 is electrically connected to the semiconductor layer 25. For example, the first conductive layer 27 and the second conductive layer 28 include titanium (Ti), Al, Mo, and the like. For example, the first conductive layer 27 and the second conductive layer 28 comprise a stack, and the stacked body comprises It is at least one selected from the group consisting of Ti, Al, and Mo. The first conductive layer 27 and the second conductive layer 28 may be indium tin oxide (ITO). Alternatively, the first conductive layer 27 and the second conductive layer 28 may be portions having low resistance by performing argon (Ar) plasma treatment of a portion of the semiconductor layer 25 that is not covered by the channel protective film 26. The first conductive layer 27 is one selected from the source electrode and the drain electrode of the driving TFT 122. The second conductive layer 28 is the other electrode selected from the source electrode and the drain electrode of the driving TFT 122. In an embodiment, the first conductive layer 27 is a drain electrode; the second conductive layer 28 is a source electrode.
第一導電層27、第二導電層28、保護膜26、第一開口26a、及第二開口26b係由鈍化膜29所遮蓋。如圖3所示，在X方向上設置在第一導電層27與第二導電層28之間的第二保護膜的部份262a係由鈍化膜29所遮蓋。如圖4所示，在Y方向上從第二通道保護膜262曝露出的第一通道保護膜261的側表面261t係由鈍化膜29所遮蓋。半導體層25的一部份經過通道保護膜26的開口26a和26b而接觸鈍化膜29。舉例而言，鈍化膜29包含絕緣及透光的材料。舉例而言，鈍化膜29包含選自氧化矽、氮化矽、及氧氮化矽的其中之一。舉例而言，鈍化膜29包含選自氧化矽膜、氮化矽膜、及氧氮化矽膜的其中之一。鈍化膜29包含氫。舉例而言，鈍化膜29含有不小於1.0×1020原子/cm3的氫。 The first conductive layer 27, the second conductive layer 28, the protective film 26, the first opening 26a, and the second opening 26b are covered by the passivation film 29. As shown in FIG. 3, the portion 262a of the second protective film disposed between the first conductive layer 27 and the second conductive layer 28 in the X direction is covered by the passivation film 29. As shown in FIG. 4, the side surface 261t of the first channel protective film 261 exposed from the second channel protective film 262 in the Y direction is covered by the passivation film 29. A portion of the semiconductor layer 25 contacts the passivation film 29 through the openings 26a and 26b of the channel protective film 26. For example, the passivation film 29 comprises an insulating and light transmissive material. For example, the passivation film 29 contains one selected from the group consisting of cerium oxide, cerium nitride, and cerium oxynitride. For example, the passivation film 29 includes one selected from the group consisting of a hafnium oxide film, a tantalum nitride film, and a hafnium oxynitride film. The passivation film 29 contains hydrogen. For example, the passivation film 29 contains not less than 1.0 × 10 20 atoms/cm 3 of hydrogen.
當電壓被施加至閘極電極23時，通道係形成在半導體層25中；並且，電流在第一導電層27與第二導電層 28之間流動。 When a voltage is applied to the gate electrode 23, a channel is formed in the semiconductor layer 25; and, a current is in the first conductive layer 27 and the second conductive layer Flow between 28.
如圖3所示，半導體層25包含第一部份25a、在X方向上與第一部份25a相對立的第二部份25b、設在第一部份25a與第二部份25b之間的第三部份25c、設在第一部份25a與第三部份25c之間的第四部份25d、設在第二部份25b與第三部份25c之間的第五部份25e、設在第一部份25a與第四部份25d之間的第六部份25f、以及設在第二部份25b與第五部份25e之間的第七部份25g。 As shown in FIG. 3, the semiconductor layer 25 includes a first portion 25a, a second portion 25b opposite to the first portion 25a in the X direction, and is disposed between the first portion 25a and the second portion 25b. The third portion 25c, the fourth portion 25d disposed between the first portion 25a and the third portion 25c, and the fifth portion 25e disposed between the second portion 25b and the third portion 25c A sixth portion 25f disposed between the first portion 25a and the fourth portion 25d, and a seventh portion 25g disposed between the second portion 25b and the fifth portion 25e.
第一通道保護膜261遮蓋半導體層25的第三部份25c。第二通道保護膜262遮蓋第一通道保護膜261的上表面261aT、半導體層25的第四部份25d、及半導體層25的第五部份25e。第一導電層27遮蓋第六部份25f，並與半導體層25的第四部份25d相對立而以第二通道保護膜262插入其間。第二導電層28遮蓋第七部份25g，並與半導體層25的第五部份25e相對立而以第二通道保護膜262插入其間。鈍化膜29遮蓋第二通道保護膜262、第二導電層28、第一導電層27、半導體層25的第二部份25b、及半導體層25的第一部份25a。 The first channel protective film 261 covers the third portion 25c of the semiconductor layer 25. The second channel protective film 262 covers the upper surface 261aT of the first channel protective film 261, the fourth portion 25d of the semiconductor layer 25, and the fifth portion 25e of the semiconductor layer 25. The first conductive layer 27 covers the sixth portion 25f and is opposed to the fourth portion 25d of the semiconductor layer 25 with the second channel protective film 262 interposed therebetween. The second conductive layer 28 covers the seventh portion 25g and is opposed to the fifth portion 25e of the semiconductor layer 25 with the second channel protective film 262 interposed therebetween. The passivation film 29 covers the second channel protective film 262, the second conductive layer 28, the first conductive layer 27, the second portion 25b of the semiconductor layer 25, and the first portion 25a of the semiconductor layer 25.
由氧化物半導體所製成的半導體層25的電阻因遮蓋半導體層25的上表面之膜的氧化程度而改變。當被具有低氧化程度的膜所遮蓋時，半導體層25的電阻降低。另一方面，當被具有高氧化程度的膜所遮蓋時，半導體層25的電阻增加。被第一通道保護膜261所遮蓋的半導體層25的第三部份25c的電阻比被第二通道保護膜262所 遮蓋的第四部份25d和第五部份25e的電阻還低。藉由降低第三部份25c的電阻，增加驅動TFT 122的場效遷移率。 The electric resistance of the semiconductor layer 25 made of an oxide semiconductor changes due to the degree of oxidation of the film covering the upper surface of the semiconductor layer 25. When covered by a film having a low degree of oxidation, the electrical resistance of the semiconductor layer 25 is lowered. On the other hand, when covered by a film having a high degree of oxidation, the electric resistance of the semiconductor layer 25 is increased. The electric resistance ratio of the third portion 25c of the semiconductor layer 25 covered by the first channel protective film 261 is the second channel protective film 262 The resistance of the covered fourth portion 25d and the fifth portion 25e is also low. The field effect mobility of the driving TFT 122 is increased by lowering the resistance of the third portion 25c.
接近第二通道保護膜262的半導體層25的第四部份25d和第五部份25e的部份25da和25ea具有相當高的電阻。一般而言，會有半導體層的一部份的電阻非所需地降低太多且在汲極電極與半導體層的部份相對立而具有低度氧化的通道保護膜插入之情況中不再用作為主動層。但是，在實施例中，作為汲極電極的第一導電層27與半導體層25的第四部份25d相對立，而以具有高度氧化的第二通道保護膜262插入其間。因此，由於接近第二通道保護膜262的第四部份25d的部份25da具有高電阻，所以，此問題不容易發生。 The fourth portion 25d of the semiconductor layer 25 close to the second channel protective film 262 and the portions 25da and 25ea of the fifth portion 25e have a relatively high resistance. In general, the resistance of a portion of the semiconductor layer is undesirably lowered too much and is no longer used in the case where the gate electrode is opposite to the portion of the semiconductor layer and has a low-oxidation channel protective film insertion. As the active layer. However, in the embodiment, the first conductive layer 27 as the drain electrode is opposed to the fourth portion 25d of the semiconductor layer 25, and the second channel protective film 262 having high oxidation is interposed therebetween. Therefore, since the portion 25da close to the fourth portion 25d of the second channel protective film 262 has high resistance, this problem does not easily occur.
由於半導體層25及鈍化膜29經由開口26a而彼此相接觸，所以，包含在鈍化膜29中的氫容易被擴散至半導體層25中。特別是，在鈍化膜29之內的氫被供應給半導體層25的第四部份25d的情況中，第四部份25d的電阻不容易被降低。 Since the semiconductor layer 25 and the passivation film 29 are in contact with each other via the opening 26a, hydrogen contained in the passivation film 29 is easily diffused into the semiconductor layer 25. In particular, in the case where hydrogen within the passivation film 29 is supplied to the fourth portion 25d of the semiconductor layer 25, the electric resistance of the fourth portion 25d is not easily lowered.
因此，對於半導體層25，與作為汲極電極的第一導電層27相對立而以通道保護膜26插入於其中的第四部份25d的電阻係高於第三部份25c的電阻。特別是，第四部份25d之在第二通道保護膜262側上的部份25da的電阻係高於第四部份25d之在閘極絕緣膜24側上的部份25db的電阻。因此，由於半導體層25之用作為主動層的部份 不短，所以，取得具有所需特徵的驅動TFT 122。 Therefore, with respect to the semiconductor layer 25, the resistance of the fourth portion 25d in which the channel protective film 26 is inserted, which is opposed to the first conductive layer 27 as the gate electrode, is higher than that of the third portion 25c. In particular, the portion 25da of the fourth portion 25d on the side of the second channel protective film 262 has a higher resistance than the portion 25db of the fourth portion 25d on the side of the gate insulating film 24. Therefore, since the semiconductor layer 25 is used as a part of the active layer It is not short, so that the driving TFT 122 having the desired characteristics is obtained.
舉例而言，被第二通道保護膜262所遮蓋的半導體層25的第二部份25b在X方向上的長度不大於3μm，且較佳不大於1μm。換言之，沿著連接第一部份與第二部份的方向上之第四部份的長度及第五部份的長度不大於3μm，且較佳不大於1μm。因在X方向上第二部份25b的長度是此長度，第四部份25d的電阻係足夠高的。 For example, the length of the second portion 25b of the semiconductor layer 25 covered by the second channel protective film 262 in the X direction is not more than 3 μm, and preferably not more than 1 μm. In other words, the length of the fourth portion in the direction connecting the first portion and the second portion and the length of the fifth portion are not more than 3 μm, and preferably not more than 1 μm. Since the length of the second portion 25b in the X direction is this length, the resistance of the fourth portion 25d is sufficiently high.
第四部份25d之在第二通道保護膜262側上的部份25da的電阻率是不小於1.0×105Ω．cm，且更較佳不小於1.0×107Ω．cm。舉例而言，第四部份25d之在第二通道保護膜262側上的部份25da是設在第二通道保護膜262與閘極絕緣膜24之間的半導體層25的部份的一半，在Z方向上，在第二通道保護膜262與閘極絕緣膜24之間更接近第二通道保護膜262。舉例而言，在Z方向上與第二通道保護膜262的距離不大於半導體層25的厚度的三分之一之位置處的電阻率不小於1.0×105Ω．cm，且更較佳不小於1.0×107Ω．cm。 The resistivity of the portion 25da on the side of the second channel protective film 262 of the fourth portion 25d is not less than 1.0 × 10 5 Ω. Cm, and more preferably not less than 1.0 × 10 7 Ω. Cm. For example, the portion 25da of the fourth portion 25d on the side of the second channel protective film 262 is half of the portion of the semiconductor layer 25 disposed between the second channel protective film 262 and the gate insulating film 24. In the Z direction, the second channel protective film 262 is closer to the second channel protective film 262 and the gate insulating film 24. For example, the resistivity at a position where the distance from the second channel protective film 262 in the Z direction is not more than one third of the thickness of the semiconductor layer 25 is not less than 1.0 × 10 5 Ω. Cm, and more preferably not less than 1.0 × 10 7 Ω. Cm.
另一方面，舉例而言，第四部份25d之在閘極絕緣膜24側上的部份25db的電阻率不大於1.0×105Ω．cm，且更較佳不小於1.0×103Ω．cm。舉例而言，第四部份25d之在閘極絕緣膜24側上的部份25db是設在第二通道保護膜262與閘極絕緣膜24之間的半導體層25的部份的一半，在Z方向上，在第二通道保護膜262與閘極絕緣膜24之間更接近閘極絕緣膜24。舉例而言，在Z方向上與 閘極絕緣膜24的距離不大於半導體層25的厚度的三分之一之位置處的電阻率不大於1.0×105Ω．cm，且更較佳不大於1.0×103Ω．cm。 On the other hand, for example, the resistivity of the portion 25db on the side of the gate insulating film 24 of the fourth portion 25d is not more than 1.0 × 10 5 Ω. Cm, and more preferably not less than 1.0 × 10 3 Ω. Cm. For example, the portion 25db of the fourth portion 25d on the side of the gate insulating film 24 is half of the portion of the semiconductor layer 25 provided between the second via protective film 262 and the gate insulating film 24, In the Z direction, the gate insulating film 24 is closer to the second channel protective film 262 and the gate insulating film 24. For example, the resistivity at a position where the distance from the gate insulating film 24 in the Z direction is not more than one third of the thickness of the semiconductor layer 25 is not more than 1.0 × 10 5 Ω. Cm, and more preferably no more than 1.0 x 10 3 Ω. Cm.
在與連接第一導電層27與第二導電層28之平行於X方向的線段L相垂直的線與半導體層25的端部交會處，半導體層25的端部25X和25Y被第一通道保護膜所遮蓋。當形成鈍化膜29時，因為熱，所以在半導體層25的氧化物半導體內部的氧容易逃脫。在氧從半導體層25逃脫出的驅動TFT中，會有發生漏電流的風險。但是，藉由通道保護膜26所遮蓋的半導體層25的端部25X和25Y及上表面，當形成鈍化膜29時，能夠防止氧從半導體層25逃脫出。 The end portions 25X and 25Y of the semiconductor layer 25 are protected by the first channel at a line intersecting the end of the semiconductor layer 25 perpendicular to the line segment L connecting the first conductive layer 27 and the second conductive layer 28 in the X direction. Covered by the membrane. When the passivation film 29 is formed, oxygen inside the oxide semiconductor of the semiconductor layer 25 easily escapes due to heat. In the driving TFT in which oxygen escapes from the semiconductor layer 25, there is a risk of leakage current. However, when the passivation film 29 is formed by the end portions 25X and 25Y and the upper surface of the semiconductor layer 25 covered by the channel protective film 26, oxygen can be prevented from escaping from the semiconductor layer 25.
為了防止漏電流，半導體層25的端部25X和25Y的一部份被通道保護膜26所遮蓋，即已足夠；並且，通道保護膜26也能夠具有遮蓋半導體層25的端部25X和25Y的一部份之配置。 In order to prevent leakage current, a portion of the end portions 25X and 25Y of the semiconductor layer 25 is covered by the channel protective film 26, that is, sufficient; and the channel protective film 26 can also have the ends 25X and 25Y covering the semiconductor layer 25. Part of the configuration.
雖然，在實施例中的半導體層25具有小於XY平面中閘極電極23之配置，但是，在XY平面中設在第一導電層27與第二導電層28之間的半導體層25的至少一部份與閘極電極23相對立，則已足夠。 Although the semiconductor layer 25 in the embodiment has a configuration smaller than the gate electrode 23 in the XY plane, at least one of the semiconductor layers 25 provided between the first conductive layer 27 and the second conductive layer 28 in the XY plane It is sufficient that the portion is opposed to the gate electrode 23.
現在，使用圖5來說明包含以圖2至圖4所說明的驅動TFT 122之顯示。圖5是部份的剖面視圖，其顯示根據第一實施例之顯示裝置。 Now, the display including the driving TFT 122 illustrated in FIGS. 2 to 4 will be described using FIG. Figure 5 is a partial cross-sectional view showing a display device according to the first embodiment.
顯示裝置200包含基板20、驅動TFT 122、像素電極 16、及有機EL元件11。有機EL元件係由有機層33、像素電極31、及對立電極34所形成。有機EL元件11係藉由驅動TFT 122來予以控制及驅動。 The display device 200 includes a substrate 20, a driving TFT 122, and a pixel electrode 16. Organic EL element 11. The organic EL element is formed of the organic layer 33, the pixel electrode 31, and the counter electrode 34. The organic EL element 11 is controlled and driven by the driving TFT 122.
基板20具有主表面20a。基板20包含主體21、及設於主體21上的障壁層22。主表面20a是障壁層22側上的基板20的主表面。舉例而言，主體21包含透光的材料。舉例而言，主體21包含玻璃材料或是樹脂材料。而且，主體21包含可撓材料。舉例而言，主體21包含例如玻璃材料、聚醯亞胺、等等樹脂材料。障壁層22抑制雜質、濕氣、等等的滲透，以保護驅動TFT 122及有機EL元件11。舉例而言，障壁層22包含透光的及可撓的材料。障壁層22是可省略的；以及，基板20形成為雜質、濕氣、等等的滲透在設有閘極電極23的側的主表面20a處受抑制，則已足夠。 The substrate 20 has a main surface 20a. The substrate 20 includes a main body 21 and a barrier layer 22 provided on the main body 21. The main surface 20a is the main surface of the substrate 20 on the side of the barrier layer 22. For example, body 21 contains a light transmissive material. For example, the body 21 contains a glass material or a resin material. Moreover, the body 21 comprises a flexible material. For example, the body 21 contains a resin material such as a glass material, a polyimide, or the like. The barrier layer 22 suppresses penetration of impurities, moisture, and the like to protect the driving TFT 122 and the organic EL element 11. For example, the barrier layer 22 comprises a light transmissive and flexible material. The barrier layer 22 can be omitted; and it is sufficient that the substrate 20 is formed such that the penetration of impurities, moisture, or the like is suppressed at the main surface 20a on the side where the gate electrode 23 is provided.
圖2至圖4中所述的驅動TFT 122設在基板20的主表面20a上。 The driving TFTs 122 described in FIGS. 2 to 4 are provided on the main surface 20a of the substrate 20.
在實例中，濾光器30係設在鈍化膜29上。濾光器30具有用於各像素的不同顏色。舉例而言，濾光器30包含紅色、綠色、或藍色的有色樹脂膜(例如，有色光阻)。於需要時，設置濾光器30。濾光器30是可省略的。 In the example, the filter 30 is provided on the passivation film 29. The filter 30 has a different color for each pixel. For example, the filter 30 includes a red, green, or blue colored resin film (eg, a colored photoresist). The filter 30 is provided as needed. The filter 30 can be omitted.
像素電極31係設在濾光器30上。像素電極31係電連接至選自第一導電層27及第二導電層28的其中之一。雖然在圖5中未予以顯示出，但是，在實施例中，像素電 極31係電連接至第二導電層28(例如，汲極電極)。在實施例中，像素電極31是陽極電極。舉例而言，像素電極31包含導電的及透光的材料。舉例而言，像素電極31包含ITO(銦錫氧化物)、ITO/Ag/ITO的堆疊結構、ZNO摻雜鋁的AZO、等等。 The pixel electrode 31 is provided on the filter 30. The pixel electrode 31 is electrically connected to one selected from the first conductive layer 27 and the second conductive layer 28. Although not shown in FIG. 5, in the embodiment, the pixel is electrically The pole 31 is electrically connected to the second conductive layer 28 (eg, a drain electrode). In the embodiment, the pixel electrode 31 is an anode electrode. For example, the pixel electrode 31 comprises an electrically conductive and light transmissive material. For example, the pixel electrode 31 includes ITO (Indium Tin Oxide), a stacked structure of ITO/Ag/ITO, AZO of ZNO-doped aluminum, and the like.
在鈍化膜29及濾光器30中設置有開口，以使第二導電層28的一部份曝露出。像素電極31的部份16c經由開口而接觸第二導電層28。因此，像素電極31係電連接至第二導電層28。 Openings are provided in the passivation film 29 and the filter 30 to expose a portion of the second conductive layer 28. The portion 16c of the pixel electrode 31 contacts the second conductive layer 28 via the opening. Therefore, the pixel electrode 31 is electrically connected to the second conductive layer 28.
平坦化膜32係設在像素電極31及濾光器30上。舉例而言，平坦化膜32包含絕緣的材料。舉例而言，平坦化膜32包含有機樹脂材料。開口係設在平坦化膜32中以使像素電極31的一部份曝露出。 The planarizing film 32 is provided on the pixel electrode 31 and the filter 30. For example, the planarization film 32 comprises an insulating material. For example, the planarization film 32 contains an organic resin material. An opening is provided in the planarization film 32 to expose a portion of the pixel electrode 31.
有機層33係設在平坦化膜32及開口32a上。有機層33在開口32a處接觸像素電極31。平坦化膜32防止像素電極31及有機層33免於在開口32a以外的區域中彼此相接觸。舉例而言，有機層32包含堆疊體，在堆疊體中，電洞傳輸層、發光層、及電子傳輸層相堆疊。或者，使用電洞注入層取代電洞傳輸層。而且，也可以使用電子注入層來取代電子傳輸層。或者，除了電洞傳輸層之外，有機層33還包含電洞注入層。除了電子傳輸層之外，有機層33還包含電子注入層。 The organic layer 33 is provided on the planarizing film 32 and the opening 32a. The organic layer 33 contacts the pixel electrode 31 at the opening 32a. The planarization film 32 prevents the pixel electrode 31 and the organic layer 33 from coming into contact with each other in a region other than the opening 32a. For example, the organic layer 32 includes a stacked body in which a hole transport layer, a light emitting layer, and an electron transport layer are stacked. Alternatively, a hole injection layer is used in place of the hole transport layer. Moreover, an electron injecting layer may be used instead of the electron transporting layer. Alternatively, the organic layer 33 may include a hole injection layer in addition to the hole transport layer. The organic layer 33 further includes an electron injection layer in addition to the electron transport layer.
相對立的電極34係設在有機層33上。相對立的電極34包含導電的材料。在實施例中，對立電極34是陰極電 極。舉例而言，對立電極34包含鋁(Al)及/或鎂-銀(MgAg)。舉例而言，對立電極34的膜厚是200nm。 The opposed electrodes 34 are provided on the organic layer 33. The opposite electrode 34 contains a conductive material. In an embodiment, the counter electrode 34 is a cathode pole. For example, the counter electrode 34 comprises aluminum (Al) and/or magnesium-silver (MgAg). For example, the film thickness of the counter electrode 34 is 200 nm.
舉例而言，有機EL元件11係由像素電極31、對立電極34、及在設有開口32a的部份處設在像素電極31與對立電極34之間的有機層33所形成。以施加至像素電極31及對立電極34之電壓，光從有機層33發射。從有機層33發射的光通過濾光器30、鈍化膜29、閘極絕緣膜24、及基板20，而發射至外部。換言之，在實施例中，顯示裝置200是底部發光型顯示裝置。 For example, the organic EL element 11 is formed of the pixel electrode 31, the opposite electrode 34, and the organic layer 33 provided between the pixel electrode 31 and the opposite electrode 34 at a portion where the opening 32a is provided. Light is emitted from the organic layer 33 at a voltage applied to the pixel electrode 31 and the opposite electrode 34. The light emitted from the organic layer 33 passes through the filter 30, the passivation film 29, the gate insulating film 24, and the substrate 20, and is emitted to the outside. In other words, in the embodiment, the display device 200 is a bottom emission type display device.
密封單元35係設於對立電極34上。舉例而言，密封單元35包含氧化矽膜、氧氮化矽膜、氮化矽膜、鋁及鉭氧化物膜、等等。 The sealing unit 35 is attached to the opposite electrode 34. For example, the sealing unit 35 includes a hafnium oxide film, a hafnium oxynitride film, a tantalum nitride film, an aluminum and tantalum oxide film, and the like.
雖然，圖2至圖5中未顯示寫入TFT 121，但是，寫入TFT 121可以由與驅動TFT 122相同的材料及相同的配置所形成。 Although the write TFT 121 is not shown in FIGS. 2 to 5, the write TFT 121 may be formed of the same material and the same configuration as the drive TFT 122.
雖然在實施例中像素電極31是陽極及對立電極34是陰極，但是，像素電極31可以是陰極；並且，對立電極34可以是陽極。雖然各像素單元1具有二個TFT，亦即，寫入TFT 121及驅動TFT 122，但是，各像素單元1至少具有例如圖2至圖4所示的一個TFT，即已足夠。 Although the pixel electrode 31 is the anode and the opposite electrode 34 is the cathode in the embodiment, the pixel electrode 31 may be the cathode; and the opposite electrode 34 may be the anode. Although each of the pixel units 1 has two TFTs, that is, the writing TFT 121 and the driving TFT 122, it is sufficient that each of the pixel units 1 has at least one TFT such as shown in FIGS. 2 to 4.
現在，將使用圖6來說明藉由測量圖2至圖4中所示的驅動TFT 122而取得的特徵。圖6是圖形，顯示根據第一實施例之薄膜電晶體的特徵。水平軸代表施加至閘極電極的電壓Vg(單位為V)；以及，垂直軸代表流經與汲極電 極(第一導電單元27)相對立的半導體層25的區域(汲極區)之電流Id(單位為A)。圖6顯示當施加至汲極電極(第一導電單元27)的電壓Vd是0.1V及15V時電壓Vg與電流Id之間的關係。在電流Id開始流動的臨界電壓對於0.1V及15V的電壓是相同的；以及，當汲極電極的電壓Vd改變時，驅動TFT 122的特徵是穩定的。因此，不論汲極電極的電壓Vd為何，實施例的驅動TFT都具有穩定的臨界電壓。 Now, features obtained by measuring the driving TFTs 122 shown in FIGS. 2 to 4 will be explained using FIG. Figure 6 is a diagram showing the features of the thin film transistor according to the first embodiment. The horizontal axis represents the voltage V g (in V) applied to the gate electrode; and the vertical axis represents the region (the drain region) of the semiconductor layer 25 flowing through the gate electrode (the first conductive unit 27). Current I d (in A). Figure 6 shows that when applied to the drain electrode (first conductive unit 27) of the voltage V d is the relationship between 0.1V and 15V when the voltage V g and the current I d. The threshold voltage at which the current I d starts to flow is the same for the voltages of 0.1 V and 15 V; and, when the voltage V d of the drain electrode is changed, the characteristics of the driving TFT 122 are stable. Thus, regardless of the drain electrode voltage V d is why the driving TFT of the embodiment having stable threshold voltage.
現在，將使用圖7及圖8來說明實施例的比較實例。圖7是平面視圖，顯示根據比較實例的薄膜電晶體。圖8是圖形，顯示藉由測量根據比較實例的薄膜電晶體而取得的特徵。 Now, a comparative example of the embodiment will be described using FIGS. 7 and 8. Fig. 7 is a plan view showing a thin film transistor according to a comparative example. Fig. 8 is a graph showing characteristics obtained by measuring a thin film transistor according to a comparative example.
在根據比較實例的TFT 312中，形成一種型式的膜作為通道保護膜326。通道保護膜326的整個開口326a由第一導電層327遮蓋；以及，整個開口326b被第二導電層328所遮蓋。因此，半導體層325未接觸鈍化膜329。閘極電極323和閘極絕緣膜324係類似於第一實施例。 In the TFT 312 according to the comparative example, a type of film was formed as the channel protective film 326. The entire opening 326a of the channel protection film 326 is covered by the first conductive layer 327; and the entire opening 326b is covered by the second conductive layer 328. Therefore, the semiconductor layer 325 does not contact the passivation film 329. The gate electrode 323 and the gate insulating film 324 are similar to the first embodiment.
在圖8中，水平軸代表施加至閘極電極的電壓Vg(單位為V)；以及，垂直軸代表流經與汲極電極(第一導電層27)相對立的半導體層25的區域(汲極區)之電流Id(單位為A)。圖8顯示當施加至汲極電極(第一導電層27)的電壓Vd是0.1V及15V時電壓Vg與電流Id之間的關係。當電壓Vd是0.1V時的臨界電壓比當電壓Vd是15V時的臨界電壓還高；以及，當汲極電極的電壓Vd改 變時，驅動TFT 312的特徵是不穩定的。因此，根據比較實例的TFT 312，臨界電壓根據汲極電極的電壓Vd而變成不穩定的。 In FIG. 8, the horizontal axis represents the voltage V g (in V) applied to the gate electrode; and, the vertical axis represents the region of the semiconductor layer 25 flowing through the gate electrode (the first conductive layer 27) ( drain region) of the current I d (unit A). Figure 8 shows that when applied to the drain electrode (first conductive layer 27) of the voltage V d is the relationship between 0.1V and 15V when the voltage V g and the current I d. When the voltage V d is the threshold voltage is 0.1V when the voltage V d is than when the threshold voltage is higher at 15V; and, when the drain voltage V d is changed electrode, the driving TFT 312 characteristic is unstable. Therefore, according to the TFT 312 of the comparative example, the threshold voltage becomes unstable according to the voltage V d of the drain electrode.
可知，在半導體層包含氧化物半導體的情況中，在TFT的半導體層中容易發生很多缺陷；以及，控制缺陷可導致TFT的更高可靠度。 It can be seen that in the case where the semiconductor layer contains an oxide semiconductor, many defects easily occur in the semiconductor layer of the TFT; and, controlling the defect can result in higher reliability of the TFT.
因辛勤開發使用氧化物半導體之TFT的結果，發明人取得下述知識。亦即，在例如圖7中所示的習知TFT中，在由半導體層325的通道保護膜326遮蓋的介面處，當氧化物半導體的原子之間的鍵是弱的時，導因於汲極電極的電場(第一導電層327)，與汲極電極相對立而以通道保護膜326插入其間的半導體層325的第二部份325b的電阻非所需地降低。在半導體層325的第二部份325b的電阻下降的情況中，通道長度是作為主動層的半導體層25的部份之長度，通道長度非所需地小於設計值。結果，如同比較實例中所示般，臨界電壓會因汲極電極的電壓Vd而非所需地改變；並且，未取得所需的TFT特徵。但是，在第一實施例的TFT 122中，與汲極電極327相對立的半導體層的第四部份25d具有高電阻。因此，第四部份25d不容易具有低電阻及作為主動層。換言之，無論汲極電極的電場強度為何，TFT的臨界電壓都能穩定。 As a result of the diligent development of a TFT using an oxide semiconductor, the inventors acquired the following knowledge. That is, in the conventional TFT shown in, for example, FIG. 7, at the interface covered by the channel protective film 326 of the semiconductor layer 325, when the bond between the atoms of the oxide semiconductor is weak, it is caused by 汲The electric field of the pole electrode (first conductive layer 327), which is opposed to the drain electrode, is undesirably reduced in resistance of the second portion 325b of the semiconductor layer 325 with the channel protective film 326 interposed therebetween. In the case where the resistance of the second portion 325b of the semiconductor layer 325 is lowered, the channel length is the length of a portion of the semiconductor layer 25 as the active layer, and the channel length is undesirably smaller than the design value. As a result, as shown as Comparative Example, due to the threshold voltage of the drain electrode voltage V d is not required to be changed; and not to obtain desired TFT characteristics. However, in the TFT 122 of the first embodiment, the fourth portion 25d of the semiconductor layer opposed to the drain electrode 327 has a high resistance. Therefore, the fourth portion 25d does not easily have low resistance and acts as an active layer. In other words, regardless of the electric field strength of the gate electrode, the threshold voltage of the TFT can be stabilized.
圖9是剖面視圖，顯示根據第一實施例之第一變型的 薄膜電晶體。 Figure 9 is a cross-sectional view showing a first modification according to the first embodiment Thin film transistor.
變型的驅動TFT 412與第一實施例的驅動TFT 122不同之處在於在YZ平面中通道保護膜426的配置不同。通道保護膜426係由第一通道保護膜426A及第二通道保護膜426B所製成。第一通道保護膜426A係設在半導體層425的上表面上。第二通道保護膜426B遮蓋第一通道保護膜426A的上表面、第一通道保護膜426A的側表面、及半導體層425的側表面。換言之，變型的驅動TFT 412與第一實施例的驅動TFT 122不同之處在於在YZ平面中第二通道保護膜426B遮蓋第一通道保護膜426A及半導體層425的側表面。再次說明，在與連接第一導電層與第二導電層之平行於Y方向的線段L相垂直的線與半導體層425的端部交會處，半導體層425的端部被第二通道保護膜426B所遮蓋。也根據變型，當形成鈍化膜429時，能夠防止氧從半導體層425逃脫出。 The modified driving TFT 412 is different from the driving TFT 122 of the first embodiment in that the configuration of the channel protective film 426 is different in the YZ plane. The channel protective film 426 is made of the first channel protective film 426A and the second channel protective film 426B. The first channel protective film 426A is provided on the upper surface of the semiconductor layer 425. The second channel protective film 426B covers the upper surface of the first channel protective film 426A, the side surface of the first channel protective film 426A, and the side surface of the semiconductor layer 425. In other words, the modified driving TFT 412 is different from the driving TFT 122 of the first embodiment in that the second channel protective film 426B covers the side surfaces of the first channel protective film 426A and the semiconductor layer 425 in the YZ plane. Again, at the intersection of the line perpendicular to the line segment L connecting the first conductive layer and the second conductive layer parallel to the Y direction and the end of the semiconductor layer 425, the end of the semiconductor layer 425 is protected by the second channel protective film 426B. Covered. Also according to the modification, when the passivation film 429 is formed, oxygen can be prevented from escaping from the semiconductor layer 425.
閘極電極423、閘極絕緣膜424、鈍化膜429、及驅動TFT 412的XZ平面的剖面視圖與第一實施例相同。換言之，類似於第一實施例，第二通道保護膜426B的氧化程度係高於第一通道保護膜426A的氧化程度；並且，鈍化膜429及半導體層425經由通道保護膜426的開口而彼此相接觸。 A cross-sectional view of the gate electrode 423, the gate insulating film 424, the passivation film 429, and the driving TFT 412 in the XZ plane is the same as that of the first embodiment. In other words, similar to the first embodiment, the degree of oxidation of the second channel protective film 426B is higher than that of the first channel protective film 426A; and, the passivation film 429 and the semiconductor layer 425 are mutually connected via the opening of the channel protection film 426 contact.
在變型中，類似於第一實施例，半導體層425的一部份與汲極電極相對立，而以具有高氧化度的第二通道保護膜426B插入其間。因此，接近第二通道保護膜426B的 此部份具有高電阻。由於半導體層425與鈍化膜429經由開口而彼此相接觸，所以，包含在鈍化膜429中的氫容易被擴散至半導體層425中。因此，與汲極電極相對立而以通道保護膜426插入其間的半導體層425的部份具有高電阻。特別是，此部份的通道保護膜426側具有高電阻。因此，由於用作為主動層的半導體層425的部份不短，所以，取得具有所需特徵的驅動TFT 412。 In a modification, similar to the first embodiment, a portion of the semiconductor layer 425 is opposed to the drain electrode, and a second channel protective film 426B having a high degree of oxidation is interposed therebetween. Therefore, approaching the second channel protective film 426B This part has a high resistance. Since the semiconductor layer 425 and the passivation film 429 are in contact with each other through the opening, hydrogen contained in the passivation film 429 is easily diffused into the semiconductor layer 425. Therefore, the portion of the semiconductor layer 425 which is opposed to the drain electrode and with the channel protective film 426 interposed therebetween has high resistance. In particular, the portion of the channel protective film 426 on this portion has a high resistance. Therefore, since the portion of the semiconductor layer 425 used as the active layer is not short, the driving TFT 412 having the desired characteristics is obtained.
圖10是剖面視圖，顯示根據第一實施例之第二變型的薄膜電晶體。 Figure 10 is a cross-sectional view showing a thin film transistor according to a second modification of the first embodiment.
變型的驅動TFT 512與第一實施例的驅動TFT 122不同之處在於在YZ平面中通道保護膜526的配置不同。通道保護膜526係由第一通道保護膜526A及第二通道保護膜526B所製成。第一通道保護膜526A遮蓋半導體層525的上表面及側表面。與第一實施例的驅動TFT 122不同，第二通道保護膜526B遮蓋第一通道保護膜526A的上表面及側表面。再次說明，在與連接第一導電層與第二導電層之平行於Y方向的線段L相垂直的線與半導體層525的端部交會處，半導體層525的端部由第一通道保護膜526A及第二通道保護膜526B遮蓋。也根據變型，當形成鈍化膜529時，能夠防止氧從半導體層525逃脫出。 The modified driving TFT 512 is different from the driving TFT 122 of the first embodiment in that the configuration of the channel protective film 526 is different in the YZ plane. The channel protective film 526 is made of the first channel protective film 526A and the second channel protective film 526B. The first channel protective film 526A covers the upper surface and the side surface of the semiconductor layer 525. Unlike the driving TFT 122 of the first embodiment, the second channel protective film 526B covers the upper surface and the side surface of the first channel protective film 526A. Again, at the intersection of the line perpendicular to the line segment L connecting the first conductive layer and the second conductive layer parallel to the Y direction and the end of the semiconductor layer 525, the end of the semiconductor layer 525 is covered by the first channel protective film 526A. And the second channel protective film 526B is covered. Also according to the modification, when the passivation film 529 is formed, oxygen can be prevented from escaping from the semiconductor layer 525.
閘極電極523、閘極絕緣膜524、鈍化膜529、及驅動TFT 512的XZ平面的剖面視圖與第一實施例相同。換 言之，類似於第一實施例，第二通道保護膜526B的氧化程度係高於第一通道保護膜526A的氧化程度；以及，鈍化膜529及半導體層525經由通道保護膜526的開口而彼此相接觸。 A cross-sectional view of the gate electrode 523, the gate insulating film 524, the passivation film 529, and the driving TFT 512 in the XZ plane is the same as that of the first embodiment. change In other words, similarly to the first embodiment, the degree of oxidation of the second channel protective film 526B is higher than that of the first channel protective film 526A; and, the passivation film 529 and the semiconductor layer 525 are mutually connected via the opening of the channel protection film 526. Contact.
在變型中，類似於第一實施例，半導體層525的一部份與汲極電極相對立，而以具有高氧化度的第二通道保護膜526B插入其間。因此，接近第二通道保護膜526B的此部份具有高電阻。由於半導體層525與鈍化膜529經由開口而彼此相接觸，所以，包含在鈍化膜529中的氫容易被擴散至半導體層525中。因此，與汲極電極相對立而以通道保護膜526插入其間的半導體層525的部份具有高電阻。特別是，此部份的通道保護膜526側具有高電阻。因此，由於用作為主動層的半導體層525的部份不短，所以，取得具有所需特徵的驅動TFT 512。 In a modification, similar to the first embodiment, a portion of the semiconductor layer 525 is opposed to the drain electrode, and a second channel protective film 526B having a high degree of oxidation is interposed therebetween. Therefore, this portion close to the second channel protective film 526B has a high resistance. Since the semiconductor layer 525 and the passivation film 529 are in contact with each other via the opening, hydrogen contained in the passivation film 529 is easily diffused into the semiconductor layer 525. Therefore, the portion of the semiconductor layer 525 which is opposed to the drain electrode and with the channel protective film 526 interposed therebetween has high resistance. In particular, the portion of the channel protective film 526 of this portion has a high resistance. Therefore, since the portion of the semiconductor layer 525 used as the active layer is not short, the driving TFT 512 having the desired characteristics is obtained.
圖11是平面視圖，顯示根據第二實施例之薄膜電晶體。圖12是剖面視圖，顯示根據第二實施例之薄膜電晶體。圖12是沿著圖11的線C-C之剖面視圖。圖11的線D-D剖面視圖與第一實施例的圖4相同。 Figure 11 is a plan view showing a thin film transistor according to a second embodiment. Figure 12 is a cross-sectional view showing a thin film transistor according to a second embodiment. Figure 12 is a cross-sectional view taken along line C-C of Figure 11 . The line D-D cross-sectional view of Fig. 11 is the same as Fig. 4 of the first embodiment.
在實施例的驅動TFT 122中，通道保護膜626的配置與第一實施例的配置不同。換言之，通道保護膜626係僅設於半導體層625的上表面的一部份上。第一通道保護膜626A係設於半導體層625的上表面上的一部份上；以 及，第二通道保護膜626B遮蓋第一通道保護膜626A的上表面及沿著X方向之第一通道保護膜626A的側表面。第二通道保護膜626B比第一通道保護膜626A具有更高的氧化程度。 In the driving TFT 122 of the embodiment, the configuration of the channel protective film 626 is different from that of the first embodiment. In other words, the channel protection film 626 is provided only on a portion of the upper surface of the semiconductor layer 625. The first channel protective film 626A is disposed on a portion of the upper surface of the semiconductor layer 625; And, the second channel protective film 626B covers the upper surface of the first channel protective film 626A and the side surface of the first channel protective film 626A along the X direction. The second channel protective film 626B has a higher degree of oxidation than the first channel protective film 626A.
第一導電層627與第二導電層628在X方向上係彼此對立的。第一導電層627的一部份係電連接至半導體層625。第一導電層627的一個其它部份遮蓋第二通道保護膜626B的一部份。第二導電層628的一部份係電連接至半導體層625。第二導電層628的一個其它部份遮蓋第二通道保護膜626B的一部份。 The first conductive layer 627 and the second conductive layer 628 are opposed to each other in the X direction. A portion of the first conductive layer 627 is electrically connected to the semiconductor layer 625. One other portion of the first conductive layer 627 covers a portion of the second channel protective film 626B. A portion of the second conductive layer 628 is electrically connected to the semiconductor layer 625. A further portion of the second conductive layer 628 covers a portion of the second channel protective film 626B.
第一導電層627、第二導電層628、通道保護膜626、及半導體層625被鈍化膜629所遮蓋。半導體層625接觸在X方向上第一導電層627及第二導電層628外面的鈍化膜629。鈍化膜629包含氫。舉例而言，鈍化膜629含有不小於1.0×1020原子/cm3的氫。 The first conductive layer 627, the second conductive layer 628, the channel protective film 626, and the semiconductor layer 625 are covered by the passivation film 629. The semiconductor layer 625 contacts the passivation film 629 on the outside of the first conductive layer 627 and the second conductive layer 628 in the X direction. The passivation film 629 contains hydrogen. For example, the passivation film 629 contains not less than 1.0 × 10 20 atoms/cm 3 of hydrogen.
閘極電極623、閘極絕緣膜624、及半導體層625係類似於第一實施例。 The gate electrode 623, the gate insulating film 624, and the semiconductor layer 625 are similar to the first embodiment.
半導體層625包含第一部份625a、在X方向上與第一部份625a相對立的第二部份625b、設在第一部份625a與第二部份625b之間的第三部份625c、設在第一部份625a與第三部份625c之間的第四部份625d、設在第二部份625b與第三部份625c之間的第五部份625e、設在第一部份625a與第四部份625d之間的第六部份625f、以及設在第二部份625b與第五部份625e之間的第七部份 625g。 The semiconductor layer 625 includes a first portion 625a, a second portion 625b opposite the first portion 625a in the X direction, and a third portion 625c disposed between the first portion 625a and the second portion 625b. a fourth portion 625d disposed between the first portion 625a and the third portion 625c, and a fifth portion 625e disposed between the second portion 625b and the third portion 625c, disposed in the first portion a sixth portion 625f between the portion 625a and the fourth portion 625d, and a seventh portion between the second portion 625b and the fifth portion 625e 625g.
第一通道保護膜626A遮蓋半導體層625的第三部份625c。第二通道保護膜626B遮蓋第一通道保護膜626A的上表面261、半導體層625的第四部份625d、及半導體層625的第五部份625e。第一導電層627遮蓋第六部份625f，並與半導體層625的第四部份625d相對立而以第二通道保護膜626B插入其間。第二導電層628遮蓋第七部份625g，並與半導體層625的第五部份625e相對立而以第二通道保護膜626B插入其間。鈍化膜629遮蓋第二通道保護膜626B、第二導電層628、第一導電層627、半導體層625的第二部份625b、及半導體層625的第一部份625a。鈍化膜629含有不小於1.0×1020原子/cm3的氫。 The first channel protective film 626A covers the third portion 625c of the semiconductor layer 625. The second channel protective film 626B covers the upper surface 261 of the first channel protective film 626A, the fourth portion 625d of the semiconductor layer 625, and the fifth portion 625e of the semiconductor layer 625. The first conductive layer 627 covers the sixth portion 625f and is opposed to the fourth portion 625d of the semiconductor layer 625 with the second channel protective film 626B interposed therebetween. The second conductive layer 628 covers the seventh portion 625g and is opposed to the fifth portion 625e of the semiconductor layer 625 with the second channel protective film 626B interposed therebetween. The passivation film 629 covers the second channel protection film 626B, the second conductive layer 628, the first conductive layer 627, the second portion 625b of the semiconductor layer 625, and the first portion 625a of the semiconductor layer 625. The passivation film 629 contains not less than 1.0 × 10 20 atoms/cm 3 of hydrogen.
舉例而言，半導體層25之被第二通道保護膜262所遮蓋的第二部份25b在X方向上的長度不大於3μm，且較佳不大於1μm。因第二部份25b之在X方向上的長度是此長度，第四部份25d的電阻係足夠高的。 For example, the length of the second portion 25b of the semiconductor layer 25 covered by the second channel protective film 262 in the X direction is not more than 3 μm, and preferably not more than 1 μm. Since the length of the second portion 25b in the X direction is this length, the resistance of the fourth portion 25d is sufficiently high.
第四部份625d之在第二通道保護膜626B側上的部份625da的電阻率是不小於1.0×105Ω．cm，且更較佳不小於1.0×107Ω．cm。另一方面，舉例而言，第四部份625d之在閘極絕緣膜24側上的部份625db的電阻率係不大於1.0×105Ω．cm，且更較佳不大於1.0×103Ω．cm。 The resistivity of the portion 625da of the fourth portion 625d on the side of the second channel protective film 626B is not less than 1.0 × 10 5 Ω. Cm, and more preferably not less than 1.0 × 10 7 Ω. Cm. On the other hand, for example, the resistivity of the portion 625db of the fourth portion 625d on the side of the gate insulating film 24 is not more than 1.0 × 10 5 Ω. Cm, and more preferably no more than 1.0 x 10 3 Ω. Cm.
舉例而言，半導體層625之被第二通道保護膜626B 所遮蓋的第二部份625b在X方向上的長度不大於3μm，且更較佳不大於1μm。因第二部份625b之在X方向上的長度是此長度，第四部份625d的電阻足夠高。 For example, the second channel protective film 626B of the semiconductor layer 625 The length of the covered second portion 625b in the X direction is not more than 3 μm, and more preferably not more than 1 μm. Since the length of the second portion 625b in the X direction is this length, the resistance of the fourth portion 625d is sufficiently high.
也在實施例中，與用作為汲極電極的第一導電層627相對立而以通道保護膜626插入其間的半導體層625的第四部份625d的電阻比半導體層625的第三部份625c的電阻還高。特別是，第四部份625d之在第二通道保護膜626B側上的部份625da的電阻比第四部份625d之在閘極絕緣膜24側上的部份625db的電阻還高。因此，由於用作為主動層的半導體層625的部份不短，所以，取得具有所需特徵的驅動TFT 612。 Also in the embodiment, the third portion 625c of the semiconductor layer 625 is opposite to the third portion 625c of the semiconductor layer 625, which is opposed to the first conductive layer 627 which is the gate electrode and the channel protective film 626 is interposed therebetween. The resistance is also high. In particular, the resistance of the portion 625da on the side of the second channel protective film 626B of the fourth portion 625d is higher than the resistance of the portion 625db of the fourth portion 625d on the side of the gate insulating film 24. Therefore, since the portion of the semiconductor layer 625 used as the active layer is not short, the driving TFT 612 having the desired characteristics is obtained.
在實施例中，將說明根據第一實施例之薄膜電晶體及顯示裝置的製造方法的實例。圖13A至圖13F是剖面視圖，顯示根據第三實施例之薄膜電晶體的製造方法。圖14A至圖14D是剖面視圖，顯示從根據第三實施例之薄膜電晶體的圖13F繼續的製造方法。 In the embodiment, an example of a method of manufacturing a thin film transistor and a display device according to the first embodiment will be explained. 13A to 13F are cross-sectional views showing a method of manufacturing a thin film transistor according to a third embodiment. 14A to 14D are cross-sectional views showing a manufacturing method continued from Fig. 13F of the thin film transistor according to the third embodiment.
首先，製備包含主體21及設於主體21上的障壁層22之基板20(圖13A)。然後，在設有障壁層22的基板20的主表面20a的一部份上形成閘極電極23(圖13B)。錐度較佳的是約為10°至40°，更較佳地約30°，錐度是閘極電極23的側表面與基板20的主表面20a之間的角度。藉由形成在此範圍內的錐度，能夠抑制漏電流的 發生。錐度是平行於一個主表面24a的平面與未平行於閘極絕緣膜24的一個主表面24a之閘極電極23的側表面之間的角度。 First, a substrate 20 including a main body 21 and a barrier layer 22 provided on the main body 21 is prepared (Fig. 13A). Then, a gate electrode 23 is formed on a portion of the main surface 20a of the substrate 20 on which the barrier layer 22 is provided (Fig. 13B). The taper is preferably about 10 to 40, more preferably about 30, and the taper is the angle between the side surface of the gate electrode 23 and the main surface 20a of the substrate 20. By forming a taper within this range, leakage current can be suppressed occur. The taper is an angle between a plane parallel to one main surface 24a and a side surface of the gate electrode 23 which is not parallel to one main surface 24a of the gate insulating film 24.
然後，形成閘極絕緣膜24以遮蓋閘極電極23及基板20(圖13C)。繼續，半導體層25係形成為與閘極電極23相對立而以閘極絕緣膜24插入其間(圖13D)。較佳的是，當投射至XY平面上時半導體層25在閘極電極23之內。而且，較佳的是，半導體層25的側表面具有錐度。換言之，較佳的是，相對於基板20的主表面20a為傾斜的。因此，能夠抑制因電場集中而發生在半導體層25的側表面之電特徵的凸起。 Then, a gate insulating film 24 is formed to cover the gate electrode 23 and the substrate 20 (FIG. 13C). Continuing, the semiconductor layer 25 is formed to be opposed to the gate electrode 23 with the gate insulating film 24 interposed therebetween (Fig. 13D). Preferably, the semiconductor layer 25 is within the gate electrode 23 when projected onto the XY plane. Moreover, it is preferable that the side surface of the semiconductor layer 25 has a taper. In other words, it is preferable that the main surface 20a of the substrate 20 is inclined. Therefore, it is possible to suppress the protrusion of the electrical characteristics occurring on the side surface of the semiconductor layer 25 due to the concentration of the electric field.
在半導體層25的上表面上及在閘極絕緣膜24上，形成通道保護膜26。具體而言，第一通道保護膜261係形成為遮蓋半導體層25和閘極絕緣膜24(圖13E)。然後，在第一通道保護膜261中製造二開口261A及261B(圖13F)。繼續，在比第一通道保護膜261更過氧化氫之條件下，形成第二通道保護膜262以遮蓋第一通道保護膜261(圖14A)。 A channel protective film 26 is formed on the upper surface of the semiconductor layer 25 and on the gate insulating film 24. Specifically, the first channel protective film 261 is formed to cover the semiconductor layer 25 and the gate insulating film 24 (FIG. 13E). Then, two openings 261A and 261B are formed in the first channel protective film 261 (Fig. 13F). Continuing, under the condition that hydrogen peroxide is more than the first channel protective film 261, the second channel protective film 262 is formed to cover the first channel protective film 261 (FIG. 14A).
如上所述，在使用InGaZnO膜作為半導體層之TFT 122中，根據形成於InGaZnO膜上的第一通道保護膜261的膜形成條件，特徵大幅波動。舉例而言，在第一通道保護膜261及第二通道保護膜262A是由使用SiH4．N2O氣體之PECVD所形成的SiO2的情況中，藉由降低包含Si的材料源氣體的流量比，降低膜形成速率、或是降低膜形 成溫度，第二通道保護膜262是比第一通道保護膜261具有更高的氧化度。高氧化度意指氧及矽之元素比例O/Si是高的。 As described above, in the TFT 122 using the InGaZnO film as the semiconductor layer, the characteristics fluctuate greatly depending on the film formation conditions of the first channel protective film 261 formed on the InGaZnO film. For example, the first channel protective film 261 and the second channel protective film 262A are made of SiH 4 . In the case of SiO 2 formed by PECVD of N 2 O gas, the second channel protective film 262 is lower than the first by lowering the flow ratio of the material source gas containing Si, lowering the film formation rate, or lowering the film formation temperature. The channel protective film 261 has a higher degree of oxidation. A high degree of oxidation means that the elemental ratio O/Si of oxygen and helium is high.
接著，在對應於第一通道保護膜261的二個開口261A及261B的位置處，製造第一開口26a及第二開口26b(圖14B)。較佳的是，在形成通道保護膜26之後，執行退火。藉由退火，降低半導體層25與通道保護膜26的介面的缺陷。在設置第一開口26a及第二開口26b之前或之後，執行退火。較佳的是，退火溫度是200℃至400℃，並且，更較佳的是250℃至350℃。較佳的是，退火氛圍是惰性氣體氛圍。 Next, at a position corresponding to the two openings 261A and 261B of the first channel protective film 261, the first opening 26a and the second opening 26b are formed (FIG. 14B). Preferably, annealing is performed after the channel protective film 26 is formed. The defects of the interface between the semiconductor layer 25 and the channel protective film 26 are lowered by annealing. Annealing is performed before or after the first opening 26a and the second opening 26b are disposed. Preferably, the annealing temperature is from 200 ° C to 400 ° C, and, more preferably, from 250 ° C to 350 ° C. Preferably, the annealing atmosphere is an inert gas atmosphere.
然後，形成第一導電層27以遮蓋第一開口26a的一部份及第二通道保護膜262的一部份。形成第二導電層28以遮蓋第二開口26b的一部份及第二通道保護膜262的一部份(圖14C)。 Then, a first conductive layer 27 is formed to cover a portion of the first opening 26a and a portion of the second channel protective film 262. A second conductive layer 28 is formed to cover a portion of the second opening 26b and a portion of the second channel protective film 262 (FIG. 14C).
繼續，形成鈍化膜29以遮蓋從第一導電層27、第二導電層28、第二通道保護膜262、第一開口26a、及第二開口26b曝露出的半導體層25(圖14D)。 Continuing, a passivation film 29 is formed to cover the semiconductor layer 25 exposed from the first conductive layer 27, the second conductive layer 28, the second via protective film 262, the first opening 26a, and the second opening 26b (FIG. 14D).
因此，形成驅動TFT 122。 Thus, the driving TFT 122 is formed.
圖15是流程圖，顯示根據第三實施例之顯示裝置的製造方法。在製造顯示裝置時，製備基板20(S711)。然後，如上所述，在基板20上形成TFT(S712)。繼續，形成濾光器(S713)。此製程是可省略的。然後，形成有機EL元件11(S74)。繼續，形成密封單元35(S75)。因此， 形成顯示裝置。 Figure 15 is a flow chart showing a method of manufacturing a display device according to a third embodiment. At the time of manufacturing the display device, the substrate 20 is prepared (S711). Then, as described above, a TFT is formed on the substrate 20 (S712). Continuing, a filter is formed (S713). This process can be omitted. Then, the organic EL element 11 is formed (S74). Continuing, the sealing unit 35 is formed (S75). therefore, A display device is formed.
在實施例中取得的驅動TFT 122中，與作為汲極電極的第一導電層27相對立而以通道保護膜26插入其間的半導體層25的第四部份25d的電阻比第三部份25c的電阻還高。特別是，第四部份25d之在第二通道保護膜26B側上的部份25da的電阻比第四部份25d之在閘極絕緣膜24側上的部份25db的電阻還高。因此，由於用作為主動層的半導體層25的部份不短，所以，取得具有所需特徵的驅動TFT 122及顯示裝置。 In the driving TFT 122 obtained in the embodiment, the resistance of the fourth portion 25d of the semiconductor layer 25 with the channel protective film 26 interposed therebetween, which is opposed to the first conductive layer 27 as the gate electrode, is higher than that of the third portion 25c. The resistance is also high. In particular, the portion 25da of the fourth portion 25d on the side of the second channel protective film 26B has a higher electric resistance than the portion 25db of the fourth portion 25d on the side of the gate insulating film 24. Therefore, since the portion of the semiconductor layer 25 used as the active layer is not short, the driving TFT 122 having the desired characteristics and the display device are obtained.
在上述中，參考特定實例，說明本發明的舉例說明的實施例。但是，本發明的實施例不限於這些特定實例。組件的特定配置可由習於此技藝者從公眾熟知的技藝中適當地選取，且這些配置只要也實施本發明及取得類似功效，則它們是包含在本發明的範圍之內。 In the above, the illustrated embodiments of the present invention are described with reference to specific examples. However, embodiments of the invention are not limited to these specific examples. The specific configuration of the components can be suitably selected by those skilled in the art from the well-known skill of the art, and these configurations are included in the scope of the present invention as long as the present invention is also implemented and similar effects are obtained.
此外，在技術可行性的程度之內任何二或更多個特定組件可以相結合且在包含本發明的支持之程度上是包含在本發明的範圍中。 In addition, any two or more specific components may be combined within the scope of the technical feasibility and to the extent that the support of the present invention is included.
此外，在包含本發明的精神之程度上，根據上述本發明的實施例之薄膜電晶體及顯示裝置，可由習於此技藝者以適當的設計修改而實施的所有薄膜電晶體及顯示裝置也是在本發明的範圍之內。 Further, to the extent that the spirit of the present invention is included, the thin film transistor and the display device according to the embodiments of the present invention described above can be implemented by any of the thin film transistors and display devices which are modified by appropriate design by those skilled in the art. It is within the scope of the invention.
在本發明的精神之內，習於此技藝者可思及各式各樣的其它變型及修改，並且，須瞭解，這些變型及修改也包含在本發明的範圍之內。 Various other modifications and changes may be made by those skilled in the art, and such variations and modifications are also intended to be included within the scope of the present invention.
雖然已說明某些實施例，但是，這些實施例僅以舉例方式說明，而非要限定本發明的範圍。事實上，此處所述的新穎實施例可以用各式各樣的其它形式具體實施例；此外，在不悖離本發明的精神之下，可以對此處所述的實施例的形成作不同的省略、替代及改變。後附的申請專利範圍及其均等範圍是要涵蓋落在本發明的範圍及精神之內的這些形式或修改。 While certain embodiments have been described, the embodiments are intended to In fact, the novel embodiments described herein may be embodied in a variety of other forms and embodiments. In addition, the formation of the embodiments described herein may be varied without departing from the spirit of the invention. Omissions, substitutions, and changes. The scope of the appended claims and their equivalents are intended to cover such forms or modifications within the scope and spirit of the invention.
1‧‧‧像素單元 1‧‧‧pixel unit
2‧‧‧訊號線驅動單元 2‧‧‧Signal line drive unit
3‧‧‧控制線驅動單元 3‧‧‧Control line drive unit
4‧‧‧控制器 4‧‧‧ Controller
11‧‧‧有機EL元件 11‧‧‧Organic EL components
100‧‧‧顯示區 100‧‧‧ display area
110‧‧‧週邊區 110‧‧‧The surrounding area
121‧‧‧寫入薄膜電晶體 121‧‧‧Write film transistor
122‧‧‧驅動薄膜電晶體 122‧‧‧Drive film transistor
123‧‧‧電容器 123‧‧‧ capacitor
124‧‧‧電源線 124‧‧‧Power cord
200‧‧‧有機EL顯示裝置 200‧‧‧Organic EL display device
CL‧‧‧控制線 CL‧‧‧ control line
DL‧‧‧訊號線 DL‧‧‧ signal line
Claims (18)
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| KR102237834B1 (en) * | 2014-10-31 | 2021-04-12 | 엘지디스플레이 주식회사 | Thin Film Transistor Substrate Including Metal Oxide Semiconductor having Capping Layer |
| KR102435156B1 (en) | 2015-10-13 | 2022-08-24 | 삼성디스플레이 주식회사 | Transparent display substrates and transparent display devices |
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| JP4164562B2 (en) | 2002-09-11 | 2008-10-15 | 独立行政法人科学技術振興機構 | Transparent thin film field effect transistor using homologous thin film as active layer |
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