TWI515712B - Pixel driving circuit - Google Patents
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- TWI515712B TWI515712B TW103118669A TW103118669A TWI515712B TW I515712 B TWI515712 B TW I515712B TW 103118669 A TW103118669 A TW 103118669A TW 103118669 A TW103118669 A TW 103118669A TW I515712 B TWI515712 B TW I515712B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
- G09G2300/0809—Several active elements per pixel in active matrix panels
- G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
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Description
本發明係關於一種畫素補償電路，特別有關於一種有機發光二極體之畫素補償電路。 The present invention relates to a pixel compensation circuit, and more particularly to a pixel compensation circuit for an organic light emitting diode.
有機發光二極體顯示面板(Organic Light-Emitting Display；OLED)是目前正在開發使用的一種顯示面板，其具有輕薄、省電以及色度飽和等優點。 An Organic Light-Emitting Display (OLED) is a display panel currently under development, which has the advantages of lightness, power saving, and saturation of chromaticity.
然而，由於流經有機發光二極體的電流值受到驅動電晶體的影響導致電流值與驅動電晶體的臨界電壓(threshold voltage)有關，也會降低其顯示品質。 However, since the current value flowing through the organic light-emitting diode is affected by the driving transistor, the current value is related to the threshold voltage of the driving transistor, and the display quality thereof is also lowered.
隨著顯示科技的研究創新及使用者需求，面板解析度的要求也隨之升高，當面板解析度變高，畫素補償時間會因此變少，然而現有有機發光二極體畫素補償電路需要在一個列的開啟期間(line time)補償完畢，流經有機發光二極體電流值的補償時間不足，導致面板無法正確顯示其灰階，降低顯示品質。 With the research innovation and user demand of display technology, the requirements of panel resolution are also increasing. When the resolution of the panel becomes higher, the pixel compensation time will be less. However, the existing organic light-emitting diode compensation circuit It is necessary to compensate in the line time of one column, and the compensation time flowing through the current value of the organic light emitting diode is insufficient, so that the panel cannot correctly display the gray scale and reduce the display quality.
此外，為了提高畫素補償電路的開口率，如何使用較少 電晶體達到良好的補償效果也是目前亟欲解決的問題之一。 In addition, in order to improve the aperture ratio of the pixel compensation circuit, how to use less The good compensation effect of the transistor is also one of the problems that are currently being solved.
本發明之一實施例提供一種畫素補償電路。畫素補償電路包含第一開關、第二開關、第三開關、第四開關、第五開關、第一電容、第二電容、及發光單元。每一開關分別具有第一端、第二端及控制端。第二開關之第一端電連接於第一開關之控制端，第二開關之第二端電連接於第一開關之第二端，第二開關之控制端用以接收第一掃描訊號；第三開關之第一端電連接於第一開關之第二端，第三開關之控制端電連接第二開關之控制端；第四開關之第一端用以接收資料訊號，第四開關之第二端電連接於第一開關之控制端，第四開關之控制端用以接收第二掃描訊號；第五開關之第一端電連接於第一電壓源，第五開關之第二端電連接於第一開關之第一端，第五開關之控制端用以接收第三掃描訊號；第一電容，電連接於第一開關之第一端及第一開關之控制端之間；第二電容電連接第一開關之第一端；及發光單元耦接於第一開關之第二端與第二電壓源之間，其中第一電壓源與第二電壓源係為直流電壓源，且第一電壓源大於第二電壓源。 One embodiment of the present invention provides a pixel compensation circuit. The pixel compensation circuit includes a first switch, a second switch, a third switch, a fourth switch, a fifth switch, a first capacitor, a second capacitor, and a light emitting unit. Each switch has a first end, a second end, and a control end, respectively. The first end of the second switch is electrically connected to the control end of the first switch, the second end of the second switch is electrically connected to the second end of the first switch, and the control end of the second switch is configured to receive the first scan signal; The first end of the third switch is electrically connected to the second end of the first switch, and the control end of the third switch is electrically connected to the control end of the second switch; the first end of the fourth switch is for receiving the data signal, and the fourth switch is The second end is electrically connected to the control end of the first switch, and the control end of the fourth switch is configured to receive the second scan signal; the first end of the fifth switch is electrically connected to the first voltage source, and the second end of the fifth switch is electrically connected The first end of the first switch, the control end of the fifth switch is configured to receive the third scan signal; the first capacitor is electrically connected between the first end of the first switch and the control end of the first switch; the second capacitor Electrically connecting the first end of the first switch; and the light emitting unit is coupled between the second end of the first switch and the second voltage source, wherein the first voltage source and the second voltage source are DC voltage sources, and the first The voltage source is greater than the second voltage source.
本發明之另一實施例之畫素補償電路還包含第六開關及有機發光二極體，第六開關電連接於第一開關之第二端與有機發光二極體之間，依據第三 掃描訊號導通。 The pixel compensation circuit of another embodiment of the present invention further includes a sixth switch and an organic light emitting diode, wherein the sixth switch is electrically connected between the second end of the first switch and the organic light emitting diode, according to the third The scan signal is turned on.
本發明之另一實施例之畫素補償電路還包含第二電容之第一端電連接於第五開關之控制端。 The pixel compensation circuit of another embodiment of the present invention further includes a first end of the second capacitor electrically connected to the control end of the fifth switch.
本發明之另一實施例之畫素補償電路還包含第二電容之第一端電連接於第一電壓源。 The pixel compensation circuit of another embodiment of the present invention further includes a first end of the second capacitor electrically connected to the first voltage source.
本發明之另一實施例之畫素補償電路還包含第一掃描訊號之致能時間先於第二掃描訊號之致能時間且第一掃描訊號與第二掃描訊號之致能時間之間具有空白期間，第三掃描訊號之禁能時間包含第一掃描訊號及第二掃描訊號之致能時間及空白期間。 The pixel compensation circuit of another embodiment of the present invention further includes an enable time of the first scan signal prior to the enable time of the second scan signal and a blank between the enable time of the first scan signal and the second scan signal. During the period of time, the disable time of the third scan signal includes an enable time and a blank period of the first scan signal and the second scan signal.
本發明之另一實施例之畫素補償電路還包含第三開關之第二端電連接於第三開關之控制端。 The pixel compensation circuit of another embodiment of the present invention further includes a second end of the third switch electrically connected to the control end of the third switch.
本發明之另一實施例之畫素補償電路還包含第三開關之第二端用以接收第二參考訊號，且第二參考訊號係具有固定位準。 The pixel compensation circuit of another embodiment of the present invention further includes a second end of the third switch for receiving the second reference signal, and the second reference signal has a fixed level.
因本發明實施例之畫素補償電路可使流經有機發光二極體之電流與驅動電晶體的臨界電壓以及電壓源不相關，故可提高顯示畫面的準確度。再者，透過本發明的設計，降低訊號走線數，使得畫素補償電路的開口率提升，增進發光效益。 The pixel compensation circuit of the embodiment of the present invention can make the current flowing through the organic light emitting diode irrelevant to the threshold voltage and the voltage source of the driving transistor, thereby improving the accuracy of the display screen. Furthermore, through the design of the present invention, the number of signal traces is reduced, so that the aperture ratio of the pixel compensation circuit is increased, and the luminous efficiency is improved.
10‧‧‧顯示面板 10‧‧‧ display panel
100‧‧‧畫素補償電路 100‧‧‧ pixel compensation circuit
C1、C2‧‧‧電容 C1, C2‧‧‧ capacitor
A、B‧‧‧節點 A, B‧‧‧ nodes
SL‧‧‧掃描線 SL‧‧‧ scan line
DL‧‧‧資料線 DL‧‧‧ data line
DL‧‧‧資料線 DL‧‧‧ data line
S1、S2、S3‧‧‧掃描訊號 S1, S2, S3‧‧‧ scan signals
VData‧‧‧資料訊號 VData‧‧‧Information Signal
Vref1、Vref2、Vref‧‧‧參考訊號 Vref1, Vref2, Vref‧‧‧ reference signals
OVDD‧‧‧第一電壓 OVDD‧‧‧first voltage
OVSS‧‧‧第二電壓 OVSS‧‧‧second voltage
160‧‧‧發光單元 160‧‧‧Lighting unit
162‧‧‧有機發光二極體 162‧‧‧Organic Luminescent Diodes
110‧‧‧第一開關 110‧‧‧First switch
120‧‧‧第二開關 120‧‧‧second switch
130‧‧‧第三開關 130‧‧‧third switch
140‧‧‧第四開關 140‧‧‧fourth switch
150‧‧‧第五開關 150‧‧‧ fifth switch
164‧‧‧第六開關 164‧‧‧ sixth switch
T1、T2、T3‧‧‧區間 T1, T2, T3‧‧‧
TB‧‧‧空白區間 TB‧‧‧ blank space
第1圖為顯示面板之示意圖。 Figure 1 is a schematic view of a display panel.
第2圖為本發明之一實施例之畫素補償電路圖。 Fig. 2 is a diagram showing a pixel compensation circuit according to an embodiment of the present invention.
第3圖為本發明之另一實施例之畫素補償電路圖。 Fig. 3 is a diagram showing a pixel compensation circuit of another embodiment of the present invention.
第4圖為本發明之另一實施例之畫素補償電路圖。 Figure 4 is a diagram of a pixel compensation circuit according to another embodiment of the present invention.
第5圖為本發明之另一實施例之畫素補償電路圖。 Fig. 5 is a diagram showing a pixel compensation circuit of another embodiment of the present invention.
第6圖為本發明之一實施例之畫素補償電路之時序圖。 Figure 6 is a timing diagram of a pixel compensation circuit according to an embodiment of the present invention.
請參考第1圖，第1圖為本發明一實施例之顯示面板10的示意圖。顯示面板10包含多個畫素補償電路100、多個資料線DL、及多個掃描線SL，每一畫素補償電路100連接於對應之資料線DL及掃描線SL用以接收相應之資料訊號及掃描訊號。 Please refer to FIG. 1. FIG. 1 is a schematic diagram of a display panel 10 according to an embodiment of the present invention. The display panel 10 includes a plurality of pixel compensation circuits 100, a plurality of data lines DL, and a plurality of scan lines SL. Each of the pixel compensation circuits 100 is connected to the corresponding data line DL and the scan line SL for receiving corresponding data signals. And scanning signals.
請參考第2圖，第2圖為本發明一實施例之畫素補償電路100的示意圖，以下將以單一畫素補償電路100做說明。畫素補償電路100包含開關110、開關120、開關130、開關140、開關150、電容C1、電容C2、及發光單元160，開關分別具有第一端、第二端、及控制端；電容分別具有第一端及第二端。電容C1電連接於開關110之控制端及開關120之第一端之間，開關110之第二端電連接開關120之第二端、開關130之第一端、及發光單元160，電容C2電連接於開關110之第一端及參考訊號Vref1之間，開關120之控制端電連接於開關 130之控制端用以接收掃描訊號S1，開關130之第二端耦接至參考訊號Vref2，其中參考訊號Vref2可為直流訊號。開關140之第一端耦接於資料線用以接收資料訊號Vdata，開關140之控制端耦接於掃描線用以接收掃描訊號S2，開關140之第二端耦接於開關110之控制端；開關150之第一端用以接收第一電壓OVDD，開關150之第二端電連接於開關110之第一端，開關150之控制端用以接收掃描訊號S3；發光單元160之另一端電連接於第二電壓源用以接收第二電壓OVSS。開關110之控制端、開關140之第二端、與電容C1電連接於節點A；開關110之第一端、開關150之第二端、與電容C2電連接於節點B，發光單元160可包含有機發光二極體162。其中第一電壓源與第二電壓源係為具有固定位準之直流電壓源；資料訊號Vdata係來自於資料驅動器(圖未示)之數位資料，可為欲顯示於顯示面板10之灰階資料(Grey level scale)；掃描訊號S1、S2、S3係由閘極驅動器(圖未示)提供，用以致能掃描線SL。此外，開關110~150可為薄膜電晶體，而開關110~150之控制端可為電晶體之閘極端；開關110~150之第一端可為電晶體之源/汲極端其中之一；開關110~150之第二端可為電晶體之源/汲極端其中另一。以本實施例而言係以P型電晶體為例，然不以此為限，亦可以N型電晶體進行等效連接置換，本領域具有通常知識者應當能了解，開關110~150可亦為金屬氧化物半導體電晶體或其他可作為開關或電晶體使用之 電子元件替換。 Please refer to FIG. 2, which is a schematic diagram of a pixel compensation circuit 100 according to an embodiment of the present invention. The single pixel compensation circuit 100 will be described below. The pixel compensation circuit 100 includes a switch 110, a switch 120, a switch 130, a switch 140, a switch 150, a capacitor C1, a capacitor C2, and a light-emitting unit 160. The switches have a first end, a second end, and a control end, respectively; First end and second end. The capacitor C1 is electrically connected between the control terminal of the switch 110 and the first end of the switch 120. The second end of the switch 110 is electrically connected to the second end of the switch 120, the first end of the switch 130, and the light emitting unit 160, and the capacitor C2 is electrically connected. Connected between the first end of the switch 110 and the reference signal Vref1, the control end of the switch 120 is electrically connected to the switch The control terminal of the 130 is configured to receive the scan signal S1, and the second end of the switch 130 is coupled to the reference signal Vref2, wherein the reference signal Vref2 can be a DC signal. The first end of the switch 140 is coupled to the data line for receiving the data signal Vdata, the control end of the switch 140 is coupled to the scan line for receiving the scan signal S2, and the second end of the switch 140 is coupled to the control end of the switch 110; The first end of the switch 150 is for receiving the first voltage OVDD, the second end of the switch 150 is electrically connected to the first end of the switch 110, the control end of the switch 150 is for receiving the scan signal S3, and the other end of the light emitting unit 160 is electrically connected. The second voltage source is configured to receive the second voltage OVSS. The control terminal of the switch 110, the second end of the switch 140, and the capacitor C1 are electrically connected to the node A; the first end of the switch 110, the second end of the switch 150, and the capacitor C2 are electrically connected to the node B, and the light emitting unit 160 can include Organic light-emitting diode 162. The first voltage source and the second voltage source are DC voltage sources having a fixed level; the data signal Vdata is digital data from a data driver (not shown), and may be gray scale data to be displayed on the display panel 10. (Grey level scale); scanning signals S1, S2, S3 are provided by a gate driver (not shown) for enabling the scan line SL. In addition, the switches 110-150 can be thin film transistors, and the control terminals of the switches 110-150 can be the gate terminals of the transistors; the first ends of the switches 110-150 can be one of the source/汲 terminals of the transistor; The second end of 110~150 can be one of the source of the transistor/汲 extreme. In this embodiment, a P-type transistor is taken as an example. However, it is not limited thereto, and an N-type transistor can be used for equivalent connection replacement. Those skilled in the art should be able to understand that the switches 110-150 can also be used. Used as a metal oxide semiconductor transistor or other as a switch or transistor Electronic component replacement.
請參考第6圖，第6圖為本發明之一實施例之畫素補償電路之時序圖。其中掃描訊號S1的致能期間係先於掃描訊號S2的致能期間，且掃描訊號S1的致能期間與掃描訊號S2的致能期間不具有重疊區段。此外，掃描訊號S1的致能期間與掃描訊號S2的致能期間之間還可包含有空白期間TB，以避免開關電壓相互干擾。掃描訊號S3的禁能期間可涵蓋掃描訊號S1的致能期間、掃描訊號S2的致能期間、及空白期間TB。 Please refer to FIG. 6. FIG. 6 is a timing diagram of a pixel compensation circuit according to an embodiment of the present invention. The enabling period of the scanning signal S1 is prior to the enabling period of the scanning signal S2, and the enabling period of the scanning signal S1 and the enabling period of the scanning signal S2 do not have overlapping sections. In addition, a blank period TB may be included between the enable period of the scan signal S1 and the enable period of the scan signal S2 to prevent the switching voltages from interfering with each other. The disable period of the scan signal S3 may cover the enable period of the scan signal S1, the enable period of the scan signal S2, and the blank period TB.
為說明畫素補償電路100的操作方式，請同時參考第2圖及第6圖。區間T0為上一次的補償週期，開關120、開關130及開關140處於截止狀態，開關150被導通，因此節點B之電壓為第一電壓OVDD，而節點A之電壓小於第一電壓OVDD，以使開關110導通。於區間T1，開關140及開關150處於截止狀態；開關120及開關130被掃描訊號S1致能，處於導通狀態，因此節點A的電壓改變為參考訊號Vref2，而節點B具有沿開關110往開關130的放電路徑，使得節點B的電壓被放電至Vref2+|Vth|為止，其中開關110可為畫素補償電路100之驅動電晶體，而Vth為開關110之臨界電壓。 In order to explain the operation mode of the pixel compensation circuit 100, please refer to FIG. 2 and FIG. 6 at the same time. The interval T0 is the last compensation period, the switch 120, the switch 130 and the switch 140 are in the off state, and the switch 150 is turned on, so the voltage of the node B is the first voltage OVDD, and the voltage of the node A is smaller than the first voltage OVDD, so that The switch 110 is turned on. In the interval T1, the switch 140 and the switch 150 are in an off state; the switch 120 and the switch 130 are enabled by the scanning signal S1, and are in an on state, so the voltage of the node A changes to the reference signal Vref2, and the node B has the switch 130 along the switch 110. The discharge path is such that the voltage of the node B is discharged to Vref2+|Vth|, wherein the switch 110 can be the driving transistor of the pixel compensation circuit 100, and Vth is the threshold voltage of the switch 110.
於區間T2，開關140被導通，此時寫入資料訊號VData，使得節點A之電壓變為VData，開關120、開關130、及開關150處於截止狀態，此時節點 B的電壓值被耦合為(Vref2+|Vth|)+[C1/(C1+C2)]×(VData-Vref2)。於區間T3，開關120、開關130、及開關140處於截止狀態，開關150處於導通狀態，因此節點B的電壓值為第一電壓OVDD，而節點A之電壓被耦合為VData+OVDD-{Vref2+|Vth|+[C1/(C1+C2)]×(VData-Vref2)}，則根據電流公式IOLED=k(Vgs-|Vth|)^2，k為一常數，Vgs為開關110之控制端與第一端之電壓差，可得到流經發光單元160之電流IOLED與開關110之臨界電壓、第一電壓源、第二電壓源均無關，因此畫素補償電路100不會受到電晶體之臨界電壓Vth影響，亦不會受到電壓源走線阻抗導致壓降效應(I-R drop)，具有固定的發光品質。 In the interval T2, the switch 140 is turned on. At this time, the data signal VData is written, so that the voltage of the node A becomes VData, and the switch 120, the switch 130, and the switch 150 are in an off state. The voltage value of B is coupled to (Vref2+|Vth|)+[C1/(C1+C2)]×(VData-Vref2). In the interval T3, the switch 120, the switch 130, and the switch 140 are in an off state, and the switch 150 is in an on state, so the voltage of the node B is the first voltage OVDD, and the voltage of the node A is coupled to VData+OVDD-{Vref2+| Vth|+[C1/(C1+C2)]×(VData-Vref2)}, according to the current formula IOLED=k(Vgs−|Vth|)^2, k is a constant, and Vgs is the control end of the switch 110 and The voltage difference between the first end can be obtained, and the current IOLED flowing through the light-emitting unit 160 is independent of the threshold voltage of the switch 110, the first voltage source and the second voltage source, so the pixel compensation circuit 100 is not subjected to the threshold voltage of the transistor. The Vth effect is also not affected by the voltage drop impedance of the voltage source, and has a fixed illumination quality.
第3圖至第5圖係為本發明之其他實施例之畫素補償電路圖。相似元件具有相似特性故不再重新編號。 3 to 5 are diagrams of pixel compensation circuits according to other embodiments of the present invention. Similar components have similar characteristics and are therefore not renumbered.
請參考第3圖，第3圖為本發明之另一實施例之畫素補償電路圖。第3圖之畫素補償電路100大體上與第2圖之畫素補償電路100相似，值得一提的是開關130之第二端可耦接於開關130之控制端，用以接收掃描訊號S1。由此設計可減少走線，降低佈局複雜度也提高畫素開口率。此外，發光單元160除包含有機發光二極體162外，還可包含開關164耦接於開關110與有機發光二極體162之間，依據掃描訊號S4導通。相較於第2圖之畫素補償電路100，於 區間T1至區間T2，因開關164為截止狀態，故電流不會經由發光單元160通過，可避免暗態發光。其餘作動方法與第2圖之畫素補償電路100相似，故不另贅述。 Please refer to FIG. 3, which is a diagram of a pixel compensation circuit according to another embodiment of the present invention. The pixel compensation circuit 100 of FIG. 3 is substantially similar to the pixel compensation circuit 100 of FIG. 2 . It is worth mentioning that the second end of the switch 130 can be coupled to the control end of the switch 130 for receiving the scan signal S1. . This design reduces traces, reduces layout complexity, and increases pixel aperture. In addition, the light-emitting unit 160 includes a switch 164 coupled between the switch 110 and the organic light-emitting diode 162 in addition to the organic light-emitting diode 162, and is turned on according to the scanning signal S4. Compared to the pixel compensation circuit 100 of FIG. 2, In the interval T1 to the interval T2, since the switch 164 is in the off state, the current does not pass through the light emitting unit 160, and dark state light emission can be avoided. The rest of the actuation method is similar to the pixel compensation circuit 100 of FIG. 2, and therefore will not be described again.
請參考第4圖，第4圖為本發明之另一實施例之畫素補償電路圖。第4圖之畫素補償電路100大體上與第3圖之畫素補償電路100相似，值得一提的是電容C2之一端電連接於開關110之第一端，電容C2之另一端耦接至參考訊號Vref，且參考訊號Vref係為小於或等於第一電壓OVDD且具有固定位準之正電壓，以此方法提供穩定之電壓於電容C2，避免節點B位準浮動。其餘作動方法與第3圖之畫素補償電路100相似，故不另贅述。 Please refer to FIG. 4, which is a diagram of a pixel compensation circuit according to another embodiment of the present invention. The pixel compensation circuit 100 of FIG. 4 is substantially similar to the pixel compensation circuit 100 of FIG. 3. It is worth mentioning that one end of the capacitor C2 is electrically connected to the first end of the switch 110, and the other end of the capacitor C2 is coupled to The reference signal Vref, and the reference signal Vref is a positive voltage that is less than or equal to the first voltage OVDD and has a fixed level. In this way, a stable voltage is supplied to the capacitor C2 to avoid the node B level floating. The rest of the actuation method is similar to the pixel compensation circuit 100 of FIG. 3, and therefore will not be described again.
請參考第5圖，第5圖為本發明之另一實施例之畫素補償電路圖。第5圖之畫素補償電路100大體上與第4圖之畫素補償電路100相似，值得一提的是電容C2之一端電連接於開關110之第一端，電容C2之另一端耦接至掃描訊號S3，使得節點B於區間T1至區間T2均不會浮接。相較於第4圖之畫素補償電路100減少額外走線設置，提高開口率，增進發光效益。其餘作動方法與第4圖之畫素補償電路100相似，故不另贅述。 Please refer to FIG. 5, which is a diagram of a pixel compensation circuit according to another embodiment of the present invention. The pixel compensation circuit 100 of FIG. 5 is substantially similar to the pixel compensation circuit 100 of FIG. 4. It is worth mentioning that one end of the capacitor C2 is electrically connected to the first end of the switch 110, and the other end of the capacitor C2 is coupled to The signal S3 is scanned so that the node B does not float in the interval T1 to the interval T2. Compared with the pixel compensation circuit 100 of FIG. 4, the additional trace setting is reduced, the aperture ratio is increased, and the luminous efficiency is improved. The rest of the actuation method is similar to the pixel compensation circuit 100 of FIG. 4, and therefore will not be described again.
雖然在上述實施例中係以開關110、開關120、開關130、開關140、開關150、開關164皆以P型電晶體舉例，但本發明並不以此為限。舉例來說， 在本發明另一實施例中，開關110、開關120、開關130、開關140、開關150、開關164可為N型電晶體(如N型薄膜電晶體或N型金屬氧化半導體電晶體)。 Although the switch 110, the switch 120, the switch 130, the switch 140, the switch 150, and the switch 164 are all exemplified by a P-type transistor in the above embodiment, the present invention is not limited thereto. for example, In another embodiment of the present invention, the switch 110, the switch 120, the switch 130, the switch 140, the switch 150, and the switch 164 may be N-type transistors (such as an N-type thin film transistor or an N-type metal oxide semiconductor transistor).
綜上所述，本發明實施例之畫素補償電路可使流經有機發光二極體之電流與驅動電晶體的臨界電壓以及電壓源不相關，故可提高顯示畫面的準確度。再者，透過本發明的設計，降低訊號走線數，使得畫素補償電路的開口率提升，增進發光效益。 In summary, the pixel compensation circuit of the embodiment of the present invention can make the current flowing through the organic light emitting diode irrelevant to the threshold voltage and the voltage source of the driving transistor, thereby improving the accuracy of the display screen. Furthermore, through the design of the present invention, the number of signal traces is reduced, so that the aperture ratio of the pixel compensation circuit is increased, and the luminous efficiency is improved.
以上所述僅為本發明之較佳實施例，凡依本發明申請專利範圍所做之均等變化與修飾，皆應屬本發明之涵蓋範圍。 The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should be within the scope of the present invention.
100‧‧‧畫素補償電路 100‧‧‧ pixel compensation circuit
C1、C2‧‧‧電容 C1, C2‧‧‧ capacitor
A、B‧‧‧節點 A, B‧‧‧ nodes
S1、S2、S3‧‧‧掃描訊號 S1, S2, S3‧‧‧ scan signals
VData‧‧‧資料訊號 VData‧‧‧Information Signal
Vref1、Vref2‧‧‧參考訊號 Vref1, Vref2‧‧‧ reference signal
OVDD‧‧‧第一電壓 OVDD‧‧‧first voltage
OVSS‧‧‧第二電壓 OVSS‧‧‧second voltage
160‧‧‧發光單元 160‧‧‧Lighting unit
162‧‧‧有機發光二極體 162‧‧‧Organic Luminescent Diodes
110‧‧‧第一開關 110‧‧‧First switch
120‧‧‧第二開關 120‧‧‧second switch
130‧‧‧第三開關 130‧‧‧third switch
140‧‧‧第四開關 140‧‧‧fourth switch
150‧‧‧第五開關 150‧‧‧ fifth switch
164‧‧‧第六開關 164‧‧‧ sixth switch
Claims (9)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW103118669A TWI515712B (en) | 2014-05-28 | 2014-05-28 | Pixel driving circuit |
| CN201410314132.1A CN104036732B (en) | 2014-05-28 | 2014-07-03 | Pixel compensation circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW103118669A TWI515712B (en) | 2014-05-28 | 2014-05-28 | Pixel driving circuit |
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| TW201545153A TW201545153A (en) | 2015-12-01 |
| TWI515712B true TWI515712B (en) | 2016-01-01 |
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| TW103118669A TWI515712B (en) | 2014-05-28 | 2014-05-28 | Pixel driving circuit |
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| TW (1) | TWI515712B (en) |
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| CN105528992A (en) * | 2016-01-29 | 2016-04-27 | 深圳市华星光电技术有限公司 | Pixel compensating circuit, method, scanning drive circuit and plane display device |
| KR20180025482A (en) * | 2016-08-31 | 2018-03-09 | 엘지디스플레이 주식회사 | Organic Light Emitting Display |
| US10535297B2 (en) * | 2016-11-14 | 2020-01-14 | Int Tech Co., Ltd. | Display comprising an irregular-shape active area and method of driving the display |
| CN111326112B (en) * | 2018-11-29 | 2022-08-05 | 成都辰显光电有限公司 | Pixel circuit, display device and driving method of pixel circuit |
| CN109903722B (en) * | 2019-04-10 | 2020-11-17 | 京东方科技集团股份有限公司 | Pixel driving circuit, display device and pixel driving method |
| CN111599314A (en) * | 2020-04-30 | 2020-08-28 | 南京中电熊猫平板显示科技有限公司 | Self-luminous display device and in-pixel compensation circuit |
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| KR100560780B1 (en) * | 2003-07-07 | 2006-03-13 | 삼성에스디아이 주식회사 | Pixel circuit in OLED and Method for fabricating the same |
| CN102646386B (en) * | 2011-05-13 | 2014-08-06 | 京东方科技集团股份有限公司 | Pixel unit circuit, pixel array, panel and panel driving method |
| CN103489399B (en) * | 2012-11-21 | 2015-09-02 | 友达光电股份有限公司 | Electroluminescent pixel circuit |
| TWI479467B (en) * | 2013-05-30 | 2015-04-01 | Au Optronics Corp | Pixel and pixel circuit thereof |
| CN103413521B (en) * | 2013-07-31 | 2015-06-10 | 京东方科技集团股份有限公司 | Organic light-emitting diode pixel circuit, method for driving same and display device |
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2014
- 2014-05-28 TW TW103118669A patent/TWI515712B/en active
- 2014-07-03 CN CN201410314132.1A patent/CN104036732B/en active Active
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| CN104036732A (en) | 2014-09-10 |
| CN104036732B (en) | 2016-05-25 |
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