TWI513188B - Power supply circuit for pci-e slot - Google Patents
Power supply circuit for pci-e slot Download PDFInfo
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- TWI513188B TWI513188B TW099146598A TW99146598A TWI513188B TW I513188 B TWI513188 B TW I513188B TW 099146598 A TW099146598 A TW 099146598A TW 99146598 A TW99146598 A TW 99146598A TW I513188 B TWI513188 B TW I513188B
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- power supply
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- electronic switch
- effect transistor
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Description
本發明涉及一種PCI-E插槽供電電路。The invention relates to a PCI-E slot power supply circuit.
主機板上的PCI-E(Peripheral Component Interconnect Express)插槽需要3.3V_Dual電源供電,此電源在S5(Soft shutdown)狀態下是有電的,故當PCI-E插槽上裝有PCI-E設備時會造成系統在S5狀態下額外耗電,有時會超過Eup認證的節能要求(Eup認證要求系統在S5狀態下耗電不能超過1W)。The PCI-E (Peripheral Component Interconnect Express) slot on the motherboard requires a 3.3V_Dual power supply. This power supply is powered by the S5 (Soft shutdown) state. Therefore, the PCI-E slot is equipped with a PCI-E device. This will cause the system to consume additional power in the S5 state, sometimes exceeding the Eup-certified energy-saving requirements (Eup certification requires that the system consume no more than 1W in the S5 state).
鑒於以上內容,有必要提供一種能在主機板處於S5狀態下不為PCI-E插槽供電的供電電路。In view of the above, it is necessary to provide a power supply circuit that does not supply power to the PCI-E slot when the motherboard is in the S5 state.
一種PCI-E插槽供電電路,包括一控制晶片、一第一電子開關及一第二電子開關,該控制晶片用於判斷一主機板的工作狀態並據此輸出一控制訊號,該第一電子開關的第一端用於與該控制晶片相連,以接收該控制訊號,該第一電子開關的第一端還透過一第一電阻接收來自主機板的3.3V雙重電源,該第一電子開關的第二端接地,第三端與該第二電子開關的第一端相連,還透過一第二電阻接收該3.3V雙重電源,該第二電子開關的第二端接收該3.3V雙重電源,第三端與一PCI-E插槽相連。A PCI-E slot power supply circuit includes a control chip, a first electronic switch and a second electronic switch. The control chip is configured to determine a working state of a motherboard and output a control signal according to the first electronic The first end of the switch is connected to the control chip to receive the control signal, and the first end of the first electronic switch further receives a 3.3V dual power supply from the motherboard through a first resistor, the first electronic switch The second end is grounded, the third end is connected to the first end of the second electronic switch, and the 3.3V dual power supply is received through a second resistor, and the second end of the second electronic switch receives the 3.3V dual power supply, The three ends are connected to a PCI-E slot.
上述PCI-E插槽供電電路透過控制晶片及兩電子開關可使得在主機板處於S5狀態時停止對PCI-E插槽供電。The PCI-E slot power supply circuit can stop power supply to the PCI-E slot when the motherboard is in the S5 state through the control chip and the two electronic switches.
請參閱圖1,本發明PCI-E插槽供電電路的較佳實施方式包括一控制晶片、第一場效應電晶體Q1和一第二場效應電晶體Q2。Referring to FIG. 1, a preferred embodiment of the PCI-E socket power supply circuit of the present invention includes a control wafer, a first field effect transistor Q1 and a second field effect transistor Q2.
該第一場效應電晶體Q1的閘極用於與該控制晶片相連,以接收來自控制晶片的控制訊號PCIE_PWR_CTL,其閘極還透過一電阻R1與3.3V雙重電源+3.3V_DUAL相連,該第一場效應電晶體Q1的源極接地,汲極與該第二場效應電晶體Q2的閘極相連,還透過電阻R2與該3.3V雙重電源+3.3V_DUAL相連,該第二場效應電晶體Q2的汲極與一PCI-E插槽5相連,源極與該3.3V雙重電源+3.3V_DUAL相連。The gate of the first field effect transistor Q1 is connected to the control chip for receiving the control signal PCIE_PWR_CTL from the control chip, and the gate is also connected to the 3.3V dual power supply +3.3V_DUAL through a resistor R1, the first The source of the field effect transistor Q1 is grounded, the drain is connected to the gate of the second field effect transistor Q2, and is also connected to the 3.3V dual power supply +3.3V_DUAL through the resistor R2, the second field effect transistor Q2 The drain is connected to a PCI-E slot 5, and the source is connected to the 3.3V dual power supply +3.3V_DUAL.
本實施方式中,該控制晶片為主機板上的Super I/O晶片6,其透過判斷主機板的工作狀態並據此輸出該控制訊號PCIE_PWR_CTL。In this embodiment, the control chip is a Super I/O chip 6 on the motherboard, which determines the operating state of the motherboard and outputs the control signal PCIE_PWR_CTL accordingly.
當主機板處於S5狀態時,該Super I/O晶片6輸出低電平的控制訊號PCIE_PWR_CTL,從而使該第一場效應電晶體Q1斷開,進一步使得該第二場效應電晶體Q2斷開,即使得PCI-E插槽5不再接收該3.3V雙重電源+3.3V_DUAL。此時,與該PCI-E插槽5相連的PCI-E設備不再工作。When the motherboard is in the S5 state, the Super I/O chip 6 outputs a low level control signal PCIE_PWR_CTL, thereby disconnecting the first field effect transistor Q1, further causing the second field effect transistor Q2 to be disconnected. That is, the PCI-E slot 5 no longer receives the 3.3V dual power +3.3V_DUAL. At this time, the PCI-E device connected to the PCI-E slot 5 no longer operates.
當主機板處於S0-S4狀態時,該Super I/O晶片6輸出高電平的控制訊號PCIE_PWR_CTL,從而使該第一場效應電晶體Q1導通,進一步使得該第二場效應電晶體Q2導通,即使得該3.3V雙重電源+3.3V_DUAL為PCI-E插槽5供電。When the motherboard is in the S0-S4 state, the Super I/O chip 6 outputs a high level control signal PCIE_PWR_CTL, thereby turning on the first field effect transistor Q1, further turning on the second field effect transistor Q2. That is, the 3.3V dual power supply +3.3V_DUAL supplies power to the PCI-E slot 5.
從工作原理可以看出,該第一場效應電晶體Q1及第二場效應電晶體Q2在電路中起到電子開關的作用,故其他實施方式中,該第一場效應電晶體Q1及第二場效應電晶體Q2亦可採用其他類型的電晶體來代替,甚至其他具有電子開關功能的電子元件均可。比如,當利用一電晶體來代替該第一場效應電晶體Q1時,該電晶體的基極對應於該第一場效應電晶體Q1的閘極、電晶體的集極對應於第一場效應電晶體Q1的汲極、電晶體的射極對應於該第一場效應電晶體Q1的源極。該電子開關包括一第一端、一第二端及一第三端,該第一端用於接收該PCI-E控制訊號PCIE_PWR_CTL以控制第二端及第三端的導通與斷開,第二端接地,第三端透過電阻R2與該3.3V雙重電源+3.3V_DUAL相連。It can be seen from the working principle that the first field effect transistor Q1 and the second field effect transistor Q2 function as electronic switches in the circuit. Therefore, in other embodiments, the first field effect transistor Q1 and the second The field effect transistor Q2 can also be replaced by other types of transistors, and even other electronic components having electronic switching functions. For example, when a transistor is used in place of the first field effect transistor Q1, the base of the transistor corresponds to the gate of the first field effect transistor Q1, and the collector of the transistor corresponds to the first field effect. The drain of the transistor Q1 and the emitter of the transistor correspond to the source of the first field effect transistor Q1. The electronic switch includes a first end, a second end and a third end. The first end is configured to receive the PCI-E control signal PCIE_PWR_CTL to control the conduction and disconnection of the second end and the third end, and the second end Grounded, the third end is connected to the 3.3V dual power supply +3.3V_DUAL through resistor R2.
綜上所述,本發明符合發明專利要件,爰依法提出專利申請。惟,以上所述者僅為本發明之較佳實施例,舉凡熟悉本案技藝之人士,在爰依本發明精神所作之等效修飾或變化,皆應涵蓋於以下之申請專利範圍內。In summary, the present invention complies with the requirements of the invention patent and submits a patent application according to law. The above description is only the preferred embodiment of the present invention, and equivalent modifications or variations made by those skilled in the art will be included in the following claims.
Q1...第一場效應電晶體Q1. . . First field effect transistor
Q2...第二場效應電晶體Q2. . . Second field effect transistor
R1、R2...電阻R1, R2. . . resistance
5...PCI-E插槽5. . . PCI-E slot
6...Super I/O晶片6. . . Super I/O chip
圖1是本發明PCI-E插槽供電電路的較佳實施方式的電路圖。1 is a circuit diagram of a preferred embodiment of a PCI-E slot power supply circuit of the present invention.
Q1...第一場效應電晶體Q1. . . First field effect transistor
Q2...第二場效應電晶體Q2. . . Second field effect transistor
R1、R2...電阻R1, R2. . . resistance
5...PCI-E插槽5. . . PCI-E slot
6...Super I/O晶片6. . . Super I/O chip
Claims (4)
Priority Applications (1)
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TW099146598A TWI513188B (en) | 2010-12-29 | 2010-12-29 | Power supply circuit for pci-e slot |
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TW099146598A TWI513188B (en) | 2010-12-29 | 2010-12-29 | Power supply circuit for pci-e slot |
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TW201228231A TW201228231A (en) | 2012-07-01 |
TWI513188B true TWI513188B (en) | 2015-12-11 |
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TWI740632B (en) * | 2020-09-03 | 2021-09-21 | 宏碁股份有限公司 | Computer apparatus and power gating circuit |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20020171570A1 (en) * | 2001-04-23 | 2002-11-21 | Tomotaka Maki | AD converter evaluation apparatus |
TW200923784A (en) * | 2007-11-16 | 2009-06-01 | Asustek Comp Inc | Electronic device and method for resuming from suspend-to-ram state thereof |
TW200939010A (en) * | 2008-03-06 | 2009-09-16 | Asustek Comp Inc | Computer system and power saving method |
TW201032401A (en) * | 2009-02-27 | 2010-09-01 | Asustek Comp Inc | Circuit board module and connection port collection board |
TW201039500A (en) * | 2009-04-17 | 2010-11-01 | Asustek Comp Inc | Interface card slot and the circuit board module having the same |
TW201040704A (en) * | 2009-05-08 | 2010-11-16 | Asustek Comp Inc | Display card and operating method thereof |
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2010
- 2010-12-29 TW TW099146598A patent/TWI513188B/en not_active IP Right Cessation
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20020171570A1 (en) * | 2001-04-23 | 2002-11-21 | Tomotaka Maki | AD converter evaluation apparatus |
TW200923784A (en) * | 2007-11-16 | 2009-06-01 | Asustek Comp Inc | Electronic device and method for resuming from suspend-to-ram state thereof |
TW200939010A (en) * | 2008-03-06 | 2009-09-16 | Asustek Comp Inc | Computer system and power saving method |
TW201032401A (en) * | 2009-02-27 | 2010-09-01 | Asustek Comp Inc | Circuit board module and connection port collection board |
TW201039500A (en) * | 2009-04-17 | 2010-11-01 | Asustek Comp Inc | Interface card slot and the circuit board module having the same |
TW201040704A (en) * | 2009-05-08 | 2010-11-16 | Asustek Comp Inc | Display card and operating method thereof |
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TW201228231A (en) | 2012-07-01 |
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