TWI530801B - Electronic device - Google Patents
Electronic device Download PDFInfo
- Publication number
- TWI530801B TWI530801B TW104121921A TW104121921A TWI530801B TW I530801 B TWI530801 B TW I530801B TW 104121921 A TW104121921 A TW 104121921A TW 104121921 A TW104121921 A TW 104121921A TW I530801 B TWI530801 B TW I530801B
- Authority
- TW
- Taiwan
- Prior art keywords
- switch
- hard disk
- backplane
- electronic device
- state
- Prior art date
Links
Description
本發明是關於一種電子裝置,且特別是關於一種在待機模式時可檢查是否有硬碟背板的電子裝置。 The present invention relates to an electronic device, and more particularly to an electronic device that can check whether there is a hard disk backplane in the standby mode.
習知技術中主機板僅能在開機時偵測是否存在硬碟錯誤並透過可程式邏輯裝置(例如:CPLD、FPGA等)之一接腳反應給使用者,而在待命狀態下並不需檢測是否存在硬碟錯誤,因此在待開機狀態時上述接腳便處於閒置狀態,造成資源的浪費。又,習知技術中電子裝置係藉由硬碟背板提供的一連接訊號判斷是否連接了硬碟背板,然而在待開機狀態時硬碟背板未工作,因此無法有效判斷電子裝置是否連接了硬碟背板。如何解決待開機狀態時硬碟背板是否正常連接,同時增加可程式邏輯裝置的使用效率,實為一有待克服的課題。 In the prior art, the motherboard can only detect whether there is a hard disk error at the time of power-on and respond to the user through one of the programmable logic devices (for example, CPLD, FPGA, etc.), and does not need to detect in the standby state. Whether there is a hard disk error, so the above pins are idle when the state is to be turned on, resulting in waste of resources. Moreover, in the prior art, the electronic device determines whether the hard disk backplane is connected by a connection signal provided by the hard disk backplane. However, the hard disk backplane does not work when the power is turned on, so it is impossible to effectively determine whether the electronic device is connected. Hard disk backplane. How to solve the problem that the hard disk backplane is normally connected when the state is to be turned on, and increase the use efficiency of the programmable logic device is a problem to be overcome.
有鑒於此,本揭示內容提出一種伺服器及控制單元,藉以解決先前技術所述及的問題。 In view of this, the present disclosure proposes a server and control unit to solve the problems described in the prior art.
本揭示內容之一態樣是在提供一種待命時可檢查是否有硬碟背板的電子裝置,包括:硬碟管理晶片、硬碟背板、主機板以及硬碟狀態偵測單元。硬碟管理晶片包括背板連接端以及錯誤偵測端,背板連接端接收第三背板連接狀態訊號,錯誤偵測端用以輸出硬碟管理晶片的錯誤偵測訊號。硬碟背板包括連接偵測端,用以輸出一第一背板連接狀態訊號。主機板包括控制端,用以控制一複雜可程式邏輯裝置。硬碟狀態偵測單元耦接至背板連接端、錯誤偵測端、連接偵測端以及控制端。其中,便碟狀態偵測單元用以當電子裝置在待開機狀態時控制複雜可程式邏輯裝置輸出電子裝置之硬碟背板連接狀態,當電子裝置在工作狀態時控制複雜可程式邏輯裝置輸出電子裝置之錯誤偵測狀態,並提供硬碟管理晶片第三背板連接狀態訊號。 One aspect of the present disclosure is to provide an electronic device capable of checking whether there is a hard disk backplane when standby, including: a hard disk management chip, a hard disk backplane, a motherboard, and a hard disk state detecting unit. The hard disk management chip includes a backplane connection end and an error detection end. The backplane connection end receives a third backplane connection status signal, and the error detection end is used to output an error detection signal of the hard disk management chip. The hard disk backplane includes a connection detecting end for outputting a first backplane connection status signal. The motherboard includes a control terminal for controlling a complex programmable logic device. The hard disk state detection unit is coupled to the backplane connection end, the error detection end, the connection detection end, and the control end. The floppy state detecting unit is configured to control the hard disk backplane connection state of the output logic device of the complex programmable logic device when the electronic device is in the power-on state, and control the output of the complex programmable logic device when the electronic device is in the working state. The device detects the error status and provides a third backplane connection status signal for the hard disk management chip.
基於上述,本揭示內容所示的電子裝置可藉由工作電壓、背板待命電壓以及控制器的開關電路以改變第二背板連接狀態訊號,使得電子裝置同時在待開機狀態與工作狀態時皆可偵測是否連結硬碟背板,同時在工作狀態時反應電子裝置之錯誤偵測狀態。如此一來,電子裝置不僅在待開機狀態以及工作狀態下均可正確識別是否連接硬碟背板,同時也不影響電子裝置的錯誤偵測的功能,藉此達到多功能的識別技術。 Based on the above, the electronic device shown in the present disclosure can change the second backplane connection state signal by using the operating voltage, the backplane standby voltage, and the switch circuit of the controller, so that the electronic device is in both the standby state and the working state at the same time. It can detect whether the hard disk backplane is connected and react to the error detection state of the electronic device during the working state. In this way, the electronic device can correctly identify whether the hard disk backplane is connected not only in the standby state and the working state, but also does not affect the function of the error detection of the electronic device, thereby achieving the multifunctional recognition technology.
100‧‧‧電子裝置 100‧‧‧Electronic devices
110‧‧‧硬碟管理板 110‧‧‧hard disk management board
112‧‧‧背板連接端 112‧‧‧backplane connection
114‧‧‧錯誤偵測端 114‧‧‧Error detection end
120‧‧‧硬碟背板 120‧‧‧hard disk backplane
122‧‧‧連接偵測端 122‧‧‧Connection detection end
130‧‧‧硬碟管理晶片 130‧‧‧hard disk management chip
140‧‧‧主機板 140‧‧‧ motherboard
142‧‧‧主機板控制端 142‧‧‧ motherboard control terminal
144‧‧‧複雜可程式邏輯裝置 144‧‧‧Complex programmable logic device
160‧‧‧硬碟狀態偵測單元 160‧‧‧hard disk status detection unit
162、164、166‧‧‧開關 162, 164, 166‧ ‧ switch
R1~R6‧‧‧電阻 R1~R6‧‧‧ resistor
180‧‧‧待開機電源 180‧‧‧ Waiting for power on
182‧‧‧背板工作電壓 182‧‧‧ Backplane working voltage
184‧‧‧電源控制開關 184‧‧‧Power control switch
186‧‧‧工作電源 186‧‧‧Working power supply
CNT1~CNT3、ERDT‧‧‧訊號 CNT1~CNT3, ERDT‧‧‧ signals
第1圖為根據本發明之一實施例所繪示的一種電子裝置示意圖;第2圖為根據本發明之一實施例所繪示的一種電子裝置示意圖;第3a圖為根據本發明之一實施例所繪示的一種電子裝置待機模式示意圖;以及第3b圖為根據本發明之一實施例所繪示的一種電子裝置工作狀態示意圖。 1 is a schematic diagram of an electronic device according to an embodiment of the invention; FIG. 2 is a schematic diagram of an electronic device according to an embodiment of the invention; FIG. 3a is a diagram of an implementation according to the invention A schematic diagram of an electronic device standby mode is illustrated; and FIG. 3b is a schematic diagram of an operating state of an electronic device according to an embodiment of the invention.
下文係舉實施例配合所附圖式作詳細說明,但所提供之實施例並非用以限制本發明所涵蓋的範圍,而結構操作之描述非用以限制其執行之順序,任何由元件重新組合之結構,所產生具有均等功效的裝置,皆為本發明所涵蓋的範圍。此外,圖式僅以說明為目的,並未依照原尺寸作圖。為使便於理解,下述說明中相同元件將以相同之符號標示來說明。 The embodiments are described in detail below with reference to the accompanying drawings, but the embodiments are not intended to limit the scope of the invention, and the description of structural operations is not intended to limit the order of execution thereof The structure, which produces equal devices, is within the scope of the present invention. In addition, the drawings are for illustrative purposes only and are not drawn to the original dimensions. For ease of understanding, the same elements in the following description will be denoted by the same reference numerals.
於本文中,除非內文中對於冠詞有所特別限定,否則『一』與『該』可泛指單一個或多個。將進一步理解的是,本文中所使用之『包含』、『包括』、『具有』及相似詞彙,指明其所記載的特徵、區域、整數、步驟、 操作、元件與/或組件,但不排除其所述或額外的其一個或多個其它特徵、區域、整數、步驟、操作、元件、組件,與/或其中之群組。 In this document, "one" and "the" can be used to mean one or more, unless the article specifically defines the article. It will be further understood that the terms "including", "including", "having", and similar terms are used in the context to indicate the features, regions, integers, steps, The operation, elements, and/or components, and/or one or more of its other features, regions, integers, steps, operations, components, components, and/or groups thereof.
關於本文中所使用之『第一』、『第二』、…等,並非特別指稱次序或順位的意思,亦非用以限定本發明,其僅僅是為了區別以相同技術用語描述的元件或操作而已。 The terms "first", "second", etc., used herein are not intended to refer to the order or order, nor are they intended to limit the invention, only to distinguish between elements or operations described in the same technical terms. Only.
另外,關於本文中所使用之『耦接』或『連接』,均可指二或多個元件相互直接作實體或電性接觸,或是相互間接作實體或電性接觸,亦可指二或多個元件相互操作或動作。 In addition, the term "coupled" or "connected" as used herein may mean that two or more elements are in direct physical or electrical contact with each other, or indirectly in physical or electrical contact with each other, or Multiple components operate or act upon each other.
請參照第1圖,第1圖為根據本發明之一實施例所繪示的一種電子裝置示意圖。如第1圖所示,電子裝置100包含硬碟管理板110、硬碟背板120、以及主機板140。 Please refer to FIG. 1 , which is a schematic diagram of an electronic device according to an embodiment of the invention. As shown in FIG. 1, the electronic device 100 includes a hard disk management board 110, a hard disk backplane 120, and a motherboard 140.
以下段落將提出各個實施例,來說明上述電子裝置100的功能,但本揭示內容並不僅以下所列的實施例為限。 The following paragraphs will set forth various embodiments to explain the functions of the above-described electronic device 100, but the disclosure is not limited to the embodiments listed below.
於此實施例中,如第1圖所示,硬碟背板120可包括連接至待開機電源180的背板連接狀態控制單元R2,背板連接狀態控制單元R2可用以控制第一背板連接狀態訊號CNT1。主機板140可包括複雜可程式邏輯裝置(Complex Programmable Logic Device,CPLD)144,電性連接硬碟背板120,並控制傳輸第 二背板連接狀態訊號CNT2。硬碟管理板110包括硬碟管理晶片130以及硬碟狀態偵測單元160。硬碟管理晶片130用以對硬碟背板120的工作狀態進行管理,並控制傳輸第三背板連接狀態訊號CNT3與硬碟錯誤偵測訊號ERDT。硬碟狀態偵測單元160電性連接於工作電源186、硬碟管理晶片130、硬碟背板120以及CPLD144,並用以偵測硬碟背板120的連接狀態以及硬碟(未繪示)的工作狀態。 In this embodiment, as shown in FIG. 1, the hard disk backplane 120 may include a backplane connection state control unit R2 connected to the power source to be powered 180, and the backplane connection state control unit R2 may be used to control the first backplane connection. Status signal CNT1. The motherboard 140 may include a Complex Programmable Logic Device (CPLD) 144, electrically connected to the hard disk backplane 120, and control the transmission. The second backplane is connected to the status signal CNT2. The hard disk management board 110 includes a hard disk management chip 130 and a hard disk state detecting unit 160. The hard disk management chip 130 is configured to manage the working state of the hard disk backplane 120 and control the transmission of the third backplane connection state signal CNT3 and the hard disk error detection signal ERDT. The hard disk state detecting unit 160 is electrically connected to the working power source 186, the hard disk management chip 130, the hard disk backplane 120, and the CPLD 144, and is used for detecting the connection state of the hard disk backplane 120 and the hard disk (not shown). Working status.
請參照第2圖,第2圖為根據本發明之一實施例所繪示的一種電子裝置示意圖。於此實施例中,如第2圖所示,硬碟管理晶片130包含背板連接端112以及錯誤偵測端114,背板連接端112用以接收第三背板連接狀態訊號CNT3,錯誤偵測端114用以輸出硬碟管理晶片130的一錯誤偵測訊號ERDT。其中第三背板連接狀態訊號CNT3係與電子裝置100中硬碟背板120連接狀態相關之訊號,錯誤偵測訊號ERDT係與電子裝置100硬碟錯誤相關之訊號。硬碟背板120包括一連接偵測端122,用以輸出第一背板連接狀態訊號CNT1,其中第一背板連接狀態訊號CNT1用以反應硬碟背板120的連接狀態。主機板140包括主機板控制端142,用以輸出第二背板連接狀態訊號CNT2以控制CPLD144。硬碟狀態偵測單元160,耦接至背板連接端112、錯誤偵測端114、連接偵測端122以及主機板控制端142,其中,硬碟狀態 偵測單元160用以當電子裝置100在待開機狀態時控制CPLD144輸出電子裝置100之硬碟背板120的連接狀態,當電子裝置100在工作狀態時控制CPLD144輸出電子裝置100之錯誤偵測狀態,並提供硬碟管理晶片130第三背板連接狀態訊號CNT3。 Referring to FIG. 2, FIG. 2 is a schematic diagram of an electronic device according to an embodiment of the invention. In this embodiment, as shown in FIG. 2, the hard disk management chip 130 includes a backplane connection end 112 and an error detection end 114. The backplane connection end 112 is configured to receive the third backplane connection status signal CNT3, and error detection. The measuring end 114 is configured to output an error detection signal ERDT of the hard disk management chip 130. The third backplane connection status signal CNT3 is a signal related to the connection state of the hard disk backplane 120 in the electronic device 100, and the error detection signal ERDT is a signal related to the hard disk error of the electronic device 100. The hard disk backplane 120 includes a connection detecting end 122 for outputting a first backplane connection state signal CNT1, wherein the first backplane connection state signal CNT1 is used to reflect the connection state of the hard disk backplane 120. The motherboard 140 includes a motherboard control terminal 142 for outputting a second backplane connection status signal CNT2 to control the CPLD 144. The hard disk state detecting unit 160 is coupled to the backplane connecting end 112, the error detecting end 114, the connection detecting end 122, and the motherboard control end 142, wherein the hard disk state The detecting unit 160 is configured to control the CPLD 144 to output the connection state of the hard disk backplane 120 of the electronic device 100 when the electronic device 100 is in the power-on state, and control the error detection state of the output device 100 by the CPLD 144 when the electronic device 100 is in the working state. And providing a hard disk management chip 130 third backplane connection status signal CNT3.
於本揭示內容一實施例中,電子裝置100可包含一待開機電源180以及一電源控制開關184。待開機電源180用以在待開機狀態時提供硬碟背板120一背板待命電壓VBPSTBY,電源控制開關184連接待開機電源180以及背板工作電壓182,其中,在待開機狀態時電源控制開關184截止,在工作狀態時電源控制開關184導通。 In an embodiment of the present disclosure, the electronic device 100 can include a power to be turned on 180 and a power control switch 184. The power-on power supply 180 is configured to provide a hard disk backplane 120 and a backplane standby voltage VBPSTBY when the power-on state is to be turned on, and the power control switch 184 is connected to the power-on power supply 180 and the back-plate operating voltage 182, wherein the power control switch is in a standby state. At 184, the power control switch 184 is turned on during the operating state.
於本揭示內容一實施例中,電子裝置100可包括在電源控制開關184導通時,待開機電源180經由電源控制開關184提供硬碟背板120背板工作電壓182以使硬碟背板120正常工作。藉由待開機電源180以及電源控制開關184,可在待開機狀態與工作狀態共用待開機電源180,藉此減少所需外部電源的數量,增加電子裝置100的應用彈性。 In an embodiment of the present disclosure, the electronic device 100 may include the power-on control device 184 providing the hard disk backplane 120 backplane operating voltage 182 via the power control switch 184 to enable the hard disk backplane 120 to be normal. jobs. By the power-on power source 180 and the power control switch 184, the power-on power source 180 can be shared between the power-on state and the working state, thereby reducing the number of external power sources required and increasing the application flexibility of the electronic device 100.
於本揭示內容一實施例中,硬碟狀態偵測單元160可包括第一開關162、第二開關166、第三開關164。第一開關162的第一端耦接背板連接端112、第二端耦接連接偵測端122,第二開關166的第一端耦接錯誤偵測端114、第二端耦接主機板控制端 142,第三開關164的第一端耦接連接偵測端122、第二端耦接主機板控制端142。其中,第一開關162與第二開關166的導通狀態相同,第一開關162與第三開關164的導通狀態不相同,亦即第一開關162與第二開關166同時導通、同時關閉,且當第一開關162、第二開關166導通時,第三開關164關閉,當第一開關162、第二開關166關閉時,第三開關164導通。 In an embodiment of the present disclosure, the hard disk state detecting unit 160 may include a first switch 162, a second switch 166, and a third switch 164. The first end of the first switch 162 is coupled to the backplane connection end 112, and the second end is coupled to the connection detection end 122. The first end of the second switch 166 is coupled to the error detection end 114, and the second end is coupled to the motherboard. Control terminal 142. The first end of the third switch 164 is coupled to the connection detecting end 122, and the second end is coupled to the main board control end 142. The first switch 162 and the second switch 166 are in the same conducting state, and the first switch 162 and the third switch 164 are in the same state of conduction, that is, the first switch 162 and the second switch 166 are simultaneously turned on and simultaneously turned off, and when When the first switch 162 and the second switch 166 are turned on, the third switch 164 is turned off, and when the first switch 162 and the second switch 166 are turned off, the third switch 164 is turned on.
於本揭示內容一實施例中,第一開關162、第二開關166可以分別是單一N型電晶體(nMOS),第三開關164可以是兩個P型電晶體(pMOS)串聯,但不以此為限,本領域具通常知識者可依據實際需求調整開關的數量以及開關的種類(例如MOS開關、BJT開關等)。 In an embodiment of the present disclosure, the first switch 162 and the second switch 166 may be a single N-type transistor (nMOS), and the third switch 164 may be a series of two P-type transistors (pMOS), but not To this end, those skilled in the art can adjust the number of switches and the types of switches (such as MOS switches, BJT switches, etc.) according to actual needs.
於本揭示內容一實施例中,電子裝置100可包括一工作電源186提供一工作電壓VWORK,工作電源186分別經由電阻R3耦接第一開關162之控制端、經由電阻R4耦接第三開關164之控制端、經由電阻R5耦接第二開關166之控制端以及經由電阻R6耦接電源控制開關184之控制端。 In an embodiment of the present disclosure, the electronic device 100 can include a working power supply 186 to provide a working voltage VWORK. The working power supply 186 is coupled to the control end of the first switch 162 via the resistor R3, and coupled to the third switch 164 via the resistor R4. The control terminal is coupled to the control terminal of the second switch 166 via the resistor R5 and coupled to the control terminal of the power control switch 184 via the resistor R6.
於本揭示內容內容一實施例中,電子裝置100可包含在待開機狀態時,工作電壓VWORK為低電位,背板待命電壓VBPSTBY為高電位,並控制第一開關162以及第二開關166截止,第三開關164導通。在工作狀態時,工作電壓VWORK為高電位,並 控制第一開關162及第二開關166導通,第三開關164截止。 In an embodiment of the present disclosure, the electronic device 100 may include the operating voltage VWORK being at a low potential, the backplane standby voltage VBPSTBY being at a high potential, and controlling the first switch 162 and the second switch 166 to be turned off. The third switch 164 is turned on. In the working state, the working voltage VWORK is high, and The first switch 162 and the second switch 166 are controlled to be turned on, and the third switch 164 is turned off.
於本揭示內容內容一實施例中,待開機狀態時第一背板連接狀態訊號CNT1經過第三開關164輸出至主機板控制端142,在工作狀態時,第三背板連接狀態訊號CNT3回應於第一背板連接狀態訊號CNT1,錯誤偵測訊號ERDT輸出至主機板控制端142。 In an embodiment of the present disclosure, the first backplane connection status signal CNT1 is output to the motherboard control terminal 142 via the third switch 164 when the power is turned on. In the working state, the third backplane connection status signal CNT3 is responded to. The first backplane is connected to the state signal CNT1, and the error detection signal ERDT is output to the motherboard control terminal 142.
於本揭示內容內容一實施例中,如第3a圖所示,第3a圖為根據本發明之一實施例所繪示的一種電子裝置待機模式示意圖,待開機狀態時工作電壓VWORK及背板工作電壓182皆為低準位,背板待命電壓VBPSTBY為高準位。此時硬碟背板120不動作,但仍能偵測電子裝置100是否連接硬碟背板120。低準位工作電壓VWORK控制第一開關162、第二開關166截止,同時控制第三開關164導通。因此,當電子裝置100連接硬碟背板120時,待開機電源180便能藉由第三開關164連接至主機板控制端142,並輸出高準位的第二背板連接狀態訊號CNT2。由於待開機電源180係硬碟背板120於待開機狀態時特有的電源信號,因此,使用者便能藉由待機模式時第二背板連接狀態訊號CNT2的準位高低得知電子裝置100是否連接硬碟背板120。 In an embodiment of the present disclosure, as shown in FIG. 3a, FIG. 3a is a schematic diagram of a standby mode of an electronic device according to an embodiment of the present invention, and the working voltage VWORK and the backplane work when the power is turned on. The voltage 182 is at a low level, and the backplane standby voltage VBPSTBY is at a high level. At this time, the hard disk backplane 120 does not operate, but can still detect whether the electronic device 100 is connected to the hard disk backplane 120. The low level operating voltage VWORK controls the first switch 162 and the second switch 166 to be turned off while controlling the third switch 164 to be turned on. Therefore, when the electronic device 100 is connected to the hard disk backplane 120, the power-on power supply 180 can be connected to the motherboard control terminal 142 through the third switch 164, and the high-level second backplane connection state signal CNT2 is output. Since the power-on power source 180 is a power signal unique to the hard disk backplane 120 when the power-on state is to be turned on, the user can know whether the electronic device 100 is in the standby mode when the second backplane is connected to the state signal CNT2. Connect the hard disk backplane 120.
反之,若電子裝置100未連接硬碟背板 120,則待開機狀態亦不存在高準位的背板待命電壓VBPSTBY,則第二背板連接狀態訊號CNT2為低準位。綜上所述,使用者能藉由待機模式時第二背板連接狀態訊號CNT2的準位高低得知電子裝置100是否連接硬碟背板120。 On the other hand, if the electronic device 100 is not connected to the hard disk backplane 120, the backplane standby voltage VBPSTBY of the high level is not present in the state of being turned on, and the second backplane connection state signal CNT2 is at a low level. In summary, the user can know whether the electronic device 100 is connected to the hard disk backplane 120 by the level of the second backplane connection state signal CNT2 in the standby mode.
如第3b圖所示,第3b圖為根據本發明之一實施例所繪示的一種電子裝置工作狀態示意圖,在工作狀態時工作電壓VWORK為高準位,控制第一開關162、第二開關166以及電源控制開關184導通,同時控制第三開關164截止。由於第三開關164截止,因此第二背板連接狀態訊號CNT2不再受第一背板連接狀態訊號CNT1影響。此時,硬碟背板120透過第一開關162提供第一背板連接狀態訊號CNT1給硬碟管理晶片130,且硬碟管理晶片130透過第二開關166將錯誤偵測訊號ERDT反應給主機板140。綜上所述,硬碟狀態偵測單元160能在工作狀態時正確完成第三背板連接狀態訊號CNT3以及錯誤偵測訊號ERDT的傳遞,實現背板連接偵測以及錯誤偵測各自的功能。 As shown in FIG. 3b, FIG. 3b is a schematic diagram showing the working state of an electronic device according to an embodiment of the present invention. In the working state, the working voltage VWORK is at a high level, and the first switch 162 and the second switch are controlled. 166 and the power control switch 184 are turned on while controlling the third switch 164 to be turned off. Since the third switch 164 is turned off, the second backplane connection state signal CNT2 is no longer affected by the first backplane connection state signal CNT1. At this time, the hard disk backplane 120 provides the first backplane connection state signal CNT1 to the hard disk management chip 130 through the first switch 162, and the hard disk management chip 130 transmits the error detection signal ERDT to the motherboard through the second switch 166. 140. In summary, the hard disk state detecting unit 160 can correctly complete the transmission of the third backplane connection state signal CNT3 and the error detection signal ERDT in the working state, and realize the functions of the backplane connection detection and the error detection.
在本揭示內容一實施例中,如第2圖所示,第一開關162、第三開關164以及電源控制開關184可用以作為防止電流倒流的用途。 In an embodiment of the present disclosure, as shown in FIG. 2, the first switch 162, the third switch 164, and the power control switch 184 can be used as a source for preventing current from flowing backward.
在本揭示內容一實施例中,如第2圖所示,硬碟狀態偵測單元160可包含一放電電阻R1,放 電電阻R1之一端耦接背板連接端112,另一端接地。其中,在待開機狀態時,背板連接端112的電壓經過放電電阻R1放電至低準位,以避免於待開機狀態時背板連接端112發生電壓不確定的問題。 In an embodiment of the present disclosure, as shown in FIG. 2, the hard disk state detecting unit 160 may include a discharge resistor R1. One end of the electric resistance R1 is coupled to the backplane connection end 112, and the other end is grounded. Wherein, in the state to be turned on, the voltage of the backplane connection terminal 112 is discharged to the low level through the discharge resistor R1, so as to avoid the problem that the voltage of the backplane connection end 112 is uncertain when the state is to be turned on.
綜上所述,本揭示內容所示的電子裝置可藉由工作電壓、背板待命電壓以及硬碟狀態偵測單元的開關電路以改變第二背板連接狀態訊號,使得電子裝置同時在待開機狀態與工作狀態時皆可偵測是否連結硬碟背板,同時在工作狀態時反應電子裝置之硬碟錯誤偵測狀態。如此一來,電子裝置不僅在待開機狀態以及工作狀態下均可正確識別是否連接硬碟背板,同時也不影響電子裝置的硬碟錯誤偵測的功能,藉此達到多功能的識別技術。 In summary, the electronic device shown in the present disclosure can change the connection state of the second backplane by the operating voltage, the back-stand voltage, and the switching circuit of the hard disk state detecting unit, so that the electronic device is simultaneously turned on. Both the state and the working state can detect whether the hard disk backplane is connected, and at the same time, the hard disk error detection state of the electronic device is reflected in the working state. In this way, the electronic device can correctly identify whether the hard disk backplane is connected not only in the standby state and the working state, but also does not affect the function of the hard disk error detection of the electronic device, thereby achieving the multifunctional recognition technology.
儘管本文已參閱附圖詳細描述了本發明之說明性實施例,但應瞭解,本發明並不限於彼等相同的實施例。在不脫離由所附申請專利範圍定義之本發明之範疇及精神的情況下,熟習此項技術者可對本發明進行各種改變及修改。 Although the illustrative embodiments of the present invention have been described in detail with reference to the drawings, it is understood that the invention is not limited to the same embodiments. Various changes and modifications can be made to the invention without departing from the scope and spirit of the invention.
100‧‧‧電子裝置 100‧‧‧Electronic devices
110‧‧‧硬碟管理板 110‧‧‧hard disk management board
112‧‧‧背板連接端 112‧‧‧backplane connection
114‧‧‧錯誤偵測端 114‧‧‧Error detection end
120‧‧‧硬碟背板 120‧‧‧hard disk backplane
122‧‧‧連接偵測端 122‧‧‧Connection detection end
130‧‧‧硬碟管理晶片 130‧‧‧hard disk management chip
140‧‧‧主機板 140‧‧‧ motherboard
142‧‧‧主機板控制端 142‧‧‧ motherboard control terminal
144‧‧‧CPLD 144‧‧‧CPLD
160‧‧‧硬碟狀態偵測單元 160‧‧‧hard disk status detection unit
162、164、166‧‧‧開關 162, 164, 166‧ ‧ switch
R1~R6‧‧‧電阻 R1~R6‧‧‧ resistor
180‧‧‧待開機電源 180‧‧‧ Waiting for power on
182‧‧‧背板工作電壓 182‧‧‧ Backplane working voltage
184‧‧‧電源控制開關 184‧‧‧Power control switch
186‧‧‧工作電源 186‧‧‧Working power supply
CNT1~CNT3、ERDT‧‧‧訊號 CNT1~CNT3, ERDT‧‧‧ signals
Claims (10)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW104121921A TWI530801B (en) | 2015-07-06 | 2015-07-06 | Electronic device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW104121921A TWI530801B (en) | 2015-07-06 | 2015-07-06 | Electronic device |
Publications (2)
Publication Number | Publication Date |
---|---|
TWI530801B true TWI530801B (en) | 2016-04-21 |
TW201702904A TW201702904A (en) | 2017-01-16 |
Family
ID=56361515
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW104121921A TWI530801B (en) | 2015-07-06 | 2015-07-06 | Electronic device |
Country Status (1)
Country | Link |
---|---|
TW (1) | TWI530801B (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109933475A (en) * | 2019-03-19 | 2019-06-25 | 浪潮商用机器有限公司 | A kind of hard disk hot-plug processing system, method and device |
-
2015
- 2015-07-06 TW TW104121921A patent/TWI530801B/en not_active IP Right Cessation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109933475A (en) * | 2019-03-19 | 2019-06-25 | 浪潮商用机器有限公司 | A kind of hard disk hot-plug processing system, method and device |
Also Published As
Publication number | Publication date |
---|---|
TW201702904A (en) | 2017-01-16 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN107925261B (en) | USB power delivery depleted battery control | |
TWI571734B (en) | Power management circuit and method thereof and computer system | |
JP5565700B2 (en) | Power saving control system | |
US7683686B2 (en) | Power-on circuit for computer | |
TW201405300A (en) | Circuit for controlling computers | |
TW201312343A (en) | Detecting circuit of fan | |
US7493507B2 (en) | System for protecting a motherboard while a component is not connected properly to its power source | |
TWI479084B (en) | Control circuit for fan | |
TWI530801B (en) | Electronic device | |
TWI444817B (en) | Computer device | |
TWI595721B (en) | Power supply system | |
TW201344409A (en) | Electronic device | |
TW201328096A (en) | Power protection circuit | |
CN104881340B (en) | Electronic device | |
TW201327125A (en) | Power supply system for memory | |
TW201324132A (en) | Circuit for clearing password of CMOS | |
TWI401854B (en) | A protection circuit | |
TWI590022B (en) | Circuit for transforming voltage | |
TWI544218B (en) | Over current detection system and detection circuit | |
TW201515358A (en) | USB device with power supply mode switching function | |
CN110688260B (en) | EC reset circuit and electronic equipment based on earphone interface | |
TWI798721B (en) | Boot control circuit of computer system | |
TWI513188B (en) | Power supply circuit for pci-e slot | |
TWI638261B (en) | Electronic device with power saving function | |
TW201401040A (en) | Energy-saving circuit for motherboard |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |