TWI510673B - 2-layer flexible substrate and manufacturing method thereof - Google Patents

2-layer flexible substrate and manufacturing method thereof Download PDF

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TWI510673B
TWI510673B TW100108894A TW100108894A TWI510673B TW I510673 B TWI510673 B TW I510673B TW 100108894 A TW100108894 A TW 100108894A TW 100108894 A TW100108894 A TW 100108894A TW I510673 B TWI510673 B TW I510673B
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layer
film
flexible substrate
copper
metal layer
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TW100108894A
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Chinese (zh)
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TW201139730A (en
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Eiichiro Nisimura
Yoshiyuki Asakawa
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Sumitomo Metal Mining Co
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/38Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/381Improvement of the adhesion between the insulating substrate and the metal by special treatment of the substrate
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/38Improvement of the adhesion between the insulating substrate and the metal
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/14Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using spraying techniques to apply the conductive material, e.g. vapour evaporation
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0393Flexible materials
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/022Processes for manufacturing precursors of printed circuits, i.e. copper-clad substrates

Description

2層可撓性基板及其製造方法Two-layer flexible substrate and method of manufacturing same

本發明係關於2層可撓性基板及其製造方法,更具體而言,係關於當在絕緣體薄膜上依乾式鍍敷法形成底層金屬層(以下有時亦稱「種子層」),接著再形成銅層時,針孔與凹缺陷較少的2層可撓性基板及其製造方法。The present invention relates to a two-layer flexible substrate and a method of manufacturing the same, and more particularly to forming an underlying metal layer (hereinafter sometimes referred to as a "seed layer") by dry plating on an insulator film, and then A two-layer flexible substrate having less pinholes and concave defects when forming a copper layer, and a method of manufacturing the same.

現今對LCD、行動電話、數位相機及各種電氣機器等係要求薄型、小型、輕量化,在其上所搭載的電子零件有朝小型化的動向,且供形成電子電路用的基板有:堅硬板狀的「剛性印刷配線板」、以及薄膜狀且具柔軟性並可自由彎曲的「可撓性印刷配線板(以下有時亦稱「FPC」)」。Today, LCDs, mobile phones, digital cameras, and various types of electrical equipment are required to be thin, small, and lightweight. The electronic components mounted thereon are miniaturized, and the substrates for forming electronic circuits are: rigid boards. A "rigid printed wiring board" and a flexible printed wiring board (hereinafter sometimes referred to as "FPC") which is flexible and flexible.

特別係FPC應用其柔軟性,可使用於諸如:LCD驅動器用配線板、HDD(硬碟驅動器)、DVD(數位化多功能光碟)模組、行動電話的鉸鏈部等之類要求曲折性的地方,因而其需求將會日益增加。In particular, FPC is used for flexibility, such as: LCD driver wiring board, HDD (hard disk drive), DVD (digital versatile CD) module, hinge part of mobile phone, etc. Therefore, its demand will increase.

當作該FPC材料使用者係在聚醯亞胺、聚酯等絕緣薄膜上,黏貼著銅箔(導體層)的貼銅積層板(以下有時亦稱「CCL」)。As a user of the FPC material, a copper-clad laminate (hereinafter sometimes referred to as "CCL") in which a copper foil (conductor layer) is adhered to an insulating film such as polyimide or polyester is used.

該CCL大致分類有2種。其一係絕緣薄膜與銅箔(導體層)利用接著劑進行黏貼的CCL(通常稱「3層CCL」,以下稱「3層CCL」),另一係絕緣薄膜與銅箔(導體層)在未使用接著劑的情況下,利用澆鑄法、層壓法、金屬化法等直接進行複合的CCL(通常稱「2層CCL」,以下稱「2層CCL」)。There are two types of CCL roughly classified. The CCL (usually referred to as "3 layers of CCL", hereinafter referred to as "3 layers of CCL") in which the insulating film and the copper foil (conductor layer) are adhered by an adhesive, and the other insulating film and copper foil (conductor layer) are When the adhesive is not used, CCL (commonly referred to as "two-layer CCL", hereinafter referred to as "two-layer CCL") is directly compounded by a casting method, a lamination method, a metallization method, or the like.

若將該「3層CCL」與「2層CCL」進行比較,就製造成本而言,因為3層CCL在絕緣薄膜、接著劑等的材料費、處置性等製造上較為容易,因而價格較為低廉。另一方面,就耐熱性、薄膜化、尺寸安定性等特性而言,則係2層CCL較為優異,受電路的精細圖案化、高密度安裝化之影響,雖屬高單價,但可薄型化的2層CCL需求卻逐漸擴大。When the "three-layer CCL" is compared with the "two-layer CCL", the three-layer CCL is relatively easy to manufacture, such as an insulating film, an adhesive, and the like, in terms of manufacturing cost, and thus the price is relatively low. . On the other hand, in terms of heat resistance, thin film formation, dimensional stability, and the like, the two-layer CCL is excellent, and it is affected by fine patterning of the circuit and high-density mounting, and although it is high in unit price, it can be made thinner. The demand for the two-tier CCL has gradually expanded.

再者,在FPC上安裝IC的方法係以在CCL上形成配線圖案後,再利用會穿透過絕緣體薄膜的光檢測IC位置的COF安裝為主流,而要求素材自體的薄度與絕緣材料的透明性。就此點而言亦是2層CCL較為有利。Furthermore, the method of mounting an IC on an FPC is to form a wiring pattern on the CCL, and then use a COF that penetrates the position of the photodetecting IC of the insulating film to be mainstream, and requires the thinness of the material and the insulating material. Transparency. In this regard, it is also advantageous for the 2-layer CCL.

具有此種特徵的2層CCL之製造方法,大致可歸類為3種。第1種係在電解銅箔或軋延銅箔上利用澆鑄法黏貼絕緣薄膜之方法。第2種係在絕緣薄膜上利用層壓法黏貼電解銅箔或軋延銅箔的方法。第三種係在絕緣薄膜上利用乾式鍍敷法(此處所謂「乾式鍍敷法」係指濺鍍法、離子鍍覆法、團簇離子束(cluster ion beam)法、真空蒸鍍法、CVD法等),在絕緣薄膜上設置薄膜的底層金屬層,再於其上面施行電氣鍍銅而形成銅層的方法。通常將第三種方法稱為「金屬化法」。The manufacturing method of the two-layer CCL having such a feature can be roughly classified into three types. The first type is a method of adhering an insulating film to a copper foil or a rolled copper foil by a casting method. The second method is a method in which an electrolytic copper foil or a rolled copper foil is adhered to an insulating film by a lamination method. The third type is a dry plating method on the insulating film (herein, "dry plating method" means sputtering, ion plating, cluster ion beam method, vacuum evaporation method, In the CVD method or the like, a method is provided in which an underlying metal layer of a thin film is provided on an insulating film, and then copper plating is performed thereon to form a copper layer. The third method is usually called the "metallization method".

因為該金屬化法係藉由使用乾式鍍敷法及濕式鍍敷法(例如電鍍),而可自由控制其金屬層厚度,因而就金屬層的薄膜化而言,相較於澆鑄法或層壓法係較為容易。又,因為聚醯亞胺與金屬層界面的平滑性較高,因而一般認為適用於精細圖案。Since the metallization method can freely control the thickness of the metal layer by using a dry plating method and a wet plating method (for example, electroplating), the thinning of the metal layer is compared to the casting method or layer. The pressure method is easier. Further, since the interface between the polyimide and the metal layer has high smoothness, it is generally considered to be suitable for a fine pattern.

但是,利用金屬化法所獲得的CCL,因為金屬-絕緣薄膜界面較為平滑,因而金屬與絕緣薄膜間的接著並無法期待一般所利用的錨定效果,而會有界面的密接強度無法充分顯現之問題。However, since the CCL obtained by the metallization method has a smooth interface between the metal and the insulating film, the anchoring effect generally used cannot be expected, and the bonding strength of the interface cannot be sufficiently exhibited. problem.

即,使用該金屬化法所形成的2層CCL,若施行在121℃、95%RH、2大氣壓的高溫、高濕、高壓下長時間放置之「PCT試驗(Pressure Cooker Test,高壓水氣測試)」,相較於初期密接強度之下,會出現密接強度大幅降低的傾向。因而,若考慮在圖案形成步驟的液體光阻塗佈後之乾燥時,會被施加100~150℃左右的熱,且當在所形成圖案上安裝IC等之際的接合與焊接時亦會施加250℃左右的熱,以及將已圖案形成的配線利用阻焊劑等密封樹脂進行密封等事項,習知依金屬化法所製造的2層CCL並不適用於高溫下的精細圖案形成、COF安裝,導致耐熱性、耐濕性的提升成為必要不可或缺的課題。That is, the two-layer CCL formed by the metallization method is subjected to a "PCT Test (Pressure Cooker Test) at a high temperature, high humidity, and high pressure of 121 ° C, 95% RH, and 2 atmospheres for a long time. )), the adhesion strength tends to decrease significantly compared to the initial adhesion strength. Therefore, when drying after the liquid photoresist coating in the pattern forming step is considered, heat of about 100 to 150 ° C is applied, and when bonding or soldering is performed when an IC or the like is mounted on the formed pattern, it is also applied. The heat of about 250 ° C and the wiring formed by patterning are sealed by a sealing resin such as a solder resist, and the conventional two-layer CCL manufactured by the metallization method is not suitable for fine pattern formation and COF mounting at a high temperature. The improvement of heat resistance and moisture resistance is an indispensable issue.

針對此種課題的解決方法係例如專利文獻1提案有:形成以Ni、Cr為主成分的金屬合金層作為絕緣薄膜與銅層的中間層(種子層)之方法,但當形成更精細圖案時,便必須更加提高其耐濕性。In order to solve such a problem, for example, Patent Document 1 proposes a method of forming a metal alloy layer containing Ni and Cr as a main component as an intermediate layer (seed layer) of an insulating film and a copper layer, but when a finer pattern is formed It is necessary to improve its moisture resistance.

再者,專利文獻2記載有下列方法:在塑膠膜基板至少單面上直接設有由銅或以銅為主成分之合金所構成銅薄膜的可撓性印刷電路基板,其中,該銅薄膜係具有:具結晶構造的表面層、以及在該表面層與塑膠膜基板之間設有複晶構造之底面層的2層構造,且銅薄膜的X射線解析圖案中,晶格面指數(200)的波峰強度除以晶格面指數(111)的波峰強度之值X射線相對強度比(200)/(111)係0.1以下,且底面層係利用使用含氮之混合氣體的電漿處理而在塑膠膜基板上生成官能基,而形成由銅或以銅為主成分之合金所構成的金屬,藉由該金屬與構成塑膠膜基板的原子進行化學鍵結並構成,而提升耐濕性。然而,該發明係依靠晶格面的控制、與由電漿處理產生的複合效果而達成,但控制該晶格面在技術上較為困難,難以安定地進行大量生產。Further, Patent Document 2 discloses a flexible printed circuit board in which a copper thin film made of copper or an alloy containing copper as a main component is directly provided on at least one surface of a plastic film substrate, wherein the copper thin film is provided. The surface layer having a crystal structure and a two-layer structure in which a bottom layer of a polycrystalline structure is provided between the surface layer and the plastic film substrate, and a lattice surface index (200) in an X-ray analysis pattern of the copper thin film The peak intensity is divided by the peak intensity of the lattice plane index (111). The X-ray relative intensity ratio (200) / (111) is 0.1 or less, and the bottom layer is treated with a plasma using a nitrogen-containing mixed gas. A functional group is formed on the plastic film substrate to form a metal composed of copper or an alloy containing copper as a main component, and the metal is chemically bonded to atoms constituting the plastic film substrate to improve moisture resistance. However, this invention is achieved by the control of the lattice plane and the composite effect by the plasma treatment, but it is technically difficult to control the lattice surface, and it is difficult to carry out mass production stably.

且,為在絕緣體薄膜上形成薄膜的底層金屬層,一般係使用真空蒸鍍法、濺鍍法、離子鍍覆法等,但因為依照此種乾式鍍敷法所獲得的被膜層通常會產生多數個數十μm~數百μm大小的針孔,因而底層金屬層往往會出現因該針孔所造成的絕緣體薄膜露出部分。Further, in order to form a thin film on the insulating film, a vacuum deposition method, a sputtering method, an ion plating method, or the like is generally used, but a film layer obtained by such a dry plating method usually has a majority. Pinholes of several tens of μm to several hundred μm, so that the underlying metal layer tends to have an exposed portion of the insulator film due to the pinhole.

習知,此種可撓性配線板中,配線所需要的銅導電性被膜厚度係超過35μm且至50μm為止較為恰當,但因為所形成配線的寬度亦有數百μm左右,所以很少會因數十μm針孔的存在而導致配線部產生缺陷。Conventionally, in such a flexible wiring board, it is preferable that the thickness of the copper conductive film required for wiring is more than 35 μm to 50 μm. However, since the width of the formed wiring is also about several hundred μm, it is rarely caused. The presence of tens of μm pinholes causes defects in the wiring portion.

然而,當欲獲得本發明目標之具有窄寬度與窄間距配線部的可撓性配線板時,如前述,較佳為供配線部形成用的銅被膜厚度係15μm以下、較佳係8μm以下、理想係5μm左右的極薄厚度,導致配線部產生缺陷的可能性提高。However, when it is desired to obtain the flexible wiring board having the narrow-width and narrow-pitch wiring portions which are the object of the present invention, as described above, it is preferable that the thickness of the copper film for forming the wiring portion is 15 μm or less, preferably 8 μm or less. It is desirable to have an extremely thin thickness of about 5 μm, which increases the possibility of occurrence of defects in the wiring portion.

若針對此種狀況,以使用在形成有底層金屬層的絕緣體薄膜上形成所需厚度銅被膜層的2層可撓性基板,利用移除法(subtractive method)進行可撓性配線板製造的情況為例進行說明,則配線部圖案的形成係依照下述步驟實施。In this case, the flexible wiring board is manufactured by a subtractive method using a two-layer flexible substrate in which a copper film layer having a desired thickness is formed on an insulating film on which an underlying metal layer is formed. As an example, the formation of the wiring portion pattern is carried out in accordance with the following procedure.

(1)在銅導體層上設置具有僅遮蔽配線部但露出非配線部之銅導體層之所需配線部圖案的光阻層。(1) A photoresist layer having a desired wiring portion pattern of a copper conductor layer that shields only the wiring portion but exposes the non-wiring portion is provided on the copper conductor layer.

(2)對露出的銅導體層施行化學蝕刻處理而予以除去。(2) The exposed copper conductor layer is subjected to a chemical etching treatment to be removed.

(3)最後將光阻層予以剝離除去。(3) Finally, the photoresist layer is peeled off.

所以,當使用形成有例如5μm極薄銅被膜層厚度的基板,製造例如配線寬15μm、配線間距30μm的窄配線寬、窄配線間距配線板時,在因乾式鍍敷處理而於基板的底層金屬層上所產生的針孔中,較粗大者的大小將達數十μm至數百μm等級,因而當形成5μm左右厚度的電鍍銅被膜時,因針孔所造成的絕緣體薄膜露出部分幾乎無法被埋藏,所以該露出部分(即導體層的缺損部分)會牽涉到配線部,導致配線部在針孔位置出現缺損而成為配線缺陷,即非如此亦會成為導致配線部密接不良的原因。Therefore, when a substrate having a thickness of, for example, a very thin copper film layer of 5 μm is used, for example, a narrow wiring width and a narrow wiring pitch wiring board having a wiring width of 15 μm and a wiring pitch of 30 μm are produced, and the underlying metal on the substrate is subjected to dry plating treatment. Among the pinholes produced on the layer, the size of the thicker ones will be on the order of several tens of μm to several hundreds of μm. Therefore, when an electroplated copper film having a thickness of about 5 μm is formed, the exposed portion of the insulator film due to the pinholes can hardly be Since the exposed portion (that is, the defective portion of the conductor layer) is involved in the wiring portion, the wiring portion is defective at the pinhole position and becomes a wiring defect, which may cause the wiring portion to be poorly connected.

因此,專利文獻3揭示有:規定金屬聚醯亞胺薄膜積層體之針孔數的技術。但是,專利文獻3並非揭示蒸鍍膜的針孔,而是規定電鍍銅後的針孔,關於蒸鍍膜與底層金屬層的針孔並無任何揭露。Therefore, Patent Document 3 discloses a technique for specifying the number of pinholes of a metal polyimide film laminate. However, Patent Document 3 does not disclose a pinhole of a vapor deposition film, but defines a pinhole after copper plating, and does not disclose any pinholes between the vapor deposition film and the underlying metal layer.

再者,作為解決上述問題的方法,專利文獻4係記載有:在絕緣體薄膜上利用乾式鍍敷法形成底層金屬層,然後再施予利用無電解鍍敷的銅被覆層作為中間金屬層,俾將因針孔所造成的絕緣體薄膜露出部分予以被覆之方法。Further, as a method for solving the above problem, Patent Document 4 discloses that a base metal layer is formed on a thin film by a dry plating method, and then a copper coating layer by electroless plating is applied as an intermediate metal layer. A method of coating an exposed portion of an insulator film due to a pinhole.

但是,該方法雖確實可某程度地消除因針孔所造成的絕緣體薄膜露出部分,但另一方面,已得知無電解鍍銅處理時所使用的鍍敷液與其前處理液等,會從已形成的大小各式各樣之針孔部分滲透入絕緣體薄膜與底層金屬層之間,此現象有可能會成為對底層金屬層的密接性、以及爾後利用所形成電鍍銅達成的導體層密接性構成阻礙之原因,並非為充分的解決策略。又,即便利用電鍍銅可埋藏絕緣體薄膜露出部分,但因為絕緣薄膜與銅層間之密接力低,因而若底層金屬層有針孔,便會成為導致密接不良與絕緣可靠性降低的原因。However, although this method can surely eliminate the exposed portion of the insulator film due to the pinhole, on the other hand, it has been known that the plating solution and the pretreatment liquid used in the electroless copper plating process are The various pinhole portions of the formed size penetrate between the insulator film and the underlying metal layer, which may become the adhesion to the underlying metal layer and the adhesion of the conductor layer by the formed copper plating. The reasons for the obstacles are not sufficient solutions. Further, even if the exposed portion of the insulating film is buried by the electroplated copper, the adhesion between the insulating film and the copper layer is low. Therefore, if the underlying metal layer has pinholes, the adhesion failure and the insulation reliability are lowered.

[先行技術文獻][Advanced technical literature] [專利文獻][Patent Literature]

專利文獻1:日本專利特開2006-13152號公報Patent Document 1: Japanese Patent Laid-Open No. 2006-13152

專利文獻2:日本專利第3563730號Patent Document 2: Japanese Patent No. 3563730

專利文獻3:日本專利特開平11-92917號公報Patent Document 3: Japanese Patent Laid-Open No. Hei 11-92917

專利文獻4:日本專利特開平10-195668號Patent Document 4: Japanese Patent Laid-Open No. 10-195668

本發明之目的係解決使用乾式鍍敷法的2層可撓性基板製造時之上述問題,並提供:不會有因在絕緣體薄膜上利用乾式鍍敷處理形成底層金屬層時所產生的針孔而造成之銅箔膜層與銅層缺損,底層金屬層的缺損較少,且絕緣體薄膜與底層金屬層間之密接性、耐蝕性、耐水性均優異之2層可撓性基板,特別係適用於精細圖案形成、COF安裝的2層可撓性基板,及其製造方法。SUMMARY OF THE INVENTION The object of the present invention is to solve the above problems in the manufacture of a two-layer flexible substrate using a dry plating method, and to provide that there is no pinhole generated when an underlying metal layer is formed by dry plating on an insulator film. The two-layer flexible substrate which is excellent in adhesion, corrosion resistance and water resistance between the insulator film and the underlying metal layer is less likely to cause defects in the copper foil film layer and the copper layer, and the underlying metal layer is less likely to be damaged. A two-layer flexible substrate with fine pattern formation, COF mounting, and a method of manufacturing the same.

本發明者等發現藉由使用在絕緣體薄膜至少單面上,於未經由接著劑的情況下,利用乾式鍍敷法形成底層金屬層,而在該底層金屬層上形成所需層厚之銅薄膜層及/或銅層的2層可撓性基板,其中,該絕緣體薄膜係經施行表面處理,且寡聚物量係表面處理前的寡聚物量之70%以下的2層可撓性基板,便可獲得不會有因形成底層金屬層時所產生的針孔而造成的銅薄膜層及銅層缺損,且底層金屬層的缺損亦較少,且絕緣體薄膜與底層金屬層間之密接性、耐蝕性、及耐水性均優異的2層可撓性基板,亦可適用於具有窄寬度、窄間距配線部的可撓性配線板,遂完成本發明。The present inventors have found that a copper thin film having a desired layer thickness is formed on the underlying metal layer by using at least one surface of the insulating film, without using an adhesive, by using a dry plating method to form an underlying metal layer. a two-layer flexible substrate of a layer and/or a copper layer, wherein the insulator film is subjected to a surface treatment, and the amount of the oligomer is a two-layer flexible substrate having 70% or less of the amount of the oligomer before the surface treatment, The copper film layer and the copper layer are not damaged due to pinholes generated when the underlying metal layer is formed, and the underlying metal layer is less defective, and the adhesion between the insulator film and the underlying metal layer and corrosion resistance are obtained. Further, the two-layer flexible substrate excellent in water resistance and the flexible wiring board having narrow-width and narrow-pitch wiring portions can be applied to the present invention.

本發明第1發明係2層可撓性基板,係在絕緣體薄膜至少單面上,於未經由接著劑的情況下,利用乾式鍍敷法形成底層金屬層,並在該底層金屬層上利用乾式鍍敷法形成銅薄膜層者,其中,絕緣體薄膜係對至少其中一面施行表面處理,且僅對絕緣體薄膜其中一面施行該表面處理後的寡聚物量,係表面處理前的寡聚物量之70%以下。According to a first aspect of the present invention, a two-layer flexible substrate is formed on at least one surface of an insulating film, and when an adhesive is not passed, a bottom metal layer is formed by dry plating, and a dry type is used on the underlying metal layer. A method of forming a copper film layer by a plating method, wherein the insulator film is subjected to a surface treatment on at least one of the surfaces, and the amount of the oligomer after the surface treatment is applied to only one of the insulating film is 70% of the amount of the oligomer before the surface treatment. the following.

本發明第2發明係第1發明的銅薄膜層具有50nm~500nm厚度,且皆無直徑超過30μm的針孔,且直徑5μm以上、30μm以下的針孔係每1平方公尺45000個以下。In the second invention of the present invention, the copper thin film layer has a thickness of 50 nm to 500 nm, and has no pinholes having a diameter exceeding 30 μm, and a pinhole having a diameter of 5 μm or more and 30 μm or less is 45,000 or less per square meter.

本發明第3發明係第1及第2發明的2層可撓性基板,其中,在銅薄膜層上利用濕式鍍敷法形成銅濕式鍍敷層。According to a third aspect of the invention, the two-layer flexible substrate according to the first or second aspect of the invention, wherein the copper wet plating layer is formed on the copper thin film layer by wet plating.

本發明第4發明係第3發明的銅濕式鍍敷層具有0.5μm~12μm厚度,且皆無直徑或最大缺陷長超過20μm的凹缺陷,且直徑或最大缺陷長10μm以上、20μm以下的凹缺陷係每1平方公尺2200個以下。According to a fourth aspect of the present invention, the copper wet plating layer of the third invention has a thickness of 0.5 μm to 12 μm, and has no concave defects having a diameter or a maximum defect length of more than 20 μm, and a concave defect having a diameter or a maximum defect length of 10 μm or more and 20 μm or less. It is 2,200 or less per 1 square meter.

本發明第5發明係第1至第4發明的2層可撓性基板,其中,底層金屬層係具有5nm~50nm層厚,且由含有以鉻為主的添加元素6重量%~22重量%而其餘則為鎳所構成的鎳-鉻系合金所形成,且在底層金屬層上所設置之由銅薄膜層與銅濕式鍍敷層所構成的導體層(銅層)之層厚係50nm~12μm。According to a fifth aspect of the present invention, in the second aspect of the invention, the second layer flexible substrate has a layer thickness of 5 nm to 50 nm and contains 6% by weight to 22% by weight of an additive element mainly composed of chromium. The rest is formed of a nickel-chromium alloy composed of nickel, and the thickness of the conductor layer (copper layer) composed of the copper thin film layer and the copper wet plating layer provided on the underlying metal layer is 50 nm. ~12μm.

本發明第6發明係第1至第5發明的絕緣體薄膜為從聚醯亞胺系薄膜、聚醯胺系薄膜、聚酯系薄膜、聚四氟乙烯系薄膜、聚苯硫醚系薄膜、聚萘二甲酸乙二酯系薄膜、液晶聚合物系薄膜中選擇的樹脂薄膜。According to a sixth aspect of the invention, the insulator film of the first to fifth inventions is a polyimide film, a polyamide film, a polyester film, a polytetrafluoroethylene film, a polyphenylene sulfide film, or a poly A resin film selected from the group consisting of an ethylene naphthalate film and a liquid crystal polymer film.

本發明第7發明係第1至第6發明的表面處理係在壓力0.8Pa~4.0Pa的惰性環境下,對絕緣體薄膜的表面,施行利用1500V~3000V直流電壓之電漿放電處理。According to a seventh aspect of the present invention, in the surface treatment according to the first to sixth aspects of the invention, the surface of the insulator film is subjected to a plasma discharge treatment using a DC voltage of 1500 V to 3000 V in an inert atmosphere at a pressure of 0.8 Pa to 4.0 Pa.

本發明第8發明係第7發明的表面處理之惰性環境係氮環境,且表面處理後的PCT剝離強度係初期剝離強度的70%以上。According to an eighth aspect of the present invention, in the inert environment of the surface treatment according to the seventh aspect of the invention, the PCT peel strength after the surface treatment is 70% or more of the initial peel strength.

本發明第9發明係第1至第6發明的表面處理係在壓力0.8Pa~4.0Pa的惰性環境下,對絕緣體薄膜的表面施行利用800V~2000V高頻電壓之電漿放電處理。According to a ninth aspect of the present invention, in the surface treatment according to the first to sixth aspects of the invention, the surface of the insulator film is subjected to a plasma discharge treatment using a high-frequency voltage of 800 V to 2000 V in an inert atmosphere at a pressure of 0.8 Pa to 4.0 Pa.

本發明第10發明係第9發明的表面處理之惰性環境為氮環境,且表面處理後的PCT剝離強度係初期剝離強度的70%以上。According to a tenth aspect of the present invention, the surface treatment inert environment of the ninth invention is a nitrogen atmosphere, and the PCT peel strength after the surface treatment is 70% or more of the initial peel strength.

本發明第11發明係在絕緣體薄膜至少單面上,於未經由接著劑的情況下,利用乾式鍍敷法形成底層金屬層,並在上述底層金屬層上利用乾式鍍敷法形成銅薄膜層的2層可撓性基板之製造方法,其中,對該絕緣體薄膜的表面在壓力0.8Pa~4.0Pa的惰性環境下,施行利用對電漿電極的配對放電電極間施加2~100秒鐘的電漿放電之表面處理後,形成底層金屬層。According to an eleventh aspect of the present invention, in the at least one surface of the insulating film, the underlying metal layer is formed by dry plating without passing through the adhesive, and the copper thin film layer is formed by dry plating on the underlying metal layer. A method for producing a two-layer flexible substrate, wherein a plasma of 2 to 100 seconds is applied between the paired discharge electrodes of the plasma electrode under an inert atmosphere of a pressure of 0.8 Pa to 4.0 Pa on the surface of the insulator film After the surface treatment of the discharge, an underlying metal layer is formed.

本發明第12發明為第11發明的利用電漿放電之表面處理,係對電漿電極的放電電極間施加1500V~3000V直流電壓。According to a twelfth aspect of the present invention, in the surface treatment by the plasma discharge of the eleventh aspect of the invention, a direct current voltage of 1500 V to 3000 V is applied between the discharge electrodes of the plasma electrode.

本發明第13發明為第11發明的利用電漿放電之表面處理,係對電漿電極的放電電極間施加800V~2000V高頻電壓。According to a thirteenth aspect of the invention, in the surface treatment by the plasma discharge of the eleventh aspect of the invention, the high-frequency voltage of 800 V to 2000 V is applied between the discharge electrodes of the plasma electrode.

本發明第14發明係在絕緣體薄膜至少單面上,於未經由接著劑的情況下,利用乾式鍍敷法形成底層金屬層,並在該底層金屬層上利用乾式鍍敷法形成銅薄膜層的第8發明之2層可撓性基板之製造方法,其中,對絕緣體薄膜的表面在壓力0.8Pa~4.0Pa的氮環境下,施行利用對電漿電極的配對放電電極間施加1500V~3000V直流電壓2~100秒鐘而產生的電漿之表面處理後,形成底層金屬層。According to a fourteenth aspect of the present invention, in the at least one surface of the insulating film, the underlying metal layer is formed by dry plating without passing through the adhesive, and the copper thin film layer is formed by dry plating on the underlying metal layer. A method of producing a two-layer flexible substrate according to the eighth aspect of the present invention, wherein a surface voltage of a plating film of 0.8 Pa to 4.0 Pa is applied to apply a DC voltage of 1500 V to 3000 V between the paired discharge electrodes of the plasma electrode. After the surface treatment of the plasma generated in 2 to 100 seconds, an underlying metal layer is formed.

本發明第15發明係在絕緣體薄膜至少單面上,於未經由接著劑的情況下,利用乾式鍍敷法形成底層金屬層,並在該底層金屬層上利用乾式鍍敷法形成銅薄膜層的第10發明之2層可撓性基板之製造方法,其中,對絕緣體薄膜的表面在壓力0.8Pa~4.0Pa的氮環境下,施行利用對電漿電極的配對放電電極間施加800V~2000V高頻電壓2~100秒鐘而產生的電漿之表面處理後,形成底層金屬層。According to a fifteenth aspect of the present invention, in the at least one surface of the insulating film, the underlying metal layer is formed by dry plating without passing through the adhesive, and the copper thin film layer is formed by dry plating on the underlying metal layer. According to a tenth aspect of the invention, in the method of producing a two-layer flexible substrate, the surface of the insulating film is applied with a high frequency of 800 V to 2000 V between the paired discharge electrodes of the plasma electrode under a nitrogen atmosphere of a pressure of 0.8 Pa to 4.0 Pa. After the surface treatment of the plasma generated by the voltage for 2 to 100 seconds, an underlying metal layer is formed.

本發明第16發明為第11至第15發明的乾式鍍敷法係真空蒸鍍法、濺鍍法、及離子鍍覆法中之任一者。According to a sixteenth aspect of the invention, the dry plating method of the eleventh to fifteenth invention is a vacuum vapor deposition method, a sputtering method, and an ion plating method.

本發明第17發明為第11至第16發明的絕緣體薄膜為從聚醯亞胺系薄膜、聚醯胺系薄膜、聚酯系薄膜、聚四氟乙烯系薄膜、聚苯硫醚系薄膜、聚萘二甲酸乙二酯系薄膜、液晶聚合物系薄膜中選擇的樹脂薄膜。According to a seventeenth aspect of the invention, the insulator film of the eleventh to sixteenth aspects of the invention is a polyimide film, a polyamide film, a polyester film, a polytetrafluoroethylene film, a polyphenylene sulfide film, or a polysiloxane film. A resin film selected from the group consisting of an ethylene naphthalate film and a liquid crystal polymer film.

根據本發明,可獲得不會有因形成底層金屬層時所產生的針孔造成的銅薄膜層及銅濕式鍍敷層缺損,底層金屬層的缺損亦較少,且絕緣體薄膜與底層金屬層間之密接性與耐蝕性均優異的2層可撓性基板。該2層可撓性基板亦適用於具窄寬度、窄間距配線部的可撓性配線板,因而發揮工業上顯著的效果。According to the present invention, the copper film layer and the copper wet plating layer are not damaged due to the pinholes generated when the underlying metal layer is formed, and the underlying metal layer is less defective, and between the insulator film and the underlying metal layer. A two-layer flexible substrate excellent in adhesion and corrosion resistance. The two-layer flexible substrate is also suitable for a flexible wiring board having a narrow-width and narrow-pitch wiring portion, and thus exhibits an industrially remarkable effect.

1.2層可撓性基板1.2 layer flexible substrate

本發明的2層可撓性基板係構成在絕緣體薄膜至少單面上,於未經由接著劑的情況下,利用乾式鍍敷法設有底層金屬層,並在該底層金屬層上設有銅薄膜層的構造,其特徵在於:該絕緣體薄膜係藉由施行表面處理,而使其寡聚物量成為在表面處理前之寡聚物量的70%以下寡聚物量,藉由對絕緣體薄膜施行表面處理,而使得相較於表面處理前的寡聚物量,成為70%以下寡聚物量的表面,便可抑制粗大針孔的產生。The two-layer flexible substrate of the present invention is formed on at least one surface of the insulating film, and is provided with a bottom metal layer by dry plating and a copper film on the underlying metal layer without passing through an adhesive. The structure of the layer is characterized in that the insulator film is subjected to a surface treatment such that the amount of the oligomer becomes 70% or less of the amount of the oligomer before the surface treatment, and the surface of the insulator film is subjected to surface treatment. On the other hand, the amount of the oligomer before the surface treatment is 70% or less, and the generation of coarse pinholes can be suppressed.

再者,本發明的2層可撓性基板較佳係具有厚度50nm~500nm的銅薄膜層,且皆無直徑30μm的針孔,且直徑5μm至30μm的針孔係每1平方公尺45000個以下。Furthermore, the two-layer flexible substrate of the present invention preferably has a copper thin film layer having a thickness of 50 nm to 500 nm, and has no pinholes having a diameter of 30 μm, and a pinhole having a diameter of 5 μm to 30 μm is 45,000 or less per square meter. .

1-1. 銅薄膜層1-1. Copper film layer

銅薄膜層的厚度較佳係50nm~500nm。The thickness of the copper thin film layer is preferably from 50 nm to 500 nm.

若該銅箔膜層的厚度未滿50nm,當利用後續屬於濕式鍍敷法之一的電鍍銅法在銅薄膜層表面上施行銅濕式鍍敷層的成膜時,銅薄膜層的電阻值會提高,且會使銅層表面的鍍敷外觀劣化。另外,當利用電鍍銅法進行銅濕式鍍敷層的成膜時,銅薄膜層係作為陰極而發揮機能,而銅薄膜層的電阻值便會構成問題。另一方面,若銅薄膜層的厚度超過500nm並予以成膜,則銅薄膜間的針孔雖有減少,但在利用乾式鍍敷法將銅薄膜層成膜較耗時,經濟性較差。If the thickness of the copper foil film layer is less than 50 nm, when a copper wet plating layer is formed on the surface of the copper film layer by a copper plating method which is one of the wet plating methods, the resistance of the copper film layer is The value is increased and the plating appearance of the copper layer surface is deteriorated. Further, when the copper wet plating layer is formed by the electroplating copper method, the copper thin film layer functions as a cathode, and the resistance value of the copper thin film layer poses a problem. On the other hand, when the thickness of the copper thin film layer exceeds 500 nm and the film formation is performed, the pinholes between the copper thin films are reduced. However, it is time-consuming to form the copper thin film layer by dry plating, and the economy is inferior.

一般而言,銅薄膜層與銅濕式鍍敷層係越厚則所成膜的銅越能成長並埋藏針孔,因而針孔較小,甚至會變少。所以,相較於乾式鍍敷法,利用成膜速度較快速的濕式鍍敷法在銅薄膜層表面上設置銅濕式鍍敷層,而製造2層可撓性基板。該2層可撓性基板係利用濕式鍍敷使其表面的針孔數變微小。但是,即便2層可撓性基板表面的針孔被埋藏,但底層金屬層與銅薄膜層的針孔卻呈未被埋藏狀態。In general, the thicker the copper thin film layer and the copper wet plating layer are, the more copper can be grown and the pinholes are buried, so that the pinholes are small or even small. Therefore, compared with the dry plating method, a copper wet plating layer is provided on the surface of the copper thin film layer by a wet plating method in which the film formation speed is relatively fast, and a two-layer flexible substrate is produced. The two-layer flexible substrate has a small number of pinholes on the surface by wet plating. However, even if the pinholes on the surface of the two-layer flexible substrate are buried, the pinholes of the underlying metal layer and the copper thin film layer are not buried.

所以,若在未抑制底層金屬層與銅薄膜層的針孔大小與數量之情況下,形成窄配線間距的配線部圖案,配線部無底層金屬層的地方便會露出,導致成為配線缺陷,即便非如此亦會成為導致配線部密接不良的原因。Therefore, when the size and number of pinholes of the underlying metal layer and the copper thin film layer are not suppressed, the wiring portion pattern having a narrow wiring pitch is formed, and the wiring portion without the underlying metal layer is easily exposed, resulting in wiring defects, even if This is not the reason why the wiring part is poorly connected.

再者,銅薄膜層的針孔雖利用濕式鍍敷而被埋藏,但若有銅薄膜層的針孔,則底層金屬層在濕式鍍敷前便會露出於大氣中,因而底層金屬層便會變質,導致成為配線缺陷、及配線部密接不良的原因。Further, the pinholes of the copper thin film layer are buried by wet plating, but if there is a pinhole of the copper thin film layer, the underlying metal layer is exposed to the atmosphere before wet plating, and thus the underlying metal layer This deteriorates, causing wiring defects and poor wiring contact.

因而,本發明的銅薄膜層中,即便具有針孔,亦是大小為直徑5μm~30μm的針孔較佳係在每1平方公尺45000個以下範圍內。另外,直徑未滿5μm的針孔因為會導致配線缺陷、密接不良的情況較少,且檢測亦較為困難,因而並未規定數量。Therefore, in the copper thin film layer of the present invention, even if it has a pinhole, it is preferable that the pinhole having a diameter of 5 μm to 30 μm is in a range of 45,000 or less per 1 square meter. In addition, pinholes having a diameter of less than 5 μm are less likely to cause wiring defects and poor adhesion, and detection is also difficult, and thus the number is not specified.

藉由使用上述構造,便可獲得不會有因形成底層金屬層時所產生的針孔而造成的銅被膜部缺損,且底層金屬層的缺損較少,且絕緣體薄膜與底層金屬層間之密接性、耐蝕性、及耐水性均優異的2層可撓性基板。By using the above structure, it is possible to obtain a defect in the copper film portion which is not caused by pinholes generated when the underlying metal layer is formed, and the underlying metal layer has less defects, and the adhesion between the insulator film and the underlying metal layer is obtained. A two-layer flexible substrate excellent in corrosion resistance and water resistance.

1-2. 絕緣體薄膜(基材)之表面處理1-2. Surface treatment of insulator film (substrate)

對基材之絕緣體薄膜的表面處理,係使用電漿處理實施。表面處理係可對絕緣體薄膜的單面實施,但對雙面實施較具效果。The surface treatment of the insulating film of the substrate is carried out using a plasma treatment. The surface treatment can be performed on one side of the insulator film, but it is more effective for double-sided implementation.

處理條件係惰性環境下、0.8Pa~4.0Pa壓力。在壓力未滿0.8Pa的惰性環境下,電漿放電不易呈安定,若在超越壓力4.0Pa的惰性環境下,因為處理會變為過強,因而會有處理時導致絕緣薄膜出現起皺情況,故較不佳。The treatment conditions are in an inert environment at a pressure of 0.8 Pa to 4.0 Pa. In an inert environment with a pressure less than 0.8 Pa, the plasma discharge is not easy to stabilize. If the treatment is too strong under an inert environment of 4.0 Pa, the wrinkling of the insulating film may occur during processing. Therefore, it is not good.

在電漿電極的配對放電電極間施加1500V~3000V直流電壓,而施行直流電漿(DC電漿)處理。若該直流電壓未滿1500V,則利用電漿施行的處理過弱,無法顯現出初期密接強度的上升,若超過3000V,則因為處理會變為過強,因而處理時容易導致絕緣薄膜出現起皺與變形,反將導致使耐熱密接強度與PCT剝離強度降低的結果,因而較不佳。A DC voltage of 1500 V to 3000 V is applied between the paired discharge electrodes of the plasma electrode, and DC plasma (DC plasma) treatment is performed. If the DC voltage is less than 1500 V, the treatment by the plasma is too weak, and the initial adhesion strength does not rise. If it exceeds 3000 V, the treatment becomes too strong, and the insulation film is likely to wrinkle during the treatment. The deformation and the reverse result in a result of lowering the heat-resistant adhesive strength and the PCT peel strength, and thus are less preferable.

在電漿電極的配對放電電極間施加800V~2000V高頻電壓,而施行高頻電漿(RF電漿)處理。若該高頻電壓未滿800V,則利用電漿施行的處理過弱,無法顯現出初期密接強度的上升,若超過2000V,則因為處理會變為過強,因而處理時容易導致絕緣薄膜出現起皺與變形,因而較不佳。A high frequency voltage of 800V to 2000V is applied between the paired discharge electrodes of the plasma electrode, and high frequency plasma (RF plasma) treatment is performed. If the high-frequency voltage is less than 800 V, the treatment by the plasma is too weak, and the initial adhesion strength does not rise. If it exceeds 2000 V, the treatment becomes too strong, so that the insulating film tends to occur during the treatment. Wrinkles and deformations are therefore less preferred.

另外,此處所謂「惰性環境下」係指氮氣、氬等第18族氣體,亦可為氮與氬的混合氣體。特別係若在氮環境下利用電漿施行表面處理,便可使PCT剝離強度成為初期剝離強度的70%以上。Here, the term "in an inert atmosphere" means a Group 18 gas such as nitrogen or argon, and may be a mixed gas of nitrogen and argon. In particular, when the surface treatment is performed by plasma in a nitrogen atmosphere, the PCT peel strength can be made 70% or more of the initial peel strength.

利用電漿放電施行的處理時間較佳係2秒~100秒。若電漿放電的處理時間未滿2秒,則處理過弱,導致對初期密接強度的上升不具貢獻,若超過100秒持續施行處理,則影響會過大,導致絕緣薄膜容易發生起皺與變形,反會導致耐熱密接強度與PCT密接強度降低的結果,因而較不佳。另一方面,從生產性的觀點而言,超過100秒的長處理時間亦較不佳。The processing time by plasma discharge is preferably from 2 seconds to 100 seconds. If the treatment time of the plasma discharge is less than 2 seconds, the treatment is too weak, which does not contribute to the increase of the initial adhesion strength. If the treatment is continued for more than 100 seconds, the influence is excessive, and the insulating film is likely to wrinkle and deform. The result is that the heat-resistant adhesion strength and the PCT adhesion strength are lowered, which is less preferable. On the other hand, from the viewpoint of productivity, a long processing time of more than 100 seconds is also poor.

基材的絕緣體薄膜係寡聚物量越多,則銅薄膜層的針孔越增加。The larger the amount of the insulator thin film-based oligomer of the substrate, the more the pinhole of the copper thin film layer increases.

當對絕緣體薄膜的單面施行表面處理時,經表面處理後的絕緣體薄膜寡聚物量,相較於表面處理前的寡聚物量,較佳係在70%以下。又,當對絕緣體薄膜雙面施行表面處理時,經表面處理後的絕緣體薄膜之寡聚物量,相較於表面處理前的寡聚物量,較佳為35%以下。When the surface of one surface of the insulator film is subjected to surface treatment, the amount of the surface-treated insulator film oligomer is preferably 70% or less compared with the amount of the oligomer before the surface treatment. Further, when the surface of the insulator film is subjected to surface treatment on both sides, the amount of the oligomer of the surface-treated insulator film is preferably 35% or less compared with the amount of the oligomer before the surface treatment.

利用此項表面處理導致寡聚物量減少的理由係寡聚物會因表面處理而被除去的緣故所致。此處,所謂「寡聚物」係分子量300~14000範圍的分子,當製造絕緣體薄膜時,並未充分進行聚合而會殘留於薄膜內的分子。該寡聚物量的判定係依如下述測定寡聚物量而求得。從絕緣體薄膜中使用四氫呋喃等溶劑萃取寡聚物,再將該萃取物使用尺寸排除層析法(SEC法)測定分子量分佈即可。The reason why the amount of oligomers is reduced by the surface treatment is that the oligomer is removed by surface treatment. Here, the "oligomer" is a molecule having a molecular weight of from 300 to 14,000, and when an insulator film is produced, molecules which remain in the film are not sufficiently polymerized. The amount of the oligomer was determined by measuring the amount of the oligomer as follows. The oligomer is extracted from the insulator film using a solvent such as tetrahydrofuran, and the molecular weight distribution can be measured by size exclusion chromatography (SEC method).

1-3. 底層金屬層1-3. Underlying metal layer

底層金屬層的層厚較佳係5nm~50nm。The layer thickness of the underlying metal layer is preferably 5 nm to 50 nm.

若利用乾式鍍敷法所獲得之由主要以鉻為添加元素的鎳-鉻系合金所構成底層金屬層之層厚未滿5nm,即便經由後續的處理步驟,底層金屬層的長期密接性仍會出現問題。且,若底層金屬層的層厚未滿5nm,則在施行配線加工時的蝕刻液會滲入,導致發生配線部浮起等情形,造成配線剝離強度明顯降低等問題發生,因而較不佳。If the thickness of the underlying metal layer formed by the nickel-chromium alloy mainly using chromium as an additive element obtained by the dry plating method is less than 5 nm, the long-term adhesion of the underlying metal layer will be obtained even after the subsequent processing steps. problem appear. In addition, when the thickness of the underlying metal layer is less than 5 nm, the etching liquid may be infiltrated during the wiring process, and the wiring portion may be floated or the like, and the problem that the wiring peeling strength is remarkably lowered may be caused, which is not preferable.

另一方面,若底層金屬層的層厚超過50nm,則當施行配線部的加工時,會導致底層金屬層的除去較為困難,且會有發生毛裂、翹曲等而導致密接強度降低的情況,因而較不佳。又,若層厚係厚於50nm,則因為較難施行蝕刻,因而仍係不佳。On the other hand, when the thickness of the underlying metal layer exceeds 50 nm, it is difficult to remove the underlying metal layer when the wiring portion is processed, and cracking, warpage, or the like may occur, and the adhesion strength may be lowered. Therefore, it is not good. Further, if the layer thickness is thicker than 50 nm, it is still difficult to perform etching because it is difficult to perform etching.

該底層金屬層的成分組成從耐熱性與耐蝕性的觀點而言,鉻比例必須為12重量%~22重量%。即,若鉻比例未滿12重量%,則會造成耐熱性降低,另一方面,若鉻比例超過22重量%,則當施行配線部加工時,底層金屬層的除去較為困難,因而較不佳。且,在該鎳-鉻合金中,於提升耐熱性與耐蝕性之目的下,可配合目的特性適當添加過渡金屬元素。The composition of the underlying metal layer must be from 12% by weight to 22% by weight in terms of heat resistance and corrosion resistance. In other words, when the chromium ratio is less than 12% by weight, the heat resistance is lowered. On the other hand, when the chromium ratio exceeds 22% by weight, the removal of the underlying metal layer is difficult when the wiring portion is processed, which is disadvantageous. . Further, in the nickel-chromium alloy, a transition metal element can be appropriately added in accordance with the purpose of the purpose for the purpose of improving heat resistance and corrosion resistance.

此種底層金屬層的情況,就本發明的2層可撓性基板而言,該底層金屬層的層厚較佳係15nm~50nm。In the case of such an underlying metal layer, in the case of the two-layer flexible substrate of the present invention, the thickness of the underlying metal layer is preferably 15 nm to 50 nm.

再者,底層金屬層較佳係由鉻比例為4重量%~22重量%,且更進一步含有鉬5重量%~40重量%,其餘則為鎳的合金構成。Further, the underlying metal layer is preferably composed of an alloy having a chromium ratio of 4% by weight to 22% by weight, and further containing 5% by weight to 40% by weight of molybdenum, and the balance being nickel.

鉻比例為4重量%~22重量%,係為防止因熱劣化導致耐熱剝離強度明顯降低所必要者,若鉻比例低於4重量%,則即便有鉬添加,仍無法防止耐熱剝離強度因熱劣化而明顯降低,因而較不佳。又,若鉻比例多於22重量%,則蝕刻會趨於困難,因而較不佳。因此,鉻的情況,更佳係4重量%~15重量%、特佳係5重量%~12重量%。The chromium ratio is 4% by weight to 22% by weight, which is necessary to prevent the heat-resistant peeling strength from being significantly lowered due to thermal deterioration. If the chromium ratio is less than 4% by weight, even if molybdenum is added, the heat-resistant peeling strength cannot be prevented due to heat. Degraded and significantly reduced, and thus less preferred. Further, if the chromium ratio is more than 22% by weight, etching tends to be difficult and thus it is not preferable. Therefore, in the case of chromium, it is more preferably 4% by weight to 15% by weight, particularly preferably 5% by weight to 12% by weight.

其次,為求耐蝕性、絕緣可靠性的提升,鉬比例較佳係5重量%~40重量%。若鉬比例少於5重量%,則不會顯現出添加效果,無法呈現耐蝕性、絕緣可靠性的提升,因而較不佳。又,若鉬比例超過40重量%,則會有耐熱剝離強度極端降低的傾向,因而較不佳。Next, in order to improve the corrosion resistance and the insulation reliability, the molybdenum ratio is preferably 5% by weight to 40% by weight. If the proportion of molybdenum is less than 5% by weight, the effect of addition does not appear, and corrosion resistance and insulation reliability are not improved, which is not preferable. Moreover, when the molybdenum ratio exceeds 40% by weight, the heat-resistant peel strength tends to be extremely lowered, which is not preferable.

再者,通常鎳基合金靶材的情況,若鎳比例大於93重量%,則濺鍍靶材本身便會成為強磁性體,當利用磁控濺鍍進行成膜時,會導致成膜速度降低,因而較不佳,而當利用濺鍍形成本發明的底層金屬層時,因為濺鍍的靶材組成係成為鎳量93重量%以下,因而即便使用磁控濺鍍法進行成膜時,仍可獲得良好的成膜速率。另外,在該鎳-鉻-鉬合金中,於提升耐熱性與耐蝕性之目的下,可配合目的特性適當添加過渡金屬元素。Further, in the case of a nickel-based alloy target, if the nickel ratio is more than 93% by weight, the sputtering target itself becomes a ferromagnetic body, and when the film is formed by magnetron sputtering, the film formation speed is lowered. Therefore, it is less preferable, and when the underlying metal layer of the present invention is formed by sputtering, since the target composition of the sputtering is 93% by weight or less of the amount of nickel, even when film formation is performed by magnetron sputtering, A good film formation rate can be obtained. Further, in the nickel-chromium-molybdenum alloy, a transition metal element can be appropriately added in accordance with the purpose of the purpose for the purpose of improving heat resistance and corrosion resistance.

再者,在該底層金屬層中,除鎳-鉻-鉬合金之外,尚可存在有因靶材製作時被取入等而含有的1重量%以下之不可避免的雜質。Further, in the underlying metal layer, in addition to the nickel-chromium-molybdenum alloy, there is a possibility that 1% by weight or less of unavoidable impurities contained in the target material is taken in or the like.

另外,在底層金屬層及銅薄膜層的形成時係使用乾式鍍敷法,而在乾式鍍敷法中,較佳係使用真空蒸鍍法、濺鍍法、或離子鍍覆法中之任一者。Further, in the formation of the underlying metal layer and the copper thin film layer, dry plating is used, and in the dry plating method, vacuum evaporation, sputtering, or ion plating is preferably used. By.

1-4. 絕緣體薄膜(基材)1-4. Insulator film (substrate)

再者,本發明的2層可撓性基板中,基材的絕緣體薄膜較佳係使用從聚醯亞胺系薄膜、聚醯胺系薄膜、聚酯系薄膜、聚四氟乙烯系薄膜、聚苯硫醚系薄膜、聚萘二甲酸乙二酯系薄膜、液晶聚合物系薄膜中選擇的樹脂薄膜。Further, in the two-layer flexible substrate of the present invention, the insulating film of the substrate is preferably a polyimide film, a polyamide film, a polyester film, a polytetrafluoroethylene film, or a polycrystalline film. A resin film selected from the group consisting of a phenylene sulfide film, a polyethylene naphthalate film, and a liquid crystal polymer film.

例如,較適宜使用薄膜厚度25~75μm的絕緣體薄膜。另外,玻璃纖維等無機質材料,因為會成為雷射加工與化學蝕刻的障礙,因而較佳不要使用含有無機質材料的基板。For example, an insulator film having a film thickness of 25 to 75 μm is preferably used. Further, since an inorganic material such as glass fiber is an obstacle to laser processing and chemical etching, it is preferable not to use a substrate containing an inorganic material.

1-5. 銅層(導體層)1-5. Copper layer (conductor layer)

本發明的2層可撓性基板係在底層金屬層上利用乾式鍍敷法形成銅薄膜層後,再於該銅薄膜層上利用濕式鍍敷法設置銅濕式鍍敷層,更積層使含有銅薄膜層與銅濕式鍍敷層的厚度為10nm~12μm之銅層而形成。In the two-layer flexible substrate of the present invention, a copper thin film layer is formed on the underlying metal layer by dry plating, and then a copper wet plating layer is formed on the copper thin film layer by wet plating, and the layer is further laminated. The copper thin film layer and the copper wet plating layer are formed by a copper layer having a thickness of 10 nm to 12 μm.

當僅使用乾式鍍敷法形成銅層時,乾式鍍敷法係真空蒸鍍法、濺鍍法、或離子鍍覆法中之任一者,相較於濕式鍍敷法,亦會有成膜速度較慢之情形,而較適於形成較薄銅層的情況。另一方面,利用乾式鍍敷法形成銅薄膜層後,再於銅薄膜層上利用濕式鍍敷法積層形成銅層,係適用在短時間形成較厚銅層,有助於生產性提升。When the copper layer is formed by only the dry plating method, the dry plating method is either a vacuum evaporation method, a sputtering method, or an ion plating method, and may be formed in comparison with the wet plating method. The film is slower and more suitable for forming a thinner copper layer. On the other hand, after the copper thin film layer is formed by the dry plating method, the copper layer is formed by wet plating on the copper thin film layer, and it is suitable to form a thick copper layer in a short time, which contributes to productivity improvement.

本發明的2層可撓性基板若最表面為銅薄膜層,則將直徑5μm~30μm的針孔數抑制為每1平方公尺45000個以下,若最表面為銅濕式鍍敷層,則將直徑或最大缺陷長為10μm~20μm的凹缺陷數量抑制為每1平方公尺2200個以下,便適用於製造窄間距配線的可撓性配線板。When the outermost surface of the two-layer flexible substrate of the present invention is a copper thin film layer, the number of pinholes having a diameter of 5 μm to 30 μm is suppressed to 45,000 or less per square meter, and when the outermost surface is a copper wet plating layer, The number of concave defects having a diameter or a maximum defect length of 10 μm to 20 μm is suppressed to 2,200 or less per 1 square meter, which is suitable for producing a flexible wiring board having narrow pitch wiring.

2.2 層可撓性基板之製造方法2.2 Layered flexible substrate manufacturing method

以下,針對本發明的2層可撓性基板之製造方法進行詳述。Hereinafter, a method of producing a two-layer flexible substrate of the present invention will be described in detail.

本發明中,對當作基材用之從聚醯亞胺系薄膜、聚醯胺系薄膜、聚酯系薄膜、聚四氟乙烯系薄膜、聚苯硫醚系薄膜、聚萘二甲酸乙二酯系薄膜、液晶聚合物系薄膜中選擇之樹脂薄膜的絕緣體薄膜,於其單面或雙面上,在未經由接著劑的情況下形成底層金屬層,並在該底層金屬層上形成銅薄膜層。In the present invention, a polyimide film, a polyamide film, a polyester film, a polytetrafluoroethylene film, a polyphenylene sulfide film, or a polyethylene naphthalate film are used as a substrate. An insulator film of a resin film selected from the group consisting of an ester film and a liquid crystal polymer film, on one or both sides thereof, forming an underlying metal layer without passing through an adhesive, and forming a copper film on the underlying metal layer Floor.

基材的絕緣體薄膜通常係含有水分,必須在利用乾式鍍敷法形成由鎳-鉻系合金構成的底層金屬層之前,便施行大氣乾燥或真空乾燥,俾將絕緣體薄膜中存在的水分去除。若此項動作不足,便會導致與底層金屬層間之密接性變差。The insulator film of the substrate usually contains moisture, and it is necessary to perform atmospheric drying or vacuum drying before forming the underlying metal layer composed of a nickel-chromium alloy by dry plating, and to remove moisture present in the insulator film. If this action is insufficient, the adhesion to the underlying metal layer will be deteriorated.

當利用乾式鍍敷法形成底層金屬層時,例如使用Roll to Roll的捲取式濺鍍裝置形成底層金屬層時,便將具有底層金屬層組成的靶材裝設於濺鍍用陰極上。When the underlying metal layer is formed by dry plating, for example, when a bottom metal layer is formed using a roll-to-roll coiling apparatus, a target having a bottom metal layer is mounted on the sputtering cathode.

首先,將已安裝有絕緣體薄膜的濺鍍裝置內施行真空排氣後,導入氮或氬、或氮與氬的混合氣體,並將裝置內保持於壓力0.8Pa~4.0Pa的惰性環境下,對電漿電極的配對放電電極間施加1500V~3000V直流電壓、或800V~2000V高頻電壓,並依2秒~100秒的時間利用電漿施行表面處理。First, vacuum evacuation is performed in a sputtering apparatus equipped with an insulator film, and a mixed gas of nitrogen or argon or nitrogen and argon is introduced, and the apparatus is maintained in an inert atmosphere at a pressure of 0.8 Pa to 4.0 Pa. A 1500V~3000V DC voltage or a high frequency voltage of 800V~2000V is applied between the paired discharge electrodes of the plasma electrode, and the surface treatment is performed by using plasma for 2 seconds to 100 seconds.

其次,導入氬氣,將裝置內保持於1.3Pa左右,再一邊將在裝置內的捲取輥、繞出輥上所裝設之絕緣體薄膜,依每分鐘3m左右的速度進行搬送,一邊從陰極所連接的濺鍍用直流電源供應電力而開始進行濺鍍放電,便在絕緣體薄膜上形成由鎳-鉻系合金、或鎳-鉻-鉬合金所構成的底層金屬層。Next, argon gas is introduced, and the inside of the apparatus is maintained at about 1.3 Pa, and the winding film attached to the winding roller and the wound roller in the apparatus are conveyed at a speed of about 3 m per minute while being guided from the cathode. The connected sputtering is supplied with a DC power source to start the sputtering discharge, and an underlying metal layer composed of a nickel-chromium alloy or a nickel-chromium-molybdenum alloy is formed on the insulator film.

銅薄膜層的形成係與底層金屬層的情況同樣,使用已將銅靶材裝設於濺鍍用陰極上的濺鍍裝置,將銅薄膜層成膜。此時,底層金屬層與銅薄膜層較佳係在同一真空室內連續形成,當形成底層金屬層後,將薄膜取出於大氣中,並使用其他濺鍍裝置形成銅薄膜層時,必須在成膜以前便預先施行充分的脫水。The copper thin film layer was formed in the same manner as in the case of the underlying metal layer, and a copper thin film layer was formed by using a sputtering apparatus in which a copper target was mounted on a sputtering cathode. At this time, the underlying metal layer and the copper thin film layer are preferably formed continuously in the same vacuum chamber. After the underlying metal layer is formed, the film is taken out into the atmosphere, and when a copper thin film layer is formed by using another sputtering device, the film must be formed. Adequate dehydration was performed beforehand.

再者,當在利用乾式鍍敷法形成銅薄膜層後,再於銅薄膜層上利用濕式鍍敷法形成銅濕式鍍敷層時,較佳係施行例如無電解鍍銅處理。該無電解鍍敷處理係藉由在可撓性基板整體上形成無電解鍍銅層,即便有存在針孔的情況,仍會覆蓋該露出面而使可撓性基板面整體呈良導體化,藉此便可抑制降低針孔的影響。但,當施行無電解鍍銅處理時,必須留意因無電解鍍敷液與其前處理液所造成的滲透並決定條件。Further, when the copper thin film layer is formed by the dry plating method and the copper wet plating layer is formed by the wet plating method on the copper thin film layer, for example, electroless copper plating treatment is preferably performed. In the electroless plating treatment, an electroless copper plating layer is formed on the entire flexible substrate, and even if there is a pinhole, the exposed surface is covered and the entire flexible substrate surface is formed into a good conductor. Thereby, the influence of the pinhole can be suppressed. However, when electroless copper plating is performed, it is necessary to pay attention to the penetration caused by the electroless plating solution and its pretreatment liquid and determine the conditions.

另外,利用該無電解銅鍍敷液所形成的鍍銅濕式鍍敷層之層厚,係只要當可修復基板面上因針孔所造成的缺陷,且施行電鍍銅鍍敷液處理時,不會因電鍍銅鍍敷液而溶解之程度的層厚便可,較佳係0.01μm~1.0μm範圍。In addition, the layer thickness of the copper-plated wet plating layer formed by the electroless copper plating solution is as long as the defects caused by the pinholes on the repairable substrate surface are treated by the electroplated copper plating solution. The layer thickness is not to be dissolved by the plating of the copper plating solution, and is preferably in the range of 0.01 μm to 1.0 μm.

已依此形成無電解鍍銅濕式鍍敷層的基板,係為能形成最終所需層厚的銅濕式鍍敷層,而施行電鍍銅處理,便可獲得不會受因底層金屬層形成時所產生的各種大小針孔造成之影響而良好,且密接度較高的2層可撓性基板。另外,本發明中所施行的電鍍銅處理係只要採取依常法施行的電鍍銅法之諸項條件便可。The substrate on which the electroless copper plating wet plating layer has been formed is formed as a copper wet plating layer capable of forming a final desired layer thickness, and the electroplated copper treatment is performed to obtain a metal layer which is not affected by the underlying metal layer. A two-layer flexible substrate having a good influence on various pinholes and having a high degree of adhesion. Further, the electroplating copper treatment performed in the present invention may be carried out by various conditions of the electroplating copper method which is carried out by a usual method.

依此在底層金屬層與銅薄膜層上所形成銅濕式鍍敷層的層厚,最厚亦較佳在12μm以下。設為此種層厚的理由係為能獲得窄配線寬度、窄配線間距的配線板。Accordingly, the layer thickness of the copper wet plating layer formed on the underlying metal layer and the copper thin film layer is preferably 12 μm or less. The reason for setting the layer thickness is a wiring board capable of obtaining a narrow wiring width and a narrow wiring pitch.

另外,是否在銅薄膜層的表面上利用濕式鍍敷法形成銅濕式鍍敷層,係依照配線部圖案的製造方法適當選擇。Further, whether or not the copper wet plating layer is formed by wet plating on the surface of the copper thin film layer is appropriately selected in accordance with the method of manufacturing the wiring portion pattern.

例如,當利用公知移除法形成配線部圖案時,係利用底層金屬層、銅薄膜層、及銅濕式鍍敷層形成配線部,因而必須形成銅濕式鍍敷層。以成為配線部所要求的層厚。此處所謂「移除法」,係在2層可撓性基板的銅層表面上設置光阻層,再於該光阻層上設置具有既定配線圖案的遮罩,再從其上方照射紫外線而曝光,經顯影,便獲得用於將不需要的銅層等予以蝕刻的蝕刻遮罩,接著將露出的銅層施行蝕刻而除去,接著再將殘存的光阻層予以除去之方法。作為配線部不需要的地方之底層金屬層亦被蝕刻除去,而形成配線部圖案的方法。For example, when the wiring portion pattern is formed by a known removal method, the wiring portion is formed by the underlying metal layer, the copper thin film layer, and the copper wet plating layer, and thus it is necessary to form a copper wet plating layer. It is required to be the layer thickness required for the wiring portion. Here, the "removal method" is to provide a photoresist layer on the surface of a copper layer of a two-layer flexible substrate, and to provide a mask having a predetermined wiring pattern on the photoresist layer, and to irradiate ultraviolet rays from above. After exposure and development, an etching mask for etching an unnecessary copper layer or the like is obtained, and then the exposed copper layer is etched and removed, and then the remaining photoresist layer is removed. A method of forming a wiring portion pattern by etching the underlying metal layer as a place where the wiring portion is not required.

另一方面,當利用半添加法形成配線部圖案時,亦可在銅薄膜層上利用濕式鍍敷法設置銅濕式鍍敷層,亦可未設置。此處所謂「半添加法」,係指在2層可撓性基板的金屬層(由底層金屬層與銅薄膜層構成的金屬層、或由底層金屬層、銅薄膜層及銅濕式鍍敷層構成的金屬層)之某表面上設置光阻層,再於該光阻層上設置具有既定配線圖案的遮罩,再從其上方照射紫外線而曝光,經顯影,便獲得用於在金屬層表面上電鍍銅而形成配線部的鍍敷用遮罩,將露出於開口部的金屬層當作陰極,經電鍍而形成配線部,接著再將光阻層予以除去,再施行軟蝕刻而將除配線部以外的不需要之2層可撓性基板表面金屬予以除去,便完成配線部而形成配線部圖案的方法。On the other hand, when the wiring portion pattern is formed by the semi-additive method, the copper wet plating layer may be provided on the copper thin film layer by wet plating, or may not be provided. The term "semi-addition method" as used herein refers to a metal layer of a two-layer flexible substrate (a metal layer composed of an underlying metal layer and a copper thin film layer, or an underlying metal layer, a copper thin film layer, and a copper wet plating). a photoresist layer is disposed on a surface of the metal layer of the layer, and a mask having a predetermined wiring pattern is disposed on the photoresist layer, and then ultraviolet rays are irradiated from above to be exposed, and developed to obtain a metal layer. A plating mask is formed by plating copper on the surface to form a wiring portion, and a metal layer exposed to the opening is used as a cathode, and a wiring portion is formed by electroplating, and then the photoresist layer is removed, and then soft etching is performed to remove A method of forming a wiring portion pattern by completing the wiring portion by removing the metal on the surface of the two unnecessary flexible substrates other than the wiring portion.

[實施例][Examples]

以下,利用實施例詳細說明本發明,惟本發明並不僅侷限於該等實施例。各特性的測定係使用以下所示手段實施。Hereinafter, the present invention will be described in detail by way of examples, but the invention is not limited to the examples. The measurement of each characteristic was carried out using the means shown below.

針孔的測定方法係將利用乾式鍍敷法所獲得之底層金屬層與銅薄膜層的積層體,利用穿透方式予以定位,再利用光學顯微鏡測定其大小,並測定直徑5μm至30μm的針孔每1平方公尺之個數。The pinhole is measured by a method of penetrating the layered metal layer and the copper film layer obtained by the dry plating method, and then measuring the size by an optical microscope, and measuring a pinhole having a diameter of 5 μm to 30 μm. The number of each square meter.

寡聚物量的評估方法係將經電漿處理後的絕緣薄膜利用四氫呋喃進行萃取,再將萃取物使用尺寸排除層析法(SEC法),測定380~13500分子量的寡聚物比例,將電漿處理前的數值設為100%,並進行比較且視為「寡聚物量」。The method for evaluating the amount of oligomers is to extract the plasma-treated insulating film by using tetrahydrofuran, and then extract the extract using size exclusion chromatography (SEC method) to determine the proportion of oligomers having a molecular weight of 380 to 13500, and to plasma. The value before the treatment was set to 100%, and was compared and regarded as "amount of oligomer".

剝離強度的測定方法係依照根據IPC-TM-650、NUMBER2.4.9的方法實施,並視為「初期剝離強度」。但,導線寬係設為1mm,剝離角度係設為90°。導線係利用移除法形成。又,耐熱性的指標係將已形成1mm導線薄膜的薄膜基材放置於150℃烤箱中168小時,取出後,放置至成為室溫為止,藉由評估90°剝離強度而實施,並視為「耐熱剝離強度」。The method for measuring the peel strength was carried out in accordance with the method according to IPC-TM-650 and NUMBER2.4.9, and was regarded as "initial peel strength". However, the wire width was set to 1 mm, and the peeling angle was set to 90°. The wire is formed by a removal method. Further, the index of heat resistance was obtained by placing a film substrate on which a 1 mm wire film was formed in an oven at 150 ° C for 168 hours, taking it out, and placing it until it became room temperature, and evaluating it by 90° peel strength, and regarded it as " Heat peel strength".

耐濕性的指標係將已形成1mm導線薄膜的薄膜基材,在121℃、2大氣壓的熱壓鍋中放置96小時,取出後放置至成為室溫為止,藉由評估90°剝離強度而實施,並視為「PCT剝離強度」。The index of moisture resistance is obtained by placing a film substrate having a 1 mm wire film in a hot press at 121 ° C and 2 atm for 96 hours, taking it out and placing it at room temperature, and evaluating the peel strength by 90°. And regarded as "PCT Peel Strength".

凹缺陷之測定方法係針對利用電鍍法所獲得銅濕式鍍敷層表面,使用光學顯微鏡進行觀察,並測定凹缺陷的大小。The measurement method of the concave defect was performed on the surface of the copper wet plating layer obtained by the plating method, and observed using an optical microscope, and the size of the concave defect was measured.

當凹缺陷係圓形的情況,測定直徑10μm至20μm者每1平方公尺的個數,當凹缺陷係除圓形以外的情況,則將凹缺陷之缺陷部長度最大值視為「最大缺陷長」,測定10μm至20μm凹缺陷每1平方公尺的個數。When the concave defect is circular, the number of each square meter of the diameter of 10 μm to 20 μm is measured. When the concave defect is other than the circular shape, the maximum length of the defective portion of the concave defect is regarded as the "maximum defect". "Long", the number of concave defects per 1 square meter from 10 μm to 20 μm was measured.

(比較例1)(Comparative Example 1)

首先,比較例1係顯示在未施行電漿處理情況下施行膜形成的2層可撓性基板之特性。First, Comparative Example 1 shows the characteristics of a two-layer flexible substrate on which film formation is performed without performing plasma treatment.

在厚度38μm聚醯亞胺薄膜(東麗杜邦公司製,註冊商標「Kapton 150EN」)的單面上形成底層金屬層的第1層,該底層金屬層的第1層係使用20重量%Cr-Ni合金靶材(住友金屬礦山股份有限公司製),在Ar環境中利用直流濺鍍法,依成膜速度0.7nm/sec將20重量%Cr-Ni合金底層金屬層成膜。對另外依照相同條件成膜的其中一部分,使用穿透式電子顯微鏡(TEM:日立製作所股份有限公司製)測定層厚,結果為0.02μm。在上述20重量%Cr-Ni膜上更進一步形成第2層,該第2層係使用Cu靶材(住友金屬礦山股份有限公司製),利用濺鍍法形成100nm厚度的銅薄膜層,接著再利用銅電鍍法成膜至8μm厚度為止。A first layer of an underlying metal layer was formed on one surface of a 38 μm thick polyimide film (trade name "Kapton 150EN", manufactured by Toray DuPont Co., Ltd.), and the first layer of the underlying metal layer was 20% by weight of Cr- Ni alloy target (manufactured by Sumitomo Metal Mining Co., Ltd.) was formed into a film of a 20 wt% Cr-Ni alloy underlayer metal layer by a DC sputtering method in an Ar environment at a film formation rate of 0.7 nm/sec. The layer thickness was measured using a transmission electron microscope (TEM: manufactured by Hitachi, Ltd.), and a part of the film formed under the same conditions was found to be 0.02 μm. Further, a second layer was formed on the above-mentioned 20% by weight Cr-Ni film, and a Cu target (manufactured by Sumitomo Metal Mining Co., Ltd.) was used to form a copper thin film layer having a thickness of 100 nm by sputtering, and then The film was formed by copper plating to a thickness of 8 μm.

所獲得2層可撓性基板的初期剝離強度係471N/m,PCT剝離強度係253N/m,乾式基板的針孔數係76714個/m2 ,寡聚物量係100%,並未獲得充分的初期剝離強度。The initial peel strength of the obtained two-layer flexible substrate was 471 N/m, the PCT peel strength was 253 N/m, the number of pinholes of the dry substrate was 76714/m 2 , and the amount of the oligomer was 100%, which was not obtained sufficiently. Initial peel strength.

(實施例1)(Example 1)

以下,例示在絕緣薄膜上施行利用電漿處理之表面處理的情況。Hereinafter, the case where the surface treatment by the plasma treatment is performed on the insulating film is exemplified.

將厚度38μm聚醯亞胺薄膜(東麗杜邦公司製,註冊商標「Kapton 150EN」)在氮氣壓1.6Pa的環境下,於電漿電極的配對放電電極間施加2000V直流電壓50秒鐘,僅對底層金屬層成膜面施行電漿處理。接著,在聚醯亞胺經電漿處理過的面上形成底層金屬層的第1層,該底層金屬層的第1層係使用20重量%Cr-Ni合金靶材(住友金屬礦山股份有限公司製),在Ar環境中利用直流濺鍍法,依成膜速度0.7nm/sec將20重量%Cr-Ni合金底層金屬層成膜。A polyimide film having a thickness of 38 μm (manufactured by Toray DuPont Co., Ltd., registered trademark "Kapton 150EN") was applied with a DC voltage of 2000 V for 50 seconds between the paired discharge electrodes of the plasma electrode under a nitrogen pressure of 1.6 Pa. The film formation surface of the underlying metal layer is subjected to a plasma treatment. Next, a first layer of the underlying metal layer is formed on the plasma-treated surface of the polyimide, and the first layer of the underlying metal layer is a 20% by weight Cr-Ni alloy target (Sumitomo Metal Mining Co., Ltd.) In the Ar environment, a 20 wt% Cr-Ni alloy underlayer metal layer was formed into a film by a DC sputtering method at a film formation rate of 0.7 nm/sec.

對另外依照相同條件成膜的其中一部分,使用穿透式電子顯微鏡(TEM:日立製作所股份有限公司製)測定層厚,結果為0.02μm。在該20重量%Ni-Cr膜上更進一步形成第2層,該第2層係使用Cu靶材(住友金屬礦山股份有限公司製),利用濺鍍法形成銅薄膜層100nm厚度,接著再利用銅電鍍法成膜至8μm厚度。The layer thickness was measured using a transmission electron microscope (TEM: manufactured by Hitachi, Ltd.), and a part of the film formed under the same conditions was found to be 0.02 μm. Further, a second layer was formed on the 20 wt% Ni-Cr film, and the second layer was formed by using a Cu target (manufactured by Sumitomo Metal Mining Co., Ltd.) to form a copper thin film layer having a thickness of 100 nm by sputtering. The film was formed by copper plating to a thickness of 8 μm.

所獲得2層可撓性基板的初期剝離強度係624N/m,PCT剝離強度係434N/m,乾式鍍敷(底層金屬層與銅薄膜層的積層體。以下稱「乾式鍍敷」)的針孔數係36443個/m2 ,且皆無直徑超過30μm的針孔,寡聚物量係70%,凹缺陷數係1951個/m2 ,且皆無直徑或最大缺陷長超過20μm的凹缺陷。The obtained two-layer flexible substrate had an initial peel strength of 624 N/m, a PCT peel strength of 434 N/m, and a dry plating (layered body of the underlying metal layer and the copper thin film layer. Hereinafter referred to as "dry plating"). The number of holes was 36,443 / m 2 , and there were no pinholes having a diameter exceeding 30 μm, the amount of oligomers was 70%, and the number of concave defects was 1951 / m 2 , and there were no concave defects having a diameter or a maximum defect length exceeding 20 μm.

(實施例2)(Example 2)

將厚度38μm聚醯亞胺薄膜(東麗杜邦公司製,註冊商標「Kapton 150EN」)在氮氣壓2.4Pa的環境下,於電漿電極的配對放電電極間施加2000V直流電壓50秒鐘,僅對底層金屬層成膜面施行電漿處理。接著,在聚醯亞胺經電漿處理過的面上形成底層金屬層的第1層,該底層金屬層的第1層係使用20重量%Cr-Ni合金靶材(住友金屬礦山股份有限公司製),在Ar環境中利用直流濺鍍法,依成膜速度0.7nm/sec將20重量%Cr-Ni合金底層金屬層成膜。對另外依照相同條件成膜的其中一部分,使用穿透式電子顯微鏡(TEM:日立製作所股份有限公司製)測定層厚,結果為0.02μm。在該20重量%Ni-Cr膜上更進一步形成第2層,該第2層係使用Cu靶材(住友金屬礦山股份有限公司製),利用濺鍍法形成銅薄膜層100nm厚度,接著再利用銅電鍍法成膜至8μm厚度。A polyimide film having a thickness of 38 μm (manufactured by Toray DuPont Co., Ltd., registered trademark "Kapton 150EN") was applied with a DC voltage of 2000 V for 50 seconds between the paired discharge electrodes of the plasma electrode under a nitrogen pressure of 2.4 Pa. The film formation surface of the underlying metal layer is subjected to a plasma treatment. Next, a first layer of the underlying metal layer is formed on the plasma-treated surface of the polyimide, and the first layer of the underlying metal layer is a 20% by weight Cr-Ni alloy target (Sumitomo Metal Mining Co., Ltd.) In the Ar environment, a 20 wt% Cr-Ni alloy underlayer metal layer was formed into a film by a DC sputtering method at a film formation rate of 0.7 nm/sec. The layer thickness was measured using a transmission electron microscope (TEM: manufactured by Hitachi, Ltd.), and a part of the film formed under the same conditions was found to be 0.02 μm. Further, a second layer was formed on the 20 wt% Ni-Cr film, and the second layer was formed by using a Cu target (manufactured by Sumitomo Metal Mining Co., Ltd.) to form a copper thin film layer having a thickness of 100 nm by sputtering. The film was formed by copper plating to a thickness of 8 μm.

所獲得2層可撓性基板的初期剝離強度係635N/m,PCT剝離強度係463N/m,乾式鍍敷的針孔數係15571個/m2 ,且皆無直徑超過30μm的針孔,寡聚物量係56%,凹缺陷數係1645個/m2 ,且皆無直徑或最大缺陷長超過20μm的凹缺陷。The initial peel strength of the obtained two-layer flexible substrate was 635 N/m, the PCT peel strength was 463 N/m, the number of pinholes for dry plating was 15,571 / m 2 , and none of the pinholes having a diameter exceeding 30 μm, oligomerization The amount is 56%, the number of concave defects is 1645/m 2 , and there are no concave defects with a diameter or a maximum defect length exceeding 20 μm.

(實施例3)(Example 3)

將厚度38μm聚醯亞胺薄膜(東麗杜邦公司製,註冊商標「Kapton 150EN」)在氮氣壓3.1Pa的環境下,於電漿電極的配對放電電極間施加2000V直流電壓50秒鐘,僅對底層金屬層成膜面施行電漿處理。接著,在聚醯亞胺經電漿處理過的面上形成底層金屬層的第1層,該底層金屬層的第1層係使用20重量%Cr-Ni合金靶材(住友金屬礦山股份有限公司製),在Ar環境中利用直流濺鍍法,依成膜速度0.7nm/sec將20重量%Cr-Ni合金底層金屬層成膜。對另外依照相同條件成膜的其中一部分,使用穿透式電子顯微鏡(TEM:日立製作所股份有限公司製)測定層厚,結果為0.02μm。在上述20重量%Cr-Ni膜上更進一步形成第2層,該第2層係使用Cu靶材(住友金屬礦山股份有限公司製),利用濺鍍法形成銅薄膜層100nm厚度,接著再利用銅電鍍法成膜至8μm厚度。A 38 μm thick polyimine film (trade name "Kapton 150EN", manufactured by Toray DuPont Co., Ltd.) was applied with a DC voltage of 2000 V between the paired discharge electrodes of the plasma electrode for 50 seconds under a nitrogen pressure of 3.1 Pa. The film formation surface of the underlying metal layer is subjected to a plasma treatment. Next, a first layer of the underlying metal layer is formed on the plasma-treated surface of the polyimide, and the first layer of the underlying metal layer is a 20% by weight Cr-Ni alloy target (Sumitomo Metal Mining Co., Ltd.) In the Ar environment, a 20 wt% Cr-Ni alloy underlayer metal layer was formed into a film by a DC sputtering method at a film formation rate of 0.7 nm/sec. The layer thickness was measured using a transmission electron microscope (TEM: manufactured by Hitachi, Ltd.), and a part of the film formed under the same conditions was found to be 0.02 μm. Further, a second layer was formed on the above-mentioned 20% by weight Cr-Ni film, and the second layer was formed by using a Cu target (manufactured by Sumitomo Metal Mining Co., Ltd.) to form a copper thin film layer having a thickness of 100 nm by sputtering. The film was formed by copper plating to a thickness of 8 μm.

所獲得2層可撓性基板的初期剝離強度係632N/m,PCT剝離強度係467N/m,乾式鍍敷的針孔數係8236個/m2 ,且皆無直徑超過30μm的針孔,寡聚物量係50%,凹缺陷數係2005個/m2 ,且皆無直徑或最大缺陷長超過20μm的凹缺陷。The initial peel strength of the obtained two-layer flexible substrate was 632 N/m, the PCT peel strength was 467 N/m, the number of pinholes for dry plating was 8236/m 2 , and none of the pinholes having a diameter exceeding 30 μm, oligomerization The amount is 50%, the number of concave defects is 2005/m 2 , and there are no concave defects with a diameter or a maximum defect length exceeding 20 μm.

(比較例2)(Comparative Example 2)

雖欲將厚度38μm聚醯亞胺薄膜(東麗杜邦公司製,註冊商標「Kapton 150EN」)在氮氣壓0.7Pa的環境下,於電漿電極的配對放電電極間施加500V直流電壓15秒鐘,但放電呈不安定,而無法處理。Although a 38 μm thick polyimide film (trade name “Kapton 150EN”, manufactured by Toray DuPont Co., Ltd.) is applied, a 500 V DC voltage is applied between the paired discharge electrodes of the plasma electrode for 15 seconds under a nitrogen pressure of 0.7 Pa. However, the discharge was unstable and could not be processed.

(比較例3)(Comparative Example 3)

雖將厚度38μm聚醯亞胺薄膜(東麗杜邦公司製,註冊商標「Kapton 150EN」)在氮氣壓4.7Pa的環境下,於電漿電極的配對放電電極間施加3500V直流電壓6秒鐘而施行電漿處理,但表面有出現起皺,導致後續的特性評估無法進行。A 38 μm thick polyimide film (trade name “Kapton 150EN”, manufactured by Toray DuPont Co., Ltd.) was applied at a nitrogen pressure of 4.7 Pa, and a DC voltage of 3500 V was applied between the paired discharge electrodes of the plasma electrode for 6 seconds. Plasma treatment, but wrinkling on the surface, resulting in subsequent performance evaluation can not be carried out.

(實施例4)(Example 4)

除設為氬氣壓3.6Pa,並對電漿電極施加直流2800V而施行6秒鐘電漿處理之外,其餘均與實施例1同樣地製作實施例4的2層可撓性基板。A two-layer flexible substrate of Example 4 was produced in the same manner as in Example 1 except that the argon gas pressure was 3.6 Pa, and a DC of 2800 V was applied to the plasma electrode for 6 seconds.

所獲得2層可撓性基板的初期剝離強度係612N/m,乾式鍍敷的針孔數係7428個/m2 ,且皆無直徑超過30μm的針孔,寡聚物量係50%,凹缺陷數係889個/m2 ,且皆無直徑或最大缺陷長超過20μm的凹缺陷。The initial peel strength of the obtained two-layer flexible substrate was 612 N/m, the number of pinholes of dry plating was 7,428 / m 2 , and none of the pinholes having a diameter exceeding 30 μm, the amount of oligomers was 50%, and the number of concave defects It has 889 pieces/m 2 and has no concave defects with a diameter or a maximum defect length exceeding 20 μm.

(實施例5)(Example 5)

除設為氬氣壓1.6Pa,並對電漿電極施加直流2200V而施行6秒鐘電漿處理之外,其餘均與實施例1同樣地製作實施例5的2層可撓性基板。A two-layer flexible substrate of Example 5 was produced in the same manner as in Example 1 except that the argon gas pressure was 1.6 Pa, and a DC of 2,200 V was applied to the plasma electrode to carry out a plasma treatment for 6 seconds.

所獲得2層可撓性基板的初期剝離強度係627N/m,乾式鍍敷的針孔數係5142個/m2 ,且皆無直徑超過30μm的針孔,寡聚物量係70%。另外,實施例5的2層可撓性基板之凹缺陷測定並未實施。The initial peel strength of the obtained two-layer flexible substrate was 627 N/m, the number of pinholes of the dry plating was 5142 / m 2 , and none of the pinholes having a diameter exceeding 30 μm, and the amount of the oligomer was 70%. Further, the measurement of the concave defects of the two-layer flexible substrate of Example 5 was not carried out.

(實施例6)(Example 6)

除設為氬氣壓3.6Pa,並對電漿電極施加直流1600V而施行6秒鐘電漿處理之外,其餘均與實施例1同樣地製作實施例6的2層可撓性基板。A two-layer flexible substrate of Example 6 was produced in the same manner as in Example 1 except that the argon gas pressure was 3.6 Pa, and a DC voltage of 1600 V was applied to the plasma electrode to carry out a plasma treatment for 6 seconds.

所獲得2層可撓性基板的初期剝離強度係626N/m,乾式鍍敷的針孔數係6428個/m2 ,且皆無直徑超過30μm的針孔,寡聚物量係70%。另外,實施例6的2層可撓性基板之凹缺陷測定並未實施。The initial peel strength of the obtained two-layer flexible substrate was 626 N/m, the number of pinholes for dry plating was 6428/m 2 , and none of the pinholes having a diameter exceeding 30 μm, and the amount of the oligomer was 70%. Further, the measurement of the concave defects of the two-layer flexible substrate of Example 6 was not carried out.

(比較例4)(Comparative Example 4)

雖設為氬氣壓0.7Pa,並欲對電漿電極施加6秒鐘的直流500V,但放電呈不安定,而無法進行處理。Although it was set to an argon gas pressure of 0.7 Pa and a DC voltage of 500 V was applied to the plasma electrode for 6 seconds, the discharge was unstable and could not be processed.

(比較例5)(Comparative Example 5)

雖設為氬氣壓4.7Pa,並對電漿電極施加直流3500V而施行6秒鐘電漿處理,但表面有出現起皺,導致後續的特性評估無法進行。Although the argon gas pressure was 4.7 Pa, and the plasma electrode was applied with a direct current of 3,500 V for 6 seconds, the surface was wrinkled, and subsequent evaluation of characteristics could not be performed.

(實施例7)(Example 7)

除設為75體積%氬-25體積%氮的混合氣壓1.6Pa,並對電漿電極施加直流1800V而施行6秒鐘電漿處理之外,其餘均與實施例1同樣地製作實施例7的2層可撓性基板。The same procedure as in Example 1 was carried out except that the mixing gas pressure of 75 vol% argon-25 vol% nitrogen was 1.6 Pa, and the plasma electrode was applied with a direct current of 1800 V for 6 seconds. 2 layers of flexible substrate.

所獲得2層可撓性基板的初期剝離強度係608N/m,乾式鍍敷的針孔數係8571個/m2 ,且皆無直徑超過30μm的針孔,寡聚物量係70%,凹缺陷數係1855個/m2 ,且皆無直徑或最大缺陷長超過20μm的凹缺陷。The initial peel strength of the obtained two-layer flexible substrate was 608 N/m, the number of pinholes for dry plating was 8571/m 2 , and none of the pinholes having a diameter exceeding 30 μm, the amount of oligomers was 70%, and the number of concave defects It has 1855 pieces/m 2 and has no concave defects with a diameter or a maximum defect length exceeding 20 μm.

(實施例8)(Example 8)

除設為75體積%氬-25體積%氮的混合氣壓1.6Pa,並對電漿電極施加直流2300V而施行6秒鐘電漿處理之外,其餘均與實施例1同樣地製作實施例8的2層可撓性基板。The same procedure as in Example 1 was carried out except that the mixing gas pressure of 75 vol% argon-25 vol% nitrogen was 1.6 Pa, and the plasma electrode was subjected to a direct current 2300 V for 6 seconds. 2 layers of flexible substrate.

所獲得2層可撓性基板的初期剝離強度係599N/m,乾式鍍敷的針孔數係7143個/m2 ,且皆無直徑超過30μm的針孔,寡聚物量係50%,凹缺陷數係1554個/m2 ,且皆無直徑或最大缺陷長超過20μm的凹缺陷。The initial peel strength of the obtained two-layer flexible substrate was 599 N/m, the number of pinholes for dry plating was 7143/m 2 , and none of the pinholes having a diameter exceeding 30 μm, the amount of oligomers was 50%, and the number of concave defects It is 1554 pieces/m 2 and has no concave defects with a diameter or a maximum defect length exceeding 20 μm.

(實施例9)(Example 9)

除設為75體積%氬-25體積%氮的混合氣壓3.6Pa,並對電漿電極施加直流1500V而施行6秒鐘電漿處理之外,其餘均與實施例1同樣地製作實施例9的2層可撓性基板。The ninth example was produced in the same manner as in Example 1 except that a mixing gas pressure of 7.5 vol of argon--25 vol% nitrogen was set to 3.6 Pa, and a direct current of 1500 V was applied to the plasma electrode and plasma treatment was performed for 6 seconds. 2 layers of flexible substrate.

所獲得2層可撓性基板的初期剝離強度係593N/m,乾式鍍敷的針孔數係24000個/m2 ,且皆無直徑超過30μm的針孔,寡聚物量係60%,凹缺陷數係1762個/m2 ,且皆無直徑或最大缺陷長超過20μm的凹缺陷。The initial peel strength of the obtained two-layer flexible substrate was 593 N/m, the number of pinholes for dry plating was 24,000/m 2 , and none of the pinholes having a diameter exceeding 30 μm, the amount of oligomers was 60%, and the number of concave defects It is 1762 pieces/m 2 and has no concave defects with a diameter or a maximum defect length exceeding 20 μm.

(比較例6)(Comparative Example 6)

雖設為75體積%氬-25體積%氮的混合氣壓0.7Pa,並欲對電漿電極施加6秒鐘的直流500V,但放電呈不安定,而無法進行處理。Although the mixing pressure of 75 vol% argon--25 vol% nitrogen was 0.7 Pa, and it was intended to apply a direct current of 500 V to the plasma electrode for 6 seconds, the discharge was unstable and could not be processed.

(比較例7)(Comparative Example 7)

雖設為75體積%氬-25體積%氮的混合氣壓4.7Pa,並對電漿電極施加直流3500V而施行6秒鐘電漿處理,但表面有出現起皺,導致後續的特性評估無法進行。Although it was set to a mixing pressure of 7.5 Pa of 75 vol% argon to 25% by volume of nitrogen, and a direct current of 3500 V was applied to the plasma electrode for 6 seconds, the surface was wrinkled, and subsequent evaluation of characteristics was impossible.

(實施例10)(Embodiment 10)

除設為50體積%氬-50體積%氮的混合氣壓1.6Pa,並對電漿電極施加直流3000V而施行50秒鐘電漿處理之外,其餘均與實施例1同樣地製作實施例10的2層可撓性基板。Example 10 was prepared in the same manner as in Example 1 except that the mixing gas pressure of 50 vol% argon-50 vol% nitrogen was 1.6 Pa, and the plasma electrode was subjected to a direct current 3000 V and a plasma treatment was performed for 50 seconds. 2 layers of flexible substrate.

所獲得2層可撓性基板的初期剝離強度係681N/m,乾式鍍敷的針孔數係18276個/m2 ,且皆無直徑超過30μm的針孔,寡聚物量係70%,凹缺陷數係2076個/m2 ,且皆無直徑或最大缺陷長超過20μm的凹缺陷。The initial peel strength of the obtained two-layer flexible substrate was 681 N/m, the number of pinholes of the dry plating was 18,276 / m 2 , and none of the pinholes having a diameter exceeding 30 μm, the amount of the oligomer was 70%, and the number of concave defects It is 2076 pieces/m 2 and has no concave defects with a diameter or a maximum defect length exceeding 20 μm.

(實施例11)(Example 11)

除設為50體積%氬-50體積%氮的混合氣壓1.6Pa,並對電漿電極施加直流1800V而施行6秒鐘電漿處理之外,其餘均與實施例1同樣地製作實施例11的2層可撓性基板。Example 11 was prepared in the same manner as in Example 1 except that the mixing gas pressure of 50 vol% argon-50% by volume nitrogen was 1.6 Pa, and the plasma electrode was applied with a direct current of 1800 V for 6 seconds. 2 layers of flexible substrate.

所獲得2層可撓性基板的初期剝離強度係572N/m,乾式鍍敷的針孔數係15286個/m2 ,且皆無直徑超過30μm的針孔,寡聚物量係30%,凹缺陷數係1861個/m2 ,且皆無直徑或最大缺陷長超過20μm的凹缺陷。The initial peel strength of the obtained two-layer flexible substrate was 572 N/m, the number of pinholes for dry plating was 15,286 / m 2 , and none of the pinholes having a diameter exceeding 30 μm, the amount of the oligomer was 30%, and the number of concave defects It is 1861 pieces/m 2 and has no concave defects with a diameter or a maximum defect length exceeding 20 μm.

(實施例12)(Embodiment 12)

除設為50體積%氬-50體積%氮的混合氣壓3.6Pa,並對電漿電極施加直流2000V而施行6秒鐘電漿處理之外,其餘均與實施例1同樣地製作實施例12的2層可撓性基板。A sample of Example 12 was produced in the same manner as in Example 1 except that a mixed gas pressure of 3.6 Pa of 50% by volume of argon-50% by volume of nitrogen was applied, and a DC of 2000 V was applied to the plasma electrode for 6 seconds. 2 layers of flexible substrate.

所獲得2層可撓性基板的初期剝離強度係583N/m,乾式鍍敷的針孔數係21286個/m2 ,且皆無直徑超過30μm的針孔,寡聚物量係40%,凹缺陷數係1889個/m2 ,且皆無直徑或最大缺陷長超過20μm的凹缺陷。The initial peel strength of the obtained two-layer flexible substrate was 583 N/m, the number of pinholes of the dry plating was 21,286 / m 2 , and none of the pinholes having a diameter exceeding 30 μm, the amount of the oligomer was 40%, and the number of concave defects It has 1889 pieces/m 2 and has no concave defects with a diameter or a maximum defect length exceeding 20 μm.

(比較例8)(Comparative Example 8)

雖設為50體積%氬-50體積%氮的混合氣壓0.7Pa,並欲對電漿電極施加6秒鐘的直流500V,但放電呈不安定,而無法進行處理。Although the mixing pressure of 50% by volume of argon-50% by volume of nitrogen was 0.7 Pa, and the direct current of 500 V was applied to the plasma electrode for 6 seconds, the discharge was unstable and could not be processed.

(比較例9)(Comparative Example 9)

雖設為50體積%氬-50體積%氮的混合氣壓4.7Pa,並對電漿電極施加直流3500V而施行6秒鐘電漿處理,但表面有出現起皺,導致後續的特性評估無法進行。Although a mixing pressure of 4.7 Pa of 50% by volume of argon-50% by volume of nitrogen was applied, and a direct current of 3,500 V was applied to the plasma electrode for 6 seconds of plasma treatment, wrinkles appeared on the surface, which prevented subsequent evaluation of characteristics.

(實施例13)(Example 13)

除設為25體積%氬-75體積%氮的混合氣壓1.6Pa,並對電漿電極施加直流1600V而施行6秒鐘電漿處理之外,其餘均與實施例1同樣地製作實施例13的2層可撓性基板。Example 13 was prepared in the same manner as in Example 1 except that the mixing gas pressure of 25% by volume of argon-75 vol% nitrogen was 1.6 Pa, and the plasma electrode was applied with a DC of 1600 V for 6 seconds. 2 layers of flexible substrate.

所獲得2層可撓性基板的初期剝離強度係586N/m,乾式鍍敷的針孔數係8857個/m2 ,且皆無直徑超過30μm的針孔,寡聚物量係55%,凹缺陷數係1428個/m2 ,且皆無直徑或最大缺陷長超過20μm的凹缺陷。The initial peel strength of the obtained two-layer flexible substrate was 586 N/m, the number of pinholes for dry plating was 8,857 / m 2 , and none of the pinholes having a diameter exceeding 30 μm, the amount of oligomers was 55%, and the number of concave defects There are 1428 / m 2 , and there are no concave defects with a diameter or a maximum defect length exceeding 20 μm.

(實施例14)(Example 14)

除設為25體積%氬-75體積%氮的混合氣壓1.6Pa,並對電漿電極施加直流1800V而施行6秒鐘電漿處理之外,其餘均與實施例1同樣地製作實施例14的2層可撓性基板。Example 14 was prepared in the same manner as in Example 1 except that the mixing gas pressure of 25% by volume of argon-75 vol% nitrogen was 1.6 Pa, and the plasma electrode was applied with a direct current of 1800 V for 6 seconds. 2 layers of flexible substrate.

所獲得2層可撓性基板的初期剝離強度係567N/m,乾式鍍敷的針孔數係11569個/m2 ,且皆無直徑超過30μm的針孔,寡聚物量係50%,凹缺陷數係1276個/m2 ,且皆無直徑或最大缺陷長超過20μm的凹缺陷。The initial peel strength of the obtained two-layer flexible substrate was 567 N/m, the number of pinholes for dry plating was 11,569 / m 2 , and none of the pinholes having a diameter exceeding 30 μm, the amount of oligomers was 50%, and the number of concave defects It has 1276 pieces/m 2 and has no concave defects with a diameter or a maximum defect length exceeding 20 μm.

(實施例15)(Example 15)

除設為25體積%氬-75體積%氮的混合氣壓3.6Pa,並對電漿電極施加直流2000V而施行6秒鐘電漿處理之外,其餘均與實施例1同樣地製作實施例15的2層可撓性基板。Example 15 was prepared in the same manner as in Example 1 except that the mixing gas pressure of 5% by volume of argon-75 vol% nitrogen was 3.6 Pa, and a DC of 2000 V was applied to the plasma electrode and plasma treatment was performed for 6 seconds. 2 layers of flexible substrate.

所獲得2層可撓性基板的初期剝離強度係584N/m,乾式鍍敷的針孔數係22429個/m2 ,且皆無直徑超過30μm的針孔,寡聚物量係70%,凹缺陷數係1987個/m2 ,且皆無直徑或最大缺陷長超過20μm的凹缺陷。The initial peel strength of the obtained two-layer flexible substrate was 584 N/m, the number of pinholes of the dry plating was 22,429 / m 2 , and none of the pinholes having a diameter exceeding 30 μm, the amount of the oligomer was 70%, and the number of concave defects There are 1987 / m 2 , and there are no concave defects with a diameter or maximum defect length exceeding 20 μm.

(比較例10)(Comparative Example 10)

雖設為25體積%氬-75體積%氮的混合氣壓0.7Pa,並欲對電漿電極施加6秒鐘的直流500V,但放電呈不安定,而無法進行處理。Although a mixing pressure of 25% by volume of argon-75 vol% nitrogen was set to 0.7 Pa, and a DC of 500 V was applied to the plasma electrode for 6 seconds, the discharge was unstable and could not be processed.

(比較例11)(Comparative Example 11)

雖設為25體積%氬-75體積%氮的混合氣壓4.7Pa,並對電漿電極施加直流3500V而施行6秒鐘電漿處理,但表面有出現起皺,導致後續的特性評估無法進行。Although a mixing pressure of 7.5 Pa of 25% by volume of argon-75 vol% nitrogen was applied, and a DC of 3500 V was applied to the plasma electrode for 6 seconds, the surface was wrinkled, and subsequent evaluation of characteristics was impossible.

(實施例16)(Embodiment 16)

除設為25體積%氬-75體積%氮的混合氣壓1.6Pa,並對電漿電極施加高頻600V而施行12秒鐘電漿處理之外,其餘均與實施例1同樣地製作實施例16的2層可撓性基板。Example 16 was produced in the same manner as in Example 1 except that the mixing gas pressure of 25% by volume of argon-75 vol% nitrogen was 1.6 Pa, and a high frequency of 600 V was applied to the plasma electrode and plasma treatment was performed for 12 seconds. A two-layer flexible substrate.

所獲得2層可撓性基板的初期剝離強度係598N/m,乾式鍍敷的針孔數係9847個/m2 ,且皆無直徑超過30μm的針孔,寡聚物量係65%,凹缺陷數係1564個/m2 ,且皆無直徑或最大缺陷長超過20μm的凹缺陷。The initial peel strength of the obtained two-layer flexible substrate was 598 N/m, the number of pinholes of the dry plating was 9847/m 2 , and none of the pinholes having a diameter exceeding 30 μm, the amount of the oligomer was 65%, and the number of concave defects It is 1564 pieces/m 2 and has no concave defects with a diameter or a maximum defect length exceeding 20 μm.

(實施例17)(Example 17)

除設為25體積%氬-75體積%氮的混合氣壓1.6Pa,並對電漿電極施加高頻1000V而施行12秒鐘電漿處理之外,其餘均與實施例1同樣地製作實施例17的2層可撓性基板。Example 17 was produced in the same manner as in Example 1 except that the mixing gas pressure of 25% by volume of argon-75 vol% nitrogen was 1.6 Pa, and a high frequency of 1000 V was applied to the plasma electrode and plasma treatment was performed for 12 seconds. A two-layer flexible substrate.

所獲得2層可撓性基板的初期剝離強度係608N/m,乾式鍍敷的針孔數係15098個/m2 ,且皆無直徑超過30μm的針孔,寡聚物量係63%,凹缺陷數係2017個/m2 ,且皆無直徑或最大缺陷長超過20μm的凹缺陷。The initial peel strength of the obtained two-layer flexible substrate was 608 N/m, the number of pinholes for dry plating was 15098/m 2 , and none of the pinholes having a diameter exceeding 30 μm, the amount of oligomers was 63%, and the number of concave defects It is 2017/m 2 and has no concave defects with a diameter or maximum defect length exceeding 20 μm.

(實施例18)(Embodiment 18)

除設為25體積%氬-75體積%氮的混合氣壓2.4Pa,並對電漿電極施加高頻600V而施行12秒鐘電漿處理之外,其餘均與實施例1同樣地製作實施例18的2層可撓性基板。Example 18 was produced in the same manner as in Example 1 except that the mixing gas pressure of 25% by volume of argon-75 vol% nitrogen was 2.4 Pa, and a high frequency of 600 V was applied to the plasma electrode and plasma treatment was performed for 12 seconds. A two-layer flexible substrate.

所獲得2層可撓性基板的初期剝離強度係614N/m,乾式鍍敷的針孔數係19713個/m2 ,且皆無直徑超過30μm的針孔,寡聚物量係70%,凹缺陷數係1798個/m2 ,且皆無直徑或最大缺陷長超過20μm的凹缺陷。The initial peel strength of the obtained two-layer flexible substrate was 614 N/m, the number of pinholes for dry plating was 19,713/m 2 , and none of the pinholes having a diameter exceeding 30 μm, the amount of oligomers was 70%, and the number of concave defects It is 1798 pieces/m 2 and has no concave defects with a diameter or a maximum defect length exceeding 20 μm.

(比較例12)(Comparative Example 12)

雖設為25體積%氬-75體積%氮的混合氣壓0.3Pa,並欲對電漿電極施加12秒鐘的高頻600V,但放電呈不安定,而無法進行處理。Although the mixing gas pressure of 25% by volume of argon-75 vol% nitrogen was 0.3 Pa, and the high frequency of 600 V was applied to the plasma electrode for 12 seconds, the discharge was unstable and could not be processed.

(比較例13)(Comparative Example 13)

雖設為25體積%氬-75體積%氮的混合氣壓4.7Pa,並對電漿電極施加高頻600V而施行12秒鐘電漿處理,但表面有出現起皺,導致後續的特性評估無法進行。Although the mixing pressure of 5% by volume of argon-75 vol% nitrogen is 4.7 Pa, and a high frequency of 600 V is applied to the plasma electrode for 12 seconds, the surface is wrinkled, resulting in subsequent characteristic evaluation being impossible. .

(實施例19)(Embodiment 19)

除設為氬氣壓1.6Pa,並對電漿電極施加高頻600V而施行12秒鐘電漿處理之外,其餘均與實施例1同樣地製作實施例19的2層可撓性基板。A two-layer flexible substrate of Example 19 was produced in the same manner as in Example 1 except that the argon gas pressure was 1.6 Pa, and a high frequency of 600 V was applied to the plasma electrode to carry out a plasma treatment for 12 seconds.

所獲得2層可撓性基板的初期剝離強度係598N/m,乾式鍍敷的針孔數係25673個/m2 ,且皆無直徑超過30μm的針孔,寡聚物量係56%,凹缺陷數係1897個/m2 ,且皆無直徑或最大缺陷長超過20μm的凹缺陷。The initial peel strength of the obtained two-layer flexible substrate was 598 N/m, the number of pinholes for dry plating was 25673/m 2 , and none of the pinholes having a diameter exceeding 30 μm, the amount of oligomers was 56%, and the number of concave defects It is 1897 pieces/m 2 and has no concave defects with a diameter or a maximum defect length exceeding 20 μm.

(實施例20)(Embodiment 20)

除設為75體積%氬-25體積%氮的混合氣壓1.6Pa,並對電漿電極施加高頻600V而施行12秒鐘電漿處理之外,其餘均與實施例1同樣地製作實施例20的2層可撓性基板。Example 20 was produced in the same manner as in Example 1 except that the mixing gas pressure of 75 vol% argon-25 vol% nitrogen was 1.6 Pa, and the plasma electrode was subjected to a high frequency of 600 V for 12 seconds. A two-layer flexible substrate.

所獲得2層可撓性基板的初期剝離強度係587N/m,乾式鍍敷的針孔數係19476個/m2 ,且皆無直徑超過30μm的針孔,寡聚物量係66%,凹缺陷數係1674個/m2 ,且皆無直徑或最大缺陷長超過20μm的凹缺陷。The initial peel strength of the obtained two-layer flexible substrate was 587 N/m, the number of pinholes for dry plating was 19,476 / m 2 , and none of the pinholes having a diameter exceeding 30 μm, the amount of oligomers was 66%, and the number of concave defects It has 1674 pieces/m 2 and has no concave defects with a diameter or a maximum defect length exceeding 20 μm.

(實施例21)(Example 21)

除設為50體積%氬-50體積%氮的混合氣壓1.6Pa,並對電漿電極施加高頻600V而施行12秒鐘電漿處理之外,其餘均與實施例1同樣地製作實施例21的2層可撓性基板。Example 21 was produced in the same manner as in Example 1 except that the mixing gas pressure of 50 vol% argon-50 vol% nitrogen was 1.6 Pa, and the plasma electrode was subjected to a high frequency of 600 V for 12 seconds. A two-layer flexible substrate.

所獲得2層可撓性基板的初期剝離強度係569N/m,乾式鍍敷的針孔數係24384個/m2 ,且皆無直徑超過30μm的針孔,寡聚物量係62%,凹缺陷數係1720個/m2 ,且皆無直徑或最大缺陷長超過20μm的凹缺陷。The initial peel strength of the obtained two-layer flexible substrate was 569 N/m, the number of pinholes for dry plating was 24,384 / m 2 , and none of the pinholes having a diameter exceeding 30 μm, the amount of oligomers was 62%, and the number of concave defects It is 1720 / m 2 and has no concave defects with a diameter or maximum defect length exceeding 20 μm.

(實施例22)(Example 22)

除設為氮氣壓1.6Pa,並對電漿電極施加高頻600V而施行12秒鐘電漿處理之外,其餘均與實施例1同樣地製作實施例22的2層可撓性基板。A two-layer flexible substrate of Example 22 was produced in the same manner as in Example 1 except that a nitrogen gas pressure of 1.6 Pa was applied, and a high frequency of 600 V was applied to the plasma electrode to carry out a plasma treatment for 12 seconds.

所獲得2層可撓性基板的初期剝離強度係601N/m,乾式鍍敷的針孔數係27846個/m2 ,且皆無直徑超過30μm的針孔,寡聚物量係59%,凹缺陷數係2008個/m2 ,且皆無直徑或最大缺陷長超過20μm的凹缺陷。The initial peel strength of the obtained two-layer flexible substrate was 601 N/m, the number of pinholes for dry plating was 27,846 / m 2 , and none of the pinholes having a diameter exceeding 30 μm, the amount of oligomers was 59%, and the number of concave defects It is 2008/m 2 and has no concave defects with a diameter or maximum defect length exceeding 20 μm.

上述實施例、比較例的結果整理如表1所示。The results of the above examples and comparative examples are shown in Table 1.

由表1得知,藉由對絕緣體薄膜施行依照本發明指定條件之電漿處理的表面處理,便可使絕緣體薄膜的寡聚物量成為表面處理前的寡聚物量之70%以下,且可將乾式鍍敷的針孔數抑制在45000個/m2 以下,並可將銅濕式鍍敷層的凹缺陷數抑制在2200個/m2 以下。It is understood from Table 1 that by performing the surface treatment of the insulator film on the plasma treatment according to the conditions specified in the present invention, the amount of the oligomer of the insulator film can be made 70% or less of the amount of the oligomer before the surface treatment, and The number of pinholes of the dry plating is suppressed to 45,000 pieces/m 2 or less, and the number of concave defects of the copper wet plating layer can be suppressed to 2,200 / m 2 or less.

再者,表面處理的電漿處理之環境壓力未滿0.8Pa時,確認到放電呈不安定,而無法對絕緣體薄膜施行表面處理。且,亦得知對於電漿電極的施加電壓若過高,則絕緣體薄膜會出現起皺,導致無法製造2層可撓性基板。Further, when the environmental pressure of the surface-treated plasma treatment was less than 0.8 Pa, it was confirmed that the discharge was unstable, and the surface treatment of the insulator film could not be performed. Further, it has been found that if the applied voltage of the plasma electrode is too high, wrinkles of the insulator film occur, and it is impossible to manufacture a two-layer flexible substrate.

Claims (16)

一種2層可撓性基板,係在絕緣體薄膜至少單面上,於未經由接著劑的情況下,利用乾式鍍敷法形成底層金屬層,並在該底層金屬層上利用乾式鍍敷法形成銅薄膜層者;其特徵為,上述絕緣體薄膜係對至少其中一面施行表面處理,且僅對上述絕緣體薄膜其中一面施行上述表面處理後的寡聚物量,係表面處理前的寡聚物量之70%以下;上述銅薄膜層係設置在表面的寡聚物量為70%以下之上述絕緣體薄膜上,其具有50nm~500nm之厚度,且皆無直徑超過30μm的針孔,且直徑5μm以上且30μm以下的針孔係每1平方公尺45000個以下。 A two-layer flexible substrate is formed on at least one side of an insulator film, and a bottom metal layer is formed by dry plating without passing through an adhesive, and copper is formed by dry plating on the underlying metal layer. In the film layer, the insulator film is subjected to a surface treatment on at least one of the surfaces, and the amount of the oligomer after the surface treatment is applied to only one of the insulating film is 70% or less of the amount of the oligomer before the surface treatment. The copper thin film layer is provided on the insulating film having a surface amount of oligomers of 70% or less, having a thickness of 50 nm to 500 nm, and having no pinholes having a diameter exceeding 30 μm, and pinholes having a diameter of 5 μm or more and 30 μm or less. It is 45,000 or less per 1 square meter. 如申請專利範圍第1項之2層可撓性基板,其中,在上述銅薄膜層上利用濕式鍍敷法形成銅濕式鍍敷層。 A two-layer flexible substrate according to claim 1, wherein the copper wet plating layer is formed on the copper thin film layer by wet plating. 如申請專利範圍第2項之2層可撓性基板,其中,上述銅濕式鍍敷層係具有0.5μm~12μm之厚度,且皆無直徑或最大缺陷長超過20μm的凹缺陷,且直徑或最大缺陷長10μm以上且20μm以下的凹缺陷係每1平方公尺2200個以下。 The two-layer flexible substrate of claim 2, wherein the copper wet plating layer has a thickness of 0.5 μm to 12 μm, and has no concave defects having a diameter or a maximum defect length exceeding 20 μm, and the diameter or the maximum The concave defect having a defect length of 10 μm or more and 20 μm or less is 2,200 or less per 1 square meter. 如申請專利範圍第1或2項之2層可撓性基板,其中,上述底層金屬層係具有5nm~50nm之層厚,由含有以鉻為主的添加元素6重量%~22重量%而其餘則為鎳所構成的鎳-鉻系合金所形成,且在上述底層金屬層上所設置之由銅薄膜 層與銅濕式鍍敷層所構成的導體層(銅層)之層厚係50nm~12μm。 The two-layer flexible substrate according to claim 1 or 2, wherein the underlying metal layer has a layer thickness of 5 nm to 50 nm and contains 6% by weight to 22% by weight of an additive element mainly composed of chromium. a nickel-chromium alloy composed of nickel, and a copper film provided on the underlying metal layer. The layer thickness of the conductor layer (copper layer) formed of the layer and the copper wet plating layer is 50 nm to 12 μm. 如申請專利範圍第1或2項之2層可撓性基板,其中,上述絕緣體薄膜係從聚醯亞胺系薄膜、聚醯胺系薄膜、聚酯系薄膜、聚四氟乙烯系薄膜、聚苯硫醚系薄膜、聚萘二甲酸乙二酯系薄膜、液晶聚合物系薄膜中選擇的樹脂薄膜。 The two-layer flexible substrate according to claim 1 or 2, wherein the insulator film is a polyimide film, a polyamide film, a polyester film, a polytetrafluoroethylene film, or a poly A resin film selected from the group consisting of a phenylene sulfide film, a polyethylene naphthalate film, and a liquid crystal polymer film. 如申請專利範圍第1或2項之2層可撓性基板,其中,上述表面處理係在壓力0.8Pa~4.0Pa的惰性環境下,對上述絕緣體薄膜的表面施行利用1500V~3000V直流電壓之電漿放電處理。 The two-layer flexible substrate according to claim 1 or 2, wherein the surface treatment is performed by using a DC voltage of 1500 V to 3000 V on the surface of the insulator film under an inert atmosphere of a pressure of 0.8 Pa to 4.0 Pa. Slurry discharge treatment. 如申請專利範圍第6項之2層可撓性基板,其中,上述表面處理的惰性環境係氮環境,且表面處理後的PCT剝離強度係初期剝離強度的70%以上。 The two-layer flexible substrate according to claim 6, wherein the surface-treated inert environment is a nitrogen atmosphere, and the PCT peel strength after the surface treatment is 70% or more of the initial peel strength. 如申請專利範圍第1或2項之2層可撓性基板,其中,上述表面處理係在壓力0.8Pa~4.0Pa的惰性環境下,對上述絕緣體薄膜的表面施行利用800V~2000V高頻電壓之電漿放電處理。 The two-layer flexible substrate according to claim 1 or 2, wherein the surface treatment is performed by using a high-frequency voltage of 800 V to 2000 V on the surface of the insulator film under an inert atmosphere of a pressure of 0.8 Pa to 4.0 Pa. Plasma discharge treatment. 如申請專利範圍第8項之2層可撓性基板,其中,上述表面處理的惰性環境係氮環境,且表面處理後的PCT剝離強度係初期剝離強度的70%以上。 A two-layer flexible substrate according to claim 8, wherein the surface-treated inert environment is a nitrogen atmosphere, and the PCT peel strength after the surface treatment is 70% or more of the initial peel strength. 一種2層可撓性基板之製造方法,係在絕緣體薄膜至少單面上,於未經由接著劑的情況下,利用乾式鍍敷法形成 底層金屬層,並在上述底層金屬層上利用乾式鍍敷法形成具有50nm~500nm之厚度,且皆無直徑超過30μm的針孔,且直徑5μm以上且30μm以下的針孔係每1平方公尺45000個以下之銅薄膜層者,其特徵為,對上述絕緣體薄膜的表面在壓力0.8Pa~4.0Pa的惰性環境下,施行利用對電漿電極的配對放電電極間施加2~100秒鐘的電漿放電之表面處理並使表面的寡聚物量在70%以下後,形成底層金屬層。 A method for producing a two-layer flexible substrate is formed on at least one surface of an insulator film by dry plating without passing through an adhesive a bottom metal layer, and a pinhole having a thickness of 50 nm to 500 nm and having a diameter of more than 30 μm is formed by dry plating on the underlying metal layer, and a pinhole system having a diameter of 5 μm or more and 30 μm or less is 45,000 per square meter. The following copper film layer is characterized in that the surface of the insulator film is subjected to a plasma of 2 to 100 seconds between the paired discharge electrodes of the plasma electrode under an inert atmosphere of a pressure of 0.8 Pa to 4.0 Pa. After the surface treatment of the discharge and the amount of the oligomer on the surface is 70% or less, an underlying metal layer is formed. 如申請專利範圍第10項之2層可撓性基板之製造方法,其中,上述利用電漿放電的表面處理,係對電漿電極的放電電極間施加1500V~3000V直流電壓。 The method for producing a two-layer flexible substrate according to claim 10, wherein the surface treatment by the plasma discharge applies a direct current voltage of 1500 V to 3000 V between the discharge electrodes of the plasma electrode. 如申請專利範圍第10項之2層可撓性基板之製造方法,其中,上述利用電漿放電的表面處理,係對電漿電極的放電電極間施加800V~2000V高頻電壓。 A method of producing a two-layer flexible substrate according to claim 10, wherein the surface treatment by the plasma discharge applies a high-frequency voltage of 800 V to 2000 V between discharge electrodes of the plasma electrode. 一種2層可撓性基板之製造方法,係申請專利範圍第7項之2層可撓性基板之製造方法,係在絕緣體薄膜至少單面上,於未經由接著劑的情況下,利用乾式鍍敷法形成底層金屬層,並在上述底層金屬層上利用乾式鍍敷法形成銅薄膜層者,其特徵為,對上述絕緣體薄膜的表面在壓力0.8Pa~4.0Pa的氮環境下,施行利用對電漿電極的配對放電電極間施加1500V~3000V直流電壓2~100秒鐘而產生的電漿之表面處 理後,形成底層金屬層。 A method for producing a two-layer flexible substrate, which is a method for producing a two-layer flexible substrate according to claim 7 of the invention, which is characterized in that at least one surface of the insulating film is used, and dry plating is used without passing through an adhesive. Forming the underlying metal layer and forming a copper thin film layer by dry plating on the underlying metal layer, wherein the surface of the insulating film is subjected to a nitrogen atmosphere at a pressure of 0.8 Pa to 4.0 Pa. The surface of the plasma generated by applying a 1500V~3000V DC voltage between the paired discharge electrodes of the plasma electrode for 2 to 100 seconds After the treatment, an underlying metal layer is formed. 一種2層可撓性基板之製造方法,係申請專利範圍第9項之2層可撓性基板之製造方法,係在絕緣體薄膜至少單面上,於未經由接著劑的情況下,利用乾式鍍敷法形成底層金屬層,並在上述底層金屬層上利用乾式鍍敷法形成銅薄膜層者,其特徵為,對上述絕緣體薄膜的表面在壓力0.8Pa~4.0Pa的氮環境下,施行利用對電漿電極的配對放電電極間施加800V~2000V高頻電壓2~100秒鐘而產生的電漿之表面處理後,形成底層金屬層。 A method for producing a two-layer flexible substrate, which is a method for producing a two-layer flexible substrate according to claim 9 of the invention, which is characterized in that at least one surface of the insulating film is used, and dry plating is used without passing through an adhesive. Forming the underlying metal layer and forming a copper thin film layer by dry plating on the underlying metal layer, wherein the surface of the insulating film is subjected to a nitrogen atmosphere at a pressure of 0.8 Pa to 4.0 Pa. After the surface treatment of the plasma generated by applying a high-frequency voltage of 800V to 2000V for 2 to 100 seconds between the paired discharge electrodes of the plasma electrode, an underlying metal layer is formed. 如申請專利範圍第10至12項中任一項之2層可撓性基板之製造方法,其中,上述乾式鍍敷法係真空蒸鍍法、濺鍍法、及離子鍍覆法中之任一者。 The method for producing a two-layer flexible substrate according to any one of claims 10 to 12, wherein the dry plating method is any one of a vacuum vapor deposition method, a sputtering method, and an ion plating method. By. 如申請專利範圍第10至12項中任一項之2層可撓性基板之製造方法,其中,上述絕緣體薄膜係從聚醯亞胺系薄膜、聚醯胺系薄膜、聚酯系薄膜、聚四氟乙烯系薄膜、聚苯硫醚系薄膜、聚萘二甲酸乙二酯系薄膜、液晶聚合物系薄膜中選擇的樹脂薄膜。 The method for producing a two-layer flexible substrate according to any one of claims 10 to 12, wherein the insulator film is a polyimide film, a polyamide film, a polyester film, or a poly A resin film selected from the group consisting of a tetrafluoroethylene film, a polyphenylene sulfide film, a polyethylene naphthalate film, and a liquid crystal polymer film.
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TWI568865B (en) * 2013-10-23 2017-02-01 Sumitomo Metal Mining Co Layer 2 flexible wiring substrate and manufacturing method thereof, and two-layer flexible wiring board and manufacturing method thereof
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