TWI506827B - 發光二極體 - Google Patents

發光二極體 Download PDF

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TWI506827B
TWI506827B TW102113758A TW102113758A TWI506827B TW I506827 B TWI506827 B TW I506827B TW 102113758 A TW102113758 A TW 102113758A TW 102113758 A TW102113758 A TW 102113758A TW I506827 B TWI506827 B TW I506827B
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electrode
emitting diode
light
wire
zener diode
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TW102113758A
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TW201442299A (zh
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Hou Te Lin
Yau Tzu Jang
Chao Hsiung Chang
Pin Chuan Chen
Lung Hsin Chen
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Advanced Optoelectronic Tech
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/483Containers
    • H01L33/486Containers adapted for surface mounting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0033Processes relating to semiconductor body packages

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Led Device Packages (AREA)

Description

發光二極體
本發明涉及一種發光元件,尤其係一種發光二極體。
LED(Light-emitting diode,發光二極體)產業係近幾年最受矚目的產業之一,發展至今,LED產品已具有節能、省電、高效率、反應時間快、壽命週期時間長、且不含汞、具有環保效益等優點,因此被認為係新世代綠色節能照明的最佳光源。通常情況下,為避免發光二極體受到靜電脈衝放電的破壞,在發光二極體內會配置一齊納二極體以解決該問題。
通常使用的齊納二極體均為垂直元件,其需要利用固晶膠將其固定在發光二極體的金屬電極上。然而,隨著發光二極體的尺寸的變小,用以固定發光二極體晶片以及齊納二極體的區域也隨之減小。在利用固晶膠將齊納二極體固定於電極上時,固晶膠常常係先點於電極上,然後將齊納二極體按壓於固晶膠上使其固定。然而,固晶膠在受壓力後會變形,然後向周圍溢出,覆蓋更多電極上的面積,減小了可供發光二極體晶片打線的電極面積,導致制程上的打線障礙。
有鑒於此,有必要提供一種可以避免上述問題的發光二極體。
一種發光二極體,包括第一電極、第二電極、發光二極體晶片以 及齊納二極體,該發光二極體晶片設置於該第一電極上並分別於第一電極和第二電極電連接,該齊納二極體設置於該第二電極上,且發光二極體晶片與齊納二極體反向並聯,該第二電極的第一表面包含固晶部、打線部以及引流部,該齊納二極體藉由固晶膠固定於該固晶部,該引流部設置於該固晶部與打線部之間以使固晶膠與打線部隔離開,該發光二極體晶片藉由導線電連接該打線部以與該第二電極形成電連接。
由於該第二電極的第一表面的引流部設置於該固晶部與打線部之間,當該齊納二極體藉由固晶膠設置於該固晶部時,藉由引流部對固晶膠的阻擋,使得固晶膠在壓力作用下不會蔓延至打線部,從而避免因固晶膠的蔓延而導致可供發光二極體晶片打線連接的打線部面積減小的狀況,使得該發光二極體晶片可藉由導線順利地電連接該打線部。
10‧‧‧基板
21‧‧‧第一電極
210、220‧‧‧第一表面
22‧‧‧第二電極
221、221a‧‧‧引流部
222‧‧‧打線區
223‧‧‧固晶區
30‧‧‧反射杯
40‧‧‧發光二極體晶片
50‧‧‧齊納二極體
60‧‧‧導線
70‧‧‧封裝層
80‧‧‧固晶膠
100、100a‧‧‧發光二極體
圖1係本發明第一實施例的發光二極體的切面示意圖。
圖2係本發明第一實施例的發光二極體的俯視示意圖。
圖3係本發明第二實施例的發光二極體的切面示意圖。
以下參照圖示,對本發明的發光二極體晶粒及發光二極體晶粒的製造方法進行進一步的說明。
圖1-2示出了本發明第一實施例的發光二極體100的示意圖。為避免線條過多可能導致的視圖混亂,圖2中反射杯30中的部件以虛線描繪。該發光二極體100包括基板10以及嵌設於該基板10中的 第一電極21以及第二電極22。該基板10由電磁相容性(EMC/Electrical Magnetic Compatibility)材料、尼龍PPA(Polyphthalamide)材料、或片狀模塑材料(SMC/Sheet Molding Compound)製成。該第一電極21與該第二電極22優選為金屬電極。
該第一電極21具有一第一表面210,該第二電極22具有一第一表面220。該第一電極21的第一表面210與該第二電極22的第一表面220在同一水平面上。在圖1中,該第一電極21的第一表面210以及該第二電極22的第一表面220分別為第一電極21、第二電極22的上表面。該第一電極21的第一表面210的面積大於該第二電極22的第一表面220的面積。該基板10包括一位於該第一電極21的第一表面210與第二電極22的第一表面220上、並環繞第一電極21和第二電極22的基板上部,本實施例中,將該基板上部定義為反射杯30。在該反射杯30內,一發光二極體晶片40設置於該第一電極21的第一表面210上,一齊納二極體50設置於該第二電極22的第一表面220上。該齊納二極體50與該發光二極體晶片40反向並聯,避免發光二極體晶片40受到靜電脈衝放電的破壞。該反射杯30圍繞該發光二極體晶片40以及齊納二極體50。該發光二極體晶片40藉由導線60分別電連接至該第一電極21的第一表面210與第二電極22的第一表面220。該發光二極體100還包括覆蓋該發光二極體晶片40以及齊納二極體50的封裝層70。可以理解地,該反射杯30不限定於必須由該基板10的上部構成,也可以係與基板10分離製造而後續組裝至一起的兩個不同元件。該封裝層70可包含螢光轉換物質或/及擴散粉。
該第二電極22的第一表面220包括固晶部223、打線部222以及引流部221。該引流部221設置於該固晶部223與該打線部222之間。該齊納二極體50藉由固晶膠80設置於該固晶部223上。該發光二極體晶片40藉由導線60與該打線部222連接。在本實施例中,該引流部221為一從該第二電極22的第一表面220向下凹陷的溝槽。該固晶部223與該打線部222在同一水平面上。該引流部221深度小於該第二電極22的厚度。優選地,該引流部221的深度接近於該第二電極22的厚度但不貫穿該第二電極22。例如,當該第二電極22只有0.2mm(毫米)時,該引流部221的深度的取值在小於0.2mm的範圍內。當該第二電極22有0.25mm時,該引流部221的深度的取值在小於0.25mm的範圍內。
當齊納二極體50裝設於該第二基板22上時,用於固定該齊納二極體50的固晶膠80在被齊納二極體50的擠壓之後將會變形溢出並覆蓋該固晶部223更多的區域。由於該引流部221設置於該固晶部223與打線部222之間以使固晶膠80與打線部222隔離開,使得固晶膠80與打線部222不相接觸。當該固晶膠80變形溢出至引流部221的位置處時,該固晶膠80流入該引流部221內。由於該引流部221具有較深的深度,因此可以完全容納溢出的固晶膠80,使得溢出的固晶膠80無法到達打線部222而將打線部222覆蓋。
由於該引流部221的阻隔,該打線部222可避免被該固晶膠80覆蓋。該發光二極體晶片40可以順利地藉由打線與該面積較小的第二電極22的第一表面220連接。此外,由於該第一電極21的第一表面210的面積相對較大,則該發光二極體晶片40可盡可能地設置於該反射杯30的中間部分,以至於從該發光二極體晶片40出射的 光線在各個方向上與反射杯30之間的光程大致相等,使各個方向上的出光更為均勻。
可以理解地,該固晶部223與該引流部221也可都自該第二電極22的第一表面220凹陷,此時該固晶部223與引流部221處於比打線部222較低的水平面上。則當齊納二極體50藉由固晶膠80固定於該固晶部223上時,即使該固晶膠80變形溢出也不至於蔓延至遮蓋該打線部222。
請再參閱圖3,示出了本發明第二實施例的發光二極體100a的示意圖。該發光二極體100a與第一實施例中的發光二極體100大致相同,其不同之處在於,該發光二極體100a的引流部220a為一凸起。當用以固定該齊納二極體50的固晶膠80變形溢出至引流部221a的位置處時,該引流部220a可有效阻擋固晶膠80的繼續蔓延,避免了變形溢出的固晶膠80覆蓋打線區222的問題。
10‧‧‧基板
21‧‧‧第一電極
22‧‧‧第二電極
221‧‧‧引流部
222‧‧‧打線區
223‧‧‧固晶區
30‧‧‧反射杯
40‧‧‧發光二極體晶片
50‧‧‧齊納二極體
60‧‧‧導線
70‧‧‧封裝層
80‧‧‧固晶膠
100‧‧‧發光二極體

Claims (6)

  1. 一種發光二極體,包括第一電極、第二電極、發光二極體晶片以及齊納二極體,該發光二極體晶片設置於該第一電極上並分別於第一電極和第二電極電連接,該齊納二極體設置於該第二電極上,且發光二極體晶片與齊納二極體反向並聯,其改良在於,該第二電極的第一表面包含固晶部、打線部以及引流部,該齊納二極體藉由固晶膠固定於該固晶部,該引流部設置於該固晶部與打線部之間以使固晶膠與打線部隔離開,該發光二極體晶片藉由導線電連接該打線部以與該第二電極形成電連接,其中,該固晶部與該打線部位於同一水平面上,且該引流部為自該同一水平面延伸的凸起。
  2. 如申請專利範圍第1項所述之發光二極體,其中,該齊納二極體藉由固晶膠電連接該第二電極,且該齊納二極體藉由導線電連接該第一電極。
  3. 如申請專利範圍第1項所述之發光二極體,其中,該發光二極體晶片藉由導線電連接該第一電極。
  4. 如申請專利範圍第1項所述之發光二極體,其中,該第一電極具有一第一表面,該第一電極的第一表面與該第二電極的第一表面處於同一水平面,該第一電極的第一表面的面積大於該第二電極的第一表面的面積。
  5. 如申請專利範圍第1項所述之發光二極體,其中,還包括基板,該第一電極與該第二電極嵌設於該基板中,該第一電極與該第二電極的第一表面上還設有反射杯,該反射杯圍繞該發光二極體晶片以及齊納二極體。
  6. 如申請專利範圍第5項所述之發光二極體,其中,還包括覆蓋該發光二極體晶片以及齊納二極體的封裝層。
TW102113758A 2013-04-16 2013-04-18 發光二極體 TWI506827B (zh)

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