TWI497309B - Data transmitting apparatus and method - Google Patents
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一種資料傳輸技術，特別有關於一種適於伺服器的資料傳輸裝置及方法。A data transmission technology, in particular, relates to a data transmission device and method suitable for a server.
一般來說，刀鋒伺服器是有許多子系統所組成。在這些子系統的電路板中，會各自配置有複雜可程式邏輯元件(Complex Programmable Logic Device)，並且這些複雜可程式邏輯元件之間會有資料互傳的需求。因此，這些複雜可程式邏輯元件之間通常會有一主裝置(Master)與從裝置(Slave)的架構，且以串列資料匯流排(Shifty Bus)進行資料的傳輸。In general, the blade server consists of many subsystems. In the boards of these subsystems, Complex Programmable Logic Devices are configured, and there is a need for data transfer between these complex programmable logic elements. Therefore, there is usually a master and slave architecture between these complex programmable logic elements, and the data is transmitted by a serial data bus (Shifty Bus).
並且，主裝置與從裝置之間之資料傳輸的方式例如為：從裝置會透過一資料輸出(Data Out)接腳輸出資料至主裝置，且透過一資料接收(Data in)接腳來自主裝置的資料。然而，前述的資料輸出接腳僅能用來輸出資料，而資料輸入接腳僅能用來接收資料，如此在進行雙向資料傳輸時占用了兩個實體的資料傳輸接腳，而造成資源浪費。因此，刀鋒伺服器之資料傳輸仍有改善的空間。Moreover, the data transmission between the master device and the slave device is, for example, the slave device outputs the data to the master device through a data out (Data Out) pin, and the data in the data device receives the data in the master device. data of. However, the aforementioned data output pin can only be used to output data, and the data input pin can only be used to receive data, so that two-way data transmission pins are occupied during bidirectional data transmission, which causes waste of resources. Therefore, there is still room for improvement in the data transmission of the blade server.
本發明在於提供一種資料傳輸裝置及方法，藉以使得資料傳輸裝置可空出多餘的接腳，以作為其他資料傳輸的用途，進而提升資料傳輸裝置的使用效率並節省成本。The present invention provides a data transmission device and method, so that the data transmission device can free excess pins for use as other data transmission, thereby improving the efficiency of use of the data transmission device and saving costs.
本發明提供一種資料傳輸裝置，適於一伺服器。此資料傳 輸裝置包括模式偵測單元、資料傳輸單元與控制單元。模式偵測單元用以透過內部整合電路耦接一電路板，以接收電路板所產生的致能信號，並依據致能信號，產生模式信號。資料傳輸單元具有至少二接腳，此至少二接腳用以透過內部整合電路耦接至電路板。控制單元耦接模式偵測單元與資料傳輸單元，用以接收並依據模式信號，而選擇分時多功模式，並將至少二接腳其中之一設定為資料傳送/接收接腳，且將多筆第一資料進行整合，以透過資料傳送/接收接腳傳送第一資料，以及接收多筆第二資料。The invention provides a data transmission device suitable for a server. This information The transmission device includes a mode detection unit, a data transmission unit and a control unit. The mode detecting unit is configured to couple a circuit board through the internal integrated circuit to receive the enable signal generated by the circuit board, and generate a mode signal according to the enable signal. The data transmission unit has at least two pins, and the at least two pins are coupled to the circuit board through an internal integrated circuit. The control unit is coupled to the mode detecting unit and the data transmission unit for receiving and selecting the time sharing multi-function mode according to the mode signal, and setting one of the at least two pins as the data transmission/reception pin, and the The first data is integrated to transmit the first data through the data transmission/receiving pin and to receive the plurality of second data.
在一實施例中，前述控制單元更依據偵測信號，而選擇同 步多功模式，並將至少二接腳其中之一設定為資料傳送接腳，將至少二接腳其中另一設定為資料接收接腳，並透過資料傳送接腳傳送第一資料，以及透過資料接收接腳接收第二資料。In an embodiment, the foregoing control unit selects the same according to the detection signal. Step multi-function mode, and set one of at least two pins as a data transmission pin, set at least one of the other two pins as a data receiving pin, and transmit the first data through the data transmission pin, and through the data The receiving pin receives the second data.
在一實施例中，前述資料傳輸裝置更包括信號偵測單元與 信號設定單元。信號偵測單元用以接收時脈信號，並依據時脈信號，以產生偵測信號。信號設定單元耦接偵測單元與控制單元，用以接收偵測信號與系統時脈信號，並依據偵測信號，以產生對應時脈信號的同步信號或一系統時脈信號，且同步信號或系統時脈信號會傳送至控制單元，使控制單元依據同步信號或系統時脈信號，傳送第一資料與接收第二資料。In an embodiment, the foregoing data transmission device further includes a signal detecting unit and Signal setting unit. The signal detecting unit is configured to receive the clock signal and generate a detection signal according to the clock signal. The signal setting unit is coupled to the detecting unit and the control unit for receiving the detection signal and the system clock signal, and generating a synchronization signal or a system clock signal corresponding to the clock signal according to the detection signal, and the synchronization signal or The system clock signal is transmitted to the control unit, so that the control unit transmits the first data and the second data according to the synchronization signal or the system clock signal.
在一實施例中，前述資料傳輸裝置為一複雜可程式邏輯元件。In one embodiment, the data transfer device is a complex programmable logic element.
本發明提供一種資料傳輸方法，適於伺服器，此伺服器包括一資料傳輸裝置，且此資料傳輸裝置具有至少二接腳，此至少二接腳透 過一內部整合電路耦接至一電路板。資料傳輸方法包括下列步驟。接收致能信號，其中致能信號由電路板產生。依據致能信號，產生模式信號。接收並依據偵測信號，選擇分時多功模式，並將至少二接腳其中之一設定為資料傳送/接收接腳，且將多筆第一資料進行整合，以透過資料傳送/接收接腳傳送第一資料，以及接收多筆第二資料。The present invention provides a data transmission method, which is suitable for a server, the server includes a data transmission device, and the data transmission device has at least two pins, and the at least two pins are transparent. An internal integrated circuit is coupled to a circuit board. The data transmission method includes the following steps. The enable signal is received, wherein the enable signal is generated by the circuit board. A mode signal is generated based on the enable signal. Receiving and selecting the time-sharing multi-function mode according to the detection signal, and setting one of the at least two pins as the data transmission/reception pin, and integrating the plurality of first data to transmit the data receiving/receiving pin Send the first data and receive multiple second data.
在一實施例中，前述資料傳輸方法更包括下列步驟。依據 模式信號，選擇同步多功模式，並將至少二接腳其中之一設定為資料傳送接腳，將至少二接腳其中另一設定為資料接收接腳，並透過資料傳送接腳傳送第一資料，以及透過資料接收接腳接收第二資料。In an embodiment, the foregoing data transmission method further includes the following steps. in accordance with The mode signal selects the synchronous multi-function mode, and one of the at least two pins is set as the data transmission pin, and the other of the at least two pins is set as the data receiving pin, and the first data is transmitted through the data transmission pin. And receiving the second data through the data receiving pin.
在一實施例中，前述資料傳輸方法更包括下列步驟。接收時脈信號。依據時脈信號，以產生偵測信號。接收偵測信號與系統時脈信號。依據偵測信號，產生對應時脈信號的同步信號或輸出系統時脈信號。依據同步信號或系統時脈信號，傳送第一資料與接收第二資料。In an embodiment, the foregoing data transmission method further includes the following steps. Receive clock signal. According to the clock signal, a detection signal is generated. Receive detection signals and system clock signals. According to the detection signal, a synchronization signal corresponding to the clock signal or an output system clock signal is generated. Transmitting the first data and receiving the second data according to the synchronization signal or the system clock signal.
本發明所揭露之資料傳輸裝置及方法，藉由模式偵測單元依據致能信號，而對應產生模式信號，再藉由控制單元依據模式信號，而選擇分時多功模式，並將至少二接腳其中之一設定為資料傳送/接收接腳，且將多筆第一資料進行整合，以透過資料傳送/接收接腳傳送第一資料，以及接收多筆第二資料。如此一來，使得資料傳輸裝置可空出多餘的接腳，以作為其他資料傳輸的用途，進而提升資料傳輸裝置的使用效率並節省成本。According to the data transmission device and method of the present invention, the mode detection unit generates a mode signal according to the enable signal, and then selects the time division multi-function mode according to the mode signal by the control unit, and at least two One of the feet is set as a data transmission/reception pin, and a plurality of first data are integrated to transmit the first data through the data transmission/reception pin and receive the plurality of second data. In this way, the data transmission device can free the extra pins for use as other data transmission, thereby improving the efficiency of the data transmission device and saving costs.
有關本發明的特徵與實作，茲配合圖式作實施例詳細說明 如下。The features and implementations of the present invention are described in detail in conjunction with the drawings. as follows.
100‧‧‧伺服器100‧‧‧Server
110、160‧‧‧電路板110, 160‧‧‧ circuit board
120‧‧‧資料傳輸裝置120‧‧‧Data transmission device
130‧‧‧模式偵測單元130‧‧‧Mode Detection Unit
140‧‧‧資料傳輸單元140‧‧‧Data Transfer Unit
141、142‧‧‧接腳141, 142‧‧‧ feet
150‧‧‧控制單元150‧‧‧Control unit
170‧‧‧信號偵測單元170‧‧‧Signal Detection Unit
180‧‧‧信號設定單元180‧‧‧Signal setting unit
EN‧‧‧致能信號EN‧‧‧Enable signal
SM‧‧‧模式信號SM‧‧‧ mode signal
CLK‧‧‧時脈信號CLK‧‧‧ clock signal
DS‧‧‧偵測信號DS‧‧‧Detection signal
SCLK‧‧‧系統時脈信號SCLK‧‧‧ system clock signal
第1圖為本發明之伺服器的部分示意圖。Figure 1 is a partial schematic view of the server of the present invention.
第2圖為本發明之資料傳輸方法的流程圖。Figure 2 is a flow chart of the data transmission method of the present invention.
第3圖為本發明之另一資料傳輸方法的流程圖。Figure 3 is a flow chart of another data transmission method of the present invention.
請參考「第1圖」所示，其為本發明之伺服器的示意圖。本實施例之伺服器100例如為刀鋒伺服器，且例如用於內部整合電路(Inter-Integrated Circuit,I2C)通道。伺服器100包括電路板110及160，且電路板110及160透過內部整合電路耦接。其中，電路板110與160之間例如具有主從關係，電路板160例如為主(Master)裝置，電路板110例如為從(Salve)裝置，並且電路板110與160之間可進行資料的傳輸。另外，本實施例之伺服器100僅繪示出2個電路板110及160，但本發明不限於此，電路板的數量亦可為3個或3個以上。Please refer to "Figure 1", which is a schematic diagram of the server of the present invention. The server 100 of this embodiment is, for example, a blade server and is used, for example, for an Inter-Integrated Circuit (I2C) channel. The server 100 includes circuit boards 110 and 160, and the circuit boards 110 and 160 are coupled through internal integrated circuits. Wherein, the circuit boards 110 and 160 have a master-slave relationship, for example, the circuit board 160 is, for example, a master device, and the circuit board 110 is, for example, a slave device, and data can be transmitted between the circuit boards 110 and 160. . In addition, the server 100 of the present embodiment only shows two circuit boards 110 and 160, but the present invention is not limited thereto, and the number of circuit boards may be three or more.
前述電路板110例如包括本發明之資料傳輸裝置120。資料傳輸裝置120包括模式偵測單元130、資料傳輸單元140與控制單元150。模式偵測單元130例如透過內部整合電路耦接至電路板160，用以接收電路板160所產生的致能信號EN，並依據致能信號EN，產生模式信號SM。舉例來說，當致能信號EN例如為高邏輯準位時，則模式信號SM也例如為高邏輯準位；當致能信號EN例如為低邏輯準位時，則模式信號也例如為低邏輯準位。在本實施例中，模式偵測單元130所接收之致能信號EN例如為電 路板160上之一控制元件所產生。The aforementioned circuit board 110 includes, for example, the data transmission device 120 of the present invention. The data transmission device 120 includes a mode detection unit 130, a data transmission unit 140, and a control unit 150. The mode detecting unit 130 is coupled to the circuit board 160 through an internal integrated circuit, for example, to receive the enable signal EN generated by the circuit board 160, and generate a mode signal SM according to the enable signal EN. For example, when the enable signal EN is, for example, a high logic level, the mode signal SM is also, for example, a high logic level; when the enable signal EN is, for example, a low logic level, the mode signal is also low logic, for example. Level. In this embodiment, the enable signal EN received by the mode detecting unit 130 is, for example, an electric One of the control elements on the road plate 160 is produced.
資料傳輸單元140具有二接腳141、142，且此二接腳141、 142亦透過內部整合電路耦接至電路板160。為了方便說明，資料傳輸單元140僅以二個接腳141、142為例，但本實施例不限於此，資料傳輸單元140所具有的接腳亦可為3個或3個以上。The data transmission unit 140 has two pins 141, 142, and the two pins 141, The 142 is also coupled to the circuit board 160 through an internal integrated circuit. For convenience of description, the data transmission unit 140 is exemplified by only two pins 141 and 142. However, the embodiment is not limited thereto, and the data transmission unit 140 may have three or more pins.
控制單元150耦接模式偵測單元130與資料傳輸單元140。 在依實施例中，控制單元150會接收並依據模式信號SM，而選擇一分時多功模式，並將二接腳141、142其中之一設定為資料傳送/接收接腳，且將多筆第一資料進行整合，以透過資料傳送/接收接腳傳送第一資料，以及接收多筆第二資料。The control unit 150 is coupled to the mode detecting unit 130 and the data transmission unit 140. In an embodiment, the control unit 150 receives and selects a time-sharing multi-function mode according to the mode signal SM, and sets one of the two pins 141, 142 as a data transmission/reception pin, and multiple pens. The first data is integrated to transmit the first data through the data transmission/receiving pin and to receive the plurality of second data.
在另一實施例中，控制單元150更接收並依據模式信號 SM，而選擇同步多功模式，並將二接腳141、142其中之一設定為資料傳送接腳，將二接腳141、142其中另一設定為資料接收接腳，並透過資料傳送接腳傳送第一資料，以及透過資料接收接腳接收第二資料。In another embodiment, the control unit 150 further receives and according to the mode signal. SM, and select the synchronous multi-function mode, and one of the two pins 141, 142 is set as the data transfer pin, and the other of the two pins 141, 142 is set as the data receiving pin, and through the data transfer pin The first data is transmitted, and the second data is received through the data receiving pin.
舉例來說，假設模式信號SM為高邏輯準位，則控制單元 150會依據此高邏輯準位的模式信號SM，而例如將接腳141設定為資料傳送/接收接腳。接著，控制單元150會將需要輸出的第一資料進行整合，以便透過資料傳送/接收接腳(即接腳141)傳送第一資料至電路板160，並且透過資料傳送/接收接腳(即接腳141)接收由電路板160所輸出的多個第二資料。如此一來，本實施例之資料傳輸裝置120空出一接腳，即接腳142，因此接腳142便可作為其他資料傳輸的用途，進而提升資料傳輸裝置120的使用效率並節省成本。For example, if the mode signal SM is at a high logic level, the control unit 150 will be based on this high logic level mode signal SM, for example, pin 141 is set as a data transmission/reception pin. Next, the control unit 150 integrates the first data that needs to be output, so as to transmit the first data to the circuit board 160 through the data transmission/reception pin (ie, the pin 141), and through the data transmission/reception pin (ie, The foot 141) receives the plurality of second materials output by the circuit board 160. In this way, the data transmission device 120 of the embodiment vacates a pin, that is, the pin 142. Therefore, the pin 142 can be used for other data transmission, thereby improving the use efficiency of the data transmission device 120 and saving cost.
另外，假設信號模式SM為低邏輯準位，則控制單元150 會依據此低邏輯準位的模式信號SM，而例如將接腳141(即二接腳141、142其中之一)設定為資料傳送接腳，以及例如接腳142(即二接腳141、142其中另一)設定為資料接收接腳。接著，控制單元150便會透過資料傳送接腳(即接腳141)傳送第一資料至電路板160，並且透過資料接收接腳(即接腳142)接收由電路板160所輸出的多個第二資料。In addition, if the signal mode SM is at a low logic level, the control unit 150 According to the low logic level mode signal SM, for example, the pin 141 (ie, one of the two pins 141, 142) is set as a data transfer pin, and for example, the pin 142 (ie, the two pins 141, 142) The other one is set as the data receiving pin. Then, the control unit 150 transmits the first data to the circuit board 160 through the data transfer pin (ie, the pin 141), and receives the plurality of outputs output by the circuit board 160 through the data receiving pin (ie, the pin 142). Two materials.
進一步來說，本實施例之資料傳輸裝置120更包括信號偵 測單元170與信號設定單元180。信號偵測單元170用以接收時脈信號CLK，並依據時脈信號CLK，以產生偵測信號DS。信號設定單元180耦接偵測單元170與控制單元150，用以接收偵測信DS號與系統時脈信號SCLK，並依據偵測信號DS，以產生對應時脈信號CLK的同步信號或系統時脈信號SCLK，且同步信號或系統時脈信號SCLK會傳送至控制單元150，使控制單元150依據同步信號或系統時脈信號SCLK，傳送第一資料與接收第二資料。Further, the data transmission device 120 of the embodiment further includes a signal detection The measuring unit 170 and the signal setting unit 180. The signal detecting unit 170 is configured to receive the clock signal CLK and generate the detection signal DS according to the clock signal CLK. The signal setting unit 180 is coupled to the detecting unit 170 and the control unit 150 for receiving the detecting signal DS number and the system clock signal SCLK, and according to the detecting signal DS, to generate a synchronization signal or system time corresponding to the clock signal CLK. The pulse signal SCLK, and the synchronization signal or system clock signal SCLK is transmitted to the control unit 150, so that the control unit 150 transmits the first data and the second data according to the synchronization signal or the system clock signal SCLK.
舉例來說，在一實施例中，當電路板160產生時脈信號CLK 時，信號偵測單元170會偵測到前述時脈信號CLK。接著，信號偵測單元170便據此產生例如高邏輯準位的偵測信號DS，並傳送至信號設定單元180。之後，信號設定單元180便依據此高邏輯準位的偵測信號DS，而產生對應時脈信號CLK的同步信號至控制單元150，使得控制單元150依據對應的同步信號，傳送第一資料與接收第二資料。For example, in an embodiment, when the circuit board 160 generates a clock signal CLK The signal detecting unit 170 detects the foregoing clock signal CLK. Then, the signal detecting unit 170 generates a detection signal DS such as a high logic level, and transmits it to the signal setting unit 180. Then, the signal setting unit 180 generates a synchronization signal corresponding to the clock signal CLK to the control unit 150 according to the detection signal DS of the high logic level, so that the control unit 150 transmits the first data and the reception according to the corresponding synchronization signal. Second information.
在另一實施例中，當電路板160未產生時脈信號CLK時，信號偵測單元170不會偵測到前述時脈信號CSK。接著，信號偵測單元170 便此產生例如低邏輯準位的偵測信號DS，並傳送至信號設定單元180。之後，信號設定單元180便依據此低邏輯準位的偵測信號DS，而將其所接收的系統時脈信號SCLK輸出至控制單元150，使得控制單元150依據系統時脈信號SCLK，傳送第一資料與第二資料。In another embodiment, when the circuit board 160 does not generate the clock signal CLK, the signal detecting unit 170 does not detect the foregoing clock signal CSK. Next, the signal detecting unit 170 Thus, a detection signal DS such as a low logic level is generated and transmitted to the signal setting unit 180. Then, the signal setting unit 180 outputs the received system clock signal SCLK to the control unit 150 according to the low logic level detection signal DS, so that the control unit 150 transmits the first according to the system clock signal SCLK. Information and second information.
在本實施例中，前述資料傳輸裝置120例如為複雜可程式 邏輯元件(Complex Programmable Logic Device,CPLD)。並且，模式偵測單元130、資料傳輸單元140、控制單元150、信號偵測單元170與信號設定單元180可整合於複雜可程式邏輯元件中。In this embodiment, the data transmission device 120 is, for example, a complex program. Complex Programmable Logic Device (CPLD). Moreover, the mode detecting unit 130, the data transmission unit 140, the control unit 150, the signal detecting unit 170, and the signal setting unit 180 can be integrated into the complex programmable logic element.
藉由前述實施例的說明，可以歸納出一種資料傳輸方法。 請參考「第2圖」所示，其為本發明之資料傳輸方法的流程圖。本實施例之資料傳輸方法適於伺服器，例如「第1圖」所示。並且，此伺服器包括資料傳輸裝置，且此資料傳輸裝置具有二接腳，而此二接腳例如透過內部整合電路耦接至電路板。在步驟S210中，接收致能信號，其中此致能信號由前述電路板產生。在步驟S220中，依據致能信號，產生模式信號。在步驟S230中，接收並依據偵測信號，選擇分時多功模式，並將至少二接腳其中之一設定為資料傳送/接收接腳，且將多筆第一資料進行整合，以透過資料傳送/接收接腳傳送第一資料，以及接收多筆第二資料。A method of data transmission can be summarized by the description of the foregoing embodiments. Please refer to FIG. 2, which is a flowchart of the data transmission method of the present invention. The data transmission method of this embodiment is suitable for a server, for example, as shown in "FIG. 1". Moreover, the server includes a data transmission device, and the data transmission device has two pins, and the two pins are coupled to the circuit board through, for example, an internal integrated circuit. In step S210, an enable signal is received, wherein the enable signal is generated by the aforementioned circuit board. In step S220, a mode signal is generated according to the enable signal. In step S230, receiving and selecting a time-sharing multi-function mode according to the detection signal, and setting one of the at least two pins as a data transmission/reception pin, and integrating the plurality of first data to transmit data The transmit/receive pin transmits the first data and receives a plurality of second data.
請參考「第3圖」所示，其為本發明之另一資料傳輸方法 的流程圖。在步驟S310中，接收致能信號。在步驟S320中，依據致能信號，產生模式信號。在步驟S330中，接收並依據偵測信號，選擇分時多功模式，並將至少二接腳其中之一設定為資料傳送/接收接腳，且將多筆第一資料進行整合，以透過資料傳送/接收接腳傳送第一資料，以及接收多筆第二資料。Please refer to "Figure 3", which is another data transmission method of the present invention. Flow chart. In step S310, an enable signal is received. In step S320, a mode signal is generated according to the enable signal. In step S330, receiving and selecting a time-sharing multi-function mode according to the detection signal, and setting one of the at least two pins as a data transmission/reception pin, and integrating the plurality of first data to transmit data The transmit/receive pin transmits the first data and receives a plurality of second data.
在步驟S340中，依據模式信號，選擇同步多功模式，並將 至少二接腳其中之一設定為資料傳送接腳，將至少二接腳其中另一設定為資料接收接腳，並透過資料傳送接腳傳送第一資料，以及透過資料接收接腳接收第二資料。In step S340, according to the mode signal, select the synchronous multi-function mode, and One of the at least two pins is configured as a data transmission pin, and at least one of the at least two pins is configured as a data receiving pin, and the first data is transmitted through the data transmission pin, and the second data is received through the data receiving pin. .
在步驟S350中，接收時脈信號。在步驟S360中，依據時脈信號，以產生偵測信號。在步驟S370中，接收偵測信號與系統時脈信號。在步驟S380中，依據偵測信號，產生對應時脈信號的同步信號或輸出系統時脈信號。在步驟S390中，依據同步信號或系統時脈信號，傳送第一資料與接收第二資料。In step S350, a clock signal is received. In step S360, a detection signal is generated according to the clock signal. In step S370, the detection signal and the system clock signal are received. In step S380, a synchronization signal corresponding to the clock signal or an output system clock signal is generated according to the detection signal. In step S390, the first data is transmitted and the second data is received according to the synchronization signal or the system clock signal.
本發明之實施例所提出的資料傳輸裝置及方法，其藉由模式偵測單元依據致能信號，而對應產生模式信號，再藉由控制單元依據模式信號，而選擇分時多功模式，並將至少二接腳其中之一設定為資料傳送/接收接腳，且將多筆第一資料進行整合，以透過資料傳送/接收接腳傳送第一資料，以及接收多筆第二資料。如此一來，使得資料傳輸裝置可空出多餘的接腳，以作為其他資料傳輸的用途，進而提升資料傳輸裝置的使用效率並節省成本。The data transmission device and method according to the embodiment of the present invention, according to the enable signal, the mode detection unit correspondingly generates the mode signal, and then the control unit selects the time-sharing multi-function mode according to the mode signal, and One of the at least two pins is set as a data transmission/reception pin, and a plurality of first data are integrated to transmit the first data through the data transmission/reception pin and receive the plurality of second data. In this way, the data transmission device can free the extra pins for use as other data transmission, thereby improving the efficiency of the data transmission device and saving costs.
雖然本發明以前述之實施例揭露如上，然其並非用以限定本發明，任何熟習相像技藝者，在不脫離本發明之精神和範圍內，當可作些許之更動與潤飾，因此本發明之專利保護範圍須視本說明書所附之申請專利範圍所界定者為準。While the present invention has been described above in the foregoing embodiments, it is not intended to limit the invention, and the invention may be modified and modified without departing from the spirit and scope of the invention. The scope of patent protection shall be subject to the definition of the scope of the patent application attached to this specification.
100‧‧‧伺服器100‧‧‧Server
110、160‧‧‧電路板110, 160‧‧‧ circuit board
120‧‧‧資料傳輸裝置120‧‧‧Data transmission device
130‧‧‧模式偵測單元130‧‧‧Mode Detection Unit
140‧‧‧資料傳輸單元140‧‧‧Data Transfer Unit
141、142‧‧‧接腳141, 142‧‧‧ feet
150‧‧‧控制單元150‧‧‧Control unit
170‧‧‧信號偵測單元170‧‧‧Signal Detection Unit
180‧‧‧信號設定單元180‧‧‧Signal setting unit
EN‧‧‧致能信號EN‧‧‧Enable signal
SM‧‧‧模式信號SM‧‧‧ mode signal
CLK‧‧‧時脈信號CLK‧‧‧ clock signal
DS‧‧‧偵測信號DS‧‧‧Detection signal
SCLK‧‧‧系統時脈信號SCLK‧‧‧ system clock signal
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| TWI497309B true TWI497309B (en) | 2015-08-21 |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW455876B (en) * | 1999-05-04 | 2001-09-21 | Samsung Electronics Co Ltd | Semiconductor memory device including programmable output pin determining unit and method of reading the same during test mode |
| TW200632664A (en) * | 2005-03-01 | 2006-09-16 | Benq Corp | An updating system for updating a firmware of a circuit module from an update module and related method |
| TW201033805A (en) * | 2009-03-13 | 2010-09-16 | Giga Byte Tech Co Ltd | Apparatus and method for monitoring server |
| US20110004748A1 (en) * | 2009-07-01 | 2011-01-06 | Carroll Robert T | Electrical circuitry for use in voltage controllers |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW455876B (en) * | 1999-05-04 | 2001-09-21 | Samsung Electronics Co Ltd | Semiconductor memory device including programmable output pin determining unit and method of reading the same during test mode |
| TW200632664A (en) * | 2005-03-01 | 2006-09-16 | Benq Corp | An updating system for updating a firmware of a circuit module from an update module and related method |
| TW201033805A (en) * | 2009-03-13 | 2010-09-16 | Giga Byte Tech Co Ltd | Apparatus and method for monitoring server |
| US20110004748A1 (en) * | 2009-07-01 | 2011-01-06 | Carroll Robert T | Electrical circuitry for use in voltage controllers |
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