TWI484313B - Reference voltage generating circuit and voltage adjusting device having negative charge protection mechanism of the same - Google Patents

Reference voltage generating circuit and voltage adjusting device having negative charge protection mechanism of the same Download PDF

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TWI484313B
TWI484313B TW102127982A TW102127982A TWI484313B TW I484313 B TWI484313 B TW I484313B TW 102127982 A TW102127982 A TW 102127982A TW 102127982 A TW102127982 A TW 102127982A TW I484313 B TWI484313 B TW I484313B
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reference voltage
voltage
adjusting
control
coupled
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TW102127982A
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TW201506572A (en
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Wenying Wen
Hungtse Chiang
Chingfu Chang
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Nuvoton Technology Corp
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Description

參考電壓產生電路及其具負電荷保護機制之電壓調整裝置Reference voltage generating circuit and voltage adjusting device with negative charge protection mechanism

本發明是有關於一種電路保護技術,且特別是有關於一種參考電壓產生電路及其具負電荷保護機制之電壓調整裝置。The present invention relates to a circuit protection technique, and more particularly to a reference voltage generating circuit and a voltage regulating device having a negative charge protection mechanism.

參考電壓產生電路可將系統電壓轉換為一個電路系統中,各模組所能接收並賴以運作的參考電壓。因此,如何產生穩定的參考電壓,以使各個電路模組在接收到參考電壓後進行正常的運作,對整個系統是否能發揮正常的功效是十分重要的課題。The reference voltage generation circuit converts the system voltage into a reference voltage that a module can receive and operate on. Therefore, how to generate a stable reference voltage so that each circuit module performs normal operation after receiving the reference voltage is an important issue for whether the entire system can perform normally.

在參考電壓產生電路中,可能有部份端點是為了對電壓進行微調或是量測之用,而需設置連接墊。連接墊容易產生天線聚集的效應而將負電荷導入電路中。當負電荷累積於部份元件中,將可能對元件 特性造成影響,進一步使電路無法正常運作。In the reference voltage generating circuit, some of the end points may be used for fine-tuning or measuring the voltage, and a connection pad is required. The connection pads are prone to the effect of antenna accumulation and introduce negative charges into the circuit. When negative charges accumulate in some components, it is possible to The characteristics cause an impact that further prevents the circuit from functioning properly.

因此,如何設計一個新的參考電壓產生電路及其具負電荷保護機制之電壓調整裝置,以解決上述的問題,乃為此一業界亟待解決的問題。Therefore, how to design a new reference voltage generating circuit and its voltage regulating device with a negative charge protection mechanism to solve the above problems is an urgent problem to be solved in the industry.

因此,本發明之一態樣是在提供一種具負電荷保護機制之電壓調整裝置,包含:電壓調整模組以及具反向二極體特性之整流元件。電壓調整模組耦接於參考電壓輸出端,且參考電壓輸出端耦接至後端電路,其中電壓調整模組具有複數控制輸入端,於接收到控制電壓時改變電壓調整模組之電阻值,俾對參考電壓輸出端輸出之參考電壓進行調整。整流元件耦接於參考電壓輸出端以及接地端,俾於輸入負電荷自電壓調整模組之控制輸入端傳送至參考電壓輸出端時,將輸入負電荷導入接地端。Therefore, an aspect of the present invention provides a voltage adjusting device having a negative charge protection mechanism, comprising: a voltage adjusting module and a rectifying element having reverse diode characteristics. The voltage adjustment module is coupled to the reference voltage output end, and the reference voltage output end is coupled to the back end circuit, wherein the voltage adjustment module has a plurality of control input ends, and the resistance value of the voltage adjustment module is changed when the control voltage is received.进行Adjust the reference voltage output from the reference voltage output. The rectifying component is coupled to the reference voltage output end and the ground end, and when the input negative charge is transmitted from the control input end of the voltage adjusting module to the reference voltage output end, the input negative electric charge is introduced to the ground end.

本發明之另一態樣是在提供一種具負電荷保護機制之電壓調整裝置,包含:電壓調整模組以及電荷緩衝元件。電壓調整模組耦接於參考電壓輸出端,且參考電壓輸出端耦接至後端電路,其中電壓調整模組具有複數控制輸入端,於接收到控制電壓時改變電壓調整模組之電阻值,俾對參考電壓輸出端輸出之參考電壓進行調整。電荷緩衝元件之第一端耦接於參考電壓輸出端,電荷緩衝元件之第二端耦接於後端電 路,俾於輸入負電荷自控制輸入端傳送至參考電壓輸出端時,延遲輸入負電荷傳送至後端電路之時間。Another aspect of the present invention provides a voltage regulating device having a negative charge protection mechanism, including: a voltage adjustment module and a charge buffering component. The voltage adjustment module is coupled to the reference voltage output end, and the reference voltage output end is coupled to the back end circuit, wherein the voltage adjustment module has a plurality of control input ends, and the resistance value of the voltage adjustment module is changed when the control voltage is received.进行Adjust the reference voltage output from the reference voltage output. The first end of the charge buffering component is coupled to the reference voltage output end, and the second end of the charge buffering component is coupled to the back end The time delays the input of the negative charge to the back-end circuit when the input negative charge is transferred from the control input to the reference voltage output.

本發明之又一態樣是在提供一種參考電壓產生電路,包含:參考電壓產生裝置以及電壓調整裝置。參考電壓產生裝置根據系統電壓於參考電壓輸出端產生參考電壓,其中參考電壓輸出端耦接至後端電路。電壓調整裝置包含:電壓調整模組以及具反向二極體特性之整流元件。電壓調整模組耦接於參考電壓輸出端,其中電壓調整模組具有複數控制輸入端,於接收到控制電壓時改變電壓調整模組之電阻值,俾對參考電壓輸出端輸出之參考電壓進行調整。整流元件耦接於參考電壓輸出端以及接地端,俾於輸入負電荷自電壓調整模組之控制輸入端傳送至參考電壓輸出端時,將輸入負電荷導入接地端。Still another aspect of the present invention provides a reference voltage generating circuit including: a reference voltage generating device and a voltage adjusting device. The reference voltage generating device generates a reference voltage at the reference voltage output according to the system voltage, wherein the reference voltage output terminal is coupled to the back end circuit. The voltage adjusting device comprises: a voltage adjusting module and a rectifying element having a reverse diode characteristic. The voltage adjustment module is coupled to the reference voltage output end, wherein the voltage adjustment module has a plurality of control input terminals, and the resistance value of the voltage adjustment module is changed when the control voltage is received, and the reference voltage outputted by the reference voltage output terminal is adjusted. . The rectifying component is coupled to the reference voltage output end and the ground end, and when the input negative charge is transmitted from the control input end of the voltage adjusting module to the reference voltage output end, the input negative electric charge is introduced to the ground end.

本發明之再一態樣是在提供一種參考電壓產生電路,包含:參考電壓產生裝置以及電壓調整裝置。參考電壓產生裝置根據系統電壓於參考電壓輸出端產生參考電壓,其中參考電壓輸出端耦接至後端電路。電壓調整裝置包含:電壓調整模組以及電荷緩衝元件。電壓調整模組耦接於參考電壓輸出端,其中電壓調整模組具有複數控制輸入端,於接收到控制電壓時改變電壓調整模組之電阻值,俾對參考電壓輸出端輸出之參考電壓進行調整。電荷緩衝元件之第一端耦接於參考電壓輸出端,電荷緩衝元件之第二端耦接於 後端電路,俾於輸入負電荷自控制輸入端傳送至參考電壓輸出端時,延遲輸入負電荷傳送至後端電路之時間。Still another aspect of the present invention provides a reference voltage generating circuit including: a reference voltage generating device and a voltage adjusting device. The reference voltage generating device generates a reference voltage at the reference voltage output according to the system voltage, wherein the reference voltage output terminal is coupled to the back end circuit. The voltage adjusting device comprises: a voltage adjusting module and a charge buffering component. The voltage adjustment module is coupled to the reference voltage output end, wherein the voltage adjustment module has a plurality of control input terminals, and the resistance value of the voltage adjustment module is changed when the control voltage is received, and the reference voltage outputted by the reference voltage output terminal is adjusted. . The first end of the charge buffering component is coupled to the reference voltage output end, and the second end of the charge buffering component is coupled to The back-end circuit delays the time that the input negative charge is transferred to the back-end circuit when the input negative charge is transferred from the control input to the reference voltage output.

本發明之再一態樣是在提供一種積體電路,包含:至少一內部量測接墊與至少一具反向二極體特性之整流元件。內部量測接墊可用以藉由探針測得內部量測點的電位,內部量測接墊耦接至後端電路;具反向二極體特性之整流元件耦接於內部量測接墊以及接地端,用以將內部量測接墊之輸入負電荷導入接地端。Yet another aspect of the present invention is to provide an integrated circuit comprising: at least one internal measurement pad and at least one rectifying element having reversed diode characteristics. The internal measuring pad can be used to measure the potential of the internal measuring point by the probe, and the internal measuring pad is coupled to the back end circuit; the rectifying element with the reverse diode characteristic is coupled to the internal measuring pad And a ground terminal for introducing an input negative charge of the internal measurement pad to the ground.

應用本發明之優點在於藉由具反向二極體特性之整流元件及/或電荷緩衝元件之設置,將自電壓調整模組產生的負電荷導至接地端或是延遲其由參考電壓輸出端進入後端電路的時間,避免負電荷累積於後端電路,而輕易地達到上述之目的。The invention has the advantages that the negative charge generated by the voltage adjustment module is led to the ground terminal or delayed by the reference voltage output terminal by the setting of the rectifying component and/or the charge buffering component with the reverse diode characteristic. The time to enter the back-end circuit avoids the accumulation of negative charges on the back-end circuit and easily achieves the above purpose.

1‧‧‧參考電壓產生電路1‧‧‧reference voltage generation circuit

10‧‧‧參考電壓產生裝置10‧‧‧reference voltage generating device

12‧‧‧電壓調整裝置12‧‧‧Voltage adjustment device

120‧‧‧電壓調整模組120‧‧‧Voltage adjustment module

122‧‧‧整流元件122‧‧‧Rectifying components

14‧‧‧後端電路14‧‧‧ Back-end circuit

20a、20b、20c‧‧‧調整單元20a, 20b, 20c‧‧‧ adjustment unit

200‧‧‧調整電阻200‧‧‧Adjust the resistance

202‧‧‧保險絲202‧‧‧Fuse

204‧‧‧控制輸入接墊204‧‧‧Control input pads

30‧‧‧矽控整流體30‧‧‧Controlled rectifier

32‧‧‧金氧半二極體32‧‧‧Gold oxygen half diode

34‧‧‧雙極性接面二極體34‧‧‧Double-polar junction diode

4‧‧‧參考電壓產生電路4‧‧‧reference voltage generation circuit

40‧‧‧參考電壓產生裝置40‧‧‧reference voltage generating device

42‧‧‧電壓調整裝置42‧‧‧Voltage adjustment device

420‧‧‧電壓調整模組420‧‧‧Voltage adjustment module

422‧‧‧電荷緩衝元件422‧‧‧Charge buffer components

44‧‧‧後端電路44‧‧‧ Back-end circuit

5‧‧‧參考電壓產生電路5‧‧‧reference voltage generation circuit

50‧‧‧參考電壓產生裝置50‧‧‧reference voltage generating device

52‧‧‧電壓調整裝置52‧‧‧Voltage adjustment device

520‧‧‧電壓調整模組520‧‧‧Voltage adjustment module

522‧‧‧整流元件522‧‧‧Rectifying components

524‧‧‧電荷緩衝元件524‧‧‧Charge buffer components

54‧‧‧後端電路54‧‧‧Back-end circuit

6‧‧‧參考電壓產生電路6‧‧‧reference voltage generation circuit

60‧‧‧量測接墊60‧‧‧Measurement pads

62‧‧‧整流元件62‧‧‧Rectifying components

7‧‧‧後端電路7‧‧‧ Back-end circuit

第1圖為本發明一實施例中,一種參考電壓產生電路之電路圖;第2圖為本發明一實施例中,電壓調整模組之電路圖;第3A圖至第3C圖分別為本發明一實施例中,矽控整流體、金氧半二極體及雙極性接面二極體之示 意圖;第4圖為本發明一實施例中,參考電壓產生電路之電路圖;第5圖為本發明一實施例中,參考電壓產生電路之電路圖;第6圖為本發明一實施例中,參考電壓產生電路之電路圖;以及第7A圖及第7B圖為應用本發明一實施例之前與之後,晶圓上之晶片之良率統計圖。1 is a circuit diagram of a reference voltage generating circuit according to an embodiment of the present invention; FIG. 2 is a circuit diagram of a voltage adjusting module according to an embodiment of the present invention; and FIGS. 3A to 3C are respectively an embodiment of the present invention; In the example, the display of the rectifier, the gold-oxygen semiconductor, and the bipolar junction diode 4 is a circuit diagram of a reference voltage generating circuit according to an embodiment of the present invention; FIG. 5 is a circuit diagram of a reference voltage generating circuit according to an embodiment of the present invention; and FIG. 6 is a reference of an embodiment of the present invention; A circuit diagram of a voltage generating circuit; and FIGS. 7A and 7B are graphs of yield statistics of wafers on a wafer before and after application of an embodiment of the present invention.

請參照第1圖。第1圖為本發明一實施例中,一種參考電壓產生電路1之電路圖。參考電壓產生電路1包含參考電壓產生裝置10以及電壓調整裝置12。Please refer to Figure 1. 1 is a circuit diagram of a reference voltage generating circuit 1 according to an embodiment of the present invention. The reference voltage generating circuit 1 includes a reference voltage generating device 10 and a voltage adjusting device 12.

參考電壓產生裝置10根據系統電壓Vdd於參考電壓輸出端O產生參考電壓Vref,其中參考電壓輸出端O耦接至後端電路14(subsequent circuitry)。於本實施例中,參考電壓產生裝置10可為如第1圖所繪示的帶隙(bandgap)參考電壓產生電路。然而於其他實施例中,參考電壓產生裝置10亦可藉由其他的電路實現,不為第1圖的範例所限。The reference voltage generating device 10 generates a reference voltage Vref at the reference voltage output terminal O according to the system voltage Vdd, wherein the reference voltage output terminal O is coupled to the back circuit 14 (subsequent circuitry). In this embodiment, the reference voltage generating device 10 can be a bandgap reference voltage generating circuit as shown in FIG. 1. However, in other embodiments, the reference voltage generating device 10 can also be implemented by other circuits, and is not limited to the example of FIG. 1.

電壓調整裝置12包含:電壓調整模組120以及具反向二極體特性之整流元件122。電壓調整模組120耦接於參考電壓輸出端O,其中電壓調整模組120 具有複數控制輸入端,如第1圖中所繪示的控制輸入端P1、P2、P3及P4。藉由控制輸入端P1-P4分別接收到一控制電壓(Vtrim;trimming voltage)(未繪示)時,可以改變電壓調整模組120之電阻值,以對參考電壓輸出端O輸出之參考電壓Vref的值進行調整,稍後將詳細說明。The voltage adjustment device 12 includes a voltage adjustment module 120 and a rectifying element 122 having reversed diode characteristics. The voltage adjustment module 120 is coupled to the reference voltage output terminal O, wherein the voltage adjustment module 120 There are complex control inputs, such as control inputs P1, P2, P3 and P4 shown in FIG. When the control input terminals P1 - P4 respectively receive a control voltage (Vtrim; trimming voltage) (not shown), the resistance value of the voltage adjustment module 120 can be changed to output the reference voltage Vref to the reference voltage output terminal O. The values are adjusted and will be explained in detail later.

請參照第2圖。第2圖為本發明一實施例中,電壓調整模組120之電路圖。在本實施例中,電壓調整模組120包含互相串聯的數個調整單元20a、20b及20c,調整單元20a、20b及20c各包含並聯之調整電阻200以及保險絲202。其中各調整單元20a、20b及20c的兩端,分別對應於其中兩個控制輸入端。舉例來說,調整單元20a的兩端對應於控制輸入端P1及P2,調整單元20b的兩端對應於控制輸入端P2及P3,而調整單元20c的兩端對應於控制輸入端P3及P4。於一實施例中,控制輸入端P1-P4分別包含控制輸入接墊204。此控制輸入接墊204不為焊接墊(bonding pad),而僅供接收控制電壓之用。亦即,此控制輸入接墊204並不會打金線(gold bond),在封裝製程完成後,將不會外露於封裝結構,因此不會與其他電路相耦接。Please refer to Figure 2. FIG. 2 is a circuit diagram of a voltage adjustment module 120 according to an embodiment of the invention. In the present embodiment, the voltage adjustment module 120 includes a plurality of adjustment units 20a, 20b, and 20c connected in series, and the adjustment units 20a, 20b, and 20c each include a parallel adjustment resistor 200 and a fuse 202. Two ends of each of the adjusting units 20a, 20b and 20c respectively correspond to two of the control inputs. For example, both ends of the adjusting unit 20a correspond to the control input terminals P1 and P2, and both ends of the adjusting unit 20b correspond to the control input terminals P2 and P3, and both ends of the adjusting unit 20c correspond to the control input terminals P3 and P4. In one embodiment, control inputs P1-P4 include control input pads 204, respectively. The control input pad 204 is not a bonding pad and is only for receiving a control voltage. That is, the control input pad 204 does not have a gold bond, and will not be exposed to the package structure after the package process is completed, and thus will not be coupled to other circuits.

在各調整單元20a、20b及20c之兩端接收到控制電壓前,將藉由保險絲202旁路調整電阻200,因此將成為短路的狀態。當調整單元20a、20b及20c 的兩端依序接收到一控制電壓後,控制電壓將燒斷保險絲202以致能調整電阻200。舉例來說,先將調整單元20a之一端(P1端)耦接至一控制電壓,另一端(P2端)接地,調整單元20a之保險絲202將燒斷。接著,將調整單元20b之一端(P2端)耦接至上述控制電壓,另一端(P3端)接地,調整單元20b之保險絲202將燒斷。最後,將調整單元20c之一端(P3端)耦接至上述控制電壓,另一端(P4端)接地,調整單元20c之保險絲202將燒斷。因此,調整單元20a、20b及20c之調整電阻200的阻值將可使參考電壓輸出端O的參考電壓Vref調高。然而,調整單元20a、20b及20c中的保險絲202不一定皆為燒斷狀態。在一實施例中,可由一控制單元(未繪示)來判斷需要燒斷保險絲202的調整單元,再依序提供上述控制電壓至對應的調整單元的兩端以燒斷保險絲202。當參考電壓產生裝置10由於元件製程或其他原因造成誤差,使參考電壓Vref不準確時,將可藉由電壓調整模組120的設置而予以調校。Before the control voltage is received at both ends of each of the adjustment units 20a, 20b, and 20c, the adjustment resistor 200 is bypassed by the fuse 202, and thus will be in a short-circuited state. When adjusting units 20a, 20b and 20c After the two terminals receive a control voltage in sequence, the control voltage will blow the fuse 202 so that the resistor 200 can be adjusted. For example, one end (P1 end) of the adjusting unit 20a is first coupled to a control voltage, and the other end (P2 end) is grounded, and the fuse 202 of the adjusting unit 20a is blown. Next, one end (P2 end) of the adjusting unit 20b is coupled to the above control voltage, and the other end (P3 end) is grounded, and the fuse 202 of the adjusting unit 20b is blown. Finally, one end (P3 end) of the adjusting unit 20c is coupled to the above control voltage, and the other end (P4 end) is grounded, and the fuse 202 of the adjusting unit 20c is blown. Therefore, the resistance of the adjustment resistor 200 of the adjustment units 20a, 20b, and 20c will increase the reference voltage Vref of the reference voltage output terminal O. However, the fuses 202 in the adjustment units 20a, 20b, and 20c are not necessarily all in a blown state. In an embodiment, an adjustment unit that needs to blow the fuse 202 can be determined by a control unit (not shown), and the control voltage is sequentially supplied to both ends of the corresponding adjustment unit to blow the fuse 202. When the reference voltage generating device 10 causes an error due to component processing or other reasons, and the reference voltage Vref is inaccurate, it can be adjusted by the setting of the voltage adjusting module 120.

需注意的是,於本實施例中,是以三個調整單元及四個控制輸入端為範例,於其他實施例中,調整單元及控制輸入端的數目可依情況予以調整。並且,各調整單元中的調整電阻之阻值可為相同,或是依例如但不限於二的倍數遞增,以達到更有效的調校效果。於部份實施例中,電壓調整模組120之電路亦 可能採用其他設計形式,不為本實施例中繪示所限。It should be noted that, in this embodiment, three adjustment units and four control input terminals are taken as an example. In other embodiments, the number of adjustment units and control input terminals may be adjusted according to circumstances. Moreover, the resistance of the adjustment resistors in each adjustment unit may be the same, or may be increased by a multiple of, for example, but not limited to, to achieve a more effective adjustment effect. In some embodiments, the circuit of the voltage adjustment module 120 is also Other design forms may be used, which are not limited by the description in the embodiment.

然而,在電路製程中進行到晶圓切割(die saw)的步驟時,控制輸入接墊204具有天線聚集的特性,而容易將負電荷引入。晶圓切割步驟通常會搭配純水的沖洗進行冷卻,但並無法帶走負電荷。雖然在部份的技術中,會採用碳酸水的帶離子的水以嘗試帶走負電荷,但其成效仍然有限。再者,晶片之控制輸入接墊一般係無設置靜電保護(ESD protection)元件,因此也無路徑可排出上述負電荷。這些輸入的負電荷將經由電壓調整模組120傳送到參考電壓輸出端O,進一步傳送到後端電路14。當後端電路14的元件如電晶體接收到負電荷時,將可能累積於其閘極,因而使其運作時的臨界電壓(Vt)下降,對電路的正常運作將造成影響。However, when performing the step of die sawing in the circuit process, the control input pad 204 has the characteristics of antenna aggregation, and it is easy to introduce a negative charge. Wafer cutting steps are usually cooled with pure water rinsing, but they do not carry away negative charges. Although in some technologies, ionized water of carbonated water is used in an attempt to carry away negative charges, its effectiveness is still limited. Moreover, the control input pads of the wafer are generally provided with no ESD protection components, and therefore there is no path to discharge the above negative charges. The negative charge of these inputs will be transferred to the reference voltage output terminal O via the voltage adjustment module 120 and further to the back end circuit 14. When a component of the back-end circuit 14, such as a transistor, receives a negative charge, it may accumulate at its gate, thereby causing its threshold voltage (Vt) to drop during operation, which will affect the normal operation of the circuit.

因此,如第1圖所示,具反向二極體特性之整流元件122耦接於參考電壓輸出端O以及接地端GND,可以在輸入負電荷自電壓調整模組120之控制輸入端P1-P4傳送至參考電壓輸出端O時,將輸入負電荷由路徑A導入接地端GND。Therefore, as shown in FIG. 1, the rectifying component 122 having the reverse diode characteristic is coupled to the reference voltage output terminal O and the grounding terminal GND, and can input a negative charge from the control input terminal P1- of the voltage adjusting module 120. When P4 is transmitted to the reference voltage output terminal O, the input negative charge is introduced from the path A to the ground GND.

於第1圖之實施例中,整流元件122為反向二極體。在本實施例中,反向是指陽極(Anode)與接地端GND連接,而陰極(Cathode)與參考電壓輸出端O連接的連接方式。跨在整流元件122上的電壓為箝位電壓VclampIn the embodiment of Figure 1, the rectifying element 122 is a reverse diode. In the present embodiment, the reverse direction refers to the connection mode in which the anode (Anode) is connected to the ground GND and the cathode (Cathode) is connected to the reference voltage output terminal O. The voltage across the rectifying element 122 is the clamping voltage V clamp .

請參照第3A圖至第3C圖。第3A圖至第3C圖分別為本發明一實施例中,矽控整流體(Silicon Controlled Rectifier;SCR)30、金氧半二極體(MOS diode)32及雙極性接面二極體(BJT diode)34之示意圖。矽控整流體30、金氧半二極體32及雙極性接面二極體34均具有二極體之特性,因此在適當的連接方式後,亦可用以取代反向二極體做為整流元件122。需注意的是,第3B及第3C圖是以N型的金氧半二極體32及雙極性接面二極體34為例,於其他實施例中,亦可使用P型的金氧半二極體及雙極性接面二極體實現。在不同的實施例中,也可以採用其他具二極體特性的元件予以實現為整流元件122達到相同的功效。Please refer to Figures 3A to 3C. 3A to 3C are respectively a controllable rectifier (SCR) 30, a MOS diode 32, and a bipolar junction diode (BJT) according to an embodiment of the invention. Schematic diagram of diode)34. The voltage controlled rectifier 30, the gold-oxygen semiconductor diode 32 and the bipolar junction diode 34 have the characteristics of a diode, so that after the appropriate connection mode, the reverse diode can also be used as a rectifier. Element 122. It should be noted that the 3B and 3C are exemplified by the N-type MOS diode 32 and the bipolar junction diode 34. In other embodiments, the P-type MOS can also be used. The diode and the bipolar junction diode are realized. In other embodiments, other components having diode characteristics can also be implemented to achieve the same effect as the rectifying element 122.

需注意的是,在一實施例中,為確保負電荷會沿著第1圖的路徑A導入至接地端GND,可使整流元件122的箝位電壓Vclamp 大於控制電壓Vtrim 。亦即,需滿足下式:Vclamp >Vtrim It should be noted that, in an embodiment, to ensure that a negative charge is introduced to the ground GND along the path A of FIG. 1, the clamp voltage V clamp of the rectifying element 122 can be made larger than the control voltage V trim . That is, the following formula must be satisfied: V clamp >V trim

另外,上述箝位電壓Vclamp 不能大於後端電路14之電晶體的一閘極崩潰電壓(gate breakdown voltage),以避免影響後端電路14的運作。因此,本發明之參考電壓產生電路1中的電壓調整裝置12可藉由具反向二極體特性之整流元件,將控制輸入接墊因天線聚集效應產生的負電荷導入至接地端,避免其 累積於後端電路造成後端電路無法正常運作。In addition, the clamping voltage V clamp described above cannot be greater than a gate breakdown voltage of the transistor of the back end circuit 14 to avoid affecting the operation of the back end circuit 14. Therefore, the voltage adjusting device 12 in the reference voltage generating circuit 1 of the present invention can introduce the negative electric charge generated by the control input pad due to the antenna gathering effect to the ground end by using the rectifying element having the reverse diode characteristic, thereby avoiding Accumulation in the back-end circuit causes the back-end circuit to not function properly.

請參照第4圖。第4圖為本發明一實施例中,參考電壓產生電路4之電路圖。類似地,參考電壓產生電路4包含參考電壓產生裝置40以及電壓調整裝置42。參考電壓產生電路4中的各元件與第1圖的參考電壓產生電路1的各元件大同小異,因此不再就相同的部份重複贅述。於本實施例中,電壓調整裝置42除包含電壓調整模組420外,更包含電荷緩衝元件422。Please refer to Figure 4. Fig. 4 is a circuit diagram of a reference voltage generating circuit 4 in accordance with an embodiment of the present invention. Similarly, the reference voltage generating circuit 4 includes a reference voltage generating device 40 and a voltage adjusting device 42. The components in the reference voltage generating circuit 4 are substantially the same as those in the reference voltage generating circuit 1 of Fig. 1, and therefore the description of the same portions will not be repeated. In the embodiment, the voltage adjusting device 42 further includes a charge buffering component 422 in addition to the voltage adjusting module 420.

電荷緩衝元件422之第一端耦接於參考電壓輸出端O,第二端耦接於後端電路44,俾於輸入負電荷自控制輸入端O沿路徑B傳送至參考電壓輸出端O及後端電路44時,延遲輸入負電荷傳送至後端電路44的時間。於本實施例中,電荷緩衝元件422為電阻。由於電荷緩衝元件422係用於延遲輸入負電荷傳送至後端電路44的時間,因此其電阻值僅需大於晶圓切割時的水阻值(water resistance)。在一實施例中,電荷緩衝元件之電阻值為3K歐姆,而串聯後的各調整單元的電阻值為85K歐姆。於其他實施例中,亦可採用其他可減緩負電荷傳送至後端電路44的元件。The first end of the charge buffering component 422 is coupled to the reference voltage output terminal O, and the second end is coupled to the back end circuit 44. The input negative charge is transmitted from the control input terminal O along the path B to the reference voltage output terminal O and thereafter. The terminal circuit 44 delays the time at which the input negative charge is transferred to the back end circuit 44. In the present embodiment, the charge buffering element 422 is a resistor. Since the charge buffering element 422 is used to delay the time during which the input negative charge is transferred to the back end circuit 44, its resistance value only needs to be greater than the water resistance at the time of wafer cutting. In one embodiment, the charge buffer element has a resistance value of 3K ohms, and the series adjustment unit has a resistance value of 85K ohms. In other embodiments, other components that mitigate the transfer of negative charge to the back end circuitry 44 may also be employed.

因此,在晶圓切割步驟進行時,如以碳酸水的帶離子的水進行沖洗,將可有足夠的時間將負電荷帶走,達到避免負電荷累積於後端電路造成後端電路 無法正常運作的功效。Therefore, during the wafer cutting step, such as washing with ionized water of carbonated water, there will be enough time to carry the negative charge away, so as to avoid accumulation of negative charge in the back-end circuit and cause the back-end circuit. The effect of not working properly.

請參照第5圖。第5圖為本發明一實施例中,參考電壓產生電路5之電路圖。類似地,參考電壓產生電路5包含參考電壓產生裝置50以及電壓調整裝置52。參考電壓產生電路5中的各元件與第1圖的參考電壓產生電路1的各元件大同小異,因此不再就相同的部份重複贅述。於本實施例中,電壓調整裝置52除包含電壓調整模組520外,更包含具反向二極體特性之整流元件522及電荷緩衝元件524。Please refer to Figure 5. Fig. 5 is a circuit diagram of a reference voltage generating circuit 5 in accordance with an embodiment of the present invention. Similarly, the reference voltage generating circuit 5 includes a reference voltage generating device 50 and a voltage adjusting device 52. The components in the reference voltage generating circuit 5 are substantially the same as those in the reference voltage generating circuit 1 of Fig. 1, and therefore the description of the same portions will not be repeated. In the present embodiment, the voltage adjusting device 52 includes a voltage rectifying module 520 and a rectifying element 522 and a charge buffering element 524 having reversed diode characteristics.

電荷緩衝元件524之第一端耦接於參考電壓輸出端O及整流元件522,且第二端耦接於後端電路54。因此,藉由第5圖的配置方式,電壓調整裝置52可藉由整流元件522先將負電荷導入接地端GND,並由電荷緩衝元件524延遲負電荷傳送至後端電路54之時間。The first end of the charge buffering component 524 is coupled to the reference voltage output terminal O and the rectifier component 522 , and the second terminal is coupled to the back end circuit 54 . Therefore, with the arrangement of FIG. 5, the voltage adjusting device 52 can first introduce a negative charge to the ground GND by the rectifying element 522, and delay the time when the negative charge is transferred to the back end circuit 54 by the charge buffering element 524.

需注意的是,上述實施例是以電壓調整裝置中,由電壓調整模組中的控制輸入端輸入負電荷的情形為例進行說明。請參照第6圖。第6圖為本發明一實施例中,參考電壓產生電路6之電路圖。參考電壓產生電路6可於參考電壓輸出端O產生參考電壓Vref至後端電路7。於本實施例中,在參考電壓產生電路6可在一個量測點N設置量測接墊(probing pad)60。量測接墊60可用以藉由探針或是其他方式測得此量測點N的電位。同樣地,在晶圓切割的步驟時,量測 接墊60具有天線聚集的特性,而容易將負電荷引入,影響參考電壓產生電路6中的元件的運作。一般而言,晶片內部之量測接墊皆無設置靜電保護元件,也無路徑可排出上述負電荷。因此,藉由具反向二極體特性之整流元件62的設置,亦可達到將負電荷導至接地電位GND之功效。參考第6圖,整流元件62為反向二極體。在本實施例中,反向是指陽極(Anode)與接地端GND連接,而陰極(Cathode)與量測點N連接的連接方式。跨在整流元件62上的電壓為箝位電壓Vclamp 。另外,上述整流元件6之箝位電壓Vclamp 不能大於參考電壓產生電路6內電晶體的一閘極崩潰電壓,以避免影響參考電壓產生電路6的運作。類似地,如第4圖所繪示的電荷緩衝元件422,亦可應用於此,以達到緩衝電荷進入參考電壓產生電路6中的其他元件的功效。於上述實施例中,量測接墊係位於參考電壓產生電路中,然而在晶片中之任何一個量測點之量測接墊(或位在參考電壓產生電路之外)皆可設置上述整流元件或是電荷緩衝元件或兩者組合,以使電路中之負電荷導至接地電位GND,其中上述整流元件之箝位電壓Vclamp 不能大於後端電路之電晶體的一閘極崩潰電壓,以避免影響後端電路的運作。It should be noted that the above embodiment is an example in which a negative electric charge is input from a control input terminal of the voltage adjustment module in the voltage adjustment device. Please refer to Figure 6. Fig. 6 is a circuit diagram of a reference voltage generating circuit 6 in accordance with an embodiment of the present invention. The reference voltage generating circuit 6 can generate the reference voltage Vref to the back end circuit 7 at the reference voltage output terminal O. In the present embodiment, a probing pad 60 can be disposed at a measurement point N at the reference voltage generating circuit 6. The measuring pad 60 can be used to measure the potential of the measuring point N by a probe or other means. Similarly, at the step of wafer dicing, the measurement pad 60 has the characteristics of antenna aggregation, and it is easy to introduce a negative charge, which affects the operation of the elements in the reference voltage generating circuit 6. In general, the measurement pads inside the wafer are not provided with electrostatic protection components, and there is no path to discharge the above negative charges. Therefore, the effect of conducting the negative charge to the ground potential GND can also be achieved by the arrangement of the rectifying element 62 having the reverse diode characteristics. Referring to Figure 6, the rectifying element 62 is a reverse diode. In the present embodiment, the reverse direction refers to the connection mode in which the anode (Anode) is connected to the ground GND, and the cathode (Cathode) is connected to the measuring point N. The voltage across the rectifying element 62 is the clamping voltage V clamp . In addition, the clamp voltage V clamp of the rectifying element 6 described above cannot be greater than a gate breakdown voltage of the transistor in the reference voltage generating circuit 6 to avoid affecting the operation of the reference voltage generating circuit 6. Similarly, the charge buffering element 422 as shown in FIG. 4 can also be applied to achieve the effect of buffering charges into other components in the reference voltage generating circuit 6. In the above embodiment, the measurement pad is located in the reference voltage generating circuit, but the measuring pad of any one of the measuring points in the wafer (or the bit voltage generating circuit) may be disposed. Or a charge buffering element or a combination of the two to cause a negative charge in the circuit to be conducted to the ground potential GND, wherein the clamping voltage V clamp of the rectifying element cannot be greater than a gate breakdown voltage of the transistor of the back end circuit to avoid Affect the operation of the back-end circuit.

第7A圖及第7B圖分別為應用本發明一實施例(第4圖)之前與之後,晶圓上之晶片之良率統計圖。其中橫軸為晶圓上每一晶片量測而得的帶隙參考 電壓之電壓範圍,縱軸為在對應的測得電壓上的晶片數量。我們可觀察到,應用本發明之晶片良率明顯提升(第7B圖),落在量產最終測試(FT,Final test)規格內的晶片數量增加,而不符合量產最終測試規格的晶片相對減少。7A and 7B are graphs showing yield statistics of wafers on a wafer before and after application of an embodiment (Fig. 4) of the present invention, respectively. The horizontal axis is the bandgap reference measured for each wafer on the wafer. The voltage range of the voltage, the vertical axis is the number of wafers at the corresponding measured voltage. We can observe that the wafer yield using the present invention is significantly improved (Fig. 7B), and the number of wafers falling within the specification of the final test (FT) is increased, and the wafers that do not meet the final test specifications of the mass production are relatively cut back.

雖然本揭示內容已以實施方式揭露如上,然其並非用以限定本揭示內容,任何熟習此技藝者,在不脫離本揭示內容之精神和範圍內,當可作各種之更動與潤飾,因此本揭示內容之保護範圍當視後附之申請專利範圍所界定者為準。The present disclosure has been disclosed in the above embodiments, but it is not intended to limit the disclosure, and any person skilled in the art can make various changes and refinements without departing from the spirit and scope of the disclosure. The scope of protection of the disclosure is subject to the definition of the scope of the patent application.

1‧‧‧參考電壓產生電路1‧‧‧reference voltage generation circuit

10‧‧‧參考電壓產生裝置10‧‧‧reference voltage generating device

12‧‧‧電壓調整裝置12‧‧‧Voltage adjustment device

120‧‧‧電壓調整模組120‧‧‧Voltage adjustment module

122‧‧‧整流元件122‧‧‧Rectifying components

14‧‧‧後端電路14‧‧‧ Back-end circuit

Claims (16)

一種具負電荷保護機制之電壓調整裝置,包含:一電壓調整模組,耦接於一參考電壓輸出端,且該參考電壓輸出端耦接至一後端電路,其中該電壓調整模組具有複數控制輸入端,於接收到一控制電壓時改變該電壓調整模組之一電阻值,俾對該參考電壓輸出端輸出之一參考電壓進行調整;以及一具反向二極體特性之整流元件,耦接於該參考電壓輸出端以及一接地端,俾於一輸入負電荷自該電壓調整模組之該等控制輸入端傳送至該參考電壓輸出端時,將該輸入負電荷導入該接地端。 A voltage adjustment device with a negative charge protection mechanism includes: a voltage adjustment module coupled to a reference voltage output terminal, wherein the reference voltage output terminal is coupled to a back end circuit, wherein the voltage adjustment module has a plurality of a control input, changing a resistance value of the voltage adjustment module when receiving a control voltage, adjusting a reference voltage of the output of the reference voltage output; and a rectifying component having a reverse diode characteristic, The input voltage is coupled to the reference voltage output terminal and a ground terminal. When an input negative charge is transmitted from the control input terminals of the voltage adjustment module to the reference voltage output terminal, the input negative charge is introduced to the ground terminal. 如請求項1所述之電壓調整裝置,更包含一電荷緩衝元件,該電荷緩衝元件之一第一端耦接於該參考電壓輸出端及該整流元件,該電荷緩衝元件之一第二端耦接於該後端電路,俾於該輸入負電荷自該等控制輸入端傳送至該參考電壓輸出端時,延遲該輸入負電荷傳送至該後端電路之時間。 The voltage adjusting device of claim 1, further comprising a charge buffering component, wherein the first end of the charge buffering component is coupled to the reference voltage output terminal and the rectifying component, and the second end of the charge buffering component is coupled Connected to the back-end circuit, delaying the input of the negative charge to the back-end circuit when the input negative charge is transferred from the control input to the reference voltage output. 如請求項1所述之電壓調整裝置,其中該電壓調整模組包含複數調整單元,互相串聯,且該等調整單元各包含並聯之一調整電阻以及一保險絲,其中各該等調整單元之兩端對應於其中二該等控制輸入 端,各該等調整單元之兩端於接收到該控制電壓前藉由該保險絲旁路該調整電阻,以及於接收到該控制電壓後燒斷該保險絲以致能該調整電阻。 The voltage adjustment device of claim 1, wherein the voltage adjustment module comprises a plurality of adjustment units connected in series, and the adjustment units each comprise a parallel adjustment resistor and a fuse, wherein the two ends of each of the adjustment units Corresponding to two of these control inputs The two ends of each of the adjusting units bypass the adjusting resistor by the fuse before receiving the control voltage, and after receiving the control voltage, blow the fuse to enable the adjusting resistor. 如請求項1所述之電壓調整裝置,其中該整流元件之一箝位電壓大於該控制電壓。 The voltage adjusting device of claim 1, wherein one of the rectifying elements has a clamping voltage greater than the control voltage. 如請求項3所述之電壓調整裝置,其中該等控制輸入端分別包含一控制輸入接墊,其中該控制輸入接墊不為一焊接墊(bonding pad)。 The voltage adjusting device of claim 3, wherein the control input terminals respectively comprise a control input pad, wherein the control input pad is not a bonding pad. 一種具負電荷保護機制之電壓調整裝置,包含:一電壓調整模組,耦接於一參考電壓輸出端,且該參考電壓輸出端耦接至一後端電路,其中該電壓調整模組具有複數控制輸入端,於接收到一控制電壓時改變該電壓調整模組之一電阻值,俾對該參考電壓輸出端輸出之一參考電壓進行調整;以及一電荷緩衝元件,該電荷緩衝元件之一第一端耦接於該參考電壓輸出端,該電荷緩衝元件之一第二端耦接於該後端電路,俾於該輸入負電荷自該等控制輸入端傳送至該參考電壓輸出端時,延遲該輸入負電荷傳送至該後端電路之時間。 A voltage adjustment device with a negative charge protection mechanism includes: a voltage adjustment module coupled to a reference voltage output terminal, wherein the reference voltage output terminal is coupled to a back end circuit, wherein the voltage adjustment module has a plurality of Controlling an input terminal, changing a resistance value of the voltage adjustment module when receiving a control voltage, adjusting a reference voltage of the output of the reference voltage output terminal; and a charge buffering component, the one of the charge buffering component One end of the charge buffering element is coupled to the reference voltage output end, and the second end of the charge buffering component is coupled to the back end circuit, and the input negative charge is delayed from the control input terminal to the reference voltage output terminal The time at which the input negative charge is transferred to the back end circuit. 如請求項6所述之電壓調整裝置,其中該電壓調整模組包含複數調整單元,互相串聯,且該等調整單元各包含並聯之一調整電阻以及一保險絲,其中各該等調整單元之兩端對應於其中二該等控制輸入端,各該等調整單元之兩端於接收到該控制電壓前藉由該保險絲旁路該調整電阻,以及於接收到該控制電壓後燒斷該保險絲以致能該調整電阻。 The voltage adjustment device of claim 6, wherein the voltage adjustment module comprises a plurality of adjustment units connected in series, and each of the adjustment units comprises a parallel adjustment resistor and a fuse, wherein the two ends of each of the adjustment units Corresponding to two of the control input terminals, both ends of each of the adjustment units bypass the adjustment resistor by the fuse before receiving the control voltage, and after the control voltage is received, the fuse is blown to enable the Adjust the resistance. 如請求項7所述之電壓調整裝置,其中該等控制輸入端分別包含一控制輸入接墊,其中該控制輸入接墊不為一焊接墊。 The voltage adjusting device of claim 7, wherein the control input terminals respectively comprise a control input pad, wherein the control input pad is not a solder pad. 一種參考電壓產生電路,包含:一參考電壓產生裝置,用以根據一系統電壓於一參考電壓輸出端產生一參考電壓,其中該參考電壓輸出端耦接至一後端電路;以及一電壓調整裝置,包含:一電壓調整模組,耦接於該參考電壓輸出端,其中該電壓調整模組具有複數控制輸入端,於接收到一控制電壓時改變該電壓調整模組之一電阻值,俾對該參考電壓輸出端輸出之一參考電壓進行調整;以及一具反向二極體特性之整流元件,耦接於該參考電壓輸出端以及一接地端,俾於一輸入負電 荷自該電壓調整模組之該等控制輸入端傳送至該參考電壓輸出端時,將該輸入負電荷導入該接地端。 A reference voltage generating circuit includes: a reference voltage generating device for generating a reference voltage at a reference voltage output terminal according to a system voltage, wherein the reference voltage output terminal is coupled to a back end circuit; and a voltage adjusting device The method includes: a voltage adjustment module coupled to the reference voltage output end, wherein the voltage adjustment module has a plurality of control input terminals, and changes a resistance value of the voltage adjustment module when receiving a control voltage, The reference voltage output terminal is adjusted by a reference voltage; and a rectifying component having a reverse diode characteristic coupled to the reference voltage output terminal and a ground terminal, adjacent to an input negative power When the control input terminals of the voltage adjustment module are transmitted to the reference voltage output terminal, the input negative charge is introduced to the ground terminal. 如請求項9所述之參考電壓產生電路,其中該電壓調整裝置更包含一電荷緩衝元件,該電荷緩衝元件之一第一端耦接於該參考電壓輸出端及該整流元件,該電荷緩衝元件之一第二端耦接於該後端電路,俾於該輸入負電荷自該等控制輸入端傳送至該參考電壓輸出端時,延遲該輸入負電荷傳送至該後端電路之時間。 The reference voltage generating circuit of claim 9, wherein the voltage adjusting device further comprises a charge buffering component, wherein the first end of the charge buffering component is coupled to the reference voltage output terminal and the rectifying component, the charge buffering component A second end is coupled to the back end circuit for delaying the time during which the input negative charge is transferred to the back end circuit when the input negative charge is transferred from the control input to the reference voltage output. 如請求項9所述之參考電壓產生電路,其中該電壓調整模組包含複數調整單元,互相串聯,且該等調整單元各包含並聯之一調整電阻以及一保險絲,其中各該等調整單元之兩端對應於其中二該等控制輸入端,各該等調整單元之兩端於接收到該控制電壓前藉由該保險絲旁路該調整電阻,以及於接收到該控制電壓後燒斷該保險絲以致能該調整電阻。 The reference voltage generating circuit of claim 9, wherein the voltage adjusting module comprises a plurality of adjusting units connected in series, and each of the adjusting units comprises a parallel adjusting resistor and a fuse, wherein each of the adjusting units The terminal corresponds to two of the control input terminals, and the two ends of each of the adjusting units bypass the adjusting resistor by the fuse before receiving the control voltage, and after the receiving the control voltage, the fuse is blown to enable The adjustment resistor. 如請求項9所述之參考電壓產生電路,其中該整流元件之一箝位電壓大於該控制電壓。 The reference voltage generating circuit of claim 9, wherein one of the rectifying elements has a clamping voltage greater than the control voltage. 如請求項11所述之電壓調整裝置,其中該等 控制輸入端分別包含一控制輸入接墊,其中該控制輸入接墊不為一焊接墊。 The voltage adjusting device of claim 11, wherein the The control input terminals respectively comprise a control input pad, wherein the control input pad is not a solder pad. 一種參考電壓產生電路,包含:一參考電壓產生裝置,用以根據一系統電壓於一參考電壓輸出端產生一參考電壓,其中該參考電壓輸出端耦接至一後端電路;以及一電壓調整裝置,包含:一電壓調整模組,耦接於該參考電壓輸出端,其中該電壓調整模組具有複數控制輸入端,於接收到一控制電壓時改變該電壓調整模組之一電阻值,俾對該參考電壓輸出端輸出之一參考電壓進行調整;以及一電荷緩衝元件,該電荷緩衝元件之一第一端耦接於該參考電壓輸出端,該電荷緩衝元件之一第二端耦接於該後端電路,俾於該輸入負電荷自該等控制輸入端傳送至該參考電壓輸出端時,延遲該輸入負電荷傳送至該後端電路之時間。 A reference voltage generating circuit includes: a reference voltage generating device for generating a reference voltage at a reference voltage output terminal according to a system voltage, wherein the reference voltage output terminal is coupled to a back end circuit; and a voltage adjusting device The method includes: a voltage adjustment module coupled to the reference voltage output end, wherein the voltage adjustment module has a plurality of control input terminals, and changes a resistance value of the voltage adjustment module when receiving a control voltage, The reference voltage output terminal is adjusted by one of the reference voltages; and a charge buffering component, the first end of the charge buffering component is coupled to the reference voltage output end, and the second end of the one of the charge buffering components is coupled to the The back end circuit delays the time during which the input negative charge is transferred to the back end circuit when the input negative charge is transferred from the control input to the reference voltage output. 如請求項14所述之參考電壓產生電路,其中該電壓調整模組包含複數調整單元,互相串聯,且該等調整單元各包含並聯之一調整電阻以及一保險絲,其中各該等調整單元之兩端對應於其中二該等控 制輸入端,各該等調整單元之兩端於接收到該控制電壓前藉由該保險絲旁路該調整電阻,以及於接收到該控制電壓後燒斷該保險絲以致能該調整電阻。 The reference voltage generating circuit of claim 14, wherein the voltage adjusting module comprises a plurality of adjusting units connected in series with each other, and the adjusting units each comprise a parallel adjusting resistor and a fuse, wherein each of the adjusting units The end corresponds to two of these controls At the input end, the two ends of each of the adjusting units bypass the adjusting resistor by the fuse before receiving the control voltage, and after receiving the control voltage, blow the fuse to enable the adjusting resistor. 如請求項15所述之參考電壓產生電路,其中該等控制輸入端分別包含一控制輸入接墊,其中該控制輸入接墊不為一焊接墊。 The reference voltage generating circuit of claim 15, wherein the control input terminals respectively comprise a control input pad, wherein the control input pad is not a solder pad.
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