TWI479556B - Ultra thin wafer die attach method - Google Patents

Description

Die patch method for ultra-thin wafer process

The present invention relates to a method of fabricating a die patch, and more particularly to a die attach method for an ultra-thin wafer process.

In order to adapt to the trend of miniaturization of integrated circuit chip packages, it is often desirable to have a very thin wafer thickness. However, in the package manufacturing process of the wafer, the ruthenium sheet needs to have sufficient thickness, otherwise the mechanical strength is insufficient, and cracks may occur during the package manufacturing process, especially in the Wafer Backside Grinding and wafer. During the Die Attach process, thinning the wafer to 100 μm or less can easily cause a significant reduction in yield.

In the die attach process of wafer particles, the wafer particles are bonded to the lead frame or the wiring substrate by conductive silver paste (Epoxy), because the dispersing agent of the conductive silver paste is Epoxy-based resin has a small contact angle with bismuth and a phenomenon of "silver migration". Therefore, in the conventional packaging method, the conductive silver paste is easy to adsorb the ruthenium substrate of the wafer particles and climb to the wafer particle configuration. One side of the bulk circuit, thereby eroding the integrated circuit unit or causing a short circuit in the integrated circuit, damaging the electrical properties of the wafer particles.

On the other hand, if the conductive silver paste is too high or the process of bonding the wafer particles, the wafer particles may have a small lateral shift, and the conductive silver paste may cause the wafer particles to have less surface coverage. The silver paste, which causes subsequent wire bonding (Wire Bonding), will be difficult to perform, and it is easy to cause the bonding of the lead in the wire bonding area (Pad) to be non-stick or incomplete bond. In the subsequent Molding process, Incomplete Bond will cause the leads to detach from the wire bond area (Pad Lift), causing the wafer functionality to fail.

For example, in U.S. Patent Publication No. US2006/0035443A1, a method of bonding and cutting a partial wafer is proposed in the patent of Hsu et al., which is characterized in that at least partial oxidation of a supporting wafer constitutes a plurality of oxidation regions and is oxidized. The area is flattened, the surface of the supporting wafer and its oxidized area is covered by any material, and the supporting wafer is bonded to the integrated circuit wafer by using the oxidized area as a bonding point, and the subsequent process is completed by this structure. During the cutting process of the supporting wafer and the integrated circuit wafer, the supporting wafer is separated from the integrated circuit wafer. This is advantageous for enhancing the mechanical strength of the wafer, but the process is complicated and the manufacturing cost is high.

In view of the above problems, the present invention discloses a die attach method for an ultra-thin wafer process. It has the technical features described below to solve the existing problems.

In order to solve the above technical problem, the present invention provides a die attach method for an ultra-thin wafer process, which is low in cost, simple in production and production, stable in process, and can effectively improve product yield and improve on-wafer circuit. Performance.

A die attach method for an ultra-thin wafer process according to the present invention includes the steps of: providing a wafer including a front side of a wafer and a back side of a wafer, and forming an integrated circuit on a front side of the wafer Providing an adhesive layer; Providing a support substrate, bonding the support substrate to the front side of the wafer by using the adhesive layer; performing wafer back thinning on the back side of the wafer; bonding the wafer with the support substrate to the dicing film and Cutting the wafer and the supporting substrate to form a plurality of wafer particles with supporting substrate particles; bonding the plurality of wafer particles to the corresponding lead frame; stripping from the wafer particles The substrate particles are supported to complete the die patch.

The above-described die attach method for an ultra-thin wafer process, wherein after the wafer is thinned, a back surface process is performed on the back surface of the wafer to form device electrodes, and the back surface process includes back surface etching, back surface evaporation, Backside implant and backside laser annealing.

The above-described die attach method for an ultra-thin wafer process, wherein the support substrate is glass or quartz.

The above-described die attach method for an ultra-thin wafer process, wherein the adhesive layer is a double-sided thermal release tape.

The above-described die attaching method for an ultra-thin wafer process, wherein the double-sided thermal release tape has a pressure-sensitive adhesive layer on one side and a thermal release adhesive layer on the other side, the pressure-sensitive adhesive The adhesive layer is bonded to the support substrate, and the thermal release adhesive layer is bonded to the front side of the wafer.

The above-described die attach method for an ultra-thin wafer process, wherein the adhesive layer is heated to separate the adhesive layer from the wafer particles, thereby peeling off the support liner from the wafer particles Bottom particles.

The above-described die attach method for an ultra-thin wafer process, wherein the adhesive layer is a double-sided ultraviolet light-irradiated self-peeling tape.

The above-described die attach method for an ultra-thin wafer process, wherein the double-sided method Ultraviolet light is irradiated from the release tape with ultraviolet light to peel off the auxiliary adhesion layer, and the other side is ultraviolet light irradiated from the release adhesive layer, and the ultraviolet light irradiation peeling adhesion bonding layer is adhered to the support substrate, Ultraviolet light is applied to the wafer from the release adhesive layer.

The above-described die attach method for an ultra-thin wafer process, wherein the double-sided ultraviolet light is irradiated with ultraviolet rays from a release tape to separate the adhesive layer from the wafer particles, thereby realizing the slave wafer The support substrate particles are peeled off from the particles.

The above-described die attach method for an ultra-thin wafer process is characterized in that the wafer back thinning is to thin the wafer to 100 μm or less.

The die attaching method for the ultra-thin wafer process of the present invention has the following advantages and positive effects compared with the prior art by adopting the above technical solution:

1. In the present invention, since the support substrate is adhered to the front surface of the wafer provided with the integrated circuit by using an adhesive layer, and then the wafer is back-thinned, in the process, a support substrate is bonded to the wafer. The front side enhances the mechanical strength of the wafer, improves the yield of the wafer during the backside thinning process, and thins the wafer to 100 μm or less.

2. The support substrate and the adhesive layer of the present invention are cut synchronously with the wafer, and the support substrate particles are adhered to the wafer particles, thereby increasing the mechanical strength of the wafer particles, so that the wafer particles can be pasted at a high yield. On the lead frame or on the wiring substrate.

3. In the wafer particle bonding process of the present invention, the adhesive layer and the supporting substrate particles cover the side of the wafer particle on which the integrated circuit is provided, so as to avoid the climbing of the conductive silver paste to the integrated circuit. Affects the performance of integrated circuits on a wafer.

450‧‧‧ Conductive silver paste area

400a‧‧‧ wafer granules

410a‧‧‧Adhesive layer granules

420a‧‧‧Support substrate particles

440‧‧‧ chipsets

460‧‧‧ lead frame

100, 200, 300‧‧‧ release paper

110, 210‧‧‧ Thermal peel adhesive bonding layer

120, 220‧‧‧ polyester fiber layer

230‧‧‧pressure sensitive adhesive layer

240, 360‧‧‧ another release paper layer

310‧‧‧Self-peeling adhesive layer

340‧‧‧Base tape film

350‧‧‧ peeling auxiliary adhesive layer

400‧‧‧ wafer

410‧‧‧Adhesive layer

420‧‧‧Support substrate

430‧‧‧ cutting film

Embodiments of the present invention are described more fully with reference to the accompanying drawings. however, The accompanying drawings are for the purpose of illustration and description only,

Figure 1 is a schematic view of the structure of a single-sided tape.

Figure 2 is a schematic view showing the structure of a double-sided thermal release tape.

Figure 3 is a schematic view showing the structure of a double-sided ultraviolet light-emitting self-peeling tape.

Figure 4 is a schematic cross-sectional view showing the support substrate bonded to the front side of the wafer by an adhesive layer.

Figure 5 is a schematic cross-sectional view of the back side of the wafer with the support substrate after thinning.

Figure 6 is a schematic cross-sectional view showing the bonding of a wafer with a supporting substrate to a dicing film.

Figure 7 is a schematic cross-sectional view of a wafer with a supporting substrate cut into wafer particles with supporting substrate particles.

Figure 8 is a schematic diagram of a planar structure in which a wafer with a supporting substrate is divided into wafer particles.

Figure 9 is a schematic cross-sectional view showing bonding of wafer particles with supporting substrate particles to a lead frame.

Figure 10 is a schematic cross-sectional view showing the wafer particles adhered to the lead frame peeled off the support substrate particles.

Figure 11 is a flow chart of a die attach method for an ultra-thin wafer process of the present invention.

According to the disclosure of the patent application and the disclosure of the present invention, the technical solution of the present invention is specifically as follows: As shown in FIG. 1, a single-sided adhesive comprises a release paper layer 100 and a thermal release adhesive layer 110. The polyester fiber layer 120, the release paper layer 100 is used to protect the thermal release adhesive layer 110, and the release paper layer 100 is peeled off in use, and the thermal release adhesive layer 110 serves as an adhesive.

As shown in Fig. 2, the double-sided thermal release tape contains a separation from the single-sided adhesive described above. The paper layer 200, another release paper layer 240, a thermal release adhesive layer 210, a polyester fiber layer 220, and a pressure sensitive adhesive layer 230. The release paper layer 200 and the other release paper layer 240 are respectively used to protect the thermal release adhesive layer 210 and the pressure sensitive adhesive layer 230, wherein the thermal release adhesive layer 210 and the pressure sensitive adhesive layer 230 The adhesion of the adhesive layer 210 can be adjusted by thermal adjustment of the adhesion of the adhesive layer 210.

As shown in FIG. 3, the double-sided ultraviolet light irradiation self-peeling tape comprises a release paper layer 300, another release paper layer 360, ultraviolet light irradiation self-peeling adhesive layer 310, base tape film 340, ultraviolet light irradiation peeling auxiliary adhesion. Layer 350. Among them, the ultraviolet light is irradiated from the peeling adhesive layer 310 and the ultraviolet light is irradiated to the peeling auxiliary adhesive layer 350. When the ultraviolet light irradiation dose is within a certain range, the ultraviolet light is irradiated from the peeling adhesive layer 310 to completely release the gas and escape from the adhesive face.

As shown in FIG. 4, the wafer 400 includes a wafer front surface and a wafer back surface, and an integrated circuit is formed on the front surface of the wafer, and the support substrate 420 is adhered to the front surface of the wafer 400 by the adhesive layer 410. In a preferred embodiment, the adhesive layer 410 is a double-sided thermal release tape, the pressure-sensitive adhesive layer of the adhesive layer 410 is bonded to the support substrate 420, and the thermal release adhesive of the adhesive layer 410 The laminate is bonded to the front side of the wafer 400. In another embodiment, the adhesive layer 410 is double-sided ultraviolet light irradiated from the release tape, and the ultraviolet light-emitting peeling auxiliary adhesive layer of the adhesive layer 410 is adhered to the support substrate 420, and the adhesive layer 410 is Ultraviolet light is adhered to the front side of the wafer 400 from the release adhesive layer.

As shown in FIG. 5, the wafer 400 in FIG. 4 is back-thinned on the back side of the wafer, and can be cut or polished. The support wafer 420 supports the wafer 400 to enhance the mechanical structure of the wafer 400. Intensity, the wafer 400 can be thinned to 100 μm or less. For the power semiconductor device, after the wafer 400 is thinned, the back surface of the wafer 400 is etched, evaporated, and ion implanted. And a backside process such as laser anneal to form the back electrode of the wafer.

As shown in FIG. 6, the back surface of the wafer 400 with the support substrate 420 obtained by the back surface thinning and the back surface process is bonded to the dicing film 430.

As shown in FIG. 7, the wafer 400 with the support substrate 420 placed on the dicing film 430 is cut, and the support substrate 420, the adhesive layer 410, and the wafer 400 are dimensioned according to a single wafer (Die Size). The wafer group 440 is cut into a plurality of wafers 440 in which the support substrate particles 420a, the adhesive layer particles 410a, and the wafer particles 400a are combined, and the adhesive layer particles 410a maintain their adhesive properties for bonding the support substrate particles 420a to the crystal. On the round particles 400a. At the same time, the dicing film 430 is partially cut in the longitudinal direction but maintains overall connectivity. Since the cutting device needs to pass through the support substrate 420 and optically identify the size of the individual wafers, that is, the support substrate 420 must ensure that the optical device has a identifiable size for the individual wafers of the wafer 400a. Therefore, the support substrate 420 is preferably glass or quartz which has good transparency to the optical device.

As shown in FIG. 8, on the dicing film 430, the entire wafer is diced into a plurality of wafer sets 440. .

As shown in Fig. 9, "spotting" is performed on the small island area (PDA) of the lead frame 460 to form a plurality of conductive silver paste regions 450, and the adhesion of the conductive silver paste through the conductive silver paste region 450 will be increased. A wafer set 440 is bonded to the plurality of conductive silver paste regions 450. This process is a Die Attachment of the wafer particles 400a, although it is of course also possible to bond a single wafer set to the lead frame 460, depending on actual needs.

The wafer particles 400a have a wafer particle 400a having a thickness of the wafer particle 400a of 100 um or less with respect to the wafer substrate 400a without a supporting substrate, and the wafer particle 400a has a thickness of 100 um or less. Fragility, therefore, the support substrate particles 420a enhance the mechanical strength of the wafer particles 400a to avoid wafer cracks (Die Crack) and make wafer particles The 400a Die Attach process went smoothly.

Wherein, any one of the wafer sets 440 includes support substrate particles 420a, adhesive layer particles 410a, and wafer particles 400a, and the back surface of the wafer particles 400a is fixed on the lead frame 460 through the conductive silver paste region 450. The support substrate particles 420a and the adhesive layer particles 410a cover the integrated circuit portion on the front side of the wafer particles 400a to avoid conduction in the conductive silver paste region 450 due to excessive conductive silver paste or displacement of the wafer particles 400a. The silver paste touches the integrated circuit area of the wafer pellet 400a to cause corrosion of the integrated circuit or cause a short circuit of the integrated circuit.

In FIG. 9, after the conductive silver paste region 450 is cured, the support substrate particles 420a and the adhesive layer particles 410a of the wafer set 440 can be removed to complete the die patch, and the arrangement is as shown in FIG. Wafer particles 400a on lead frame 460. In a preferred embodiment, the adhesive layer particles 410a are double-sided thermal release tapes, and the thermal release adhesive layer adhered to the top of the wafer loses adhesion at high temperatures by heating the double-sided thermal release tape. Thereby, the adhesive layer particles 410a and the supporting substrate particles 420a adhered thereto are peeled off from the wafer particles 400a, and the peeling temperature can be selected to be 90 ° C, 120 ° C or 150 ° C. In another preferred embodiment, the adhesive layer particles 410a are double-sided ultraviolet light irradiated from the release tape, and the double-sided ultraviolet light is irradiated with ultraviolet light from the release tape, and the ultraviolet light adhered to the top of the wafer is self-peeled. The adhesive layer loses adhesion under irradiation of ultraviolet light, so that the adhesive layer particles 410a and the supporting substrate particles 420a adhered thereto are peeled off from the wafer particles 400a.

As shown in FIG. 11, the flow of the die attach method for the ultra-thin wafer process of the present invention is as follows: providing a wafer including a front side of the wafer and a back side of the wafer, formed on the front side of the wafer An integrated circuit; providing an adhesive layer; providing a support substrate, using the adhesive layer to support the support substrate Bonding to the front side of the wafer; thinning the back side of the wafer on the back side of the wafer; performing a backside process on the back side of the wafer to form the device electrode based on the thinned wafer; the bottom of the wafer with the supporting substrate Bonding to the dicing film and cutting the wafer and the supporting substrate to form a plurality of wafer particles with supporting substrate particles; bonding the plurality of wafer particles to the corresponding lead frame; The support substrate particles are peeled off on the round particles to complete the die patch.

After the product of the completed die patch as shown in FIG. 10 is obtained, the lead frame 460 including the conductive silver paste region 450 and the wafer particles 400a is baked (Cure), and then cleaned, wire bonded, and molded. Thereby, a molded wafer having an ultra-thin wafer is obtained.

A die attach method for an ultra-thin wafer process, which adheres a support substrate to a front side of a wafer, back-grinds a wafer with a support substrate, and simultaneously cuts on the cut film Supporting the substrate and the wafer, bonding the diced wafer particles with the supporting substrate particles to the corresponding lead frame to complete the die patch, and the method ensures that the wafer has sufficient mechanical strength on the one hand, On the other hand, the wafer is prevented from affecting the circuit performance when the die is mounted on the die.

Of course, it is to be understood that the foregoing description has been described in connection with the preferred embodiments of the invention, and the invention

The present invention is by no means limited to the details and methods shown in the above description or the drawings. The invention is capable of other embodiments and of various embodiments. In addition, you must also understand that the words and terms used herein and the abstracts are for the purpose of illustration only and are by no means limited.

Because of this, those skilled in the art will understand that the present invention is based on The ideas are readily available to design other structures, methods, and systems for the purpose of practicing several aspects of the invention. Therefore, it is essential that the appended claims be construed as including all such equivalents

450‧‧‧ Conductive silver paste area

400a‧‧‧ wafer granules

410a‧‧‧Adhesive layer granules

420a‧‧‧Support substrate particles

440‧‧‧ chipsets

460‧‧‧ lead frame

Claims (10)

A die attach method for an ultra-thin wafer process, comprising the steps of: providing a wafer comprising a wafer front side and a wafer back surface, forming a front surface of the wafer An integrated circuit; providing an adhesive layer; providing a support substrate, bonding the support substrate to the front side of the wafer by using the adhesive layer; and performing a wafer back thinning on the back side of the wafer; The wafer with the support substrate is bonded to a dicing film and the wafer and the support substrate are diced to form a plurality of wafer granules with a plurality of supporting substrate particles; on a lead frame Disposing, forming a plurality of conductive silver paste regions, bonding the plurality of wafer particles to the corresponding lead frame, and the back sides of the plurality of wafer particles are fixed via the plurality of conductive silver paste regions On the lead frame; and after the plurality of conductive silver paste regions are cured, the plurality of support substrate particles are stripped from the plurality of wafer particles to complete the die patch. The die attach method for an ultra-thin wafer process according to claim 1, wherein the back surface of the wafer is further thinned to include a back surface process on the back surface of the wafer to form a device electrode. The backside process includes a backside etch, a backside evaporation, a backside implant, and a backside laser anneal. The die attach method for an ultra-thin wafer process according to claim 1, wherein the support substrate is glass or quartz. The die attach method for an ultra-thin wafer process according to claim 1, wherein the adhesive layer is a double-sided thermal release tape. The die attach method for an ultra-thin wafer process according to claim 4, wherein the double-sided thermal release tape has a pressure-sensitive adhesive layer on one side and a thermal peeling on the other side. An adhesive layer on which the pressure-sensitive adhesive layer is adhered, and the thermal release adhesive layer is adhered to the front side of the wafer. A die attach method for an ultra-thin wafer process according to claim 5, wherein the adhesive layer is heated to separate the adhesive layer from the plurality of wafer particles. Thereby, stripping the plurality of support substrate particles from the plurality of wafer particles. The die attach method for an ultra-thin wafer process according to claim 1, wherein the adhesive layer is a double-sided ultraviolet light self-peeling tape. The die attach method for an ultra-thin wafer process according to claim 7, wherein the double-sided ultraviolet light is irradiated from one side of the release tape to an ultraviolet light to peel off the auxiliary adhesive layer, and the other is another One side is irradiated with an ultraviolet light from a peeling adhesive layer adhered to the supporting substrate, and the ultraviolet light is adhered to the front side of the wafer from the peeling adhesive layer. The die attach method for an ultra-thin wafer process according to claim 8, wherein the double-sided ultraviolet light is irradiated with ultraviolet rays from the peeling tape to extract from the plurality of wafer particles. The adhesive layer is separated to effect stripping of the plurality of support substrate particles from the plurality of wafer particles. The die attach method for an ultra-thin wafer process according to claim 1, wherein the wafer back thinning is to thin the wafer to 100 μm or less.