TWI476896B - Multi-chip module and manufacturing method thereof - Google Patents

Description

Multi-chip module and method of manufacturing same

The present invention relates to a multi-wafer module and a method of fabricating the same, and more particularly to a multi-wafer module in which a high-voltage component wafer and a low-voltage control wafer are fixed to the same wafer holder and a method of fabricating the same.

1 shows a typical power supply circuit in which a low voltage control chip 14 in a multi-chip module 10 operates a high voltage component wafer 12 in accordance with a flyback feedback signal FB and a current sense signal CS. The power switch in the middle to convert the input voltage Vin into an output voltage Vout.

Referring to Figure 2A, a prior art arrangement of the multi-chip module 10 is shown. As shown, the multi-wafer module 10 includes a high voltage component wafer 12 and a low voltage control wafer 14. The high voltage component wafer 12 is fixed to the dedicated wafer holder 11; and the low voltage control wafer 14 is fixed to the other dedicated wafer holder 13. In general, the manufacturing process of the high-voltage component and the low-voltage component is different, and the manufacturing cost is lower than that of manufacturing the same substrate at the same time. Therefore, it is common to manufacture the high-voltage component wafer 12 and the low-voltage control wafer 14 respectively; If it is a vertical component, the surface of the substrate has a potential. Therefore, the high-voltage component wafer 12 and the low-voltage control wafer 14 are not preferably fixed on the same wafer holder at the same time, so as to avoid mutual influence or even cause a short circuit. The specific implementation manner is as shown in FIG. 2A. As shown, the high voltage component wafer 12 and the low voltage control wafer 14 are mounted on different wafer holders 11 and 13 and packaged in the same module. An advantage of this prior art is that the high voltage component die 12 and the low voltage control die 14 are integrated within a single package and the interference effects of the wafer signals are avoided.

Fig. 2B is a cross-sectional view showing the AA tangent line in Fig. 2A. As shown in the figure, the high-voltage component wafer 12 and the low-voltage control wafer 14 are respectively fixed on the separate wafer holder 11 and the wafer holder 13, and the wafers are coupled to each other by metal wires 15 to transmit signals. A disadvantage of this prior art is that the wafer is fixed to a single dedicated wafer holder, so that the area of each wafer holder is small relative to the arrangement of the common wafer holder, so that the heat dissipation efficiency is relatively poor. In addition, a temperature sensor (not shown) in the low voltage control wafer 14 cannot sense the temperature of the high voltage component wafer 12 (or the sensing accuracy is poor) to initiate over temperature protection when the temperature is too high. OTP). The above prior art is described, for example, in U.S. Patent Application Serial No. 2007/0200537.

Figures 3A-3C show prior art of another multi-wafer module 20 arrangement. This prior art integrates high voltage components and low voltage components into a monolithic wafer 22 as compared to the prior art described above. As shown in FIG. 3A, the wafer holder 21 has a single wafer 22 secured thereto, such that the wafer holder 21 has a lower heat dissipation area than the prior art, the separate wafer holders 11 and 13 of the prior art. Large, with better heat dissipation. 3B shows a top view of a single wafer 22, respectively, in a simplified view, with the high voltage component 221 and the low voltage component 222 integrated into a single wafer 22 as shown. Fig. 3C is a cross-sectional view showing the line AA in Fig. 2A. However, the disadvantage of this prior art is that the high voltage component needs to be fabricated on the same substrate as the low voltage component at the same time, and the manufacturing cost thereof is high. Moreover, the high voltage component and the low voltage component are on the same substrate, and the noise problem of signal mutual influence is easily generated. For example, crosstalk and other issues.

In view of the above, the present invention is directed to the deficiencies of the prior art described above, and provides a multi-chip module in which a high-voltage component wafer and a low-voltage control wafer are fixed on the same wafer holder, and a manufacturing method thereof, which can improve the heat dissipation problem of the wafer and does not require an increase in manufacturing. cost.

One of the objects of the present invention is to provide a multi-wafer module.

Another object of the present invention is to provide a method of fabricating a multi-wafer module.

In order to achieve the above object, in one aspect, the present invention provides a multi-chip module comprising: a high voltage component wafer having at least one power switch; and a low voltage control wafer by a metal wire and the high voltage component a wafer coupling; a single wafer holder for mounting the high voltage component wafer and the low voltage control wafer thereon; and a plurality of pins coupled to the single wafer holder by an extension or metal wire of the wafer holder.

In one embodiment, the high voltage device chip preferably includes: a lateral metal oxide semiconductor field effect transistor (MOSFET) power switch; and a lateral depletion start switch.

The multi-chip module, wherein the high voltage device chip further comprises a thermal diode for sensing temperature.

In another embodiment, the lateral depletion start switch preferably has a lateral depletion MOSFET or a lateral depletion junction field effect transistor (JFET).

In another embodiment, the power switch has a first current inflow end, a first control end, and a first current outflow end, and by the operation of the first control end, controlling a switch current to flow into the first a current flowing into the end and flowing out from the first current outflow end; the high voltage component chip further includes a sampling transistor for sampling the switching current, comprising: a second current inflow end, included in the first current inflow a second control terminal is included in the first control terminal; and a second current outflow terminal is isolated from the first current outflow terminal and generates a sampling current proportional to the switch current.

In another aspect, the present invention also provides a method for fabricating a multi-chip module, comprising: providing a high voltage device chip having at least one power switch; coupling the high voltage device wafer to a low voltage control wafer by a metal wire; The high voltage device wafer and the low voltage control wafer are fixed to a single wafer holder; and the single wafer holder is coupled to the plurality of pins by an extension or metal wire of the wafer holder.

The purpose, technical content, features and effects achieved by the present invention will be more readily understood by the detailed description of the embodiments.

Referring to FIGS. 4A and 4B, a first embodiment of the present invention is shown. The multi-chip module 30 includes a high voltage component wafer 32 having at least one power switch, a low voltage control wafer 34, a single wafer holder 31 and a plurality of pins 37. . As shown in FIG. 4A, the low voltage control wafer 34 is coupled to the high voltage device wafer 32 by metal wires 35. Further, both the high voltage element wafer 32 and the low voltage control wafer 34 are fixed to the single wafer holder 31, as shown in the cross-sectional view taken along line CC in Fig. 4A shown in Fig. 4B. In addition, the plurality of pins 37 are coupled to the low voltage control wafer 34 by the extensions 39 or metal wires 35 of the wafer holder 31 and the high voltage device wafer 32 on the single wafer holder 31.

In order to prevent the high voltage component chip 32 and the low voltage control wafer 34 from being fixed on the single wafer holder 31, and to avoid the substrate surface of the vertical high voltage component and the substrate surface of the low voltage control wafer as described in the prior art, the potential is different; The high voltage component wafer 32 can be, but is not limited to, comprising: a lateral metal oxide semiconductor field effect transistor (MOSFET) power switch; and/or a lateral depletion start switch. Since the lateral high voltage element is different from the vertical high voltage element, the surface of the substrate has the same potential (ground) as the surface of the substrate of the low voltage control wafer, and thus can be fixed to the same wafer holder 31.

The high voltage component chip 32 can be, but is not limited to, including, for example, a thermal diode, which can be used to sense the temperature and thereby control the high voltage component to further prevent the wafer from overheating.

In addition, the lateral depletion start switch is, for example but not limited to, a lateral depletion MOSFET or a lateral depletion junction field effect transistor (JFET) for operating in a circuit startup procedure.

Figures 5A-5C show a second embodiment of the invention. As shown in FIG. 5A, the multi-chip module 40 includes a high voltage element wafer 42 and a low voltage control wafer 44. In the present embodiment, the high voltage component wafer 42 includes, for example, a power switch S1 and a sampling transistor S2, and the sampling transistor S2 is used to sense the current of the power switch S1. The current inflow end of the sampling transistor S2 is coupled to the current inflow end of the power switch S1. The control terminal of the sampling transistor S2 and the control terminal of the power switch S1 are coupled to the control pin Gate of the low voltage control chip 44. The current outflow end of the sampling transistor S2 is coupled to one end of the resistor R, and the other end of the resistor R is coupled to the ground. (In the case of NMOS, the current inflow terminal is a drain, the control terminal is a gate, and the current outflow terminal is a source; in the case of a PMOS or a dual carrier junction transistor, it is a corresponding terminal, which is in the same technical field. It is well known to those of ordinary skill.) With this sampling method, the power loss of the sensing power switch current can be reduced, and the efficiency can be improved, and the sampling accuracy can be improved. In addition, referring to FIG. 5B, the mechanism for sensing the power switch S1 current by the sampling transistor S2 to achieve over current protection (OCP) is shown, and the current sensing CS connection of the low voltage control chip 44 can be further omitted. foot. As shown in FIG. 5B, the source of the sampling transistor S2 is coupled to a comparator circuit, and compared with a set value, and an overcurrent protection signal OCP is generated to achieve an overcurrent protection mechanism, thereby omitting the low voltage control chip 44. The current senses the CS pin to improve integration and reduce manufacturing costs.

Figure 5C shows a top view of the sampling transistor S2 and the power switch S1. As shown in FIG. 5C, the power switch S1 includes a drain Drain, a drift region, a gate Gate, and a source Source1. In a practical practice, it can be considered that the source Source1 is divided into a small segment as the source source 2 of the sampling transistor S2, and the drain Drain, the drift region, and the gate Gate are shared with the power switch S1, that is, The drain Drain (current inflow end) and the gate Gate (control end) of the power switch S1 also serve as or contain the drain Drain (current inflow end) and the gate Gate (control end) of the sampling transistor S2, respectively, and the sampling power The source Source2 (current outflow end) of the crystal S2 is isolated from the source Source1 (current outflow end) of the power switch S1, but the sampling transistor S2 and the power switch S1 are integrated into a single component to save component area and simplify the component fabrication process. In this way, according to the size ratio of the source Source2 and the source Source1, and the sensed source Source2 voltage or current signal, the switching current of the power switch S1 can be derived as the current sensing signal CS or directly used. Overcurrent protection mechanism.

The present invention has been described with reference to the preferred embodiments thereof, and the present invention is not intended to limit the scope of the present invention. In the same spirit of the invention, various equivalent changes can be conceived by those skilled in the art. For example, the power switch S1 can be a PMOS or NMOS transistor; in the circuit of each embodiment shown, components that do not affect the main meaning of the signal, such as other switches, can be inserted; for example, the inputs of the comparator or the error amplifier can be interchanged. For example, the multi-chip module of the present invention can be applied to various power supply circuits, such as a power factor correction (PFC) circuit, a flyback power factor correction circuit, or a half bridge. The circuit or the like is not limited to the flyback circuit as shown in each drawing. All such modifications may be made in accordance with the teachings of the present invention, and the scope of the present invention should be construed to cover the above and other equivalents.

10, 20, 30, 40‧‧‧ multi-chip modules

11,13,15,21,31‧‧‧ wafer holder

12,16,32,42‧‧‧High-voltage component wafer

14,34,44‧‧‧Low-voltage control chip

15,35‧‧‧Metal wire

22‧‧‧ Single chip

221‧‧‧High-voltage components

222‧‧‧ Low-voltage components

37‧‧‧ pin

39‧‧‧Extension

CS‧‧‧current sensing signal

Drain‧‧‧汲

Drift Region‧‧‧Drift Zone

FB‧‧‧ feedback signal

Gate‧‧‧ gate

R‧‧‧resistance

S1‧‧‧ power switch

S2‧‧‧Sampling transistor

Source 1, Source 2‧‧‧ Source

Vin‧‧‧Input voltage

Vout‧‧‧ output voltage

Figure 1 shows a typical power supply circuit.

2A-2B shows a prior art arrangement of multi-wafer module 10.

Figures 3A-3C show prior art of another multi-wafer module 20 arrangement.

4A-4B shows a first embodiment of the present invention.

Figures 5A-5C show a second embodiment of the invention.

30. . . Multi-chip module

31. . . Wafer holder

32. . . High voltage component chip

34. . . Low voltage control chip

35. . . Metal wire

37. . . Pin

39. . . Extension

Claims (8)

A multi-chip module comprising: a high voltage component wafer having at least one power switch and a thermal diode for sensing temperature; and a low voltage control wafer coupled to the high voltage component wafer by a metal wire a single wafer holder for mounting the high voltage component wafer and the low voltage control wafer thereon; and a plurality of pins coupled to the single wafer holder by an extension or metal wire of the wafer holder. The multi-chip module of claim 1, wherein the high voltage device chip comprises: a lateral metal oxide semiconductor field effect transistor (MOSFET) power switch; and a Horizontal depletion start switch. The multi-wafer module of claim 2, wherein the lateral depletion start switch has a lateral depletion MOSFET or a lateral depletion junction field effect transistor (JFET). The multi-chip module of claim 1, wherein the power switch has a first current inflow end, a first control end, and a first current outflow end, by operation of the first control end, Controlling a switching current flowing into the first current inflow end and flowing out from the first current outflow end; the high voltage component chip further includes a sampling transistor for sampling the switching current, comprising: the first current inflow end; The first control terminal; and a second current outflow end are isolated from the first current outflow end, and generate a sampling current having a ratio of the switching current, wherein the sampling transistor Integrates with the power switch into a single component. A multi-chip module manufacturing method comprising: providing a high-voltage component chip having at least one power switch and a thermal diode for sensing temperature; coupling the high-voltage component wafer to a low voltage by a metal wire Controlling the wafer; fixing the high voltage component wafer and the low voltage control wafer to a single wafer holder; and coupling the single wafer holder to the plurality of pins by an extension or metal wire of the wafer holder. The multi-chip module manufacturing method of claim 5, wherein the high voltage device chip comprises: a lateral metal oxide semiconductor field effect transistor (MOSFET) power switch; And a horizontal depletion start switch. The multi-wafer module manufacturing method of claim 6, wherein the lateral depletion start switch has a lateral depletion MOSFET or a lateral depletion junction field effect transistor (JFET). The multi-chip module manufacturing method of claim 5, wherein the power switch has a first current inflow end, a first control end, and a first current outflow end, wherein the first control end is Operating, controlling a switching current to flow into the first current inflow end and flowing out from the first current outflow end; the high voltage component chip further includes a sampling transistor for sampling the switching current, the method comprising: the first current inflow a first control terminal; and a second current outflow end, which is isolated from the first current outflow end and generates a sampling current having a ratio of the switching current, wherein the sampling transistor Integrates with the power switch into a single component.