TWI474406B - Metal-oxide-semiconductor field-effect transistor having ceramic materials of metal oxide and the manufacturing method thereof are disclosed - Google Patents
Metal-oxide-semiconductor field-effect transistor having ceramic materials of metal oxide and the manufacturing method thereof are disclosed Download PDFInfo
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本發明係有關於一種半導體元件,尤指一種具金屬氧化物陶瓷材料之半導體場效電晶體(MOSFET)及其製法。The present invention relates to a semiconductor device, and more particularly to a semiconductor field effect transistor (MOSFET) having a metal oxide ceramic material and a method of fabricating the same.
MOSFET(metal-oxide-semiconductor field-effect transistor,金屬氧化物半導體場效電晶體)為目前各種電子元件最基本的組成單元,目前製作MOSFET最常使用的材料乃係以矽(Si)為主的半導體材料,經由半導體加工技術,可製作出具有P-N接面組成單元的電子元件,進而製作出MOSFET。而MOSFET的組成元件已廣泛地應用到各種光電產品的設計與製作上。MOSFET (metal-oxide-semiconductor field-effect transistor) is the most basic component of various electronic components. Currently, the most commonly used materials for MOSFETs are bismuth (Si). In the semiconductor material, an electronic component having a PN junction unit can be fabricated through a semiconductor processing technique to fabricate a MOSFET. The components of MOSFETs have been widely used in the design and fabrication of various optoelectronic products.
傳統的MOSFET結構係由P-N接面形成有傳送訊號的源極(source)和汲極(drain)兩區域,同時介於這兩區域間存有由上至下的金屬層-絕緣氧化層-半導體層(MOS)等,藉由控制閘極(gate)金屬層與汲極區的電壓,使得電子訊號可由源極區傳至汲極區。如中華民國發明專利I282623號(係對應美國申請案10/142,674)專利案、發明專利I272679號(係對應美國申請案10/039,068)專利案,及發明專利417234號(係對應美國申請案60/032,041)專利案等即揭露出有相關之構造及原理。The conventional MOSFET structure is formed by a PN junction surface having a source and a drain of a signal, and a metal layer-insulating oxide layer-semiconductor is present between the two regions. A layer (MOS) or the like allows the electronic signal to be transmitted from the source region to the drain region by controlling the voltage of the gate metal layer and the drain region. For example, the Republic of China invention patent I282623 (corresponding to US application 10/142, 674) patent case, invention patent I272679 (corresponding to US application 10/039, 068) patent case, and invention patent 417234 (corresponding to US application 60/ 032,041) Patent cases reveal the relevant structure and principle.
然而,矽晶雖然是一良好的半導體材料,但其與如陶瓷材料相較下,在物理與化學性質上仍具有其侷限,例如:耐腐蝕性、堅硬耐刮性、高頻系統等的應用上,矽晶仍具有不足之處。因此,隨著技術之發展,如何改進與提昇MOSFET於物理與化學性質上之特性,及降低製造成本等的目的,即是相關研究人員所著重方向。However, although twin is a good semiconductor material, it has its physical and chemical properties compared with ceramic materials, such as corrosion resistance, hard scratch resistance, high frequency systems, etc. On the top, the twins still have shortcomings. Therefore, with the development of technology, how to improve and improve the physical and chemical properties of MOSFETs, and reduce the cost of manufacturing, etc., is the focus of relevant researchers.
本發明之目的,係提出一種可提昇物理與化學性質,及具有加工與製作上較為簡單的具金屬氧化物陶瓷材料之半導體場效電晶體(MOSFET)及其製法。The object of the present invention is to provide a semiconductor field effect transistor (MOSFET) having a metal oxide ceramic material which can improve physical and chemical properties and has a relatively simple processing and fabrication.
為達上述之目的,本發明提供一種具金屬氧化物陶瓷材料之半導體場效電晶體(MOSFET),包括:一基板;一具金屬氧化物陶瓷材料的第一半導體層,其係形成於該基板上;一絕緣層,其係突設形成於該第一半導體層上,且使該第一半導體層區隔成有至少兩間隔之區塊;一具離子植入之第二半導體層,其係位於該第一半導體層之兩區塊下;第一導電層,其係形成於該第二半導體層上,該第一導電層具有一源極電極及一汲極電極;以及一第二導電層,其係形成於該絕緣層上,該第二導電層具有一閘極電極。To achieve the above object, the present invention provides a semiconductor field effect transistor (MOSFET) having a metal oxide ceramic material, comprising: a substrate; a first semiconductor layer having a metal oxide ceramic material formed on the substrate An insulating layer formed on the first semiconductor layer and partitioning the first semiconductor layer into at least two spaced regions; an ion implanted second semiconductor layer Located under two blocks of the first semiconductor layer; a first conductive layer formed on the second semiconductor layer, the first conductive layer having a source electrode and a drain electrode; and a second conductive layer It is formed on the insulating layer, and the second conductive layer has a gate electrode.
為達上述之目的,本發明並提供一種具金屬氧化物陶瓷材料之半導體場效電晶體(MOSFET)的製法,包括:提供一基板;形成一具金屬氧化物陶瓷材料之第一半導體層於該基板上;形成一絕緣層以突設於該第一半導體層上,且將該第一半導體層區隔成有至少兩間隔之區塊;形成一具離子植入之第二半導體層位於該第一半導體層之兩區塊下;形成一第一導電層於該第二半導體層上,以具有一源極電極及一汲極電極;以及形成一第二導電層於該絕緣層上,以具有一閘極電極。To achieve the above object, the present invention also provides a method of fabricating a semiconductor field effect transistor (MOSFET) having a metal oxide ceramic material, comprising: providing a substrate; forming a first semiconductor layer having a metal oxide ceramic material thereon An insulating layer is formed on the first semiconductor layer, and the first semiconductor layer is partitioned into at least two spaced regions; and an ion implanted second semiconductor layer is formed on the substrate a second semiconductor layer is formed on the second semiconductor layer to have a source electrode and a drain electrode; and a second conductive layer is formed on the insulating layer to have A gate electrode.
本發明具有之效益:應用金屬氧化物陶瓷材料,再經由簡易加工後,從而可得到具有P-N接面的陶瓷半導體元件,則和習知以矽所製成之半導體元件相較下,應用金屬氧化陶瓷材料所具有特性,如高耐腐蝕性、堅硬耐刮性、高頻系統的應用性,進而可提昇物理與化學性質上的目的,從而可擴大電子元件的設計與應用範圍,且使得本發明具有加工與製作上較為簡單且具有降低成本之成效。The invention has the advantages that the metal oxide ceramic material is applied, and after the simple processing, the ceramic semiconductor component having the PN junction can be obtained, and the metal oxide is applied compared with the conventional semiconductor component made of germanium. Ceramic materials have characteristics such as high corrosion resistance, hard scratch resistance, high frequency system application, and thus physical and chemical properties, thereby expanding the design and application range of electronic components, and making the present invention It has the advantages of simple processing and production and low cost.
為使能更進一步瞭解本發明之特徵及技術內容,請參閱以下有關本發明之詳細說明與附圖,然而所附圖式僅提供參考與說明用,並非用來對本發明加以限制者。For a better understanding of the features and technical aspects of the present invention, reference should be made to the accompanying drawings.
請參閱第一圖至第六圖,本發明係提出一種「具金屬氧化物陶瓷材料之半導體場效電晶體及其製法」,其中該製法係可包括如下列所述之步驟:(S100)提供一基板10,該基板10可係為任何已知導體或非導體材料,如以ITO(indium tin oxide,氧化銦錫)導電玻璃作為導體材料,或係以玻璃作為非導體材料等皆可。Referring to the first to sixth figures, the present invention provides a "semiconductor field effect transistor having a metal oxide ceramic material and a method of manufacturing the same", wherein the method can include the following steps: (S100) A substrate 10, which may be any known conductor or non-conductor material, such as ITO (indium tin oxide) conductive glass as a conductor material, or glass as a non-conductor material.
(S200)形成一具金屬氧化陶瓷材料之第一半導體層20於基板10上;其中,所述具金屬氧化陶瓷材料之第一半導體層20之製備技術,其係可使用如:氣凝合成法、機械合金法、化學還原法或溶凝膠法等方式所製備而成,在本發明中,係以溶凝膠法為例,因此,該第一半導體層20係可包含有具奈米(10-9 m)級金屬氧化物之陶瓷顆粒、一高分子黏著劑及一溶劑。(S200) forming a first semiconductor layer 20 of a metal oxide ceramic material on the substrate 10; wherein the first semiconductor layer 20 having the metal oxide ceramic material is prepared by using, for example, a gas condensation synthesis method It is prepared by a mechanical alloy method, a chemical reduction method or a lyotropic method. In the present invention, the sol gel method is taken as an example, and therefore, the first semiconductor layer 20 may contain a nanometer ( 10 -9 m) metal oxide ceramic particles, a polymer adhesive and a solvent.
該金屬氧化物之材質可選自二氧化鈦(TiO2 )、氧化鋅(ZnO)、二氧化錫(SnO2 )、三氧化二鐵(Fe2 O3 )及氧化鎳(NiO)其中之一者,較佳地,係選自二氧化鈦。該溶劑可係為酒精,該高分子黏著劑可係為聚乙烯醇缩丁醛(Poly(vinvl butyral),PVB)、聚甲基丙烯酸甲酯(Poly(methyl methacrylate),PMMA)或聚乙烯醇(Poly(vinyl alcohol),PVA)等之高分子材料,但不以此為限,較佳地,可選用聚乙烯醇缩丁醛(PVB)。The material of the metal oxide may be selected from the group consisting of titanium oxide (TiO 2 ), zinc oxide (ZnO), tin dioxide (SnO 2 ), ferric oxide (Fe 2 O 3 ), and nickel oxide (NiO). Preferably, it is selected from the group consisting of titanium dioxide. The solvent may be alcohol, and the polymer adhesive may be polyvinyl (vinvl butyral), PVB, poly(methyl methacrylate, PMMA) or polyvinyl alcohol. (Poly (vinyl alcohol), PVA) and the like, but not limited thereto, preferably polyvinyl butyral (PVB).
該陶瓷顆粒及該高分子黏著劑係以預定之重量百分比均勻地混合於該溶劑中,如以TiO2 之陶瓷顆粒1g、高分子黏著劑0.06g、溶劑(酒精)7.5ml,再加上水2.5ml均勻地混合即可,但不以此例為限,進而形成第一半導體層20,再將其燒結後,從而良好地附著於基板10上,而適當之燒結溫度可係為約475℃上下即可。The ceramic particles and the polymer adhesive are uniformly mixed in the solvent at a predetermined weight percentage, such as 1 g of ceramic particles of TiO 2 , 0.06 g of a polymer adhesive, 7.5 ml of a solvent (alcohol), and water. 2.5 ml may be uniformly mixed, but not limited to this example, and the first semiconductor layer 20 is formed, and after sintering, it is well adhered to the substrate 10, and a suitable sintering temperature may be about 475 ° C. Up and down.
另外,奈米級金屬氧化物之陶瓷顆粒的製備,其係可使用如下列所述之方式:In addition, the preparation of ceramic particles of nano-sized metal oxides can be carried out as follows:
1、物理性粉碎:機械式粉碎、氫脆法、超音波法或其它(如火花法、爆裂法)等。1. Physical pulverization: mechanical pulverization, hydrogen embrittlement, ultrasonic or other methods (such as sparking, bursting).
2、液相法:噴霧法、水熱法、氧化、沉澱、合成、分解或結晶等。2. Liquid phase method: spray method, hydrothermal method, oxidation, precipitation, synthesis, decomposition or crystallization.
3、氣相法:蒸發、凝結法(電漿、高周波加熱)、氣相反應(鹵素化合物的氧或氮化、熱分解、氣相合成)。3. Gas phase method: evaporation, condensation method (plasma, high frequency heating), gas phase reaction (oxygen or nitridation of halogen compounds, thermal decomposition, gas phase synthesis).
上述之方式皆可,但也不以上述為限,且上述乃係為熟習奈米陶瓷合成技術者所皆知之製備技術,故本發明不再加以贅述上述之原理。The above-mentioned methods are all possible, but are not limited to the above, and the above is a preparation technique well known to those skilled in the art of nano ceramics synthesis, and the above-described principles will not be further described in the present invention.
(S300)形成一絕緣層30以突設於該第一半導體層20上,且將該第一半導體層20區隔成至少兩相間隔之區塊21a、21b;該絕緣層30可係為任何已知之絕緣性材料,如以二氧化矽(SiO2 )作為絕緣性材料,可係以如塗佈之技術方式而形成於第一半導體層20上,令絕緣層30能突設於第一半導體層20之中央處上。(S300) forming an insulating layer 30 protruding from the first semiconductor layer 20, and partitioning the first semiconductor layer 20 into at least two spaced apart blocks 21a, 21b; the insulating layer 30 can be any A known insulating material, such as cerium oxide (SiO 2 ) as an insulating material, may be formed on the first semiconductor layer 20 by a coating method, so that the insulating layer 30 can be protruded from the first semiconductor. At the center of layer 20.
(S400)形成一具離子植入之第二半導體層40於該第一半導體層20之兩區塊21a、21b下,以形成P-N型態接面;在本發明之具體實施中,所述之第二半導體層40係以具金屬離子或非金屬離子的溶液塗佈於該第一半導體層20之兩區塊21a、21b上,再經由燒結之過程中將金屬離子或非金屬離子植入於該第一半導體層20中,以於該第一半導體層20之兩區塊21a、21b下形成該第二半導體層40。(S400) forming an ion-implanted second semiconductor layer 40 under the two blocks 21a, 21b of the first semiconductor layer 20 to form a PN-type junction; in a specific implementation of the present invention, The second semiconductor layer 40 is coated on the two blocks 21a, 21b of the first semiconductor layer 20 with a solution of metal ions or non-metal ions, and then implants metal ions or non-metal ions through the sintering process. In the first semiconductor layer 20, the second semiconductor layer 40 is formed under the two blocks 21a, 21b of the first semiconductor layer 20.
所述之溶液可包含有金屬離子或非金屬離子、一高分子黏著劑及一溶劑,該金屬離子或非金屬離子及該高分子黏著劑係以預定之重量百分比均勻地混合於該溶劑中。所述之高分子黏著劑及溶劑可與上述之說明中相同,在此不再加贅述。The solution may contain a metal ion or a non-metal ion, a polymer adhesive, and a solvent, and the metal ion or non-metal ion and the polymer adhesive are uniformly mixed in the solvent at a predetermined weight percentage. The polymer adhesive and the solvent may be the same as those described above, and will not be further described herein.
所述之金屬離子可係為鐵(Fe)離子、鉻(Cr)離子、銀(Ag)離子或鋅(Zn)離子等,但不以此為限。所述之非金屬離子可係為氮(N)或磷(P)等,而所述燒結的適當溫度可係為約475℃上下即可。The metal ions may be iron (Fe) ions, chromium (Cr) ions, silver (Ag) ions or zinc (Zn) ions, etc., but are not limited thereto. The non-metal ions may be nitrogen (N) or phosphorus (P), etc., and the appropriate temperature for the sintering may be about 475 ° C or so.
藉此,經具金屬離子或非金屬離子的溶液塗佈於第一半導體層20上,再經燒結後,進而使離子植入於第一半導體層20中,離子能擴散至第一半導體層20的上方處,也就是說第二半導體層40是於第一半導體層20中形成,進而與第一半導體層20相較下,第二半導體層40係具有離子的半導體層;進一步地細說,若以鐵(Fe3+ )為離子時,當第二半導體層40植入至第一半導體層20時,可將原本部份之n-type的第一半導體層20轉變為p-type的第二半導體層40;若係以氮為離子時,利用氮的價位即可將部份之n-type的轉成p-type。Thereby, a solution having metal ions or non-metal ions is applied onto the first semiconductor layer 20, and after sintering, ions are implanted in the first semiconductor layer 20, and ions can be diffused to the first semiconductor layer 20. Above, that is, the second semiconductor layer 40 is formed in the first semiconductor layer 20, and further in comparison with the first semiconductor layer 20, the second semiconductor layer 40 is a semiconductor layer having ions; further, When iron (Fe 3+ ) is used as the ion, when the second semiconductor layer 40 is implanted into the first semiconductor layer 20, the original portion of the n-type first semiconductor layer 20 can be converted into the p-type The second semiconductor layer 40; if nitrogen is used as an ion, a part of the n-type can be converted into a p-type by using the valence of nitrogen.
(S500)形成一第一導電層50於該第二半導體層40上,以具有一源極電極51及一汲極電極52;所述之第一導電層50可係為任何已知具良好導電性材料,如金(Au)、銀(Ag)等之良好導電性材料,但不以此為限。(S500) forming a first conductive layer 50 on the second semiconductor layer 40 to have a source electrode 51 and a drain electrode 52; the first conductive layer 50 can be any known to have good conductivity Sex materials, such as gold (Au), silver (Ag) and other good conductive materials, but not limited to this.
(S600)形成一第二導電層60於該絕緣層30上,以具有一閘極電極61。(S600) A second conductive layer 60 is formed on the insulating layer 30 to have a gate electrode 61.
所述之第二導電層60也可係為如第一導電層50所述之任何已知具良好導電性材料。The second conductive layer 60 can also be any known good conductive material as described for the first conductive layer 50.
此外,須值得一提的是,上述之步驟(S500)及(S600)係可作進一步地步驟調換,亦即可先於絕緣層30上先形成第二導電層60,之後,再於第二半導體層40上形成第一導電層50。In addition, it should be noted that the above steps (S500) and (S600) can be further replaced, that is, the second conductive layer 60 can be formed first on the insulating layer 30, and then second. A first conductive layer 50 is formed on the semiconductor layer 40.
據此,經由上述之製法即可構成本發明之具金屬氧化物陶瓷材料之半導體場效電晶體,以包括有基板10、形成於基板10上的具金屬氧化物陶瓷材料之第一半導體層20、形成於第一半導體層20上的絕緣層30、形成於第一半導體層20之兩區塊21a、21b下的具離子植入之第二半導體層40、形成於第二半導體層40上的第一導電層50,及形成於絕緣層30上的第二導電層60等在上述說明中所述之構造。Accordingly, the semiconductor field effect transistor of the present invention having the metal oxide ceramic material can be formed by the above-described manufacturing method to include the substrate 10 and the first semiconductor layer 20 having the metal oxide ceramic material formed on the substrate 10. An insulating layer 30 formed on the first semiconductor layer 20, an ion-implanted second semiconductor layer 40 formed under the two blocks 21a, 21b of the first semiconductor layer 20, and formed on the second semiconductor layer 40 The first conductive layer 50, and the second conductive layer 60 formed on the insulating layer 30 are configured as described in the above description.
綜合上述之說明,本發明應用金屬氧化物陶瓷材料,經由簡易加工後,從而得到具有P-N接面的陶瓷半導體元件,則和習知以矽所製成之半導體元件相較下,此電晶體有別於與矽材電晶體不同的物理與化學特性,可擴展其應用範圍,及加工簡單,可降低製作成本的目的,乃係應用金屬氧化陶瓷材料所具有特性,如高耐腐蝕性、堅硬耐刮性、高頻系統的應用性,進而可提昇物理與化學性質上的目的,從而可擴大電子元件的設計與應用範圍。尤其是選用TiO2 時,因TiO2 可於較低溫下即可進行加工及可以低成本的方式製作出,因此,TiO2 在加工與製作上會比較簡單同時製作成本較低,當然本發明所提及其它之材質,如氧化鋅、二氧化錫、三氧化二鐵及氧化鎳等,也係具有與TiO2 相類同之特性與功效,藉此,使得本發明具有加工與製作上較為簡單且具有降低成本之成效。In summary, the present invention applies a metal oxide ceramic material, and after simple processing, a ceramic semiconductor component having a PN junction is obtained, which is compared with a conventional semiconductor component made of tantalum. Different from the physical and chemical properties different from the coffin crystal, it can expand its application range, and the processing is simple, which can reduce the production cost. It is the application of metal oxide ceramic materials, such as high corrosion resistance and hard resistance. The application of scratching and high-frequency systems can enhance the physical and chemical properties, thereby expanding the range of design and application of electronic components. In particular, when TiO 2 is selected, TiO 2 can be processed at a relatively low temperature and can be produced in a low-cost manner. Therefore, TiO 2 is relatively simple in processing and production, and the production cost is low, of course, the present invention Other materials, such as zinc oxide, tin dioxide, ferric oxide and nickel oxide, have the same characteristics and effects as those of TiO 2 , thereby making the invention simple in processing and production. And has the effect of reducing costs.
惟,上述所揭露之圖式、說明,僅為本發明之實施例而已,凡精於此項技藝者當可依據上述之說明作其他種種之改良,而這些改變仍屬於本發明之發明精神及以下界定之專利範圍中。However, the drawings and descriptions disclosed above are only examples of the present invention, and those skilled in the art can make various other modifications according to the above description, and these changes still belong to the inventive spirit of the present invention. The scope of the patents defined below.
10‧‧‧基板10‧‧‧Substrate
20‧‧‧第一半導體層20‧‧‧First semiconductor layer
21a、21b‧‧‧區塊Block 21a, 21b‧‧‧
30‧‧‧絕緣層30‧‧‧Insulation
40‧‧‧第二半導體層40‧‧‧Second semiconductor layer
50‧‧‧第一導電層50‧‧‧First conductive layer
51‧‧‧源極電極51‧‧‧Source electrode
52‧‧‧汲極電極52‧‧‧汲electrode
60‧‧‧第二導電層60‧‧‧Second conductive layer
61‧‧‧閘極電極61‧‧‧gate electrode
第一圖為本發明之步驟流程圖。The first figure is a flow chart of the steps of the present invention.
第二圖為本發明中基板之示意圖。The second figure is a schematic view of the substrate in the present invention.
第三圖為本發明中基板及第一半導體層之示意圖。The third figure is a schematic view of the substrate and the first semiconductor layer in the present invention.
第四圖為本發明中基板、第一半導體層及絕緣層之示意圖。The fourth figure is a schematic view of the substrate, the first semiconductor layer and the insulating layer in the present invention.
第五圖為本發明中基板、第一半導體層、絕緣層及第二半導體層之示意圖。The fifth figure is a schematic view of the substrate, the first semiconductor layer, the insulating layer and the second semiconductor layer in the present invention.
第六圖為本發明中基板、第一半導體層、絕緣層、第二半導體層及第一與第二導電層之示意圖。The sixth figure is a schematic view of the substrate, the first semiconductor layer, the insulating layer, the second semiconductor layer, and the first and second conductive layers in the present invention.
10...基板10. . . Substrate
20...第一半導體層20. . . First semiconductor layer
30...絕緣層30. . . Insulation
40...第二半導體層40. . . Second semiconductor layer
50...第一導電層50. . . First conductive layer
51...源極電極51. . . Source electrode
52...汲極電極52. . . Bipolar electrode
60...第二導電層60. . . Second conductive layer
61...閘極電極61. . . Gate electrode
Claims (8)
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JPS63289879A (en) * | 1987-05-21 | 1988-11-28 | Seiko Epson Corp | Super-semiconductor field-effect transistor |
JPH01264242A (en) * | 1988-04-14 | 1989-10-20 | Matsushita Electron Corp | Semiconductor device |
TW200935607A (en) * | 2008-02-05 | 2009-08-16 | Univ Yuan Ze | Ceramic MESFET device and a manufacturing method therefor |
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JPS63289879A (en) * | 1987-05-21 | 1988-11-28 | Seiko Epson Corp | Super-semiconductor field-effect transistor |
JPH01264242A (en) * | 1988-04-14 | 1989-10-20 | Matsushita Electron Corp | Semiconductor device |
TW200935607A (en) * | 2008-02-05 | 2009-08-16 | Univ Yuan Ze | Ceramic MESFET device and a manufacturing method therefor |
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Hirao, Takashi et al, "Bottom-Gate Zinc Oxide Thin-Film Transistors (ZnO TFTs) for AM-LCDs," Electron Devices, IEEE Transactions on , vol.55, no.11, pp.3136,3142, Nov. 2008^&rn^doi: 10.1109/TED.2008.2003330 * |
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