TWI473412B - Power supply circuit and method for rectifying ac signal - Google Patents

Description

Power supply circuit and alternating current signal rectification method

The invention relates to a power supply circuit and an alternating current signal rectification method, in particular to a power supply circuit and an alternating current signal rectification method for improving rectification efficiency and saving power.

1 shows a typical bridge rectifier power supply circuit 100, wherein the bridge rectifier circuit 11 includes a pair of diodes coupled to each other at opposite ends and a pair of forward ends coupled to each other, and connected Between the AC signals AC, the AC signal AC is converted into a rectified signal Vo1. This typical bridge rectifier power supply circuit 100 provides full-wave rectification of the AC signal, but since the diode has a forward voltage drop, for many applications, At the output voltage, this forward voltage drop cannot be ignored, thus causing a decrease in rectification efficiency. In addition, in the high-frequency switching power supply circuit, the heat dissipation problem of the diode also reduces the rectification efficiency and causes a problem of circuit reliability.

Referring to Figure 2, there is shown a power supply circuit 200 disclosed in U.S. Patent No. 7,411,768. As shown in the figure, the power supply circuit 200 rectifies the AC signal AC and converts it into a rectified signal Vo2. Compared with the foregoing typical bridge rectifier power supply circuit 100, the power supply circuit 200 can improve the rectification efficiency and the heat dissipation problem, but utilizes a metal oxide semiconductor (MOS) component and a Schottky diode component. The physical characteristics, the time point at which the switch is turned on cannot be accurately controlled, and there is still a problem of rectification efficiency; and this rectification method cannot achieve power-saving mode control.

In addition, the above prior art still has other shortcomings, for example, temperature changes often affect the operation of its components; accuracy is poor; noise removal capability is weak; cannot be adjusted according to demand; power saving mode cannot be achieved; The circuit of the AC signal has a low RC value, which is likely to cause a component to shoot through and the like.

In view of this, the present invention is directed to the deficiencies of the prior art described above, and provides a power supply circuit and an AC signal rectification method, which can improve rectification efficiency and save power.

One of the objects of the present invention is to provide a power supply circuit.

Another object of the present invention is to provide an alternating current signal rectification method.

For the above purposes, in one aspect, the present invention provides a power supply circuit for converting an AC signal into a rectified signal, the AC signal including a line signal and a neutral. The power supply circuit comprises: a bridge rectifier circuit comprising a pair of opposite ends coupled to each other and a pair of mutually coupled switching elements, the pair of diodes and the pair of switching elements being connected to the line Between the bit signal and the median signal, the bridge rectifier circuit operates the pair of switching elements according to at least one switch operation signal to convert the alternating signal into the rectified signal; and a control circuit generates the signal according to the alternating signal Switching the operation signal to operate the pair of switching elements; wherein the pair of switching elements includes a first switch and a second switch, the first switch is coupled to the line bit signal, and the second switch is coupled to the a bit signal, when the line bit signal is higher than the first preset value of the median signal, turning on the second switch, when the median signal is higher than the second preset value of the line bit signal, turning on the One turn off. The first preset value and the second preset value may be the same or different.

In another aspect, the present invention also provides an AC signal rectification method for converting an AC signal into a rectified signal, the AC signal including a line signal and a neutral signal, the AC signal The rectification method includes: providing a bridge rectifier circuit, comprising: a pair of opposite ends coupled to each other and a pair of mutually coupled switching elements, the pair of diodes and the pair of switching elements being connected to the line position signal And the pair of signals, wherein the pair of switching elements include a first switch and a second switch, the first switch is coupled to the line position signal, and the second switch is coupled to the center signal; When the line bit signal is higher than the first preset value of the median signal, the second switch is turned on; and when the median signal is higher than the second preset value of the line bit signal, the first switch is turned on. Thereby, the alternating signal is converted into the rectified signal. The first preset value and the second preset value may be the same or different.

In one embodiment, the control circuit preferably includes: a first comparison circuit that compares the first signal related to one of the line signals with the second signal associated with the one of the media signals, and according to the comparison result a second switch control signal is generated to control the second switch; and a second comparison circuit compares the second signal with the first signal, and according to the comparison result, generates a first switch control signal to control the first switch.

In the above power supply circuit, the control circuit further includes a light load detection circuit, and has a third comparison circuit that compares a third reference signal with the second signal and generates a first detection signal according to the comparison result. a fourth comparison circuit, comparing the third reference signal with the first signal, and generating a second detection signal according to the comparison result; a first logic circuit, according to the first detection signal and the second switch The control signal determines whether the second switch is turned on or off; and a second logic circuit determines whether the first switch is turned on or off according to the second detection signal and the first switch control signal.

In another implementation, the control circuit further includes a de-surge circuit and an operation circuit, wherein the de-surge circuit is coupled to the first comparison circuit and the second comparison circuit to compare the first comparison And performing a de-bounce processing on the result of the comparison between the circuit and the second comparison circuit; and the operation circuit generates the switch operation signal to operate the first switch according to a comparison result between the first comparison circuit and the second comparison circuit The second switch.

In another embodiment, the power supply circuit further includes a voltage dividing circuit for converting the line bit signal and the center signal into the first signal and the second signal, respectively, so that the first signal is The second signal is proportional to the line signal and the median signal, respectively.

The purpose, technical content, features and effects achieved by the present invention will be more readily understood by the detailed description of the embodiments.

Referring to Figure 3, there is shown a first embodiment of the present invention to illustrate the basic concepts of the present invention. The power supply circuit 300 includes a bridge rectifier circuit 31 and a control circuit 33. The bridge rectifier circuit 31 converts the AC signal AC into a rectified signal Vo3, wherein the AC signal AC includes a line signal L and a median signal N, and the signal waveforms of the line signal L and the center signal N are as shown in the upper part of FIG. It is, for example, two sine waves that are 180 degrees out of phase. The bridge rectifier circuit 31 includes a pair of diodes D1 and D2 coupled to each other at opposite ends, and a pair of mutually coupled switching elements Q1 and Q2. The diode pair D1 and D2 and the switching element pair Q1 and Q2 are connected between the line bit signal L and the median signal N. The control circuit 33 generates switching operation signals G1 and G2 according to the AC signal AC, and operates the switching elements Q1 and Q2, respectively, to convert the AC signal AC into the rectified signal Vo3.

The switching element Q1 is coupled to the line bit signal L, and the switching element Q2 is coupled to the center signal N. Please refer to FIG. 4, except that the line bit signal L and the median signal N are displayed, and the signal waveforms of the switch operation signals G1 and G2 are displayed. When the line bit signal L is higher than the median signal N plus the preset value Vref1, the switching operation signal G2 generated by the control circuit 33 is turned from the low level to the high level, for example, to turn on the switching element Q2; and the middle signal N is higher than When the line bit signal L is added to the preset value Vref1, the switching operation signal G1 is turned from the low level to the high level, for example, to turn on the switching element Q1.

In contrast to a typical bridge rectifier circuit, the first embodiment replaces the two diodes with switching elements Q1 and Q2 to avoid excessive forward voltage when the diode is turned on, and to improve the bridge rectifier circuit 31. s efficiency. In addition, the preset value Vref1 is used to ensure that the switching elements Q1 and Q2 are not turned on at the same time to avoid causing a problem of causing the components to shoot through.

Compared with the prior art shown in FIG. 2, the present embodiment can precisely control the timing at which the switching elements Q1 and Q2 are turned on, and further increase the rectification efficiency; and with the rectification method of the present invention, power saving mode control can be achieved. In addition, the present invention also includes other advantages over the above prior art. For example, the present invention can avoid the influence of temperature changes; the noise circuit can be designed to reduce the influence of noise; and can be adjusted according to application requirements; The circuit for detecting the AC signal can use the comparison circuit to increase the RC value, further ensuring that the component is not penetrated and the like.

Figure 5 shows a second embodiment of the invention. Different from the first embodiment, as shown in FIG. 5, the switch operation signal G1 and the switch operation signal G2 are kept at a high level, that is, the present invention can set different preset values as needed. Vref1 and Vref2 are different in time for the switching operation signal G1 and the switching operation signal G2 to remain at a high level. As shown in the figure, when the line bit signal L is higher than the median signal N plus the preset value Vref1, the switching operation signal G2 generated by the control circuit 33 is turned from the low level to the high level, for example, to turn on the switching element Q2; When the bit signal N is higher than the line bit signal L plus the preset value Vref2, the switching operation signal G1 is turned from the low level to the high level, for example, to turn on the switching element Q1.

Figure 6 shows a third embodiment of the present invention. This embodiment is a more specific embodiment of the control circuit 33. As shown, control circuit 33 includes comparison circuits 331 and 332. The signal Div1 is related to the line bit signal L, for example, the voltage division of the line bit signal L; the signal Div2 is related to the median signal N, for example, the partial pressure of the median signal N. The comparison circuit 331 compares the signal Div1 with the signal Div2, and generates a switch control signal G21 to control the switching element Q2 according to the comparison result. For example, but not limited to, when the signal Div1 is higher than the signal Div2 and the reference signal Vref3, the switch The control signal G21 is changed from a low level to a high level, for example. The switch control signal G21 can generate the switching operation signal G2 by, for example, a drive gate having an appropriate driving force to operate the switching element Q2. Similarly, the comparison circuit 332 compares the signal Div2 with the signal Div1, and according to the comparison result, generates the switch control signal G11 to control the switching element Q1, such as but not limited to the figure, when the signal Div2 is higher than the signal Div1 plus the reference signal Vref3 When the switch control signal G11 is turned from the low level to the high level, for example. The switch control signal G11 can generate the switching operation signal G1 by, for example, a drive gate having an appropriate driving force to operate the switching element Q1. The reference signal Vref3 can be designed to compare the internal offset between the two inputs of the circuits 331, 332, or can also be designed as an adjustable independent component. 4 and FIG. 6 , the setting of the reference signal Vref3 can be determined according to Vref1 in FIG. 4; further, if the reference signal Vref3 in the comparison circuits 331, 332 is changed to a different value, the fifth can be achieved. The waveform of the graph. The comparison circuits 331, 332 can be general comparators or hysteresis comparators.

Fig. 7 shows a fourth embodiment of the present invention. This embodiment is another more specific embodiment of the control circuit 43. Compared with the third embodiment shown in FIG. 6, the control circuit 43 of the present embodiment includes a light load detecting circuit 435 in addition to the comparing circuits 331 and 332; wherein the comparing circuits 331 and 332 operate As with the previous embodiment, the description will not be repeated, and the light load detection circuit 435 includes comparison circuits 433 and 434, and logic gates AND1 and AND2. For the purpose and function of the light load detection circuit 435, please refer to Figure 10A-10B first.

10A-10B shows the line position signal L and the median signal N when the load circuit is not heavily loaded and light load, respectively, in practical applications. For the signal waveform diagram of the virtual ground FGND, the node position of the virtual ground FGND can be seen in Figure 3. As shown in FIG. 10A, when the rectified signal terminal is coupled to the heavy load, that is, the current flowing through the rectified signal terminal is relatively high, the level of the virtual ground FGND can be kept up to the line bit signal L and the median signal N. Low level. On the other hand, as shown in FIG. 10B, when the rectified signal terminal is coupled to the light load, that is, the current flowing through the rectified signal terminal is relatively low, the level of the virtual ground FGND cannot completely keep up with the line bit signal L and medium. The lower level of the bit signal N. This is because when the current at the rectified signal terminal is relatively low, the body parasitic diodes of the switching elements Q1 and Q2 are not fully turned on and temporarily generate a large source-drain voltage difference, so that the level of the virtual ground FGND cannot completely follow the line. The lower level of the bit signal L and the median signal N causes a temporary deviation. Therefore, if the signal Div1 is directly compared with the signal Div2 under light load conditions, since the signal Div1 and the signal Div2 are both signals with respect to the virtual ground FGND, the level deviation of the virtual ground FGND will make the G1 and G2 hard. Cutting effect, causing additional wear and damage to components.

In the fourth embodiment of the present invention shown in FIG. 7, the light load detecting circuit 435 is provided to solve the above problem. In detail, according to the present invention, the light load detecting circuit 435 adjusts the time during which the switching elements Q1 and Q2 are turned on according to whether the load circuit is lightly loaded. The light load detection circuit 435 has comparison circuits 433 and 434, and logic gates AND1 and AND2. The comparison circuit 433 compares the reference signal Vref4 with the signal Div2, and generates a detection signal Det1 according to the comparison result. The detection signal Det1 is logically operated with the switch control signal G21 to generate a correct switching operation signal G2 (not shown) to operate the switching element Q2 (not shown). For example, as shown in the figure, the detection signal Det1 and the switch control signal G21 can be input to the logic gate AND1 for logical operation to determine whether the switching element Q2 is turned on, for example, but not limited to, both the detection signal Det1 and the switch control signal G21 are When the high level is on time, the switching element Q2 is turned on. Similarly, the comparison circuit 434 compares the reference signal Vref4 with the signal Div1, and generates a detection signal Det2 according to the comparison result. The detection signal Det2 is logically operated with the switch control signal G11 to generate a correct switching operation signal G1 (not shown) to operate the switching element Q1 (not shown). For example, as shown in the figure, the detection signal Det2 and the switch control signal G11 can be input to the logic gate AND2 for logical operation to determine whether the switching element Q1 is turned on, for example, but not limited to, both the detection signal Det2 and the switch control signal G11. When the high level is on time, the switching element Q1 is turned on. In this way, when the load circuit is lightly loaded, the time during which the switching elements Q1 and Q2 are turned on can be adaptively adjusted to prevent a high discharge current from flowing from the virtual ground FGND to the switching element, thereby causing damage.

It should be noted that the logic gates AND1 and AND2 are only one embodiment of the present invention, and need not be the logic gate as shown in the figure, as long as the function of confirming the conduction of the switching elements Q1 and Q2 is achieved, but Other circuits, and may vary depending on the type of switching elements Q1 and Q2 (for P-type or N-type elements) or the manner in which the input terminals of the comparison circuits 331, 332, 433, 434 are arranged, are included in the present invention. The function is designed to be well known to those of ordinary skill in the art, and will not be described herein.

The following describes how the light load detecting circuit 435 adjusts the on-time of the switching elements Q1 and Q2. Please also refer to the 7th, 11th-11B and 12th pictures. When the rectified signal end is coupled to the heavy load, that is, when the current Id is relatively high, the signal waveforms of the signal Div1, the signal Div2, and the virtual ground FGND are as follows. As shown in Fig. 11A, since the level of the virtual ground FGND can substantially keep up with the lower level of the line signal L and the medium signal N, the output of the comparison circuits 433 and 434 in Fig. 7 (signals Det1 and Det2) ) will not change, or the signals Det1 and Det2 will be ready before the signals G21 and G11 change, so the outputs of the logic gates AND1 and AND2 will be controlled by the signals G21 and G11 without receiving signals. Det1 and Det2 are affected. This means that when the rectified signal terminal is coupled to the heavy load, the light load detecting circuit 435 does not affect the switching operation signal G1 and the switching operation signal G2.

However, when the rectified signal terminal is coupled to the light load, that is, when the current Id is relatively low, the signal waveforms of the signal Div1, the signal Div2, and the virtual ground FGND are as shown in FIG. 11B, because the level of the virtual ground FGND cannot be Fully keep up with the lower level of the line signal L and the medium signal N, so as shown, the time when the signal Div2 is lower than the reference signal Vref4 will be later than the signal Div1 is higher than [the signal Div2 plus the reference signal Vref3] The time, that is, the time when the signal Det1 changes will be later than the time when the signal G21 changes, so the output of the logic gate AND1 will wait for the signal Det1 to change before outputting the high level. Similarly, the output of the logic gate AND2 will wait for the signal Det2 to change before outputting the high level. This means that when the rectified signal end is coupled to the light load, the light load detection circuit 435 adjusts the on-time of the switching operation signal G1 and the switching operation signal G2, and determines that the level of the virtual ground FGND has been followed by the line position signal L and The switching element Q1 or Q2 is turned on after the lower level of the bit signal N.

Figure 8 shows a fifth embodiment of the present invention. This embodiment is another more specific embodiment of the control circuit 53. Compared with the fourth embodiment shown in FIG. 7, the control circuit 53 of the present embodiment includes the circuit 536 and the circuit 537 in addition to the comparison circuits 331, 332, 433 and 434, and the logic gates AND1 and AND2. The circuit 536 includes, for example, two de-surge circuits coupled to the logic gates AND1 and AND2, respectively, to de-glitch the signals generated by the logic gates ANDI and AND2, and input the result to the circuit 537. The circuit 537 includes, for example, two operation circuits for receiving the de-surge signal, adjusting it to an appropriate level, and preventing the switching elements Q1 and Q2 from being simultaneously turned on, thereby generating switching operation signals G1 and G2 to operate the switching element Q1. With Q2. In the circuit 537, other safety protection circuits such as overcurrent protection or overvoltage protection can be set at the same time to avoid circuit damage, and the function of the power saving mode is added, which is well known to those skilled in the art. I will not repeat them here.

Figures 9A-9B show a sixth embodiment of the invention. In this embodiment, the display control circuit 33, 43, or 53 may further include voltage dividing circuits 338 and 339 for converting the line bit signal L and the median signal N into the signal Div1 and the signal Div2, respectively, so that the signal Div1 and the signal Div2 are respectively They are proportional to the line signal L and the median signal N, respectively. As shown in the figure, the voltage dividing circuits 338 and 339 are respectively coupled to the line bit signal L and the middle signal N, which are, for example but not limited to, including two resistors, and respectively take the voltage across one of the resistors as the signal Div1 and the signal. Div2.

Figure 13 is a diagram showing the power saving ratio of the present invention under different application conditions. Among them, the application conditions are as follows: Application App1: input voltage Vin is 265Vrms, switching element Q1 and Q2 on-resistance Ron is 1Ω, voltage dividing resistor Rd is 10MΩ; application 2 App2: input voltage Vin is 85Vrms, switching element Q1 With Q2 on-resistance Ron is 1Ω, voltage divider resistor Rd is 10MΩ; application three App3: input voltage Vin is 265Vrms, switching element Q1 and Q2 on-resistance Ron is 0.5Ω, voltage divider resistor Rd is 20MΩ; application four App4: input voltage Vin is 85Vrms, the on-resistance Ron of the switching elements Q1 and Q2 is 0.5Ω, and the voltage dividing resistor Rd is 20MΩ.

Taking the application of App1 as an example, when the input current peak Ip is 0.2A, which is indicated by point A in Fig. 13, the power saving ratio is calculated as follows:

P _L =V _D *Ip=0.6V*0.2A*∫sin(wt) dt/T=0.12W*(-cos(wt))/T=0.12W*2/π=0.076W

P _Ron =Ip ² *∫sin ² (wt) dt*Ron=0.2A ² /2*1W=0.02W

ΔP=0.076W-0.007W-0.02W=0.049W

Psave%=ΔP/P _L =0.049W/0.076W=64.5%

Wherein, P _L is the power consumption of the diode in the bridge rectifier circuit, V _D is the voltage drop of the diode in the bridge rectifier circuit, T is the period of the input current, and P _RDIV is the power consumption of the voltage divider resistor Rd. P _Ron is the power consumption of the switching element, ΔP is the power saving, and Psave% is the power saving ratio. It can be understood from the above that the power saving ratio of applying the present invention is quite high, which is one of the advantages of the present invention over the prior art.

The present invention has been described with reference to the preferred embodiments thereof, and the present invention is not intended to limit the scope of the present invention. In the same spirit of the invention, various equivalent changes can be conceived by those skilled in the art. For example, the switching elements Q1 and Q2 can be PMOS or NMOS transistors; in the circuits of the embodiments shown, components that do not affect the main meaning of the signal, such as other switches, can be inserted; for example, the input terminals of the comparator or the error amplifier are positive and negative. Can be interchanged, only need to correspond to the signal processing method of the correction circuit. All such modifications may be made in accordance with the teachings of the present invention, and the scope of the present invention should be construed to cover the above and other equivalents.

31. . . Bridge rectifier circuit

33,43,53. . . Control circuit

100,200,300. . . Power supply circuit

331,332,433,434. . . Comparison circuit

338,339. . . Voltage dividing circuit

435. . . Light load detection circuit

536,537. . . Circuit

AC. . . Exchange signal

AND1, AND2. . . Logic gate

App1-4. . . Application one to four

D1, D2. . . Dipole

Div1, Div2. . . Signal

FGND. . . Virtual ground

G1, G2. . . Switching operation signal

G11, G21. . . Switch control signal

Id. . . Current

L. . . Line signal

N. . . Median signal

Q1, Q2. . . Switching element

Vo1, Vo2, Vo3. . . Rectifier signal

Vref1, Vref2. . . default value

Vref3, Vref4. . . Reference signal

Figure 1 shows a typical bridge rectifier power supply circuit.

Figure 2 shows the power supply circuit disclosed in U.S. Patent No. 7,411,768.

Figure 3 shows the first embodiment of the present invention.

Figure 4 shows the signal waveforms of the line bit signal L, the median signal N, and the switching operation signals G1 and G2.

Figure 5 shows a second embodiment of the invention.

Figure 6 shows a third embodiment of the present invention.

Fig. 7 shows a fourth embodiment of the present invention.

Figure 8 shows a fifth embodiment of the present invention.

Figures 9A-9B show a sixth embodiment of the invention.

10A-10B shows the signal waveforms of the line bit signal L, the median signal N, and the virtual ground FGND when the load circuit is heavy and light load, respectively.

11A-11B shows the signal waveforms of the line bit signal L, the median signal N, the virtual ground FGND, and the switch operation signals G1 and G2 when the load circuit is heavy and light load, respectively.

Figure 12 shows a schematic diagram of a circuit to which the present invention is applied.

Figure 13 is a diagram showing the power saving ratio of the present invention under different application conditions.

31. . . Bridge rectifier circuit

33. . . Control circuit

300. . . Power supply circuit

AC. . . Exchange signal

D1, D2. . . Dipole

FGND. . . Virtual ground

G1, G2. . . Switching operation signal

L. . . Line signal

N. . . Median signal

Q1, Q2. . . Switching element

Claims (8)

A power supply circuit for converting an alternating current signal into a rectified signal, the alternating current signal comprising a line signal and a neutral signal, the power supply circuit comprising: a bridge rectifier circuit, including a pair a diode coupled to the opposite end and a pair of mutually coupled switching elements, the pair of diodes and the pair of switching elements being connected between the line signal and the center signal, the bridge rectifier circuit is At least one switch operation signal, the pair of switch elements are operated to convert the alternating current signal to the rectified signal; and a control circuit generates the switch operation signal according to the alternating current signal to operate the pair of switching elements, the control circuit comprising: a first comparison circuit for comparing a first signal related to one of the line bit signals with a second signal associated with the one of the median signals, and generating a second switch control signal for controlling the second according to the comparison result a second comparison circuit, comparing the second signal with the first signal, and generating a first switch control signal for controlling the first switch according to the comparison result And a light load detection circuit, comprising: a third comparison circuit, comparing a third reference signal and the second signal, and generating a first detection signal according to the comparison result; and a fourth comparison circuit comparing the first a third reference signal and the first signal, and a second detection signal is generated according to the comparison result; a first logic circuit determines, according to the first detection signal and the second switch control signal, that the second switch is turned on or Not conducting; and a second logic circuit, according to the second detection signal and the first a switching control signal, determining whether the first switch is turned on or off; wherein the pair of switching elements includes a first switch and a second switch, the first switch is coupled to the line bit signal, and the second switch is coupled Connected to the median signal, when the line bit signal is higher than the first preset value of the median signal, the second switch is turned on, when the median signal is higher than the second preset value of the line bit signal , turning on the first switch. A power supply circuit for converting an alternating current signal into a rectified signal, the alternating current signal comprising a line bit signal and a middle bit signal, the power supply circuit comprising: a bridge type rectifying circuit comprising a pair of opposite ends coupled to each other a diode and a pair of mutually coupled switching elements, the pair of diodes and the pair of switching elements are connected between the line signal and the center signal, and the bridge rectifier circuit operates according to at least one switch signal. Operating the pair of switching elements to convert the alternating current signal to the rectified signal; and a control circuit for generating the switching operation signal according to the alternating current signal to operate the pair of switching elements, the control circuit comprising: a first comparison circuit, Comparing one of the first signal related to the line bit signal and the second signal related to the one of the median signals, and according to the comparison result, generating a second switch control signal for controlling the second switch; a second comparison The circuit compares the second signal with the first signal, and according to the comparison result, generates a first switch control signal for controlling the first switch; And the first comparison circuit and the second comparison circuit are coupled to perform a de-bounce processing on the comparison result of the first comparison circuit and the second comparison circuit; and an operation circuit according to the first comparison Circuit and the second comparison As a result of the comparison between the circuits, the switch operation signal is generated to operate the first switch and the second switch; wherein the pair of switch elements includes a first switch and a second switch, the first switch is coupled to the line position signal And the second switch is coupled to the median signal, and when the line bit signal is higher than the first preset value of the median signal, turning on the second switch, when the median signal is higher than the line bit signal When the second preset value is reached, the first switch is turned on. The power supply circuit of claim 1 or 2, further comprising a voltage dividing circuit for converting the line bit signal and the median signal into the first signal and the second signal, respectively The first signal and the second signal are respectively proportional to the line signal and the median signal. The power supply circuit of claim 1 or 2, wherein the first preset value is the same as the second preset value. An AC signal rectification method for converting an AC signal into a rectified signal, the AC signal comprising a line bit signal and a median signal, the AC signal rectification method comprising: providing a bridge rectifier circuit comprising a pair of reverse ends a mutually coupled diode and a pair of mutually coupled switching elements, the pair of diodes and the pair of switching elements being connected between the line signal and the center signal, wherein the pair of switching elements comprises a first a switch and a second switch, the first switch is coupled to the line signal, and the second switch is coupled to the center signal; when the line signal is higher than the first signal of the median signal Turning on the second switch; and turning on the first switch when the median signal is higher than the second preset value of the line bit signal; wherein the step of generating the switch operation signal according to the alternating signal is further The method includes: comparing a first signal related to one of the line bit signals and a second signal related to the one of the median signals, and generating a second switch control signal for controlling the second switch according to the comparison result; comparing the The second signal and the first signal, and according to the comparison result, generate a first switch control signal for controlling the first switch; comparing a third reference signal with the second signal, and generating a first according to the comparison result a detection signal; comparing the third reference signal with the first signal, and generating a second detection signal according to the comparison result; determining the second switch according to the first detection signal and the second switch control signal Turning on or off; and determining whether the first switch is turned on or off according to the second detecting signal and the first switch control signal; thereby converting the alternating signal into the rectified signal. An AC signal rectification method for converting an AC signal into a rectified signal, the AC signal comprising a line bit signal and a median signal, the AC signal rectification method comprising: providing a bridge rectifier circuit comprising a pair of reverse ends a mutually coupled diode and a pair of mutually coupled switching elements, the pair of diodes and the pair of switching elements being connected between the line signal and the center signal, wherein the pair of switching elements comprises a first a switch and a second switch, the first switch is coupled to the line signal, and the second switch is coupled to the center signal; when the line signal is higher than the first signal of the median signal Turning on the second switch; and turning on the first signal when the median signal is higher than the second preset value of the line signal a switch, wherein the step of generating the switch operation signal according to the alternating signal further comprises: comparing a first signal related to one of the line bit signals with a second signal related to the one of the median signals, and according to the comparison result Generating a second switch control signal for controlling the second switch; comparing the second signal with the first signal, and generating a first switch control signal for controlling the first switch according to the comparison result; Decompressing the result of the comparison between the first comparison circuit and the second comparison circuit; and generating a switch operation signal to operate the first switch according to a comparison result between the first comparison circuit and the second comparison circuit The second switch; thereby converting the alternating signal into the rectified signal. The method of rectifying an alternating current signal according to claim 5, wherein the first signal and the second signal are respectively proportional to the line signal and the median signal. The method of rectifying an alternating current signal according to claim 5 or 6, wherein the first preset value is the same as the second preset value.