TWI472001B - Pixel array substrate and display panel - Google Patents

Description

Pixel array substrate and display panel

The present invention relates to a pixel array substrate and a display panel, and more particularly to a pixel array substrate and a display panel including a plurality of common electrodes.

With the rapid development of display technology, display panels have been applied to display devices of various sizes, such as televisions, computer screens, notebook computers, smart phones, and the like. Taking a smart phone as an example, since the current smart phone emphasizes the function of browsing the web and watching the audio and video media, the resolution of the display panel of the smart phone is particularly important.

In the prior art, a multi-pass mask process can be utilized to realize a high-resolution display panel. In the above process, the common electrode is disposed above the data line. With the metal shielding effect of the common electrode, the electrical interference between the data line and the pixel electrode can be reduced. Under this design, in order to avoid the problem of light leakage, the common electrode and the pixel electrode should be properly shielded from the light shielding pattern of the opposite substrate, so that the display panel has high light transmittance without the problem of light leakage. However, in the conventional design, when the designer wants to change the storage capacitance of the display panel by adjusting the overlapping area of the common electrode and the pixel electrode to improve the crosstalk or flicker problem, the area of the light shielding pattern may increase. The light transmittance of the display panel is lowered.

In view of the above, the present invention provides a pixel array substrate, and the display panel using the pixel array substrate has high display quality.

Further, the present invention provides a display panel having high display quality.

The invention provides a pixel array substrate, which comprises a first substrate, a plurality of pixel structures, a first common electrode and a second common electrode. The pixel structure is disposed on the first substrate. Each pixel structure includes an active element and a pixel electrode electrically connected to the active element. The first common electrode partially overlaps the pixel electrode. There is a first distance between the first common electrode and the pixel electrode. The second common electrode is electrically connected to the first common electrode. The second common electrode partially overlaps the pixel electrode and the first common electrode. There is a second distance between the second common electrode and the pixel electrode. The first distance is greater than the second distance.

The invention provides a display panel comprising the above pixel array substrate, a counter substrate and a display medium. The opposite substrate is disposed relative to the pixel array substrate. The display medium is disposed between the pixel array substrate and the opposite substrate.

In an embodiment of the invention, the pixel array substrate further includes a plurality of data lines and a plurality of scan lines. The data line is disposed on the first substrate and electrically connected to the plurality of sources of the active component. The scan line is disposed on the first substrate and electrically connected to the plurality of gates of the active device. The scan lines are interleaved with the data lines.

In an embodiment of the invention, the first common electrode and the scan line belong to the same film layer.

In an embodiment of the invention, the film layer to which the data line belongs is disposed between the film layer of the first common electrode and the film layer of the second common electrode.

In an embodiment of the invention, the first common electrode has a plurality of first connecting portions that are parallel to each other and a plurality of first branch portions that are parallel to each other and connected to the first connecting portion. The second common electrode has a plurality of second connecting portions that are parallel to each other and a plurality of second branch portions that are parallel to each other and connected to the second connecting portion. The extending direction of the first connecting portion and the second connecting portion is substantially parallel to the extending direction of the scanning line. The first connecting portion overlaps with the second connecting portion. The extending direction of the first branch portion and the second branch portion is substantially parallel to the extending direction of the data line. The first branch portion and the second branch portion cover a plurality of first edges of the pixel electrodes. The first edge is substantially parallel to the data line.

In an embodiment of the invention, the area in which the first branch portion overlaps the pixel electrode is larger than the area in which the second branch portion overlaps the pixel electrode.

In an embodiment of the invention, the first substrate has a display area and a peripheral area outside the display area. The pixel structure is arranged in the display area. The pixel array substrate further includes a first conductive pattern and a second conductive pattern. The first conductive pattern and the scan line belong to the same film layer and are disposed in the peripheral region. The second conductive pattern and the pixel electrode belong to the same film layer and are disposed in the peripheral region. The first common electrode and the second common electrode are electrically connected to each other through the first conductive pattern and the second conductive pattern.

In an embodiment of the invention, the pixel array substrate further includes a first dielectric layer, a second dielectric layer, and a third dielectric layer. The first dielectric layer is disposed between the film layer to which the scan line belongs and the film layer to which the data line belongs. The first dielectric layer has a first opening disposed in the peripheral region and exposing the first common electrode. First A conductive pattern fills the first opening to be in contact with the first common electrode. The second dielectric layer is disposed between the film layer to which the data line belongs and the film layer to which the second common electrode belongs. The second dielectric layer has a second opening disposed in the peripheral region and exposing the first conductive pattern. The third dielectric layer is disposed between the film layer to which the pixel electrode belongs and the film layer to which the second common electrode belongs. The third dielectric layer has a third opening exposing the second opening to the first conductive pattern and a fourth opening exposing the second common electrode pattern. The second conductive pattern fills the second opening and the third opening to be in contact with the first conductive pattern. The second conductive pattern fills the fourth opening in contact with the second common electrode.

In an embodiment of the invention, the opposite substrate includes a second substrate, a light shielding pattern, and a counter electrode. The light shielding pattern is disposed on the second substrate. The counter electrode is disposed on the light shielding pattern and the second substrate. The shading pattern covers the first edge of the pixel electrode. The light shielding pattern comprehensively covers the first branch portion, the second branch portion, and the data line. The counter electrode is electrically connected to the first common electrode and the second common electrode.

Based on the above, in the pixel array substrate and the display panel according to an embodiment of the present invention, the display panel according to an embodiment of the present invention can maintain high transmittance by designing a plurality of common electrodes having different distances from the pixel electrodes. Crosstalk or flicker problems caused by unoptimized storage capacitor values.

The above described features and advantages of the present invention will be more apparent from the following description.

1 is a cross-sectional view of a display panel in accordance with an embodiment of the present invention. Referring to FIG. 1 , the display panel 100 of the present embodiment includes a pixel array substrate 110 , a counter substrate 120 , and a display medium 130 . The counter substrate 120 is disposed relative to the pixel array substrate 110. The display medium 130 is located between the pixel array substrate 110 and the opposite substrate 120. In the present embodiment, the display medium 130 is, for example, a liquid crystal. However, the present invention is not limited thereto. In other embodiments, the display medium 130 may also be an organic light emitting layer, an electrophoretic liquid, or other suitable materials.

2 is a top plan view of the pixel array substrate of FIG. 1. In particular, Fig. 1 corresponds to the line segment A-A' of Fig. 2. Referring to FIG. 1 and FIG. 2 , the pixel array substrate 110 of the present embodiment includes a first substrate 112 , a plurality of pixel structures 114 disposed on the first substrate 112 , a first common electrode 116 , and a second common electrode 118 . The first substrate 112 has a display area 112a and a peripheral area 112b outside the display area 112a. The pixel structure 114 is disposed in the display area 112a. The first substrate 112 is mainly used to carry the components thereon, and the material of the first substrate 112 may be glass, quartz, organic polymer, or other applicable materials.

As shown in FIG. 2, each pixel structure 114 includes an active device T and a pixel electrode PE electrically connected to the active device T. In detail, the active device T of the present embodiment has a source S, a drain D, a gate G, and a channel layer CH. The pixel electrode PE can be electrically connected to the drain D of the active device T through the contact window H. The pixel array substrate 110 of the embodiment further includes a plurality of data lines DL and a plurality of scan lines SL. The data line DL is disposed on the first substrate 112 and It is electrically connected to the source S of the active device T. The scan line SL is disposed on the first substrate 112 and electrically connected to the gate G of the active device T. The scan line SL and the data line DL are alternately arranged. The pixel electrode PE of this embodiment is, for example, a transparent conductive layer, and the material of the pixel electrode PE includes a metal oxide such as indium tin oxide, indium zinc oxide, aluminum tin oxide, aluminum zinc oxide, indium antimonide zinc. An oxide, or other suitable oxide, or a stacked layer of at least two of the foregoing.

1 and 2, the first common electrode 116 partially overlaps the pixel electrode PE. In detail, in the present embodiment, the first common electrode 116 has a plurality of first connecting portions 116a (shown by one first connecting portion) parallel to each other and parallel to each other and connected to the first connecting portion 116a. A plurality of first branch portions 116b. The extending direction of the first connecting portion 116a is substantially parallel to the extending direction of the scanning line SL. The extending direction of the first branch portion 116b is substantially parallel to the extending direction of the data line DL. The first branch portion 116b covers the first edge E1 of the pixel electrode PE, wherein the first edge E1 is substantially parallel to the data line DL.

In this embodiment, the first common electrode 116 and the scan line SL may belong to the same film layer. The first common electrode 116 of this embodiment may also belong to the same film layer as the gate G of the active device T. In other words, the materials of the first common electrode 116, the scanning line SL, and the gate G can be the same. The material of the first common electrode 116, the scanning line SL, and the gate G includes a metal material, an alloy, a nitride of a metal material, or other suitable materials.

As shown in FIGS. 1 and 2, the second common electrode 118 partially overlaps the pixel electrode PE and the first common electrode 116. In detail, in this embodiment, The second common electrode 118 has a plurality of second connecting portions 118a (shown by one second connecting portion) that are parallel to each other, and a plurality of second branch portions 118b that are parallel to each other and connected to the second connecting portion 118a. The extending direction of the second connecting portion 118a is substantially parallel to the extending direction of the scanning line SL. The second connecting portion 118a overlaps with the first connecting portion 116a. Further, the second connection portion 118a may coincide with the first connection portion 116a in the display region 112a. The extending direction of the second branch portion 118b is substantially parallel to the extending direction of the data line DL. The second branch portion 118b covers the first edge E1 of the pixel electrode PE. The second branch portion 118b partially overlaps the first branch portion 116b. In the present embodiment, the area in which the first branch portion 116b overlaps the pixel electrode PE is larger than the area in which the second branch portion 118b overlaps the pixel electrode PE.

In addition, the film layer to which the data line DL of the present embodiment belongs may be disposed between the film layer to which the first common electrode 116 belongs and the film layer to which the second common electrode 118 belongs. The material of the second common electrode 118 has both a function of conduction and metal shielding. For example, the material of the second common electrode 118 includes a metal material, an alloy, a nitride of a metal material, or other suitable materials. In addition, the material of the second common electrode 118 further includes a transparent conductive material, such as indium tin oxide, indium zinc oxide, aluminum tin oxide, aluminum zinc oxide, indium antimony zinc oxide, or other suitable oxide, or It is a stacked layer of at least two of the above.

Figure 3 is a cross-sectional view corresponding to line B-B' of Figure 2. Referring to FIGS. 2 and 3 , the second common electrode 118 is electrically connected to the first common electrode 116 . Specifically, the pixel array substrate 110 of the embodiment further includes a first conductive pattern 113 and a second conductive pattern 115. First conductive pattern 113 It belongs to the same film layer as the scanning line SL and is disposed in the peripheral region 112b. The second conductive pattern 115 and the pixel electrode PE belong to the same film layer and are disposed in the peripheral region 112b. The first common electrode 116 and the second common electrode 118 are electrically connected to each other through the first conductive pattern 113 and the second conductive pattern 115 .

In detail, as shown in FIG. 3, the pixel array substrate 110 of the present embodiment further includes a first dielectric layer 117a, a second dielectric layer 117b, and a third dielectric layer 117c. The first dielectric layer 117a is disposed between the film layer to which the scan line SL belongs (ie, the film layer to which the first common electrode 116 belongs) and the film layer to which the data line DL (ie, the film layer to which the first conductive pattern 113 belongs) belongs. The second dielectric layer 117b is disposed between the film layer to which the data line DL belongs and the film layer to which the second common electric electrode 118 belongs. The third dielectric layer 117c is disposed between the film layer to which the pixel electrode PE belongs and the film layer to which the second common electrode 118 belongs. The first dielectric layer 117a, the second dielectric layer 117b, and the third dielectric layer 117c have light transmissivity and a high dielectric constant. The material of the first dielectric layer 117a, the second dielectric layer 117b, and the third dielectric layer 117c is an inorganic material (for example, yttrium oxide, tantalum nitride, hafnium oxynitride, or a stacked layer of at least two materials described above) , organic materials or a combination of the above.

In the present embodiment, as shown in FIGS. 2 and 3, the first dielectric layer 117a has a first opening H1 disposed in the peripheral region 112b and exposing the first common electrode 116. Further, the first opening H1 is the first connection portion 116a exposing the first common electrode 116. The first conductive pattern 113 is filled in the first opening H1 to be in contact with the first common electrode 116. The second dielectric layer 117b has a second opening H2 disposed in the peripheral region 112b and exposing the first conductive pattern 113. The third dielectric layer 117c has a third opening H3 exposing the second opening H2 and the first conductive pattern 113 and exposing the second common electrode pattern The fourth opening H4 of 118. Further, the fourth opening H4 is the second connection portion 118a exposing the second common electrode 118. One end of the second conductive pattern 115 is filled in the third opening H3 and the second opening H2 to be in contact with the first conductive pattern 113. The first conductive pattern 113 is in contact with the first common electrode 116. Further, the other end of the second conductive pattern 115 is filled in the fourth opening H4 to be in contact with the second common electrode 118. Therefore, the second common electrode 118 of the embodiment can be electrically connected to the first common electrode 116 in the peripheral region 112b.

Referring to FIG. 1 , the opposite substrate 120 of the present embodiment includes a second substrate 122 , a light shielding pattern 124 disposed on the second substrate 122 , and a counter electrode 126 disposed on the second substrate 122 and the light shielding pattern 124 . The second substrate 122 is mainly used to carry the components thereon, and the material of the second substrate 122 may be glass, quartz, organic polymer, or other applicable materials.

As shown in FIG. 1 and FIG. 2, the light shielding pattern 124 of the present embodiment covers the first edge E1 of the pixel electrode PE. The light shielding pattern 124 covers the second edge E2 of the opposite electrode 126 corresponding to the first edge E1. The light shielding pattern 124 comprehensively covers the first branch portion 116b, the second branch portion 118b, and the data line DL. The light shielding pattern 124 of this embodiment has a function of blocking the passage of light. The material of the light shielding pattern 124 includes black resin, metal or other light shielding material. The counter electrode 126 is electrically connected to the first common electrode 116 and the second common electrode 118. In detail, in the embodiment, the opposite electrode 126 is permeable to conductive particles (not shown) disposed between the pixel array substrate 110 and the opposite substrate 120, and the first common electrode 116 and the second common electrode 118. Electrical connection. The counter electrode 126 of this embodiment is, for example, a transparent conductive layer including a metal oxide such as indium tin oxide, indium zinc oxide, aluminum tin oxide. , aluminum zinc oxide, indium antimony zinc oxide, or other suitable oxide, or a stacked layer of at least two of the foregoing.

It should be noted that, as shown in FIG. 1, there is a first distance D1 between the first common electrode 116 and the pixel electrode PE. The first distance D1 is the shortest distance between the first common electrode 116 and the pixel electrode PE. There is a second distance D2 between the second common electrode 118 and the pixel electrode PE. The second distance D2 is the shortest distance between the second common electrode 118 and the pixel electrode PE. The first distance D1 is greater than the second distance D2.

Since the first common electrode 116 partially overlaps the pixel electrode PE, the first common electrode 116 and the pixel electrode PE may form a first storage capacitor. Since the second common electrode 118 partially overlaps the pixel electrode PE, the second common electrode 116 and the pixel electrode PE may form a second storage capacitor. The first common electrode 116 is electrically connected to the second common electrode 118. Therefore, the storage capacitance of the entire display panel 100 is the sum of the first storage capacitor and the second storage capacitor. By appropriately designing the first distance D1, the second distance D2, and the area where the first common electrode 116 and the second common electrode 118 overlap with the pixel electrode PE, the storage capacitance value of the entire display panel 100 can be optimized. The light emitted by the backlight can be blocked by the first common electrode 116 without increasing the area of the light shielding pattern 124, thereby enabling the display panel 100 to maintain a high light transmittance while optimizing the storage capacitance value.

As described above, in the pixel array substrate and the display panel of the embodiment of the present invention, the display panel of the embodiment of the present invention can be configured by the first common electrode and the second common electrode having different distances from the pixel electrodes. Improve crosstalk or flicker caused by unoptimized storage capacitor values while maintaining high light transmittance problem.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims.

100‧‧‧ display panel

110‧‧‧ pixel array substrate

112‧‧‧First base

112a‧‧‧ display area

112b‧‧‧ surrounding area

113‧‧‧First conductive pattern

114‧‧‧ pixel structure

115‧‧‧Second conductive pattern

116‧‧‧First common electrode

116a‧‧‧First connection

116b‧‧‧First Branch

117a‧‧‧First dielectric layer

117b‧‧‧Second dielectric layer

117c‧‧‧ third dielectric layer

118‧‧‧Second common electrode

118a‧‧‧Second connection

118b‧‧‧Second branch

120‧‧‧ opposite substrate

122‧‧‧Second substrate

124‧‧‧ shading pattern

126‧‧‧ opposite electrode

130‧‧‧Display media

CH‧‧‧ channel layer

D‧‧‧汲

D1‧‧‧First distance

D2‧‧‧Second distance

DL‧‧‧ data line

E1‧‧‧ first edge

E2‧‧‧ second edge

G‧‧‧ gate

H‧‧‧Contact window

H1‧‧‧ first opening

H2‧‧‧ second opening

H3‧‧‧ third opening

H4‧‧‧fourth opening

PE‧‧‧ pixel electrode

S‧‧‧ source

SL‧‧‧ scan line

T‧‧‧ active components

1 is a cross-sectional view of a display panel in accordance with an embodiment of the present invention.

2 is a top plan view of the pixel array substrate of FIG. 1.

Figure 3 is a cross-sectional view corresponding to line B-B' of Figure 2.

100‧‧‧ display panel

110‧‧‧ pixel array substrate

112‧‧‧First base

112a‧‧‧ display area

114‧‧‧ pixel structure

116‧‧‧First common electrode

116b‧‧‧First Branch

117a‧‧‧First dielectric layer

117b‧‧‧Second dielectric layer

117c‧‧‧ third dielectric layer

118‧‧‧Second common electrode

118b‧‧‧Second branch

120‧‧‧ opposite substrate

122‧‧‧Second substrate

124‧‧‧ shading pattern

126‧‧‧ opposite electrode

130‧‧‧Display media

D1‧‧‧First distance

D2‧‧‧Second distance

DL‧‧‧ scan line

E1‧‧‧ first edge

E2‧‧‧ second edge

PE‧‧‧ pixel electrode

Claims (15)

A pixel array substrate includes: a first substrate; a plurality of pixel structures disposed on the first substrate, each of the pixel structures including an active component and a pixel electrode electrically connected to the active component The active device has a source, a drain, a gate, and a channel layer; a first common electrode partially overlapping the pixel electrodes, and between the first common electrode and the pixel electrodes There is a first distance; and a second common electrode electrically connected to the first common electrode and partially overlapping the pixel electrodes and the first common electrode, the second common electrode and the pixel electrodes There is a second distance, wherein the first distance is greater than the second distance; a plurality of data lines are disposed on the first substrate and electrically connected to the sources of the active components, wherein the data lines The film layer is disposed between the film layer of the first common electrode and the film layer of the second common electrode; and a plurality of scan lines disposed on the first substrate and electrically connected to the gates of the active components Sexual connection, the sweep These lines and the data lines staggered configuration. The pixel array substrate of claim 1, wherein the first common electrode and the scan lines belong to the same film layer. The pixel array substrate of claim 1, wherein the first common electrode has a plurality of first connecting portions parallel to each other and a plurality of first branch portions parallel to each other and connected to the first connecting portions The second The common electrode has a plurality of second connecting portions that are parallel to each other and a plurality of second branch portions that are parallel to each other and connected to the second connecting portions. The pixel array substrate of claim 3, wherein the first connecting portion and the second connecting portion extend in a direction substantially parallel to an extending direction of the scan lines, and the first connecting portions And overlapping with the second connecting portions, the extending directions of the first branch portions and the second branch portions are substantially parallel to the extending direction of the data lines, and the first branch portions and the second branch portions Covering a plurality of first edges of the pixel electrodes, the first edges being substantially parallel to the data lines. The pixel array substrate of claim 4, wherein an area of the first branch portions overlapping the pixel electrodes is larger than an area of the second branch portions overlapping the pixel electrodes. The pixel array substrate of claim 1, wherein the first substrate has a display area and a peripheral area outside the display area, and the pixel structures are disposed in the display area, and the pixel array substrate is further The first conductive pattern and the scan lines belong to the same film layer and are disposed in the peripheral region, and the second conductive pattern and the pixel electrodes belong to the same film layer and The first common electrode and the second common electrode are electrically connected to the first conductive pattern and the second conductive pattern. The pixel array substrate of claim 6, further comprising: a first dielectric layer disposed between the film layer to which the scan lines belong and the film layer to which the data lines belong, the first dielectric The layer has a configuration in the peripheral area and Exposing a first opening of the first common electrode, the first conductive pattern filling the first opening to be in contact with the first common electrode; and a second dielectric layer disposed on the film layer of the data line Between the film layers of the second common electrode, the second dielectric layer has a second opening disposed in the peripheral region and exposing the first conductive pattern; and a third dielectric layer disposed on the plurality of layers Between the film layer of the element electrode and the film layer of the second common electrode, the third dielectric layer has a third opening exposing the second opening and the first conductive pattern and exposing the second common electrode pattern a fourth opening, the second conductive pattern is filled in the second opening and the third opening to be in contact with the first conductive pattern, and the second conductive pattern is filled in the fourth opening to be in contact with the second common electrode. A display panel includes: a pixel array substrate, comprising: a first substrate; a plurality of pixel structures disposed on the first substrate, each of the pixel structures including an active component and an electrical component a connected one pixel electrode; a first common electrode partially overlapping the pixel electrodes, a first distance between the first common electrode and the pixel electrodes; and a second common electrode The first common electrode is electrically connected to and overlaps with the pixel electrodes and the first common electrode, and a second distance exists between the second common electrode and the pixel electrodes, wherein the first distance is greater than the first distance Two distances; a plurality of data lines are disposed on the first substrate and electrically connected to the plurality of sources of the active components, wherein the film layers of the data lines are disposed on the film layer of the first common electrode and the second share Between the layers of the electrode layer; and a plurality of scan lines disposed on the first substrate and electrically connected to the plurality of gates of the active components, the scan lines are alternately arranged with the data lines; The substrate is disposed relative to the pixel array substrate; and a display medium is disposed between the pixel array substrate and the opposite substrate. The display panel of claim 8, wherein the first common electrode and the scan lines belong to the same film layer. The display panel of claim 8, wherein the first common electrode has a plurality of first connecting portions parallel to each other and a plurality of first branch portions parallel to each other and connected to the first connecting portions, The second common electrode has a plurality of second connecting portions that are parallel to each other and a plurality of second branch portions that are parallel to each other and connected to the second connecting portions. The display panel of claim 10, wherein the first connecting portion and the second connecting portion extend in a direction substantially parallel to an extending direction of the scan lines, and the first connecting portion and the The second connecting portions are overlapped, and the extending directions of the first branch portions and the second branch portions are substantially parallel to the extending direction of the data lines, and the first branch portions and the second branch portions cover the a plurality of first edges of the pixel electrodes, the first edges being substantially parallel to the data lines. The display panel of claim 11, wherein the opposite substrate comprises: a second substrate; a light shielding pattern disposed on the second substrate; and a pair of electrodes disposed on the light shielding pattern and a second substrate, wherein the light shielding pattern covers the first edges of the pixel electrodes, and the light shielding pattern comprehensively covers the first branch portions, the second branch portions, and the data lines, the pair The electrode is electrically connected to the first common electrode and the second common electrode. The display panel of claim 11, wherein an area of the first branch portion overlapping the pixel electrodes is larger than an area of the second branch portions overlapping the pixel electrodes. The display panel of claim 8, wherein the first substrate has a display area and a peripheral area outside the display area, and the pixel structures are disposed in the display area, and the pixel array substrate further comprises a a first conductive pattern and a second conductive pattern, the first conductive pattern and the scan lines belong to the same film layer and are disposed in the peripheral region, the second conductive pattern and the pixel electrodes belong to the same film layer and are disposed on In the peripheral region, the first common electrode and the second common electrode are electrically connected through the first conductive pattern and the second conductive pattern. The display panel of claim 14, wherein the pixel array substrate further comprises: a first dielectric layer disposed between the film layer of the scan lines and the film layer of the data lines; The first dielectric layer has a configuration in the peripheral region Exposing a first opening of the first common electrode, the first conductive pattern filling the first opening to be in contact with the first common electrode; and a second dielectric layer disposed on the film layer of the data line Between the film layers of the second common electrode, the second dielectric layer has a second opening disposed in the peripheral region and exposing the first conductive pattern; and a third dielectric layer disposed on the plurality of layers Between the film layer of the element electrode and the film layer of the second common electrode, the third dielectric layer has a third opening exposing the second opening and the first conductive pattern and exposing the second common electrode pattern a fourth opening, the second conductive pattern fills the second opening and the third opening to contact the first conductive pattern, and the second conductive pattern fills the fourth opening to contact the second common electrode.